Merge tag 'keys-acl-20190703' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowel...
[linux-2.6-microblaze.git] / sound / soc / codecs / hdmi-codec.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * ALSA SoC codec for HDMI encoder drivers
4  * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
5  * Author: Jyri Sarha <jsarha@ti.com>
6  */
7 #include <linux/module.h>
8 #include <linux/string.h>
9 #include <sound/core.h>
10 #include <sound/pcm.h>
11 #include <sound/pcm_params.h>
12 #include <sound/soc.h>
13 #include <sound/tlv.h>
14 #include <sound/pcm_drm_eld.h>
15 #include <sound/hdmi-codec.h>
16 #include <sound/pcm_iec958.h>
17
18 #include <drm/drm_crtc.h> /* This is only to get MAX_ELD_BYTES */
19
20 #define HDMI_CODEC_CHMAP_IDX_UNKNOWN  -1
21
22 struct hdmi_codec_channel_map_table {
23         unsigned char map;      /* ALSA API channel map position */
24         unsigned long spk_mask;         /* speaker position bit mask */
25 };
26
27 /*
28  * CEA speaker placement for HDMI 1.4:
29  *
30  *  FL  FLC   FC   FRC   FR   FRW
31  *
32  *                                  LFE
33  *
34  *  RL  RLC   RC   RRC   RR
35  *
36  *  Speaker placement has to be extended to support HDMI 2.0
37  */
38 enum hdmi_codec_cea_spk_placement {
39         FL  = BIT(0),   /* Front Left           */
40         FC  = BIT(1),   /* Front Center         */
41         FR  = BIT(2),   /* Front Right          */
42         FLC = BIT(3),   /* Front Left Center    */
43         FRC = BIT(4),   /* Front Right Center   */
44         RL  = BIT(5),   /* Rear Left            */
45         RC  = BIT(6),   /* Rear Center          */
46         RR  = BIT(7),   /* Rear Right           */
47         RLC = BIT(8),   /* Rear Left Center     */
48         RRC = BIT(9),   /* Rear Right Center    */
49         LFE = BIT(10),  /* Low Frequency Effect */
50 };
51
52 /*
53  * cea Speaker allocation structure
54  */
55 struct hdmi_codec_cea_spk_alloc {
56         const int ca_id;
57         unsigned int n_ch;
58         unsigned long mask;
59 };
60
61 /* Channel maps  stereo HDMI */
62 static const struct snd_pcm_chmap_elem hdmi_codec_stereo_chmaps[] = {
63         { .channels = 2,
64           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } },
65         { }
66 };
67
68 /* Channel maps for multi-channel playbacks, up to 8 n_ch */
69 static const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = {
70         { .channels = 2, /* CA_ID 0x00 */
71           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } },
72         { .channels = 4, /* CA_ID 0x01 */
73           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
74                    SNDRV_CHMAP_NA } },
75         { .channels = 4, /* CA_ID 0x02 */
76           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
77                    SNDRV_CHMAP_FC } },
78         { .channels = 4, /* CA_ID 0x03 */
79           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
80                    SNDRV_CHMAP_FC } },
81         { .channels = 6, /* CA_ID 0x04 */
82           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
83                    SNDRV_CHMAP_NA, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
84         { .channels = 6, /* CA_ID 0x05 */
85           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
86                    SNDRV_CHMAP_NA, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
87         { .channels = 6, /* CA_ID 0x06 */
88           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
89                    SNDRV_CHMAP_FC, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
90         { .channels = 6, /* CA_ID 0x07 */
91           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
92                    SNDRV_CHMAP_FC, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
93         { .channels = 6, /* CA_ID 0x08 */
94           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
95                    SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
96         { .channels = 6, /* CA_ID 0x09 */
97           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
98                    SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
99         { .channels = 6, /* CA_ID 0x0A */
100           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
101                    SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
102         { .channels = 6, /* CA_ID 0x0B */
103           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
104                    SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
105         { .channels = 8, /* CA_ID 0x0C */
106           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
107                    SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
108                    SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
109         { .channels = 8, /* CA_ID 0x0D */
110           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
111                    SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
112                    SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
113         { .channels = 8, /* CA_ID 0x0E */
114           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
115                    SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
116                    SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
117         { .channels = 8, /* CA_ID 0x0F */
118           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
119                    SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
120                    SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
121         { .channels = 8, /* CA_ID 0x10 */
122           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
123                    SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
124                    SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } },
125         { .channels = 8, /* CA_ID 0x11 */
126           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
127                    SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
128                    SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } },
129         { .channels = 8, /* CA_ID 0x12 */
130           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
131                    SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
132                    SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } },
133         { .channels = 8, /* CA_ID 0x13 */
134           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
135                    SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
136                    SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } },
137         { .channels = 8, /* CA_ID 0x14 */
138           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
139                    SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
140                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
141         { .channels = 8, /* CA_ID 0x15 */
142           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
143                    SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
144                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
145         { .channels = 8, /* CA_ID 0x16 */
146           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
147                    SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
148                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
149         { .channels = 8, /* CA_ID 0x17 */
150           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
151                    SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
152                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
153         { .channels = 8, /* CA_ID 0x18 */
154           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
155                    SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
156                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
157         { .channels = 8, /* CA_ID 0x19 */
158           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
159                    SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
160                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
161         { .channels = 8, /* CA_ID 0x1A */
162           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
163                    SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
164                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
165         { .channels = 8, /* CA_ID 0x1B */
166           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
167                    SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
168                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
169         { .channels = 8, /* CA_ID 0x1C */
170           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
171                    SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
172                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
173         { .channels = 8, /* CA_ID 0x1D */
174           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
175                    SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
176                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
177         { .channels = 8, /* CA_ID 0x1E */
178           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
179                    SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
180                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
181         { .channels = 8, /* CA_ID 0x1F */
182           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
183                    SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
184                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
185         { }
186 };
187
188 /*
189  * hdmi_codec_channel_alloc: speaker configuration available for CEA
190  *
191  * This is an ordered list that must match with hdmi_codec_8ch_chmaps struct
192  * The preceding ones have better chances to be selected by
193  * hdmi_codec_get_ch_alloc_table_idx().
194  */
195 static const struct hdmi_codec_cea_spk_alloc hdmi_codec_channel_alloc[] = {
196         { .ca_id = 0x00, .n_ch = 2,
197           .mask = FL | FR},
198         /* 2.1 */
199         { .ca_id = 0x01, .n_ch = 4,
200           .mask = FL | FR | LFE},
201         /* Dolby Surround */
202         { .ca_id = 0x02, .n_ch = 4,
203           .mask = FL | FR | FC },
204         /* surround51 */
205         { .ca_id = 0x0b, .n_ch = 6,
206           .mask = FL | FR | LFE | FC | RL | RR},
207         /* surround40 */
208         { .ca_id = 0x08, .n_ch = 6,
209           .mask = FL | FR | RL | RR },
210         /* surround41 */
211         { .ca_id = 0x09, .n_ch = 6,
212           .mask = FL | FR | LFE | RL | RR },
213         /* surround50 */
214         { .ca_id = 0x0a, .n_ch = 6,
215           .mask = FL | FR | FC | RL | RR },
216         /* 6.1 */
217         { .ca_id = 0x0f, .n_ch = 8,
218           .mask = FL | FR | LFE | FC | RL | RR | RC },
219         /* surround71 */
220         { .ca_id = 0x13, .n_ch = 8,
221           .mask = FL | FR | LFE | FC | RL | RR | RLC | RRC },
222         /* others */
223         { .ca_id = 0x03, .n_ch = 8,
224           .mask = FL | FR | LFE | FC },
225         { .ca_id = 0x04, .n_ch = 8,
226           .mask = FL | FR | RC},
227         { .ca_id = 0x05, .n_ch = 8,
228           .mask = FL | FR | LFE | RC },
229         { .ca_id = 0x06, .n_ch = 8,
230           .mask = FL | FR | FC | RC },
231         { .ca_id = 0x07, .n_ch = 8,
232           .mask = FL | FR | LFE | FC | RC },
233         { .ca_id = 0x0c, .n_ch = 8,
234           .mask = FL | FR | RC | RL | RR },
235         { .ca_id = 0x0d, .n_ch = 8,
236           .mask = FL | FR | LFE | RL | RR | RC },
237         { .ca_id = 0x0e, .n_ch = 8,
238           .mask = FL | FR | FC | RL | RR | RC },
239         { .ca_id = 0x10, .n_ch = 8,
240           .mask = FL | FR | RL | RR | RLC | RRC },
241         { .ca_id = 0x11, .n_ch = 8,
242           .mask = FL | FR | LFE | RL | RR | RLC | RRC },
243         { .ca_id = 0x12, .n_ch = 8,
244           .mask = FL | FR | FC | RL | RR | RLC | RRC },
245         { .ca_id = 0x14, .n_ch = 8,
246           .mask = FL | FR | FLC | FRC },
247         { .ca_id = 0x15, .n_ch = 8,
248           .mask = FL | FR | LFE | FLC | FRC },
249         { .ca_id = 0x16, .n_ch = 8,
250           .mask = FL | FR | FC | FLC | FRC },
251         { .ca_id = 0x17, .n_ch = 8,
252           .mask = FL | FR | LFE | FC | FLC | FRC },
253         { .ca_id = 0x18, .n_ch = 8,
254           .mask = FL | FR | RC | FLC | FRC },
255         { .ca_id = 0x19, .n_ch = 8,
256           .mask = FL | FR | LFE | RC | FLC | FRC },
257         { .ca_id = 0x1a, .n_ch = 8,
258           .mask = FL | FR | RC | FC | FLC | FRC },
259         { .ca_id = 0x1b, .n_ch = 8,
260           .mask = FL | FR | LFE | RC | FC | FLC | FRC },
261         { .ca_id = 0x1c, .n_ch = 8,
262           .mask = FL | FR | RL | RR | FLC | FRC },
263         { .ca_id = 0x1d, .n_ch = 8,
264           .mask = FL | FR | LFE | RL | RR | FLC | FRC },
265         { .ca_id = 0x1e, .n_ch = 8,
266           .mask = FL | FR | FC | RL | RR | FLC | FRC },
267         { .ca_id = 0x1f, .n_ch = 8,
268           .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC },
269 };
270
271 struct hdmi_codec_priv {
272         struct hdmi_codec_pdata hcd;
273         struct snd_soc_dai_driver *daidrv;
274         struct hdmi_codec_daifmt daifmt[2];
275         struct mutex current_stream_lock;
276         struct snd_pcm_substream *current_stream;
277         uint8_t eld[MAX_ELD_BYTES];
278         struct snd_pcm_chmap *chmap_info;
279         unsigned int chmap_idx;
280 };
281
282 static const struct snd_soc_dapm_widget hdmi_widgets[] = {
283         SND_SOC_DAPM_OUTPUT("TX"),
284 };
285
286 enum {
287         DAI_ID_I2S = 0,
288         DAI_ID_SPDIF,
289 };
290
291 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
292                              struct snd_ctl_elem_info *uinfo)
293 {
294         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
295         uinfo->count = FIELD_SIZEOF(struct hdmi_codec_priv, eld);
296
297         return 0;
298 }
299
300 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
301                             struct snd_ctl_elem_value *ucontrol)
302 {
303         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
304         struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
305
306         memcpy(ucontrol->value.bytes.data, hcp->eld, sizeof(hcp->eld));
307
308         return 0;
309 }
310
311 static unsigned long hdmi_codec_spk_mask_from_alloc(int spk_alloc)
312 {
313         int i;
314         static const unsigned long hdmi_codec_eld_spk_alloc_bits[] = {
315                 [0] = FL | FR, [1] = LFE, [2] = FC, [3] = RL | RR,
316                 [4] = RC, [5] = FLC | FRC, [6] = RLC | RRC,
317         };
318         unsigned long spk_mask = 0;
319
320         for (i = 0; i < ARRAY_SIZE(hdmi_codec_eld_spk_alloc_bits); i++) {
321                 if (spk_alloc & (1 << i))
322                         spk_mask |= hdmi_codec_eld_spk_alloc_bits[i];
323         }
324
325         return spk_mask;
326 }
327
328 static void hdmi_codec_eld_chmap(struct hdmi_codec_priv *hcp)
329 {
330         u8 spk_alloc;
331         unsigned long spk_mask;
332
333         spk_alloc = drm_eld_get_spk_alloc(hcp->eld);
334         spk_mask = hdmi_codec_spk_mask_from_alloc(spk_alloc);
335
336         /* Detect if only stereo supported, else return 8 channels mappings */
337         if ((spk_mask & ~(FL | FR)) && hcp->chmap_info->max_channels > 2)
338                 hcp->chmap_info->chmap = hdmi_codec_8ch_chmaps;
339         else
340                 hcp->chmap_info->chmap = hdmi_codec_stereo_chmaps;
341 }
342
343 static int hdmi_codec_get_ch_alloc_table_idx(struct hdmi_codec_priv *hcp,
344                                              unsigned char channels)
345 {
346         int i;
347         u8 spk_alloc;
348         unsigned long spk_mask;
349         const struct hdmi_codec_cea_spk_alloc *cap = hdmi_codec_channel_alloc;
350
351         spk_alloc = drm_eld_get_spk_alloc(hcp->eld);
352         spk_mask = hdmi_codec_spk_mask_from_alloc(spk_alloc);
353
354         for (i = 0; i < ARRAY_SIZE(hdmi_codec_channel_alloc); i++, cap++) {
355                 /* If spk_alloc == 0, HDMI is unplugged return stereo config*/
356                 if (!spk_alloc && cap->ca_id == 0)
357                         return i;
358                 if (cap->n_ch != channels)
359                         continue;
360                 if (!(cap->mask == (spk_mask & cap->mask)))
361                         continue;
362                 return i;
363         }
364
365         return -EINVAL;
366 }
367 static int hdmi_codec_chmap_ctl_get(struct snd_kcontrol *kcontrol,
368                               struct snd_ctl_elem_value *ucontrol)
369 {
370         unsigned const char *map;
371         unsigned int i;
372         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
373         struct hdmi_codec_priv *hcp = info->private_data;
374
375         map = info->chmap[hcp->chmap_idx].map;
376
377         for (i = 0; i < info->max_channels; i++) {
378                 if (hcp->chmap_idx == HDMI_CODEC_CHMAP_IDX_UNKNOWN)
379                         ucontrol->value.integer.value[i] = 0;
380                 else
381                         ucontrol->value.integer.value[i] = map[i];
382         }
383
384         return 0;
385 }
386
387 static int hdmi_codec_new_stream(struct snd_pcm_substream *substream,
388                                  struct snd_soc_dai *dai)
389 {
390         struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
391         int ret = 0;
392
393         mutex_lock(&hcp->current_stream_lock);
394         if (!hcp->current_stream) {
395                 hcp->current_stream = substream;
396         } else if (hcp->current_stream != substream) {
397                 dev_err(dai->dev, "Only one simultaneous stream supported!\n");
398                 ret = -EINVAL;
399         }
400         mutex_unlock(&hcp->current_stream_lock);
401
402         return ret;
403 }
404
405 static int hdmi_codec_startup(struct snd_pcm_substream *substream,
406                               struct snd_soc_dai *dai)
407 {
408         struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
409         int ret = 0;
410
411         dev_dbg(dai->dev, "%s()\n", __func__);
412
413         ret = hdmi_codec_new_stream(substream, dai);
414         if (ret)
415                 return ret;
416
417         if (hcp->hcd.ops->audio_startup) {
418                 ret = hcp->hcd.ops->audio_startup(dai->dev->parent, hcp->hcd.data);
419                 if (ret) {
420                         mutex_lock(&hcp->current_stream_lock);
421                         hcp->current_stream = NULL;
422                         mutex_unlock(&hcp->current_stream_lock);
423                         return ret;
424                 }
425         }
426
427         if (hcp->hcd.ops->get_eld) {
428                 ret = hcp->hcd.ops->get_eld(dai->dev->parent, hcp->hcd.data,
429                                             hcp->eld, sizeof(hcp->eld));
430
431                 if (!ret) {
432                         ret = snd_pcm_hw_constraint_eld(substream->runtime,
433                                                         hcp->eld);
434                         if (ret) {
435                                 mutex_lock(&hcp->current_stream_lock);
436                                 hcp->current_stream = NULL;
437                                 mutex_unlock(&hcp->current_stream_lock);
438                                 return ret;
439                         }
440                 }
441                 /* Select chmap supported */
442                 hdmi_codec_eld_chmap(hcp);
443         }
444         return 0;
445 }
446
447 static void hdmi_codec_shutdown(struct snd_pcm_substream *substream,
448                                 struct snd_soc_dai *dai)
449 {
450         struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
451
452         dev_dbg(dai->dev, "%s()\n", __func__);
453
454         WARN_ON(hcp->current_stream != substream);
455
456         hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN;
457         hcp->hcd.ops->audio_shutdown(dai->dev->parent, hcp->hcd.data);
458
459         mutex_lock(&hcp->current_stream_lock);
460         hcp->current_stream = NULL;
461         mutex_unlock(&hcp->current_stream_lock);
462 }
463
464 static int hdmi_codec_hw_params(struct snd_pcm_substream *substream,
465                                 struct snd_pcm_hw_params *params,
466                                 struct snd_soc_dai *dai)
467 {
468         struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
469         struct hdmi_codec_params hp = {
470                 .iec = {
471                         .status = { 0 },
472                         .subcode = { 0 },
473                         .pad = 0,
474                         .dig_subframe = { 0 },
475                 }
476         };
477         int ret, idx;
478
479         dev_dbg(dai->dev, "%s() width %d rate %d channels %d\n", __func__,
480                 params_width(params), params_rate(params),
481                 params_channels(params));
482
483         ret = snd_pcm_create_iec958_consumer_hw_params(params, hp.iec.status,
484                                                        sizeof(hp.iec.status));
485         if (ret < 0) {
486                 dev_err(dai->dev, "Creating IEC958 channel status failed %d\n",
487                         ret);
488                 return ret;
489         }
490
491         hdmi_audio_infoframe_init(&hp.cea);
492         hp.cea.channels = params_channels(params);
493         hp.cea.coding_type = HDMI_AUDIO_CODING_TYPE_STREAM;
494         hp.cea.sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM;
495         hp.cea.sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM;
496
497         /* Select a channel allocation that matches with ELD and pcm channels */
498         idx = hdmi_codec_get_ch_alloc_table_idx(hcp, hp.cea.channels);
499         if (idx < 0) {
500                 dev_err(dai->dev, "Not able to map channels to speakers (%d)\n",
501                         idx);
502                 hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN;
503                 return idx;
504         }
505         hp.cea.channel_allocation = hdmi_codec_channel_alloc[idx].ca_id;
506         hcp->chmap_idx = hdmi_codec_channel_alloc[idx].ca_id;
507
508         hp.sample_width = params_width(params);
509         hp.sample_rate = params_rate(params);
510         hp.channels = params_channels(params);
511
512         return hcp->hcd.ops->hw_params(dai->dev->parent, hcp->hcd.data,
513                                        &hcp->daifmt[dai->id], &hp);
514 }
515
516 static int hdmi_codec_set_fmt(struct snd_soc_dai *dai,
517                               unsigned int fmt)
518 {
519         struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
520         struct hdmi_codec_daifmt cf = { 0 };
521
522         dev_dbg(dai->dev, "%s()\n", __func__);
523
524         if (dai->id == DAI_ID_SPDIF)
525                 return 0;
526
527         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
528         case SND_SOC_DAIFMT_CBM_CFM:
529                 cf.bit_clk_master = 1;
530                 cf.frame_clk_master = 1;
531                 break;
532         case SND_SOC_DAIFMT_CBS_CFM:
533                 cf.frame_clk_master = 1;
534                 break;
535         case SND_SOC_DAIFMT_CBM_CFS:
536                 cf.bit_clk_master = 1;
537                 break;
538         case SND_SOC_DAIFMT_CBS_CFS:
539                 break;
540         default:
541                 return -EINVAL;
542         }
543
544         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
545         case SND_SOC_DAIFMT_NB_NF:
546                 break;
547         case SND_SOC_DAIFMT_NB_IF:
548                 cf.frame_clk_inv = 1;
549                 break;
550         case SND_SOC_DAIFMT_IB_NF:
551                 cf.bit_clk_inv = 1;
552                 break;
553         case SND_SOC_DAIFMT_IB_IF:
554                 cf.frame_clk_inv = 1;
555                 cf.bit_clk_inv = 1;
556                 break;
557         }
558
559         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
560         case SND_SOC_DAIFMT_I2S:
561                 cf.fmt = HDMI_I2S;
562                 break;
563         case SND_SOC_DAIFMT_DSP_A:
564                 cf.fmt = HDMI_DSP_A;
565                 break;
566         case SND_SOC_DAIFMT_DSP_B:
567                 cf.fmt = HDMI_DSP_B;
568                 break;
569         case SND_SOC_DAIFMT_RIGHT_J:
570                 cf.fmt = HDMI_RIGHT_J;
571                 break;
572         case SND_SOC_DAIFMT_LEFT_J:
573                 cf.fmt = HDMI_LEFT_J;
574                 break;
575         case SND_SOC_DAIFMT_AC97:
576                 cf.fmt = HDMI_AC97;
577                 break;
578         default:
579                 dev_err(dai->dev, "Invalid DAI interface format\n");
580                 return -EINVAL;
581         }
582
583         hcp->daifmt[dai->id] = cf;
584
585         return 0;
586 }
587
588 static int hdmi_codec_digital_mute(struct snd_soc_dai *dai, int mute)
589 {
590         struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
591
592         dev_dbg(dai->dev, "%s()\n", __func__);
593
594         if (hcp->hcd.ops->digital_mute)
595                 return hcp->hcd.ops->digital_mute(dai->dev->parent,
596                                                   hcp->hcd.data, mute);
597
598         return 0;
599 }
600
601 static const struct snd_soc_dai_ops hdmi_dai_ops = {
602         .startup        = hdmi_codec_startup,
603         .shutdown       = hdmi_codec_shutdown,
604         .hw_params      = hdmi_codec_hw_params,
605         .set_fmt        = hdmi_codec_set_fmt,
606         .digital_mute   = hdmi_codec_digital_mute,
607 };
608
609
610 #define HDMI_RATES      (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
611                          SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |\
612                          SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
613                          SNDRV_PCM_RATE_192000)
614
615 #define SPDIF_FORMATS   (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |\
616                          SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE |\
617                          SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |\
618                          SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
619
620 /*
621  * This list is only for formats allowed on the I2S bus. So there is
622  * some formats listed that are not supported by HDMI interface. For
623  * instance allowing the 32-bit formats enables 24-precision with CPU
624  * DAIs that do not support 24-bit formats. If the extra formats cause
625  * problems, we should add the video side driver an option to disable
626  * them.
627  */
628 #define I2S_FORMATS     (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |\
629                          SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE |\
630                          SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |\
631                          SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE |\
632                          SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE)
633
634 static int hdmi_codec_pcm_new(struct snd_soc_pcm_runtime *rtd,
635                               struct snd_soc_dai *dai)
636 {
637         struct snd_soc_dai_driver *drv = dai->driver;
638         struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
639         struct snd_kcontrol *kctl;
640         struct snd_kcontrol_new hdmi_eld_ctl = {
641                 .access = SNDRV_CTL_ELEM_ACCESS_READ |
642                           SNDRV_CTL_ELEM_ACCESS_VOLATILE,
643                 .iface  = SNDRV_CTL_ELEM_IFACE_PCM,
644                 .name   = "ELD",
645                 .info   = hdmi_eld_ctl_info,
646                 .get    = hdmi_eld_ctl_get,
647                 .device = rtd->pcm->device,
648         };
649         int ret;
650
651         dev_dbg(dai->dev, "%s()\n", __func__);
652
653         ret =  snd_pcm_add_chmap_ctls(rtd->pcm, SNDRV_PCM_STREAM_PLAYBACK,
654                                       NULL, drv->playback.channels_max, 0,
655                                       &hcp->chmap_info);
656         if (ret < 0)
657                 return ret;
658
659         /* override handlers */
660         hcp->chmap_info->private_data = hcp;
661         hcp->chmap_info->kctl->get = hdmi_codec_chmap_ctl_get;
662
663         /* default chmap supported is stereo */
664         hcp->chmap_info->chmap = hdmi_codec_stereo_chmaps;
665         hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN;
666
667         /* add ELD ctl with the device number corresponding to the PCM stream */
668         kctl = snd_ctl_new1(&hdmi_eld_ctl, dai->component);
669         if (!kctl)
670                 return -ENOMEM;
671
672         return snd_ctl_add(rtd->card->snd_card, kctl);
673 }
674
675 static int hdmi_dai_probe(struct snd_soc_dai *dai)
676 {
677         struct snd_soc_dapm_context *dapm;
678         struct snd_soc_dapm_route route = {
679                 .sink = "TX",
680                 .source = dai->driver->playback.stream_name,
681         };
682
683         dapm = snd_soc_component_get_dapm(dai->component);
684
685         return snd_soc_dapm_add_routes(dapm, &route, 1);
686 }
687
688 static const struct snd_soc_dai_driver hdmi_i2s_dai = {
689         .name = "i2s-hifi",
690         .id = DAI_ID_I2S,
691         .probe = hdmi_dai_probe,
692         .playback = {
693                 .stream_name = "I2S Playback",
694                 .channels_min = 2,
695                 .channels_max = 8,
696                 .rates = HDMI_RATES,
697                 .formats = I2S_FORMATS,
698                 .sig_bits = 24,
699         },
700         .ops = &hdmi_dai_ops,
701         .pcm_new = hdmi_codec_pcm_new,
702 };
703
704 static const struct snd_soc_dai_driver hdmi_spdif_dai = {
705         .name = "spdif-hifi",
706         .id = DAI_ID_SPDIF,
707         .probe = hdmi_dai_probe,
708         .playback = {
709                 .stream_name = "SPDIF Playback",
710                 .channels_min = 2,
711                 .channels_max = 2,
712                 .rates = HDMI_RATES,
713                 .formats = SPDIF_FORMATS,
714         },
715         .ops = &hdmi_dai_ops,
716         .pcm_new = hdmi_codec_pcm_new,
717 };
718
719 static int hdmi_of_xlate_dai_id(struct snd_soc_component *component,
720                                  struct device_node *endpoint)
721 {
722         struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
723         int ret = -ENOTSUPP; /* see snd_soc_get_dai_id() */
724
725         if (hcp->hcd.ops->get_dai_id)
726                 ret = hcp->hcd.ops->get_dai_id(component, endpoint);
727
728         return ret;
729 }
730
731 static const struct snd_soc_component_driver hdmi_driver = {
732         .dapm_widgets           = hdmi_widgets,
733         .num_dapm_widgets       = ARRAY_SIZE(hdmi_widgets),
734         .of_xlate_dai_id        = hdmi_of_xlate_dai_id,
735         .idle_bias_on           = 1,
736         .use_pmdown_time        = 1,
737         .endianness             = 1,
738         .non_legacy_dai_naming  = 1,
739 };
740
741 static int hdmi_codec_probe(struct platform_device *pdev)
742 {
743         struct hdmi_codec_pdata *hcd = pdev->dev.platform_data;
744         struct device *dev = &pdev->dev;
745         struct hdmi_codec_priv *hcp;
746         int dai_count, i = 0;
747         int ret;
748
749         dev_dbg(dev, "%s()\n", __func__);
750
751         if (!hcd) {
752                 dev_err(dev, "%s: No platform data\n", __func__);
753                 return -EINVAL;
754         }
755
756         dai_count = hcd->i2s + hcd->spdif;
757         if (dai_count < 1 || !hcd->ops || !hcd->ops->hw_params ||
758             !hcd->ops->audio_shutdown) {
759                 dev_err(dev, "%s: Invalid parameters\n", __func__);
760                 return -EINVAL;
761         }
762
763         hcp = devm_kzalloc(dev, sizeof(*hcp), GFP_KERNEL);
764         if (!hcp)
765                 return -ENOMEM;
766
767         hcp->hcd = *hcd;
768         mutex_init(&hcp->current_stream_lock);
769
770         hcp->daidrv = devm_kcalloc(dev, dai_count, sizeof(*hcp->daidrv),
771                                    GFP_KERNEL);
772         if (!hcp->daidrv)
773                 return -ENOMEM;
774
775         if (hcd->i2s) {
776                 hcp->daidrv[i] = hdmi_i2s_dai;
777                 hcp->daidrv[i].playback.channels_max =
778                         hcd->max_i2s_channels;
779                 i++;
780         }
781
782         if (hcd->spdif) {
783                 hcp->daidrv[i] = hdmi_spdif_dai;
784                 hcp->daifmt[DAI_ID_SPDIF].fmt = HDMI_SPDIF;
785         }
786
787         dev_set_drvdata(dev, hcp);
788
789         ret = devm_snd_soc_register_component(dev, &hdmi_driver, hcp->daidrv,
790                                      dai_count);
791         if (ret) {
792                 dev_err(dev, "%s: snd_soc_register_component() failed (%d)\n",
793                         __func__, ret);
794                 return ret;
795         }
796         return 0;
797 }
798
799 static struct platform_driver hdmi_codec_driver = {
800         .driver = {
801                 .name = HDMI_CODEC_DRV_NAME,
802         },
803         .probe = hdmi_codec_probe,
804 };
805
806 module_platform_driver(hdmi_codec_driver);
807
808 MODULE_AUTHOR("Jyri Sarha <jsarha@ti.com>");
809 MODULE_DESCRIPTION("HDMI Audio Codec Driver");
810 MODULE_LICENSE("GPL");
811 MODULE_ALIAS("platform:" HDMI_CODEC_DRV_NAME);