sound/soc/codecs/es8326.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 //
   3 // es8326.c -- es8326 ALSA SoC audio driver
   4 // Copyright Everest Semiconductor Co., Ltd
   5 //
   6 // Authors: David Yang <yangxiaohua@everest-semi.com>
   7 //
   8
   9 #include <linux/clk.h>
  10 #include <linux/i2c.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/irq.h>
  13 #include <linux/module.h>
  14 #include <sound/jack.h>
  15 #include <sound/pcm_params.h>
  16 #include <sound/soc.h>
  17 #include <sound/soc-dapm.h>
  18 #include <sound/tlv.h>
  19 #include "es8326.h"
  20
  21 struct es8326_priv {
  22         struct clk *mclk;
  23         struct i2c_client *i2c;
  24         struct regmap *regmap;
  25         struct snd_soc_component *component;
  26         struct delayed_work jack_detect_work;
  27         struct delayed_work button_press_work;
  28         struct snd_soc_jack *jack;
  29         int irq;
  30         /* The lock protects the situation that an irq is generated
  31          * while enabling or disabling or during an irq.
  32          */
  33         struct mutex lock;
  34         u8 mic1_src;
  35         u8 mic2_src;
  36         u8 jack_pol;
  37         u8 interrupt_src;
  38         u8 interrupt_clk;
  39         bool jd_inverted;
  40         unsigned int sysclk;
  41
  42         bool calibrated;
  43         int version;
  44         int hp;
  45         int jack_remove_retry;
  46 };
  47
  48 static int es8326_crosstalk1_get(struct snd_kcontrol *kcontrol,
  49                 struct snd_ctl_elem_value *ucontrol)
  50 {
  51         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
  52         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
  53         unsigned int crosstalk_h, crosstalk_l;
  54         unsigned int crosstalk;
  55
  56         regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h);
  57         regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
  58         crosstalk_h &= 0x20;
  59         crosstalk_l &= 0xf0;
  60         crosstalk = crosstalk_h >> 1 | crosstalk_l >> 4;
  61         ucontrol->value.integer.value[0] = crosstalk;
  62
  63         return 0;
  64 }
  65
  66 static int es8326_crosstalk1_set(struct snd_kcontrol *kcontrol,
  67                 struct snd_ctl_elem_value *ucontrol)
  68 {
  69         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
  70         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
  71         unsigned int crosstalk_h, crosstalk_l;
  72         unsigned int crosstalk;
  73
  74         crosstalk = ucontrol->value.integer.value[0];
  75         regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
  76         crosstalk_h = (crosstalk & 0x10) << 1;
  77         crosstalk_l &= 0x0f;
  78         crosstalk_l |= (crosstalk & 0x0f) << 4;
  79         regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE,
  80                         0x20, crosstalk_h);
  81         regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l);
  82
  83         return 0;
  84 }
  85
  86 static int es8326_crosstalk2_get(struct snd_kcontrol *kcontrol,
  87                 struct snd_ctl_elem_value *ucontrol)
  88 {
  89         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
  90         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
  91         unsigned int crosstalk_h, crosstalk_l;
  92         unsigned int crosstalk;
  93
  94         regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h);
  95         regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
  96         crosstalk_h &= 0x10;
  97         crosstalk_l &= 0x0f;
  98         crosstalk = crosstalk_h  | crosstalk_l;
  99         ucontrol->value.integer.value[0] = crosstalk;
 100
 101         return 0;
 102 }
 103
 104 static int es8326_crosstalk2_set(struct snd_kcontrol *kcontrol,
 105                 struct snd_ctl_elem_value *ucontrol)
 106 {
 107         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 108         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
 109         unsigned int crosstalk_h, crosstalk_l;
 110         unsigned int crosstalk;
 111
 112         crosstalk = ucontrol->value.integer.value[0];
 113         regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
 114         crosstalk_h = crosstalk & 0x10;
 115         crosstalk_l &= 0xf0;
 116         crosstalk_l |= crosstalk & 0x0f;
 117         regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE,
 118                         0x10, crosstalk_h);
 119         regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l);
 120
 121         return 0;
 122 }
 123
 124 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9550, 50, 0);
 125 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9550, 50, 0);
 126 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_analog_pga_tlv, 0, 300, 0);
 127 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_pga_tlv, 0, 600, 0);
 128 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(softramp_rate, 0, 100, 0);
 129 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(drc_target_tlv, -3200, 200, 0);
 130 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(drc_recovery_tlv, -125, 250, 0);
 131
 132 static const char *const winsize[] = {
 133         "0.25db/2  LRCK",
 134         "0.25db/4  LRCK",
 135         "0.25db/8  LRCK",
 136         "0.25db/16  LRCK",
 137         "0.25db/32  LRCK",
 138         "0.25db/64  LRCK",
 139         "0.25db/128  LRCK",
 140         "0.25db/256  LRCK",
 141         "0.25db/512  LRCK",
 142         "0.25db/1024  LRCK",
 143         "0.25db/2048  LRCK",
 144         "0.25db/4096  LRCK",
 145         "0.25db/8192  LRCK",
 146         "0.25db/16384  LRCK",
 147         "0.25db/32768  LRCK",
 148         "0.25db/65536  LRCK",
 149 };
 150
 151 static const char *const dacpol_txt[] = {
 152         "Normal", "R Invert", "L Invert", "L + R Invert" };
 153
 154 static const struct soc_enum dacpol =
 155         SOC_ENUM_SINGLE(ES8326_DAC_DSM, 4, 4, dacpol_txt);
 156 static const struct soc_enum alc_winsize =
 157         SOC_ENUM_SINGLE(ES8326_ADC_RAMPRATE, 4, 16, winsize);
 158 static const struct soc_enum drc_winsize =
 159         SOC_ENUM_SINGLE(ES8326_DRC_WINSIZE, 4, 16, winsize);
 160
 161 static const struct snd_kcontrol_new es8326_snd_controls[] = {
 162         SOC_SINGLE_TLV("DAC Playback Volume", ES8326_DAC_VOL, 0, 0xbf, 0, dac_vol_tlv),
 163         SOC_ENUM("Playback Polarity", dacpol),
 164         SOC_SINGLE_TLV("DAC Ramp Rate", ES8326_DAC_RAMPRATE, 0, 0x0f, 0, softramp_rate),
 165         SOC_SINGLE_TLV("DRC Recovery Level", ES8326_DRC_RECOVERY, 0, 4, 0, drc_recovery_tlv),
 166         SOC_ENUM("DRC Winsize", drc_winsize),
 167         SOC_SINGLE_TLV("DRC Target Level", ES8326_DRC_WINSIZE, 0, 0x0f, 0, drc_target_tlv),
 168
 169         SOC_DOUBLE_R_TLV("ADC Capture Volume", ES8326_ADC1_VOL, ES8326_ADC2_VOL, 0, 0xff, 0,
 170                          adc_vol_tlv),
 171         SOC_DOUBLE_TLV("ADC PGA Volume", ES8326_ADC_SCALE, 4, 0, 5, 0, adc_pga_tlv),
 172         SOC_SINGLE_TLV("ADC PGA Gain Volume", ES8326_PGAGAIN, 0, 10, 0, adc_analog_pga_tlv),
 173         SOC_SINGLE_TLV("ADC Ramp Rate", ES8326_ADC_RAMPRATE, 0, 0x0f, 0, softramp_rate),
 174         SOC_SINGLE("ALC Capture Switch", ES8326_ALC_RECOVERY, 3, 1, 0),
 175         SOC_SINGLE_TLV("ALC Capture Recovery Level", ES8326_ALC_LEVEL,
 176                         0, 4, 0, drc_recovery_tlv),
 177         SOC_ENUM("ALC Capture Winsize", alc_winsize),
 178         SOC_SINGLE_TLV("ALC Capture Target Level", ES8326_ALC_LEVEL,
 179                         0, 0x0f, 0, drc_target_tlv),
 180
 181         SOC_SINGLE_EXT("CROSSTALK1", SND_SOC_NOPM, 0, 31, 0,
 182                         es8326_crosstalk1_get, es8326_crosstalk1_set),
 183         SOC_SINGLE_EXT("CROSSTALK2", SND_SOC_NOPM, 0, 31, 0,
 184                         es8326_crosstalk2_get, es8326_crosstalk2_set),
 185 };
 186
 187 static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = {
 188         SND_SOC_DAPM_INPUT("MIC1"),
 189         SND_SOC_DAPM_INPUT("MIC2"),
 190         SND_SOC_DAPM_INPUT("MIC3"),
 191         SND_SOC_DAPM_INPUT("MIC4"),
 192
 193         SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
 194         SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
 195
 196         /* Digital Interface */
 197         SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S1 Capture", 0, SND_SOC_NOPM, 0, 0),
 198         SND_SOC_DAPM_AIF_IN("I2S IN", "I2S1 Playback", 0, SND_SOC_NOPM, 0, 0),
 199
 200         /* ADC Digital Mute */
 201         SND_SOC_DAPM_PGA("ADC L1", ES8326_ADC_MUTE, 0, 1, NULL, 0),
 202         SND_SOC_DAPM_PGA("ADC R1", ES8326_ADC_MUTE, 1, 1, NULL, 0),
 203         SND_SOC_DAPM_PGA("ADC L2", ES8326_ADC_MUTE, 2, 1, NULL, 0),
 204         SND_SOC_DAPM_PGA("ADC R2", ES8326_ADC_MUTE, 3, 1, NULL, 0),
 205
 206         /* Analog Power Supply*/
 207         SND_SOC_DAPM_DAC("Right DAC", NULL, ES8326_ANA_PDN, 0, 1),
 208         SND_SOC_DAPM_DAC("Left DAC", NULL, ES8326_ANA_PDN, 1, 1),
 209         SND_SOC_DAPM_SUPPLY("MICBIAS1", ES8326_ANA_MICBIAS, 2, 0, NULL, 0),
 210         SND_SOC_DAPM_SUPPLY("MICBIAS2", ES8326_ANA_MICBIAS, 3, 0, NULL, 0),
 211
 212         SND_SOC_DAPM_PGA("LHPMIX", ES8326_DAC2HPMIX, 7, 0, NULL, 0),
 213         SND_SOC_DAPM_PGA("RHPMIX", ES8326_DAC2HPMIX, 3, 0, NULL, 0),
 214
 215         SND_SOC_DAPM_REG(snd_soc_dapm_supply, "HPOR Supply", ES8326_HP_CAL,
 216                          4, 7, 0, 0),
 217         SND_SOC_DAPM_REG(snd_soc_dapm_supply, "HPOL Supply", ES8326_HP_CAL,
 218                          0, 7, 0, 0),
 219
 220         SND_SOC_DAPM_OUTPUT("HPOL"),
 221         SND_SOC_DAPM_OUTPUT("HPOR"),
 222 };
 223
 224 static const struct snd_soc_dapm_route es8326_dapm_routes[] = {
 225         {"ADC L1", NULL, "MIC1"},
 226         {"ADC R1", NULL, "MIC2"},
 227         {"ADC L2", NULL, "MIC3"},
 228         {"ADC R2", NULL, "MIC4"},
 229
 230         {"ADC L", NULL, "ADC L1"},
 231         {"ADC R", NULL, "ADC R1"},
 232         {"ADC L", NULL, "ADC L2"},
 233         {"ADC R", NULL, "ADC R2"},
 234
 235         {"I2S OUT", NULL, "ADC L"},
 236         {"I2S OUT", NULL, "ADC R"},
 237
 238         {"Right DAC", NULL, "I2S IN"},
 239         {"Left DAC", NULL, "I2S IN"},
 240
 241         {"LHPMIX", NULL, "Left DAC"},
 242         {"RHPMIX", NULL, "Right DAC"},
 243
 244         {"HPOR", NULL, "HPOR Supply"},
 245         {"HPOL", NULL, "HPOL Supply"},
 246
 247         {"HPOL", NULL, "LHPMIX"},
 248         {"HPOR", NULL, "RHPMIX"},
 249 };
 250
 251 static bool es8326_volatile_register(struct device *dev, unsigned int reg)
 252 {
 253         switch (reg) {
 254         case ES8326_HPL_OFFSET_INI:
 255         case ES8326_HPR_OFFSET_INI:
 256         case ES8326_HPDET_STA:
 257         case ES8326_CTIA_OMTP_STA:
 258         case ES8326_CSM_MUTE_STA:
 259                 return true;
 260         default:
 261                 return false;
 262         }
 263 }
 264
 265 static const struct regmap_config es8326_regmap_config = {
 266         .reg_bits = 8,
 267         .val_bits = 8,
 268         .max_register = 0xff,
 269         .volatile_reg = es8326_volatile_register,
 270         .cache_type = REGCACHE_RBTREE,
 271 };
 272
 273 struct _coeff_div {
 274         u16 fs;
 275         u32 rate;
 276         u32 mclk;
 277         u8 reg4;
 278         u8 reg5;
 279         u8 reg6;
 280         u8 reg7;
 281         u8 reg8;
 282         u8 reg9;
 283         u8 rega;
 284         u8 regb;
 285 };
 286
 287 /* codec hifi mclk clock divider coefficients */
 288 /* {ratio, LRCK, MCLK, REG04, REG05, REG06, REG07, REG08, REG09, REG10, REG11} */
 289 static const struct _coeff_div coeff_div_v0[] = {
 290         {64, 8000, 512000, 0x60, 0x01, 0x0F, 0x75, 0x0A, 0x1B, 0x1F, 0x7F},
 291         {64, 16000, 1024000, 0x20, 0x00, 0x33, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
 292         {64, 44100, 2822400, 0xE0, 0x00, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 293         {64, 48000, 3072000, 0xE0, 0x00, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 294         {128, 8000, 1024000, 0x60, 0x00, 0x33, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},
 295         {128, 16000, 2048000, 0x20, 0x00, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
 296         {128, 44100, 5644800, 0xE0, 0x01, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 297         {128, 48000, 6144000, 0xE0, 0x01, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 298
 299         {192, 32000, 6144000, 0xE0, 0x02, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 300         {256, 8000, 2048000, 0x60, 0x00, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},
 301         {256, 16000, 4096000, 0x20, 0x01, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
 302         {256, 44100, 11289600, 0xE0, 0x00, 0x30, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 303         {256, 48000, 12288000, 0xE0, 0x00, 0x30, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 304         {384, 32000, 12288000, 0xE0, 0x05, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 305         {400, 48000, 19200000, 0xE9, 0x04, 0x0F, 0x6d, 0x4A, 0x0A, 0x1F, 0x1F},
 306
 307         {500, 48000, 24000000, 0xF8, 0x04, 0x3F, 0x6D, 0x4A, 0x0A, 0x1F, 0x1F},
 308         {512, 8000, 4096000, 0x60, 0x01, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},
 309         {512, 16000, 8192000, 0x20, 0x00, 0x30, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
 310         {512, 44100, 22579200, 0xE0, 0x00, 0x00, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 311         {512, 48000, 24576000, 0xE0, 0x00, 0x00, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 312         {768, 32000, 24576000, 0xE0, 0x02, 0x30, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
 313         {1024, 8000, 8192000, 0x60, 0x00, 0x30, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},
 314         {1024, 16000, 16384000, 0x20, 0x00, 0x00, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
 315 };
 316
 317 static const struct _coeff_div coeff_div_v3[] = {
 318         {32, 8000, 256000, 0x60, 0x00, 0x0F, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
 319         {32, 16000, 512000, 0x20, 0x00, 0x0D, 0x75, 0x8A, 0x1B, 0x1F, 0x3F},
 320         {32, 44100, 1411200, 0x00, 0x00, 0x13, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F},
 321         {32, 48000, 1536000, 0x00, 0x00, 0x13, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F},
 322         {36, 8000, 288000, 0x20, 0x00, 0x0D, 0x75, 0x8A, 0x1B, 0x23, 0x47},
 323         {36, 16000, 576000, 0x20, 0x00, 0x0D, 0x75, 0x8A, 0x1B, 0x23, 0x47},
 324         {48, 8000, 384000, 0x60, 0x02, 0x1F, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
 325         {48, 16000, 768000, 0x20, 0x02, 0x0F, 0x75, 0x8A, 0x1B, 0x1F, 0x3F},
 326         {48, 48000, 2304000, 0x00, 0x02, 0x0D, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F},
 327
 328         {64, 8000, 512000, 0x60, 0x00, 0x35, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
 329         {64, 16000, 1024000, 0x20, 0x00, 0x05, 0x75, 0x8A, 0x1B, 0x1F, 0x3F},
 330         {64, 44100, 2822400, 0xE0, 0x00, 0x31, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
 331         {64, 48000, 3072000, 0xE0, 0x00, 0x31, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
 332         {72, 8000, 576000, 0x20, 0x00, 0x13, 0x35, 0x8A, 0x1B, 0x23, 0x47},
 333         {72, 16000, 1152000, 0x20, 0x00, 0x05, 0x75, 0x8A, 0x1B, 0x23, 0x47},
 334         {96, 8000, 768000, 0x60, 0x02, 0x1D, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
 335         {96, 16000, 1536000, 0x20, 0x02, 0x0D, 0x75, 0x8A, 0x1B, 0x1F, 0x3F},
 336         {100, 48000, 4800000, 0x04, 0x04, 0x3F, 0x6D, 0xB8, 0x08, 0x4f, 0x1f},
 337         {125, 48000, 6000000, 0x04, 0x04, 0x1F, 0x2D, 0x8A, 0x0A, 0x27, 0x27},
 338
 339         {128, 8000, 1024000, 0x60, 0x00, 0x05, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
 340         {128, 16000, 2048000, 0x20, 0x00, 0x31, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},
 341         {128, 44100, 5644800, 0xE0, 0x00, 0x01, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
 342         {128, 48000, 6144000, 0xE0, 0x00, 0x01, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
 343         {144, 8000, 1152000, 0x20, 0x00, 0x03, 0x35, 0x8A, 0x1B, 0x23, 0x47},
 344         {144, 16000, 2304000, 0x20, 0x00, 0x11, 0x35, 0x8A, 0x1B, 0x23, 0x47},
 345         {192, 8000, 1536000, 0x60, 0x02, 0x0D, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
 346         {192, 32000, 6144000, 0xE0, 0x02, 0x31, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
 347         {192, 16000, 3072000, 0x20, 0x02, 0x05, 0x75, 0xCA, 0x1B, 0x1F, 0x3F},
 348
 349         {200, 48000, 9600000, 0x04, 0x04, 0x0F, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
 350         {250, 48000, 12000000, 0x04, 0x04, 0x0F, 0x2D, 0xCA, 0x0A, 0x27, 0x27},
 351         {256, 8000, 2048000, 0x60, 0x00, 0x31, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},
 352         {256, 16000, 4096000, 0x20, 0x00, 0x01, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},
 353         {256, 44100, 11289600, 0xE0, 0x00, 0x30, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
 354         {256, 48000, 12288000, 0xE0, 0x00, 0x30, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
 355         {288, 8000, 2304000, 0x20, 0x00, 0x01, 0x35, 0x8A, 0x1B, 0x23, 0x47},
 356         {384, 8000, 3072000, 0x60, 0x02, 0x05, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
 357         {384, 16000, 6144000, 0x20, 0x02, 0x03, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},
 358         {384, 32000, 12288000, 0xE0, 0x02, 0x01, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
 359         {384, 48000, 18432000, 0x00, 0x02, 0x01, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F},
 360
 361         {400, 48000, 19200000, 0xE4, 0x04, 0x35, 0x6d, 0xCA, 0x0A, 0x1F, 0x1F},
 362         {500, 48000, 24000000, 0xF8, 0x04, 0x3F, 0x6D, 0xCA, 0x0A, 0x1F, 0x1F},
 363         {512, 8000, 4096000, 0x60, 0x00, 0x01, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},
 364         {512, 16000, 8192000, 0x20, 0x00, 0x30, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},
 365         {512, 44100, 22579200, 0xE0, 0x00, 0x00, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
 366         {512, 48000, 24576000, 0xE0, 0x00, 0x00, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
 367         {768, 8000, 6144000, 0x60, 0x02, 0x11, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},
 368         {768, 16000, 12288000, 0x20, 0x02, 0x01, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},
 369         {768, 32000, 24576000, 0xE0, 0x02, 0x30, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
 370         {800, 48000, 38400000, 0x00, 0x18, 0x13, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F},
 371
 372         {1024, 8000, 8192000, 0x60, 0x00, 0x30, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},
 373         {1024, 16000, 16384000, 0x20, 0x00, 0x00, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},
 374         {1152, 16000, 18432000, 0x20, 0x08, 0x11, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},
 375         {1536, 8000, 12288000, 0x60, 0x02, 0x01, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},
 376         {1536, 16000, 24576000, 0x20, 0x02, 0x10, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},
 377         {1625, 8000, 13000000, 0x0C, 0x18, 0x1F, 0x2D, 0x8A, 0x0A, 0x27, 0x27},
 378         {1625, 16000, 26000000, 0x0C, 0x18, 0x1F, 0x2D, 0x8A, 0x0A, 0x27, 0x27},
 379         {2048, 8000, 16384000, 0x60, 0x00, 0x00, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},
 380         {2304, 8000, 18432000, 0x40, 0x02, 0x10, 0x35, 0x8A, 0x1B, 0x1F, 0x5F},
 381         {3072, 8000, 24576000, 0x60, 0x02, 0x10, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},
 382         {3250, 8000, 26000000, 0x0C, 0x18, 0x0F, 0x2D, 0x8A, 0x0A, 0x27, 0x27},
 383 };
 384
 385 static inline int get_coeff(int mclk, int rate, int array,
 386                                 const struct _coeff_div *coeff_div)
 387 {
 388         int i;
 389
 390         for (i = 0; i < array; i++) {
 391                 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
 392                         return i;
 393         }
 394
 395         return -EINVAL;
 396 }
 397
 398 static int es8326_set_dai_sysclk(struct snd_soc_dai *codec_dai,
 399                                  int clk_id, unsigned int freq, int dir)
 400 {
 401         struct snd_soc_component *codec = codec_dai->component;
 402         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(codec);
 403
 404         es8326->sysclk = freq;
 405
 406         return 0;
 407 }
 408
 409 static int es8326_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
 410 {
 411         struct snd_soc_component *component = codec_dai->component;
 412         u8 iface = 0;
 413
 414         switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
 415         case SND_SOC_DAIFMT_CBC_CFP:
 416                 snd_soc_component_update_bits(component, ES8326_RESET,
 417                                               ES8326_MASTER_MODE_EN, ES8326_MASTER_MODE_EN);
 418                 break;
 419         case SND_SOC_DAIFMT_CBC_CFC:
 420                 break;
 421         default:
 422                 return -EINVAL;
 423         }
 424
 425         /* interface format */
 426         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 427         case SND_SOC_DAIFMT_I2S:
 428                 break;
 429         case SND_SOC_DAIFMT_RIGHT_J:
 430                 dev_err(component->dev, "Codec driver does not support right justified\n");
 431                 return -EINVAL;
 432         case SND_SOC_DAIFMT_LEFT_J:
 433                 iface |= ES8326_DAIFMT_LEFT_J;
 434                 break;
 435         case SND_SOC_DAIFMT_DSP_A:
 436                 iface |= ES8326_DAIFMT_DSP_A;
 437                 break;
 438         case SND_SOC_DAIFMT_DSP_B:
 439                 iface |= ES8326_DAIFMT_DSP_B;
 440                 break;
 441         default:
 442                 return -EINVAL;
 443         }
 444
 445         snd_soc_component_update_bits(component, ES8326_FMT, ES8326_DAIFMT_MASK, iface);
 446
 447         return 0;
 448 }
 449
 450 static int es8326_pcm_hw_params(struct snd_pcm_substream *substream,
 451                                 struct snd_pcm_hw_params *params,
 452                                 struct snd_soc_dai *dai)
 453 {
 454         struct snd_soc_component *component = dai->component;
 455         const struct _coeff_div *coeff_div;
 456         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
 457         u8 srate = 0;
 458         int coeff, array;
 459
 460         if (es8326->version == 0) {
 461                 coeff_div =  coeff_div_v0;
 462                 array = ARRAY_SIZE(coeff_div_v0);
 463         } else {
 464                 coeff_div =  coeff_div_v3;
 465                 array = ARRAY_SIZE(coeff_div_v3);
 466         }
 467         coeff = get_coeff(es8326->sysclk, params_rate(params), array, coeff_div);
 468         /* bit size */
 469         switch (params_format(params)) {
 470         case SNDRV_PCM_FORMAT_S16_LE:
 471                 srate |= ES8326_S16_LE;
 472                 break;
 473         case SNDRV_PCM_FORMAT_S20_3LE:
 474                 srate |= ES8326_S20_3_LE;
 475                 break;
 476         case SNDRV_PCM_FORMAT_S18_3LE:
 477                 srate |= ES8326_S18_LE;
 478                 break;
 479         case SNDRV_PCM_FORMAT_S24_LE:
 480                 srate |= ES8326_S24_LE;
 481                 break;
 482         case SNDRV_PCM_FORMAT_S32_LE:
 483                 srate |= ES8326_S32_LE;
 484                 break;
 485         default:
 486                 return -EINVAL;
 487         }
 488
 489         /* set iface & srate */
 490         snd_soc_component_update_bits(component, ES8326_FMT, ES8326_DATA_LEN_MASK, srate);
 491
 492         if (coeff >= 0) {
 493                 regmap_write(es8326->regmap,  ES8326_CLK_DIV1,
 494                              coeff_div[coeff].reg4);
 495                 regmap_write(es8326->regmap,  ES8326_CLK_DIV2,
 496                              coeff_div[coeff].reg5);
 497                 regmap_write(es8326->regmap,  ES8326_CLK_DLL,
 498                              coeff_div[coeff].reg6);
 499                 regmap_write(es8326->regmap,  ES8326_CLK_MUX,
 500                              coeff_div[coeff].reg7);
 501                 regmap_write(es8326->regmap,  ES8326_CLK_ADC_SEL,
 502                              coeff_div[coeff].reg8);
 503                 regmap_write(es8326->regmap,  ES8326_CLK_DAC_SEL,
 504                              coeff_div[coeff].reg9);
 505                 regmap_write(es8326->regmap,  ES8326_CLK_ADC_OSR,
 506                              coeff_div[coeff].rega);
 507                 regmap_write(es8326->regmap,  ES8326_CLK_DAC_OSR,
 508                              coeff_div[coeff].regb);
 509         } else {
 510                 dev_warn(component->dev, "Clock coefficients do not match");
 511         }
 512
 513         return 0;
 514 }
 515
 516 static int es8326_mute(struct snd_soc_dai *dai, int mute, int direction)
 517 {
 518         struct snd_soc_component *component = dai->component;
 519         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
 520         unsigned int offset_l, offset_r;
 521
 522         if (mute) {
 523                 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF);
 524                 regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,
 525                                 ES8326_MUTE_MASK, ES8326_MUTE);
 526                 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF,
 527                                 0x30, 0x00);
 528         } else {
 529                 if (!es8326->calibrated) {
 530                         regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_FORCE_CAL);
 531                         msleep(30);
 532                         regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF);
 533                         regmap_read(es8326->regmap, ES8326_HPL_OFFSET_INI, &offset_l);
 534                         regmap_read(es8326->regmap, ES8326_HPR_OFFSET_INI, &offset_r);
 535                         regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c);
 536                         regmap_write(es8326->regmap, ES8326_HPL_OFFSET_INI, offset_l);
 537                         regmap_write(es8326->regmap, ES8326_HPR_OFFSET_INI, offset_r);
 538                         es8326->calibrated = true;
 539                 }
 540                 regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x01);
 541                 usleep_range(1000, 5000);
 542                 regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x00);
 543                 usleep_range(1000, 5000);
 544                 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x20);
 545                 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x30);
 546                 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);
 547                 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_ON);
 548                 regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,
 549                                 ES8326_MUTE_MASK, ~(ES8326_MUTE));
 550         }
 551         return 0;
 552 }
 553
 554 static int es8326_set_bias_level(struct snd_soc_component *codec,
 555                                  enum snd_soc_bias_level level)
 556 {
 557         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(codec);
 558         int ret;
 559
 560         switch (level) {
 561         case SND_SOC_BIAS_ON:
 562                 ret = clk_prepare_enable(es8326->mclk);
 563                 if (ret)
 564                         return ret;
 565
 566                 regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x02);
 567                 usleep_range(5000, 10000);
 568                 regmap_write(es8326->regmap, ES8326_INTOUT_IO, es8326->interrupt_clk);
 569                 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO,
 570                             (ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT));
 571                 regmap_write(es8326->regmap, ES8326_PGA_PDN, 0x40);
 572                 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00);
 573                 regmap_update_bits(es8326->regmap,  ES8326_CLK_CTL, 0x20, 0x20);
 574                 regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x00);
 575                 break;
 576         case SND_SOC_BIAS_PREPARE:
 577                 break;
 578         case SND_SOC_BIAS_STANDBY:
 579                 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b);
 580                 regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x00);
 581                 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, ES8326_IO_INPUT);
 582                 break;
 583         case SND_SOC_BIAS_OFF:
 584                 clk_disable_unprepare(es8326->mclk);
 585                 break;
 586         }
 587
 588         return 0;
 589 }
 590
 591 #define es8326_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
 592         SNDRV_PCM_FMTBIT_S24_LE)
 593
 594 static const struct snd_soc_dai_ops es8326_ops = {
 595         .hw_params = es8326_pcm_hw_params,
 596         .set_fmt = es8326_set_dai_fmt,
 597         .set_sysclk = es8326_set_dai_sysclk,
 598         .mute_stream = es8326_mute,
 599         .no_capture_mute = 1,
 600 };
 601
 602 static struct snd_soc_dai_driver es8326_dai = {
 603         .name = "ES8326 HiFi",
 604         .playback = {
 605                 .stream_name = "Playback",
 606                 .channels_min = 1,
 607                 .channels_max = 2,
 608                 .rates = SNDRV_PCM_RATE_8000_48000,
 609                 .formats = es8326_FORMATS,
 610                 },
 611         .capture = {
 612                 .stream_name = "Capture",
 613                 .channels_min = 1,
 614                 .channels_max = 2,
 615                 .rates = SNDRV_PCM_RATE_8000_48000,
 616                 .formats = es8326_FORMATS,
 617                 },
 618         .ops = &es8326_ops,
 619         .symmetric_rate = 1,
 620 };
 621
 622 static void es8326_enable_micbias(struct snd_soc_component *component)
 623 {
 624         struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
 625
 626         snd_soc_dapm_mutex_lock(dapm);
 627         snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS1");
 628         snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS2");
 629         snd_soc_dapm_sync_unlocked(dapm);
 630         snd_soc_dapm_mutex_unlock(dapm);
 631 }
 632
 633 static void es8326_disable_micbias(struct snd_soc_component *component)
 634 {
 635         struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
 636
 637         snd_soc_dapm_mutex_lock(dapm);
 638         snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS1");
 639         snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS2");
 640         snd_soc_dapm_sync_unlocked(dapm);
 641         snd_soc_dapm_mutex_unlock(dapm);
 642 }
 643
 644 /*
 645  *      For button detection, set the following in soundcard
 646  *      snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
 647  *      snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOLUMEUP);
 648  *      snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN);
 649  */
 650 static void es8326_jack_button_handler(struct work_struct *work)
 651 {
 652         struct es8326_priv *es8326 =
 653                 container_of(work, struct es8326_priv, button_press_work.work);
 654         struct snd_soc_component *comp = es8326->component;
 655         unsigned int iface;
 656         static int button_to_report, press_count;
 657         static int prev_button, cur_button;
 658
 659         if (!(es8326->jack->status & SND_JACK_HEADSET)) /* Jack unplugged */
 660                 return;
 661
 662         mutex_lock(&es8326->lock);
 663         iface = snd_soc_component_read(comp, ES8326_HPDET_STA);
 664         switch (iface) {
 665         case 0x93:
 666                 /* pause button detected */
 667                 cur_button = SND_JACK_BTN_0;
 668                 break;
 669         case 0x6f:
 670         case 0x4b:
 671                 /* button volume up */
 672                 cur_button = SND_JACK_BTN_1;
 673                 break;
 674         case 0x27:
 675                 /* button volume down */
 676                 cur_button = SND_JACK_BTN_2;
 677                 break;
 678         case 0x1e:
 679         case 0xe2:
 680                 /* button released or not pressed */
 681                 cur_button = 0;
 682                 break;
 683         default:
 684                 break;
 685         }
 686
 687         if ((prev_button == cur_button) && (cur_button != 0)) {
 688                 press_count++;
 689                 if (press_count > 3) {
 690                         /* report a press every 120ms */
 691                         snd_soc_jack_report(es8326->jack, cur_button,
 692                                         SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2);
 693                         press_count = 0;
 694                 }
 695                 button_to_report = cur_button;
 696                 queue_delayed_work(system_wq, &es8326->button_press_work,
 697                                    msecs_to_jiffies(35));
 698         } else if (prev_button != cur_button) {
 699                 /* mismatch, detect again */
 700                 prev_button = cur_button;
 701                 queue_delayed_work(system_wq, &es8326->button_press_work,
 702                                    msecs_to_jiffies(35));
 703         } else {
 704                 /* released or no pressed */
 705                 if (button_to_report != 0) {
 706                         snd_soc_jack_report(es8326->jack, button_to_report,
 707                                     SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2);
 708                         snd_soc_jack_report(es8326->jack, 0,
 709                                     SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2);
 710                         button_to_report = 0;
 711                 }
 712         }
 713         mutex_unlock(&es8326->lock);
 714 }
 715
 716 static void es8326_jack_detect_handler(struct work_struct *work)
 717 {
 718         struct es8326_priv *es8326 =
 719                 container_of(work, struct es8326_priv, jack_detect_work.work);
 720         struct snd_soc_component *comp = es8326->component;
 721         unsigned int iface;
 722
 723         mutex_lock(&es8326->lock);
 724         iface = snd_soc_component_read(comp, ES8326_HPDET_STA);
 725         dev_dbg(comp->dev, "gpio flag %#04x", iface);
 726
 727         if ((es8326->jack_remove_retry == 1) && (es8326->version != ES8326_VERSION_B)) {
 728                 if (iface & ES8326_HPINSERT_FLAG)
 729                         es8326->jack_remove_retry = 2;
 730                 else
 731                         es8326->jack_remove_retry = 0;
 732
 733                 dev_dbg(comp->dev, "remove event check, set HPJACK_POL normal, cnt = %d\n",
 734                                 es8326->jack_remove_retry);
 735                 /*
 736                  * Inverted HPJACK_POL bit to trigger one IRQ to double check HP Removal event
 737                  */
 738                 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE,
 739                                         ES8326_HP_DET_JACK_POL, (es8326->jd_inverted ?
 740                                         ~es8326->jack_pol : es8326->jack_pol));
 741                 goto exit;
 742         }
 743
 744         if ((iface & ES8326_HPINSERT_FLAG) == 0) {
 745                 /* Jack unplugged or spurious IRQ */
 746                 dev_dbg(comp->dev, "No headset detected\n");
 747                 es8326_disable_micbias(es8326->component);
 748                 if (es8326->jack->status & SND_JACK_HEADPHONE) {
 749                         dev_dbg(comp->dev, "Report hp remove event\n");
 750                         snd_soc_jack_report(es8326->jack, 0, SND_JACK_HEADSET);
 751                         /* mute adc when mic path switch */
 752                         regmap_write(es8326->regmap, ES8326_ADC_SCALE, 0x33);
 753                         regmap_write(es8326->regmap, ES8326_ADC1_SRC, 0x44);
 754                         regmap_write(es8326->regmap, ES8326_ADC2_SRC, 0x66);
 755                         es8326->hp = 0;
 756                 }
 757                 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01);
 758                 regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x0a);
 759                 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x03);
 760                 /*
 761                  * Inverted HPJACK_POL bit to trigger one IRQ to double check HP Removal event
 762                  */
 763                 if ((es8326->jack_remove_retry == 0) && (es8326->version != ES8326_VERSION_B)) {
 764                         es8326->jack_remove_retry = 1;
 765                         dev_dbg(comp->dev, "remove event check, invert HPJACK_POL, cnt = %d\n",
 766                                         es8326->jack_remove_retry);
 767                         regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE,
 768                                         ES8326_HP_DET_JACK_POL, (es8326->jd_inverted ?
 769                                         es8326->jack_pol : ~es8326->jack_pol));
 770
 771                 } else {
 772                         es8326->jack_remove_retry = 0;
 773                 }
 774         } else if ((iface & ES8326_HPINSERT_FLAG) == ES8326_HPINSERT_FLAG) {
 775                 es8326->jack_remove_retry = 0;
 776                 if (es8326->hp == 0) {
 777                         dev_dbg(comp->dev, "First insert, start OMTP/CTIA type check\n");
 778                         /*
 779                          * set auto-check mode, then restart jack_detect_work after 400ms.
 780                          * Don't report jack status.
 781                          */
 782                         regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01);
 783                         es8326_enable_micbias(es8326->component);
 784                         usleep_range(50000, 70000);
 785                         regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00);
 786                         regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x1f);
 787                         regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x08);
 788                         queue_delayed_work(system_wq, &es8326->jack_detect_work,
 789                                         msecs_to_jiffies(400));
 790                         es8326->hp = 1;
 791                         goto exit;
 792                 }
 793                 if (es8326->jack->status & SND_JACK_HEADSET) {
 794                         /* detect button */
 795                         dev_dbg(comp->dev, "button pressed\n");
 796                         queue_delayed_work(system_wq, &es8326->button_press_work, 10);
 797                         goto exit;
 798                 }
 799                 if ((iface & ES8326_HPBUTTON_FLAG) == 0x01) {
 800                         dev_dbg(comp->dev, "Headphone detected\n");
 801                         snd_soc_jack_report(es8326->jack,
 802                                         SND_JACK_HEADPHONE, SND_JACK_HEADSET);
 803                 } else {
 804                         dev_dbg(comp->dev, "Headset detected\n");
 805                         snd_soc_jack_report(es8326->jack,
 806                                         SND_JACK_HEADSET, SND_JACK_HEADSET);
 807
 808                         regmap_write(es8326->regmap, ES8326_ADC_SCALE, 0x33);
 809                         regmap_update_bits(es8326->regmap, ES8326_PGA_PDN,
 810                                         0x08, 0x08);
 811                         regmap_update_bits(es8326->regmap, ES8326_PGAGAIN,
 812                                         0x80, 0x80);
 813                         regmap_write(es8326->regmap, ES8326_ADC1_SRC, 0x00);
 814                         regmap_write(es8326->regmap, ES8326_ADC2_SRC, 0x00);
 815                         regmap_update_bits(es8326->regmap, ES8326_PGA_PDN,
 816                                         0x08, 0x00);
 817                         usleep_range(10000, 15000);
 818                 }
 819         }
 820 exit:
 821         mutex_unlock(&es8326->lock);
 822 }
 823
 824 static irqreturn_t es8326_irq(int irq, void *dev_id)
 825 {
 826         struct es8326_priv *es8326 = dev_id;
 827
 828         if (!es8326->jack)
 829                 goto out;
 830
 831         if (es8326->jack->status & SND_JACK_HEADSET)
 832                 queue_delayed_work(system_wq, &es8326->jack_detect_work,
 833                                    msecs_to_jiffies(10));
 834         else
 835                 queue_delayed_work(system_wq, &es8326->jack_detect_work,
 836                                    msecs_to_jiffies(300));
 837
 838 out:
 839         return IRQ_HANDLED;
 840 }
 841
 842 static int es8326_calibrate(struct snd_soc_component *component)
 843 {
 844         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
 845         unsigned int reg;
 846         unsigned int offset_l, offset_r;
 847
 848         regmap_read(es8326->regmap, ES8326_CHIP_VERSION, &reg);
 849         es8326->version = reg;
 850
 851         if ((es8326->version == ES8326_VERSION_B) && (es8326->calibrated == false)) {
 852                 dev_dbg(component->dev, "ES8326_VERSION_B, calibrating\n");
 853                 regmap_write(es8326->regmap, ES8326_CLK_INV, 0xc0);
 854                 regmap_write(es8326->regmap, ES8326_CLK_DIV1, 0x03);
 855                 regmap_write(es8326->regmap, ES8326_CLK_DLL, 0x30);
 856                 regmap_write(es8326->regmap, ES8326_CLK_MUX, 0xed);
 857                 regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL, 0x08);
 858                 regmap_write(es8326->regmap, ES8326_CLK_TRI, 0xc1);
 859                 regmap_write(es8326->regmap, ES8326_DAC_MUTE, 0x03);
 860                 regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7f);
 861                 regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x23);
 862                 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x88);
 863                 usleep_range(15000, 20000);
 864                 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c);
 865                 usleep_range(15000, 20000);
 866                 regmap_write(es8326->regmap, ES8326_RESET, 0xc0);
 867                 usleep_range(15000, 20000);
 868
 869                 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, ES8326_HP_OFF);
 870                 regmap_read(es8326->regmap, ES8326_CSM_MUTE_STA, &reg);
 871                 if ((reg & 0xf0) != 0x40)
 872                         msleep(50);
 873
 874                 regmap_write(es8326->regmap, ES8326_HP_CAL, 0xd4);
 875                 msleep(200);
 876                 regmap_write(es8326->regmap, ES8326_HP_CAL, 0x4d);
 877                 msleep(200);
 878                 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF);
 879                 regmap_read(es8326->regmap, ES8326_HPL_OFFSET_INI, &offset_l);
 880                 regmap_read(es8326->regmap, ES8326_HPR_OFFSET_INI, &offset_r);
 881                 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c);
 882                 regmap_write(es8326->regmap, ES8326_HPL_OFFSET_INI, offset_l);
 883                 regmap_write(es8326->regmap, ES8326_HPR_OFFSET_INI, offset_r);
 884                 regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00);
 885
 886                 es8326->calibrated = true;
 887         }
 888
 889         return 0;
 890 }
 891
 892 static int es8326_resume(struct snd_soc_component *component)
 893 {
 894         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
 895
 896         regcache_cache_only(es8326->regmap, false);
 897         regcache_sync(es8326->regmap);
 898
 899         /* reset internal clock state */
 900         regmap_write(es8326->regmap, ES8326_RESET, 0x1f);
 901         regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x0E);
 902         regmap_write(es8326->regmap, ES8326_ANA_LP, 0xf0);
 903         usleep_range(10000, 15000);
 904         regmap_write(es8326->regmap, ES8326_HPJACK_TIMER, 0xe9);
 905         regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0xcb);
 906         /* set headphone default type and detect pin */
 907         regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x83);
 908         regmap_write(es8326->regmap, ES8326_CLK_RESAMPLE, 0x05);
 909
 910         /* set internal oscillator as clock source of headpone cp */
 911         regmap_write(es8326->regmap, ES8326_CLK_DIV_CPC, 0x89);
 912         regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_ON);
 913         /* clock manager reset release */
 914         regmap_write(es8326->regmap, ES8326_RESET, 0x17);
 915         /* set headphone detection as half scan mode */
 916         regmap_write(es8326->regmap, ES8326_HP_MISC, 0x3d);
 917         regmap_write(es8326->regmap, ES8326_PULLUP_CTL, 0x00);
 918
 919         /* enable headphone driver */
 920         regmap_write(es8326->regmap, ES8326_HP_VOL, 0xc4);
 921         regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa7);
 922         usleep_range(2000, 5000);
 923         regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x23);
 924         regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x33);
 925         regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);
 926
 927         regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00);
 928         regmap_write(es8326->regmap, ES8326_CLK_VMIDS1, 0xc4);
 929         regmap_write(es8326->regmap, ES8326_CLK_VMIDS2, 0x81);
 930         regmap_write(es8326->regmap, ES8326_CLK_CAL_TIME, 0x00);
 931         /* calibrate for B version */
 932         es8326_calibrate(component);
 933         regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, 0xaa);
 934         regmap_write(es8326->regmap, ES8326_DAC_RAMPRATE, 0x00);
 935         /* turn off headphone out */
 936         regmap_write(es8326->regmap, ES8326_HP_CAL, 0x00);
 937         /* set ADC and DAC in low power mode */
 938         regmap_write(es8326->regmap, ES8326_ANA_LP, 0xf0);
 939
 940         regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7F);
 941         /* select vdda as micbias source */
 942         regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x23);
 943         /* set dac dsmclip = 1 */
 944         regmap_write(es8326->regmap, ES8326_DAC_DSM, 0x08);
 945         regmap_write(es8326->regmap, ES8326_DAC_VPPSCALE, 0x15);
 946
 947         regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x80 |
 948                         ((es8326->version == ES8326_VERSION_B) ?
 949                         (ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol) :
 950                         (ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol | 0x04)));
 951         usleep_range(5000, 10000);
 952         es8326_enable_micbias(es8326->component);
 953         usleep_range(50000, 70000);
 954         regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00);
 955         regmap_write(es8326->regmap, ES8326_INT_SOURCE,
 956                     (ES8326_INT_SRC_PIN9 | ES8326_INT_SRC_BUTTON));
 957         regmap_write(es8326->regmap, ES8326_INTOUT_IO,
 958                      es8326->interrupt_clk);
 959         regmap_write(es8326->regmap, ES8326_SDINOUT1_IO,
 960                     (ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT));
 961         regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT);
 962
 963         regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00);
 964         regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON);
 965         regmap_update_bits(es8326->regmap, ES8326_PGAGAIN, ES8326_MIC_SEL_MASK,
 966                            ES8326_MIC1_SEL);
 967
 968         regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, ES8326_MUTE_MASK,
 969                            ES8326_MUTE);
 970
 971
 972         es8326->jack_remove_retry = 0;
 973         es8326->hp = 0;
 974         return 0;
 975 }
 976
 977 static int es8326_suspend(struct snd_soc_component *component)
 978 {
 979         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
 980
 981         cancel_delayed_work_sync(&es8326->jack_detect_work);
 982         es8326_disable_micbias(component);
 983         es8326->calibrated = false;
 984         regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_OFF);
 985         regcache_cache_only(es8326->regmap, true);
 986         regcache_mark_dirty(es8326->regmap);
 987
 988         /* reset register value to default */
 989         regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x01);
 990         usleep_range(1000, 3000);
 991         regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x00);
 992         return 0;
 993 }
 994
 995 static int es8326_probe(struct snd_soc_component *component)
 996 {
 997         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
 998         int ret;
 999
1000         es8326->component = component;
1001         es8326->jd_inverted = device_property_read_bool(component->dev,
1002                                                         "everest,jack-detect-inverted");
1003
1004         ret = device_property_read_u8(component->dev, "everest,mic1-src", &es8326->mic1_src);
1005         if (ret != 0) {
1006                 dev_dbg(component->dev, "mic1-src return %d", ret);
1007                 es8326->mic1_src = ES8326_ADC_AMIC;
1008         }
1009         dev_dbg(component->dev, "mic1-src %x", es8326->mic1_src);
1010
1011         ret = device_property_read_u8(component->dev, "everest,mic2-src", &es8326->mic2_src);
1012         if (ret != 0) {
1013                 dev_dbg(component->dev, "mic2-src return %d", ret);
1014                 es8326->mic2_src = ES8326_ADC_DMIC;
1015         }
1016         dev_dbg(component->dev, "mic2-src %x", es8326->mic2_src);
1017
1018         ret = device_property_read_u8(component->dev, "everest,jack-pol", &es8326->jack_pol);
1019         if (ret != 0) {
1020                 dev_dbg(component->dev, "jack-pol return %d", ret);
1021                 es8326->jack_pol = ES8326_HP_TYPE_AUTO;
1022         }
1023         dev_dbg(component->dev, "jack-pol %x", es8326->jack_pol);
1024
1025         ret = device_property_read_u8(component->dev, "everest,interrupt-src",
1026                                       &es8326->interrupt_src);
1027         if (ret != 0) {
1028                 dev_dbg(component->dev, "interrupt-src return %d", ret);
1029                 es8326->interrupt_src = ES8326_HP_DET_SRC_PIN9;
1030         }
1031         dev_dbg(component->dev, "interrupt-src %x", es8326->interrupt_src);
1032
1033         ret = device_property_read_u8(component->dev, "everest,interrupt-clk",
1034                                       &es8326->interrupt_clk);
1035         if (ret != 0) {
1036                 dev_dbg(component->dev, "interrupt-clk return %d", ret);
1037                 es8326->interrupt_clk = 0x45;
1038         }
1039         dev_dbg(component->dev, "interrupt-clk %x", es8326->interrupt_clk);
1040
1041         es8326_resume(component);
1042         return 0;
1043 }
1044
1045 static void es8326_enable_jack_detect(struct snd_soc_component *component,
1046                                 struct snd_soc_jack *jack)
1047 {
1048         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
1049
1050         mutex_lock(&es8326->lock);
1051         if (es8326->jd_inverted)
1052                 snd_soc_component_update_bits(component, ES8326_HPDET_TYPE,
1053                                               ES8326_HP_DET_JACK_POL, ~es8326->jack_pol);
1054         es8326->jack = jack;
1055
1056         mutex_unlock(&es8326->lock);
1057         es8326_irq(es8326->irq, es8326);
1058 }
1059
1060 static void es8326_disable_jack_detect(struct snd_soc_component *component)
1061 {
1062         struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
1063
1064         dev_dbg(component->dev, "Enter into %s\n", __func__);
1065         if (!es8326->jack)
1066                 return; /* Already disabled (or never enabled) */
1067         cancel_delayed_work_sync(&es8326->jack_detect_work);
1068
1069         mutex_lock(&es8326->lock);
1070         if (es8326->jack->status & SND_JACK_MICROPHONE) {
1071                 es8326_disable_micbias(component);
1072                 snd_soc_jack_report(es8326->jack, 0, SND_JACK_HEADSET);
1073         }
1074         es8326->jack = NULL;
1075         mutex_unlock(&es8326->lock);
1076 }
1077
1078 static int es8326_set_jack(struct snd_soc_component *component,
1079                         struct snd_soc_jack *jack, void *data)
1080 {
1081         if (jack)
1082                 es8326_enable_jack_detect(component, jack);
1083         else
1084                 es8326_disable_jack_detect(component);
1085
1086         return 0;
1087 }
1088
1089 static void es8326_remove(struct snd_soc_component *component)
1090 {
1091         es8326_disable_jack_detect(component);
1092         es8326_set_bias_level(component, SND_SOC_BIAS_OFF);
1093 }
1094
1095 static const struct snd_soc_component_driver soc_component_dev_es8326 = {
1096         .probe          = es8326_probe,
1097         .remove         = es8326_remove,
1098         .resume         = es8326_resume,
1099         .suspend        = es8326_suspend,
1100         .set_bias_level = es8326_set_bias_level,
1101         .set_jack       = es8326_set_jack,
1102         .dapm_widgets   = es8326_dapm_widgets,
1103         .num_dapm_widgets       = ARRAY_SIZE(es8326_dapm_widgets),
1104         .dapm_routes            = es8326_dapm_routes,
1105         .num_dapm_routes        = ARRAY_SIZE(es8326_dapm_routes),
1106         .controls               = es8326_snd_controls,
1107         .num_controls           = ARRAY_SIZE(es8326_snd_controls),
1108         .use_pmdown_time        = 1,
1109         .endianness             = 1,
1110 };
1111
1112 static int es8326_i2c_probe(struct i2c_client *i2c)
1113 {
1114         struct es8326_priv *es8326;
1115         int ret;
1116
1117         es8326 = devm_kzalloc(&i2c->dev, sizeof(struct es8326_priv), GFP_KERNEL);
1118         if (!es8326)
1119                 return -ENOMEM;
1120
1121         i2c_set_clientdata(i2c, es8326);
1122         es8326->i2c = i2c;
1123         mutex_init(&es8326->lock);
1124         es8326->regmap = devm_regmap_init_i2c(i2c, &es8326_regmap_config);
1125         if (IS_ERR(es8326->regmap)) {
1126                 ret = PTR_ERR(es8326->regmap);
1127                 dev_err(&i2c->dev, "Failed to init regmap: %d\n", ret);
1128                 return ret;
1129         }
1130
1131         es8326->irq = i2c->irq;
1132         INIT_DELAYED_WORK(&es8326->jack_detect_work,
1133                           es8326_jack_detect_handler);
1134         INIT_DELAYED_WORK(&es8326->button_press_work,
1135                           es8326_jack_button_handler);
1136         /* ES8316 is level-based while ES8326 is edge-based */
1137         ret = devm_request_threaded_irq(&i2c->dev, es8326->irq, NULL, es8326_irq,
1138                                         IRQF_TRIGGER_RISING | IRQF_ONESHOT,
1139                                         "es8326", es8326);
1140         if (ret) {
1141                 dev_warn(&i2c->dev, "Failed to request IRQ: %d: %d\n",
1142                 es8326->irq, ret);
1143                 es8326->irq = -ENXIO;
1144         }
1145
1146         es8326->mclk = devm_clk_get_optional(&i2c->dev, "mclk");
1147         if (IS_ERR(es8326->mclk)) {
1148                 dev_err(&i2c->dev, "unable to get mclk\n");
1149                 return PTR_ERR(es8326->mclk);
1150         }
1151         if (!es8326->mclk)
1152                 dev_warn(&i2c->dev, "assuming static mclk\n");
1153
1154         ret = clk_prepare_enable(es8326->mclk);
1155         if (ret) {
1156                 dev_err(&i2c->dev, "unable to enable mclk\n");
1157                 return ret;
1158         }
1159         return devm_snd_soc_register_component(&i2c->dev,
1160                                         &soc_component_dev_es8326,
1161                                         &es8326_dai, 1);
1162 }
1163
1164 static const struct i2c_device_id es8326_i2c_id[] = {
1165         {"es8326", 0 },
1166         {}
1167 };
1168 MODULE_DEVICE_TABLE(i2c, es8326_i2c_id);
1169
1170 #ifdef CONFIG_OF
1171 static const struct of_device_id es8326_of_match[] = {
1172         { .compatible = "everest,es8326", },
1173         {}
1174 };
1175 MODULE_DEVICE_TABLE(of, es8326_of_match);
1176 #endif
1177
1178 #ifdef CONFIG_ACPI
1179 static const struct acpi_device_id es8326_acpi_match[] = {
1180         {"ESSX8326", 0},
1181         {},
1182 };
1183 MODULE_DEVICE_TABLE(acpi, es8326_acpi_match);
1184 #endif
1185
1186 static struct i2c_driver es8326_i2c_driver = {
1187         .driver = {
1188                 .name = "es8326",
1189                 .acpi_match_table = ACPI_PTR(es8326_acpi_match),
1190                 .of_match_table = of_match_ptr(es8326_of_match),
1191         },
1192         .probe = es8326_i2c_probe,
1193         .id_table = es8326_i2c_id,
1194 };
1195 module_i2c_driver(es8326_i2c_driver);
1196
1197 MODULE_DESCRIPTION("ASoC es8326 driver");
1198 MODULE_AUTHOR("David Yang <yangxiaohua@everest-semi.com>");
1199 MODULE_LICENSE("GPL");