sound/soc/codecs/arizona.c

   1 /*
   2  * arizona.c - Wolfson Arizona class device shared support
   3  *
   4  * Copyright 2012 Wolfson Microelectronics plc
   5  *
   6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/delay.h>
  14 #include <linux/gcd.h>
  15 #include <linux/module.h>
  16 #include <linux/pm_runtime.h>
  17 #include <sound/pcm.h>
  18 #include <sound/pcm_params.h>
  19 #include <sound/tlv.h>
  20
  21 #include <linux/mfd/arizona/core.h>
  22 #include <linux/mfd/arizona/gpio.h>
  23 #include <linux/mfd/arizona/registers.h>
  24
  25 #include "arizona.h"
  26
  27 #define ARIZONA_AIF_BCLK_CTRL                   0x00
  28 #define ARIZONA_AIF_TX_PIN_CTRL                 0x01
  29 #define ARIZONA_AIF_RX_PIN_CTRL                 0x02
  30 #define ARIZONA_AIF_RATE_CTRL                   0x03
  31 #define ARIZONA_AIF_FORMAT                      0x04
  32 #define ARIZONA_AIF_TX_BCLK_RATE                0x05
  33 #define ARIZONA_AIF_RX_BCLK_RATE                0x06
  34 #define ARIZONA_AIF_FRAME_CTRL_1                0x07
  35 #define ARIZONA_AIF_FRAME_CTRL_2                0x08
  36 #define ARIZONA_AIF_FRAME_CTRL_3                0x09
  37 #define ARIZONA_AIF_FRAME_CTRL_4                0x0A
  38 #define ARIZONA_AIF_FRAME_CTRL_5                0x0B
  39 #define ARIZONA_AIF_FRAME_CTRL_6                0x0C
  40 #define ARIZONA_AIF_FRAME_CTRL_7                0x0D
  41 #define ARIZONA_AIF_FRAME_CTRL_8                0x0E
  42 #define ARIZONA_AIF_FRAME_CTRL_9                0x0F
  43 #define ARIZONA_AIF_FRAME_CTRL_10               0x10
  44 #define ARIZONA_AIF_FRAME_CTRL_11               0x11
  45 #define ARIZONA_AIF_FRAME_CTRL_12               0x12
  46 #define ARIZONA_AIF_FRAME_CTRL_13               0x13
  47 #define ARIZONA_AIF_FRAME_CTRL_14               0x14
  48 #define ARIZONA_AIF_FRAME_CTRL_15               0x15
  49 #define ARIZONA_AIF_FRAME_CTRL_16               0x16
  50 #define ARIZONA_AIF_FRAME_CTRL_17               0x17
  51 #define ARIZONA_AIF_FRAME_CTRL_18               0x18
  52 #define ARIZONA_AIF_TX_ENABLES                  0x19
  53 #define ARIZONA_AIF_RX_ENABLES                  0x1A
  54 #define ARIZONA_AIF_FORCE_WRITE                 0x1B
  55
  56 #define arizona_fll_err(_fll, fmt, ...) \
  57         dev_err(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
  58 #define arizona_fll_warn(_fll, fmt, ...) \
  59         dev_warn(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
  60 #define arizona_fll_dbg(_fll, fmt, ...) \
  61         dev_dbg(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
  62
  63 #define arizona_aif_err(_dai, fmt, ...) \
  64         dev_err(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
  65 #define arizona_aif_warn(_dai, fmt, ...) \
  66         dev_warn(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
  67 #define arizona_aif_dbg(_dai, fmt, ...) \
  68         dev_dbg(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
  69
  70 static int arizona_spk_ev(struct snd_soc_dapm_widget *w,
  71                           struct snd_kcontrol *kcontrol,
  72                           int event)
  73 {
  74         struct snd_soc_codec *codec = w->codec;
  75         struct arizona *arizona = dev_get_drvdata(codec->dev->parent);
  76         struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
  77         bool manual_ena = false;
  78         int val;
  79
  80         switch (arizona->type) {
  81         case WM5102:
  82                 switch (arizona->rev) {
  83                 case 0:
  84                         break;
  85                 default:
  86                         manual_ena = true;
  87                         break;
  88                 }
  89         default:
  90                 break;
  91         }
  92
  93         switch (event) {
  94         case SND_SOC_DAPM_PRE_PMU:
  95                 if (!priv->spk_ena && manual_ena) {
  96                         snd_soc_write(codec, 0x4f5, 0x25a);
  97                         priv->spk_ena_pending = true;
  98                 }
  99                 break;
 100         case SND_SOC_DAPM_POST_PMU:
 101                 val = snd_soc_read(codec, ARIZONA_INTERRUPT_RAW_STATUS_3);
 102                 if (val & ARIZONA_SPK_SHUTDOWN_STS) {
 103                         dev_crit(arizona->dev,
 104                                  "Speaker not enabled due to temperature\n");
 105                         return -EBUSY;
 106                 }
 107
 108                 snd_soc_update_bits(codec, ARIZONA_OUTPUT_ENABLES_1,
 109                                     1 << w->shift, 1 << w->shift);
 110
 111                 if (priv->spk_ena_pending) {
 112                         msleep(75);
 113                         snd_soc_write(codec, 0x4f5, 0xda);
 114                         priv->spk_ena_pending = false;
 115                         priv->spk_ena++;
 116                 }
 117                 break;
 118         case SND_SOC_DAPM_PRE_PMD:
 119                 if (manual_ena) {
 120                         priv->spk_ena--;
 121                         if (!priv->spk_ena)
 122                                 snd_soc_write(codec, 0x4f5, 0x25a);
 123                 }
 124
 125                 snd_soc_update_bits(codec, ARIZONA_OUTPUT_ENABLES_1,
 126                                     1 << w->shift, 0);
 127                 break;
 128         case SND_SOC_DAPM_POST_PMD:
 129                 if (manual_ena) {
 130                         if (!priv->spk_ena)
 131                                 snd_soc_write(codec, 0x4f5, 0x0da);
 132                 }
 133                 break;
 134         }
 135
 136         return 0;
 137 }
 138
 139 static irqreturn_t arizona_thermal_warn(int irq, void *data)
 140 {
 141         struct arizona *arizona = data;
 142         unsigned int val;
 143         int ret;
 144
 145         ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_3,
 146                           &val);
 147         if (ret != 0) {
 148                 dev_err(arizona->dev, "Failed to read thermal status: %d\n",
 149                         ret);
 150         } else if (val & ARIZONA_SPK_SHUTDOWN_WARN_STS) {
 151                 dev_crit(arizona->dev, "Thermal warning\n");
 152         }
 153
 154         return IRQ_HANDLED;
 155 }
 156
 157 static irqreturn_t arizona_thermal_shutdown(int irq, void *data)
 158 {
 159         struct arizona *arizona = data;
 160         unsigned int val;
 161         int ret;
 162
 163         ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_3,
 164                           &val);
 165         if (ret != 0) {
 166                 dev_err(arizona->dev, "Failed to read thermal status: %d\n",
 167                         ret);
 168         } else if (val & ARIZONA_SPK_SHUTDOWN_STS) {
 169                 dev_crit(arizona->dev, "Thermal shutdown\n");
 170                 ret = regmap_update_bits(arizona->regmap,
 171                                          ARIZONA_OUTPUT_ENABLES_1,
 172                                          ARIZONA_OUT4L_ENA |
 173                                          ARIZONA_OUT4R_ENA, 0);
 174                 if (ret != 0)
 175                         dev_crit(arizona->dev,
 176                                  "Failed to disable speaker outputs: %d\n",
 177                                  ret);
 178         }
 179
 180         return IRQ_HANDLED;
 181 }
 182
 183 static const struct snd_soc_dapm_widget arizona_spkl =
 184         SND_SOC_DAPM_PGA_E("OUT4L", SND_SOC_NOPM,
 185                            ARIZONA_OUT4L_ENA_SHIFT, 0, NULL, 0, arizona_spk_ev,
 186                            SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU);
 187
 188 static const struct snd_soc_dapm_widget arizona_spkr =
 189         SND_SOC_DAPM_PGA_E("OUT4R", SND_SOC_NOPM,
 190                            ARIZONA_OUT4R_ENA_SHIFT, 0, NULL, 0, arizona_spk_ev,
 191                            SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU);
 192
 193 int arizona_init_spk(struct snd_soc_codec *codec)
 194 {
 195         struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
 196         struct arizona *arizona = priv->arizona;
 197         int ret;
 198
 199         ret = snd_soc_dapm_new_controls(&codec->dapm, &arizona_spkl, 1);
 200         if (ret != 0)
 201                 return ret;
 202
 203         switch (arizona->type) {
 204         case WM8997:
 205                 break;
 206         default:
 207                 ret = snd_soc_dapm_new_controls(&codec->dapm,
 208                                                 &arizona_spkr, 1);
 209                 if (ret != 0)
 210                         return ret;
 211                 break;
 212         }
 213
 214         ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_SHUTDOWN_WARN,
 215                                   "Thermal warning", arizona_thermal_warn,
 216                                   arizona);
 217         if (ret != 0)
 218                 dev_err(arizona->dev,
 219                         "Failed to get thermal warning IRQ: %d\n",
 220                         ret);
 221
 222         ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_SHUTDOWN,
 223                                   "Thermal shutdown", arizona_thermal_shutdown,
 224                                   arizona);
 225         if (ret != 0)
 226                 dev_err(arizona->dev,
 227                         "Failed to get thermal shutdown IRQ: %d\n",
 228                         ret);
 229
 230         return 0;
 231 }
 232 EXPORT_SYMBOL_GPL(arizona_init_spk);
 233
 234 int arizona_init_gpio(struct snd_soc_codec *codec)
 235 {
 236         struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
 237         struct arizona *arizona = priv->arizona;
 238         int i;
 239
 240         switch (arizona->type) {
 241         case WM5110:
 242                 snd_soc_dapm_disable_pin(&codec->dapm, "DRC2 Signal Activity");
 243                 break;
 244         default:
 245                 break;
 246         }
 247
 248         snd_soc_dapm_disable_pin(&codec->dapm, "DRC1 Signal Activity");
 249
 250         for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
 251                 switch (arizona->pdata.gpio_defaults[i] & ARIZONA_GPN_FN_MASK) {
 252                 case ARIZONA_GP_FN_DRC1_SIGNAL_DETECT:
 253                         snd_soc_dapm_enable_pin(&codec->dapm,
 254                                                 "DRC1 Signal Activity");
 255                         break;
 256                 case ARIZONA_GP_FN_DRC2_SIGNAL_DETECT:
 257                         snd_soc_dapm_enable_pin(&codec->dapm,
 258                                                 "DRC2 Signal Activity");
 259                         break;
 260                 default:
 261                         break;
 262                 }
 263         }
 264
 265         return 0;
 266 }
 267 EXPORT_SYMBOL_GPL(arizona_init_gpio);
 268
 269 const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = {
 270         "None",
 271         "Tone Generator 1",
 272         "Tone Generator 2",
 273         "Haptics",
 274         "AEC",
 275         "Mic Mute Mixer",
 276         "Noise Generator",
 277         "IN1L",
 278         "IN1R",
 279         "IN2L",
 280         "IN2R",
 281         "IN3L",
 282         "IN3R",
 283         "IN4L",
 284         "IN4R",
 285         "AIF1RX1",
 286         "AIF1RX2",
 287         "AIF1RX3",
 288         "AIF1RX4",
 289         "AIF1RX5",
 290         "AIF1RX6",
 291         "AIF1RX7",
 292         "AIF1RX8",
 293         "AIF2RX1",
 294         "AIF2RX2",
 295         "AIF2RX3",
 296         "AIF2RX4",
 297         "AIF2RX5",
 298         "AIF2RX6",
 299         "AIF3RX1",
 300         "AIF3RX2",
 301         "SLIMRX1",
 302         "SLIMRX2",
 303         "SLIMRX3",
 304         "SLIMRX4",
 305         "SLIMRX5",
 306         "SLIMRX6",
 307         "SLIMRX7",
 308         "SLIMRX8",
 309         "EQ1",
 310         "EQ2",
 311         "EQ3",
 312         "EQ4",
 313         "DRC1L",
 314         "DRC1R",
 315         "DRC2L",
 316         "DRC2R",
 317         "LHPF1",
 318         "LHPF2",
 319         "LHPF3",
 320         "LHPF4",
 321         "DSP1.1",
 322         "DSP1.2",
 323         "DSP1.3",
 324         "DSP1.4",
 325         "DSP1.5",
 326         "DSP1.6",
 327         "DSP2.1",
 328         "DSP2.2",
 329         "DSP2.3",
 330         "DSP2.4",
 331         "DSP2.5",
 332         "DSP2.6",
 333         "DSP3.1",
 334         "DSP3.2",
 335         "DSP3.3",
 336         "DSP3.4",
 337         "DSP3.5",
 338         "DSP3.6",
 339         "DSP4.1",
 340         "DSP4.2",
 341         "DSP4.3",
 342         "DSP4.4",
 343         "DSP4.5",
 344         "DSP4.6",
 345         "ASRC1L",
 346         "ASRC1R",
 347         "ASRC2L",
 348         "ASRC2R",
 349         "ISRC1INT1",
 350         "ISRC1INT2",
 351         "ISRC1INT3",
 352         "ISRC1INT4",
 353         "ISRC1DEC1",
 354         "ISRC1DEC2",
 355         "ISRC1DEC3",
 356         "ISRC1DEC4",
 357         "ISRC2INT1",
 358         "ISRC2INT2",
 359         "ISRC2INT3",
 360         "ISRC2INT4",
 361         "ISRC2DEC1",
 362         "ISRC2DEC2",
 363         "ISRC2DEC3",
 364         "ISRC2DEC4",
 365         "ISRC3INT1",
 366         "ISRC3INT2",
 367         "ISRC3INT3",
 368         "ISRC3INT4",
 369         "ISRC3DEC1",
 370         "ISRC3DEC2",
 371         "ISRC3DEC3",
 372         "ISRC3DEC4",
 373 };
 374 EXPORT_SYMBOL_GPL(arizona_mixer_texts);
 375
 376 int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = {
 377         0x00,  /* None */
 378         0x04,  /* Tone */
 379         0x05,
 380         0x06,  /* Haptics */
 381         0x08,  /* AEC */
 382         0x0c,  /* Noise mixer */
 383         0x0d,  /* Comfort noise */
 384         0x10,  /* IN1L */
 385         0x11,
 386         0x12,
 387         0x13,
 388         0x14,
 389         0x15,
 390         0x16,
 391         0x17,
 392         0x20,  /* AIF1RX1 */
 393         0x21,
 394         0x22,
 395         0x23,
 396         0x24,
 397         0x25,
 398         0x26,
 399         0x27,
 400         0x28,  /* AIF2RX1 */
 401         0x29,
 402         0x2a,
 403         0x2b,
 404         0x2c,
 405         0x2d,
 406         0x30,  /* AIF3RX1 */
 407         0x31,
 408         0x38,  /* SLIMRX1 */
 409         0x39,
 410         0x3a,
 411         0x3b,
 412         0x3c,
 413         0x3d,
 414         0x3e,
 415         0x3f,
 416         0x50,  /* EQ1 */
 417         0x51,
 418         0x52,
 419         0x53,
 420         0x58,  /* DRC1L */
 421         0x59,
 422         0x5a,
 423         0x5b,
 424         0x60,  /* LHPF1 */
 425         0x61,
 426         0x62,
 427         0x63,
 428         0x68,  /* DSP1.1 */
 429         0x69,
 430         0x6a,
 431         0x6b,
 432         0x6c,
 433         0x6d,
 434         0x70,  /* DSP2.1 */
 435         0x71,
 436         0x72,
 437         0x73,
 438         0x74,
 439         0x75,
 440         0x78,  /* DSP3.1 */
 441         0x79,
 442         0x7a,
 443         0x7b,
 444         0x7c,
 445         0x7d,
 446         0x80,  /* DSP4.1 */
 447         0x81,
 448         0x82,
 449         0x83,
 450         0x84,
 451         0x85,
 452         0x90,  /* ASRC1L */
 453         0x91,
 454         0x92,
 455         0x93,
 456         0xa0,  /* ISRC1INT1 */
 457         0xa1,
 458         0xa2,
 459         0xa3,
 460         0xa4,  /* ISRC1DEC1 */
 461         0xa5,
 462         0xa6,
 463         0xa7,
 464         0xa8,  /* ISRC2DEC1 */
 465         0xa9,
 466         0xaa,
 467         0xab,
 468         0xac,  /* ISRC2INT1 */
 469         0xad,
 470         0xae,
 471         0xaf,
 472         0xb0,  /* ISRC3DEC1 */
 473         0xb1,
 474         0xb2,
 475         0xb3,
 476         0xb4,  /* ISRC3INT1 */
 477         0xb5,
 478         0xb6,
 479         0xb7,
 480 };
 481 EXPORT_SYMBOL_GPL(arizona_mixer_values);
 482
 483 const DECLARE_TLV_DB_SCALE(arizona_mixer_tlv, -3200, 100, 0);
 484 EXPORT_SYMBOL_GPL(arizona_mixer_tlv);
 485
 486 const char *arizona_rate_text[ARIZONA_RATE_ENUM_SIZE] = {
 487         "SYNCCLK rate", "8kHz", "16kHz", "ASYNCCLK rate",
 488 };
 489 EXPORT_SYMBOL_GPL(arizona_rate_text);
 490
 491 const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE] = {
 492         0, 1, 2, 8,
 493 };
 494 EXPORT_SYMBOL_GPL(arizona_rate_val);
 495
 496
 497 const struct soc_enum arizona_isrc_fsl[] = {
 498         SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_2,
 499                               ARIZONA_ISRC1_FSL_SHIFT, 0xf,
 500                               ARIZONA_RATE_ENUM_SIZE,
 501                               arizona_rate_text, arizona_rate_val),
 502         SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_2_CTRL_2,
 503                               ARIZONA_ISRC2_FSL_SHIFT, 0xf,
 504                               ARIZONA_RATE_ENUM_SIZE,
 505                               arizona_rate_text, arizona_rate_val),
 506         SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_3_CTRL_2,
 507                               ARIZONA_ISRC3_FSL_SHIFT, 0xf,
 508                               ARIZONA_RATE_ENUM_SIZE,
 509                               arizona_rate_text, arizona_rate_val),
 510 };
 511 EXPORT_SYMBOL_GPL(arizona_isrc_fsl);
 512
 513 static const char *arizona_vol_ramp_text[] = {
 514         "0ms/6dB", "0.5ms/6dB", "1ms/6dB", "2ms/6dB", "4ms/6dB", "8ms/6dB",
 515         "15ms/6dB", "30ms/6dB",
 516 };
 517
 518 const struct soc_enum arizona_in_vd_ramp =
 519         SOC_ENUM_SINGLE(ARIZONA_INPUT_VOLUME_RAMP,
 520                         ARIZONA_IN_VD_RAMP_SHIFT, 7, arizona_vol_ramp_text);
 521 EXPORT_SYMBOL_GPL(arizona_in_vd_ramp);
 522
 523 const struct soc_enum arizona_in_vi_ramp =
 524         SOC_ENUM_SINGLE(ARIZONA_INPUT_VOLUME_RAMP,
 525                         ARIZONA_IN_VI_RAMP_SHIFT, 7, arizona_vol_ramp_text);
 526 EXPORT_SYMBOL_GPL(arizona_in_vi_ramp);
 527
 528 const struct soc_enum arizona_out_vd_ramp =
 529         SOC_ENUM_SINGLE(ARIZONA_OUTPUT_VOLUME_RAMP,
 530                         ARIZONA_OUT_VD_RAMP_SHIFT, 7, arizona_vol_ramp_text);
 531 EXPORT_SYMBOL_GPL(arizona_out_vd_ramp);
 532
 533 const struct soc_enum arizona_out_vi_ramp =
 534         SOC_ENUM_SINGLE(ARIZONA_OUTPUT_VOLUME_RAMP,
 535                         ARIZONA_OUT_VI_RAMP_SHIFT, 7, arizona_vol_ramp_text);
 536 EXPORT_SYMBOL_GPL(arizona_out_vi_ramp);
 537
 538 static const char *arizona_lhpf_mode_text[] = {
 539         "Low-pass", "High-pass"
 540 };
 541
 542 const struct soc_enum arizona_lhpf1_mode =
 543         SOC_ENUM_SINGLE(ARIZONA_HPLPF1_1, ARIZONA_LHPF1_MODE_SHIFT, 2,
 544                         arizona_lhpf_mode_text);
 545 EXPORT_SYMBOL_GPL(arizona_lhpf1_mode);
 546
 547 const struct soc_enum arizona_lhpf2_mode =
 548         SOC_ENUM_SINGLE(ARIZONA_HPLPF2_1, ARIZONA_LHPF2_MODE_SHIFT, 2,
 549                         arizona_lhpf_mode_text);
 550 EXPORT_SYMBOL_GPL(arizona_lhpf2_mode);
 551
 552 const struct soc_enum arizona_lhpf3_mode =
 553         SOC_ENUM_SINGLE(ARIZONA_HPLPF3_1, ARIZONA_LHPF3_MODE_SHIFT, 2,
 554                         arizona_lhpf_mode_text);
 555 EXPORT_SYMBOL_GPL(arizona_lhpf3_mode);
 556
 557 const struct soc_enum arizona_lhpf4_mode =
 558         SOC_ENUM_SINGLE(ARIZONA_HPLPF4_1, ARIZONA_LHPF4_MODE_SHIFT, 2,
 559                         arizona_lhpf_mode_text);
 560 EXPORT_SYMBOL_GPL(arizona_lhpf4_mode);
 561
 562 static const char *arizona_ng_hold_text[] = {
 563         "30ms", "120ms", "250ms", "500ms",
 564 };
 565
 566 const struct soc_enum arizona_ng_hold =
 567         SOC_ENUM_SINGLE(ARIZONA_NOISE_GATE_CONTROL, ARIZONA_NGATE_HOLD_SHIFT,
 568                         4, arizona_ng_hold_text);
 569 EXPORT_SYMBOL_GPL(arizona_ng_hold);
 570
 571 static const char * const arizona_in_hpf_cut_text[] = {
 572         "2.5Hz", "5Hz", "10Hz", "20Hz", "40Hz"
 573 };
 574
 575 const struct soc_enum arizona_in_hpf_cut_enum =
 576         SOC_ENUM_SINGLE(ARIZONA_HPF_CONTROL, ARIZONA_IN_HPF_CUT_SHIFT,
 577                         ARRAY_SIZE(arizona_in_hpf_cut_text),
 578                         arizona_in_hpf_cut_text);
 579 EXPORT_SYMBOL_GPL(arizona_in_hpf_cut_enum);
 580
 581 static const char * const arizona_in_dmic_osr_text[] = {
 582         "1.536MHz", "3.072MHz", "6.144MHz",
 583 };
 584
 585 const struct soc_enum arizona_in_dmic_osr[] = {
 586         SOC_ENUM_SINGLE(ARIZONA_IN1L_CONTROL, ARIZONA_IN1_OSR_SHIFT,
 587                         ARRAY_SIZE(arizona_in_dmic_osr_text),
 588                         arizona_in_dmic_osr_text),
 589         SOC_ENUM_SINGLE(ARIZONA_IN2L_CONTROL, ARIZONA_IN2_OSR_SHIFT,
 590                         ARRAY_SIZE(arizona_in_dmic_osr_text),
 591                         arizona_in_dmic_osr_text),
 592         SOC_ENUM_SINGLE(ARIZONA_IN3L_CONTROL, ARIZONA_IN3_OSR_SHIFT,
 593                         ARRAY_SIZE(arizona_in_dmic_osr_text),
 594                         arizona_in_dmic_osr_text),
 595         SOC_ENUM_SINGLE(ARIZONA_IN4L_CONTROL, ARIZONA_IN4_OSR_SHIFT,
 596                         ARRAY_SIZE(arizona_in_dmic_osr_text),
 597                         arizona_in_dmic_osr_text),
 598 };
 599 EXPORT_SYMBOL_GPL(arizona_in_dmic_osr);
 600
 601 static void arizona_in_set_vu(struct snd_soc_codec *codec, int ena)
 602 {
 603         struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
 604         unsigned int val;
 605         int i;
 606
 607         if (ena)
 608                 val = ARIZONA_IN_VU;
 609         else
 610                 val = 0;
 611
 612         for (i = 0; i < priv->num_inputs; i++)
 613                 snd_soc_update_bits(codec,
 614                                     ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 4),
 615                                     ARIZONA_IN_VU, val);
 616 }
 617
 618 int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol,
 619                   int event)
 620 {
 621         struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec);
 622         unsigned int reg;
 623
 624         if (w->shift % 2)
 625                 reg = ARIZONA_ADC_DIGITAL_VOLUME_1L + ((w->shift / 2) * 8);
 626         else
 627                 reg = ARIZONA_ADC_DIGITAL_VOLUME_1R + ((w->shift / 2) * 8);
 628
 629         switch (event) {
 630         case SND_SOC_DAPM_PRE_PMU:
 631                 priv->in_pending++;
 632                 break;
 633         case SND_SOC_DAPM_POST_PMU:
 634                 snd_soc_update_bits(w->codec, reg, ARIZONA_IN1L_MUTE, 0);
 635
 636                 /* If this is the last input pending then allow VU */
 637                 priv->in_pending--;
 638                 if (priv->in_pending == 0) {
 639                         msleep(1);
 640                         arizona_in_set_vu(w->codec, 1);
 641                 }
 642                 break;
 643         case SND_SOC_DAPM_PRE_PMD:
 644                 snd_soc_update_bits(w->codec, reg,
 645                                     ARIZONA_IN1L_MUTE | ARIZONA_IN_VU,
 646                                     ARIZONA_IN1L_MUTE | ARIZONA_IN_VU);
 647                 break;
 648         case SND_SOC_DAPM_POST_PMD:
 649                 /* Disable volume updates if no inputs are enabled */
 650                 reg = snd_soc_read(w->codec, ARIZONA_INPUT_ENABLES);
 651                 if (reg == 0)
 652                         arizona_in_set_vu(w->codec, 0);
 653         }
 654
 655         return 0;
 656 }
 657 EXPORT_SYMBOL_GPL(arizona_in_ev);
 658
 659 int arizona_out_ev(struct snd_soc_dapm_widget *w,
 660                    struct snd_kcontrol *kcontrol,
 661                    int event)
 662 {
 663         switch (event) {
 664         case SND_SOC_DAPM_POST_PMU:
 665                 switch (w->shift) {
 666                 case ARIZONA_OUT1L_ENA_SHIFT:
 667                 case ARIZONA_OUT1R_ENA_SHIFT:
 668                 case ARIZONA_OUT2L_ENA_SHIFT:
 669                 case ARIZONA_OUT2R_ENA_SHIFT:
 670                 case ARIZONA_OUT3L_ENA_SHIFT:
 671                 case ARIZONA_OUT3R_ENA_SHIFT:
 672                         msleep(17);
 673                         break;
 674
 675                 default:
 676                         break;
 677                 }
 678                 break;
 679         }
 680
 681         return 0;
 682 }
 683 EXPORT_SYMBOL_GPL(arizona_out_ev);
 684
 685 int arizona_hp_ev(struct snd_soc_dapm_widget *w,
 686                    struct snd_kcontrol *kcontrol,
 687                    int event)
 688 {
 689         struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec);
 690         unsigned int mask = 1 << w->shift;
 691         unsigned int val;
 692
 693         switch (event) {
 694         case SND_SOC_DAPM_POST_PMU:
 695                 val = mask;
 696                 break;
 697         case SND_SOC_DAPM_PRE_PMD:
 698                 val = 0;
 699                 break;
 700         default:
 701                 return -EINVAL;
 702         }
 703
 704         /* Store the desired state for the HP outputs */
 705         priv->arizona->hp_ena &= ~mask;
 706         priv->arizona->hp_ena |= val;
 707
 708         /* Force off if HPDET magic is active */
 709         if (priv->arizona->hpdet_magic)
 710                 val = 0;
 711
 712         snd_soc_update_bits(w->codec, ARIZONA_OUTPUT_ENABLES_1, mask, val);
 713
 714         return arizona_out_ev(w, kcontrol, event);
 715 }
 716 EXPORT_SYMBOL_GPL(arizona_hp_ev);
 717
 718 static unsigned int arizona_sysclk_48k_rates[] = {
 719         6144000,
 720         12288000,
 721         24576000,
 722         49152000,
 723         73728000,
 724         98304000,
 725         147456000,
 726 };
 727
 728 static unsigned int arizona_sysclk_44k1_rates[] = {
 729         5644800,
 730         11289600,
 731         22579200,
 732         45158400,
 733         67737600,
 734         90316800,
 735         135475200,
 736 };
 737
 738 static int arizona_set_opclk(struct snd_soc_codec *codec, unsigned int clk,
 739                              unsigned int freq)
 740 {
 741         struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
 742         unsigned int reg;
 743         unsigned int *rates;
 744         int ref, div, refclk;
 745
 746         switch (clk) {
 747         case ARIZONA_CLK_OPCLK:
 748                 reg = ARIZONA_OUTPUT_SYSTEM_CLOCK;
 749                 refclk = priv->sysclk;
 750                 break;
 751         case ARIZONA_CLK_ASYNC_OPCLK:
 752                 reg = ARIZONA_OUTPUT_ASYNC_CLOCK;
 753                 refclk = priv->asyncclk;
 754                 break;
 755         default:
 756                 return -EINVAL;
 757         }
 758
 759         if (refclk % 8000)
 760                 rates = arizona_sysclk_44k1_rates;
 761         else
 762                 rates = arizona_sysclk_48k_rates;
 763
 764         for (ref = 0; ref < ARRAY_SIZE(arizona_sysclk_48k_rates) &&
 765                      rates[ref] <= refclk; ref++) {
 766                 div = 1;
 767                 while (rates[ref] / div >= freq && div < 32) {
 768                         if (rates[ref] / div == freq) {
 769                                 dev_dbg(codec->dev, "Configured %dHz OPCLK\n",
 770                                         freq);
 771                                 snd_soc_update_bits(codec, reg,
 772                                                     ARIZONA_OPCLK_DIV_MASK |
 773                                                     ARIZONA_OPCLK_SEL_MASK,
 774                                                     (div <<
 775                                                      ARIZONA_OPCLK_DIV_SHIFT) |
 776                                                     ref);
 777                                 return 0;
 778                         }
 779                         div++;
 780                 }
 781         }
 782
 783         dev_err(codec->dev, "Unable to generate %dHz OPCLK\n", freq);
 784         return -EINVAL;
 785 }
 786
 787 int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id,
 788                        int source, unsigned int freq, int dir)
 789 {
 790         struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
 791         struct arizona *arizona = priv->arizona;
 792         char *name;
 793         unsigned int reg;
 794         unsigned int mask = ARIZONA_SYSCLK_FREQ_MASK | ARIZONA_SYSCLK_SRC_MASK;
 795         unsigned int val = source << ARIZONA_SYSCLK_SRC_SHIFT;
 796         unsigned int *clk;
 797
 798         switch (clk_id) {
 799         case ARIZONA_CLK_SYSCLK:
 800                 name = "SYSCLK";
 801                 reg = ARIZONA_SYSTEM_CLOCK_1;
 802                 clk = &priv->sysclk;
 803                 mask |= ARIZONA_SYSCLK_FRAC;
 804                 break;
 805         case ARIZONA_CLK_ASYNCCLK:
 806                 name = "ASYNCCLK";
 807                 reg = ARIZONA_ASYNC_CLOCK_1;
 808                 clk = &priv->asyncclk;
 809                 break;
 810         case ARIZONA_CLK_OPCLK:
 811         case ARIZONA_CLK_ASYNC_OPCLK:
 812                 return arizona_set_opclk(codec, clk_id, freq);
 813         default:
 814                 return -EINVAL;
 815         }
 816
 817         switch (freq) {
 818         case  5644800:
 819         case  6144000:
 820                 break;
 821         case 11289600:
 822         case 12288000:
 823                 val |= ARIZONA_CLK_12MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
 824                 break;
 825         case 22579200:
 826         case 24576000:
 827                 val |= ARIZONA_CLK_24MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
 828                 break;
 829         case 45158400:
 830         case 49152000:
 831                 val |= ARIZONA_CLK_49MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
 832                 break;
 833         case 67737600:
 834         case 73728000:
 835                 val |= ARIZONA_CLK_73MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
 836                 break;
 837         case 90316800:
 838         case 98304000:
 839                 val |= ARIZONA_CLK_98MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
 840                 break;
 841         case 135475200:
 842         case 147456000:
 843                 val |= ARIZONA_CLK_147MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
 844                 break;
 845         case 0:
 846                 dev_dbg(arizona->dev, "%s cleared\n", name);
 847                 *clk = freq;
 848                 return 0;
 849         default:
 850                 return -EINVAL;
 851         }
 852
 853         *clk = freq;
 854
 855         if (freq % 6144000)
 856                 val |= ARIZONA_SYSCLK_FRAC;
 857
 858         dev_dbg(arizona->dev, "%s set to %uHz", name, freq);
 859
 860         return regmap_update_bits(arizona->regmap, reg, mask, val);
 861 }
 862 EXPORT_SYMBOL_GPL(arizona_set_sysclk);
 863
 864 static int arizona_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 865 {
 866         struct snd_soc_codec *codec = dai->codec;
 867         int lrclk, bclk, mode, base;
 868
 869         base = dai->driver->base;
 870
 871         lrclk = 0;
 872         bclk = 0;
 873
 874         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 875         case SND_SOC_DAIFMT_DSP_A:
 876                 mode = 0;
 877                 break;
 878         case SND_SOC_DAIFMT_I2S:
 879                 mode = 2;
 880                 break;
 881         default:
 882                 arizona_aif_err(dai, "Unsupported DAI format %d\n",
 883                                 fmt & SND_SOC_DAIFMT_FORMAT_MASK);
 884                 return -EINVAL;
 885         }
 886
 887         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 888         case SND_SOC_DAIFMT_CBS_CFS:
 889                 break;
 890         case SND_SOC_DAIFMT_CBS_CFM:
 891                 lrclk |= ARIZONA_AIF1TX_LRCLK_MSTR;
 892                 break;
 893         case SND_SOC_DAIFMT_CBM_CFS:
 894                 bclk |= ARIZONA_AIF1_BCLK_MSTR;
 895                 break;
 896         case SND_SOC_DAIFMT_CBM_CFM:
 897                 bclk |= ARIZONA_AIF1_BCLK_MSTR;
 898                 lrclk |= ARIZONA_AIF1TX_LRCLK_MSTR;
 899                 break;
 900         default:
 901                 arizona_aif_err(dai, "Unsupported master mode %d\n",
 902                                 fmt & SND_SOC_DAIFMT_MASTER_MASK);
 903                 return -EINVAL;
 904         }
 905
 906         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 907         case SND_SOC_DAIFMT_NB_NF:
 908                 break;
 909         case SND_SOC_DAIFMT_IB_IF:
 910                 bclk |= ARIZONA_AIF1_BCLK_INV;
 911                 lrclk |= ARIZONA_AIF1TX_LRCLK_INV;
 912                 break;
 913         case SND_SOC_DAIFMT_IB_NF:
 914                 bclk |= ARIZONA_AIF1_BCLK_INV;
 915                 break;
 916         case SND_SOC_DAIFMT_NB_IF:
 917                 lrclk |= ARIZONA_AIF1TX_LRCLK_INV;
 918                 break;
 919         default:
 920                 return -EINVAL;
 921         }
 922
 923         snd_soc_update_bits(codec, base + ARIZONA_AIF_BCLK_CTRL,
 924                             ARIZONA_AIF1_BCLK_INV | ARIZONA_AIF1_BCLK_MSTR,
 925                             bclk);
 926         snd_soc_update_bits(codec, base + ARIZONA_AIF_TX_PIN_CTRL,
 927                             ARIZONA_AIF1TX_LRCLK_INV |
 928                             ARIZONA_AIF1TX_LRCLK_MSTR, lrclk);
 929         snd_soc_update_bits(codec, base + ARIZONA_AIF_RX_PIN_CTRL,
 930                             ARIZONA_AIF1RX_LRCLK_INV |
 931                             ARIZONA_AIF1RX_LRCLK_MSTR, lrclk);
 932         snd_soc_update_bits(codec, base + ARIZONA_AIF_FORMAT,
 933                             ARIZONA_AIF1_FMT_MASK, mode);
 934
 935         return 0;
 936 }
 937
 938 static const int arizona_48k_bclk_rates[] = {
 939         -1,
 940         48000,
 941         64000,
 942         96000,
 943         128000,
 944         192000,
 945         256000,
 946         384000,
 947         512000,
 948         768000,
 949         1024000,
 950         1536000,
 951         2048000,
 952         3072000,
 953         4096000,
 954         6144000,
 955         8192000,
 956         12288000,
 957         24576000,
 958 };
 959
 960 static const unsigned int arizona_48k_rates[] = {
 961         12000,
 962         24000,
 963         48000,
 964         96000,
 965         192000,
 966         384000,
 967         768000,
 968         4000,
 969         8000,
 970         16000,
 971         32000,
 972         64000,
 973         128000,
 974         256000,
 975         512000,
 976 };
 977
 978 static const struct snd_pcm_hw_constraint_list arizona_48k_constraint = {
 979         .count  = ARRAY_SIZE(arizona_48k_rates),
 980         .list   = arizona_48k_rates,
 981 };
 982
 983 static const int arizona_44k1_bclk_rates[] = {
 984         -1,
 985         44100,
 986         58800,
 987         88200,
 988         117600,
 989         177640,
 990         235200,
 991         352800,
 992         470400,
 993         705600,
 994         940800,
 995         1411200,
 996         1881600,
 997         2822400,
 998         3763200,
 999         5644800,
1000         7526400,
1001         11289600,
1002         22579200,
1003 };
1004
1005 static const unsigned int arizona_44k1_rates[] = {
1006         11025,
1007         22050,
1008         44100,
1009         88200,
1010         176400,
1011         352800,
1012         705600,
1013 };
1014
1015 static const struct snd_pcm_hw_constraint_list arizona_44k1_constraint = {
1016         .count  = ARRAY_SIZE(arizona_44k1_rates),
1017         .list   = arizona_44k1_rates,
1018 };
1019
1020 static int arizona_sr_vals[] = {
1021         0,
1022         12000,
1023         24000,
1024         48000,
1025         96000,
1026         192000,
1027         384000,
1028         768000,
1029         0,
1030         11025,
1031         22050,
1032         44100,
1033         88200,
1034         176400,
1035         352800,
1036         705600,
1037         4000,
1038         8000,
1039         16000,
1040         32000,
1041         64000,
1042         128000,
1043         256000,
1044         512000,
1045 };
1046
1047 static int arizona_startup(struct snd_pcm_substream *substream,
1048                            struct snd_soc_dai *dai)
1049 {
1050         struct snd_soc_codec *codec = dai->codec;
1051         struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1052         struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
1053         const struct snd_pcm_hw_constraint_list *constraint;
1054         unsigned int base_rate;
1055
1056         switch (dai_priv->clk) {
1057         case ARIZONA_CLK_SYSCLK:
1058                 base_rate = priv->sysclk;
1059                 break;
1060         case ARIZONA_CLK_ASYNCCLK:
1061                 base_rate = priv->asyncclk;
1062                 break;
1063         default:
1064                 return 0;
1065         }
1066
1067         if (base_rate == 0)
1068                 return 0;
1069
1070         if (base_rate % 8000)
1071                 constraint = &arizona_44k1_constraint;
1072         else
1073                 constraint = &arizona_48k_constraint;
1074
1075         return snd_pcm_hw_constraint_list(substream->runtime, 0,
1076                                           SNDRV_PCM_HW_PARAM_RATE,
1077                                           constraint);
1078 }
1079
1080 static int arizona_hw_params_rate(struct snd_pcm_substream *substream,
1081                                   struct snd_pcm_hw_params *params,
1082                                   struct snd_soc_dai *dai)
1083 {
1084         struct snd_soc_codec *codec = dai->codec;
1085         struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1086         struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
1087         int base = dai->driver->base;
1088         int i, sr_val;
1089
1090         /*
1091          * We will need to be more flexible than this in future,
1092          * currently we use a single sample rate for SYSCLK.
1093          */
1094         for (i = 0; i < ARRAY_SIZE(arizona_sr_vals); i++)
1095                 if (arizona_sr_vals[i] == params_rate(params))
1096                         break;
1097         if (i == ARRAY_SIZE(arizona_sr_vals)) {
1098                 arizona_aif_err(dai, "Unsupported sample rate %dHz\n",
1099                                 params_rate(params));
1100                 return -EINVAL;
1101         }
1102         sr_val = i;
1103
1104         switch (dai_priv->clk) {
1105         case ARIZONA_CLK_SYSCLK:
1106                 snd_soc_update_bits(codec, ARIZONA_SAMPLE_RATE_1,
1107                                     ARIZONA_SAMPLE_RATE_1_MASK, sr_val);
1108                 if (base)
1109                         snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL,
1110                                             ARIZONA_AIF1_RATE_MASK, 0);
1111                 break;
1112         case ARIZONA_CLK_ASYNCCLK:
1113                 snd_soc_update_bits(codec, ARIZONA_ASYNC_SAMPLE_RATE_1,
1114                                     ARIZONA_ASYNC_SAMPLE_RATE_MASK, sr_val);
1115                 if (base)
1116                         snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL,
1117                                             ARIZONA_AIF1_RATE_MASK,
1118                                             8 << ARIZONA_AIF1_RATE_SHIFT);
1119                 break;
1120         default:
1121                 arizona_aif_err(dai, "Invalid clock %d\n", dai_priv->clk);
1122                 return -EINVAL;
1123         }
1124
1125         return 0;
1126 }
1127
1128 static int arizona_hw_params(struct snd_pcm_substream *substream,
1129                              struct snd_pcm_hw_params *params,
1130                              struct snd_soc_dai *dai)
1131 {
1132         struct snd_soc_codec *codec = dai->codec;
1133         struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1134         struct arizona *arizona = priv->arizona;
1135         int base = dai->driver->base;
1136         const int *rates;
1137         int i, ret, val;
1138         int chan_limit = arizona->pdata.max_channels_clocked[dai->id - 1];
1139         int bclk, lrclk, wl, frame, bclk_target;
1140
1141         if (params_rate(params) % 8000)
1142                 rates = &arizona_44k1_bclk_rates[0];
1143         else
1144                 rates = &arizona_48k_bclk_rates[0];
1145
1146         bclk_target = snd_soc_params_to_bclk(params);
1147         if (chan_limit && chan_limit < params_channels(params)) {
1148                 arizona_aif_dbg(dai, "Limiting to %d channels\n", chan_limit);
1149                 bclk_target /= params_channels(params);
1150                 bclk_target *= chan_limit;
1151         }
1152
1153         /* Force stereo for I2S mode */
1154         val = snd_soc_read(codec, base + ARIZONA_AIF_FORMAT);
1155         if (params_channels(params) == 1 && (val & ARIZONA_AIF1_FMT_MASK)) {
1156                 arizona_aif_dbg(dai, "Forcing stereo mode\n");
1157                 bclk_target *= 2;
1158         }
1159
1160         for (i = 0; i < ARRAY_SIZE(arizona_44k1_bclk_rates); i++) {
1161                 if (rates[i] >= bclk_target &&
1162                     rates[i] % params_rate(params) == 0) {
1163                         bclk = i;
1164                         break;
1165                 }
1166         }
1167         if (i == ARRAY_SIZE(arizona_44k1_bclk_rates)) {
1168                 arizona_aif_err(dai, "Unsupported sample rate %dHz\n",
1169                                 params_rate(params));
1170                 return -EINVAL;
1171         }
1172
1173         lrclk = rates[bclk] / params_rate(params);
1174
1175         arizona_aif_dbg(dai, "BCLK %dHz LRCLK %dHz\n",
1176                         rates[bclk], rates[bclk] / lrclk);
1177
1178         wl = snd_pcm_format_width(params_format(params));
1179         frame = wl << ARIZONA_AIF1TX_WL_SHIFT | wl;
1180
1181         ret = arizona_hw_params_rate(substream, params, dai);
1182         if (ret != 0)
1183                 return ret;
1184
1185         snd_soc_update_bits(codec, base + ARIZONA_AIF_BCLK_CTRL,
1186                             ARIZONA_AIF1_BCLK_FREQ_MASK, bclk);
1187         snd_soc_update_bits(codec, base + ARIZONA_AIF_TX_BCLK_RATE,
1188                             ARIZONA_AIF1TX_BCPF_MASK, lrclk);
1189         snd_soc_update_bits(codec, base + ARIZONA_AIF_RX_BCLK_RATE,
1190                             ARIZONA_AIF1RX_BCPF_MASK, lrclk);
1191         snd_soc_update_bits(codec, base + ARIZONA_AIF_FRAME_CTRL_1,
1192                             ARIZONA_AIF1TX_WL_MASK |
1193                             ARIZONA_AIF1TX_SLOT_LEN_MASK, frame);
1194         snd_soc_update_bits(codec, base + ARIZONA_AIF_FRAME_CTRL_2,
1195                             ARIZONA_AIF1RX_WL_MASK |
1196                             ARIZONA_AIF1RX_SLOT_LEN_MASK, frame);
1197
1198         return 0;
1199 }
1200
1201 static const char *arizona_dai_clk_str(int clk_id)
1202 {
1203         switch (clk_id) {
1204         case ARIZONA_CLK_SYSCLK:
1205                 return "SYSCLK";
1206         case ARIZONA_CLK_ASYNCCLK:
1207                 return "ASYNCCLK";
1208         default:
1209                 return "Unknown clock";
1210         }
1211 }
1212
1213 static int arizona_dai_set_sysclk(struct snd_soc_dai *dai,
1214                                   int clk_id, unsigned int freq, int dir)
1215 {
1216         struct snd_soc_codec *codec = dai->codec;
1217         struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1218         struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
1219         struct snd_soc_dapm_route routes[2];
1220
1221         switch (clk_id) {
1222         case ARIZONA_CLK_SYSCLK:
1223         case ARIZONA_CLK_ASYNCCLK:
1224                 break;
1225         default:
1226                 return -EINVAL;
1227         }
1228
1229         if (clk_id == dai_priv->clk)
1230                 return 0;
1231
1232         if (dai->active) {
1233                 dev_err(codec->dev, "Can't change clock on active DAI %d\n",
1234                         dai->id);
1235                 return -EBUSY;
1236         }
1237
1238         dev_dbg(codec->dev, "Setting AIF%d to %s\n", dai->id + 1,
1239                 arizona_dai_clk_str(clk_id));
1240
1241         memset(&routes, 0, sizeof(routes));
1242         routes[0].sink = dai->driver->capture.stream_name;
1243         routes[1].sink = dai->driver->playback.stream_name;
1244
1245         routes[0].source = arizona_dai_clk_str(dai_priv->clk);
1246         routes[1].source = arizona_dai_clk_str(dai_priv->clk);
1247         snd_soc_dapm_del_routes(&codec->dapm, routes, ARRAY_SIZE(routes));
1248
1249         routes[0].source = arizona_dai_clk_str(clk_id);
1250         routes[1].source = arizona_dai_clk_str(clk_id);
1251         snd_soc_dapm_add_routes(&codec->dapm, routes, ARRAY_SIZE(routes));
1252
1253         dai_priv->clk = clk_id;
1254
1255         return snd_soc_dapm_sync(&codec->dapm);
1256 }
1257
1258 static int arizona_set_tristate(struct snd_soc_dai *dai, int tristate)
1259 {
1260         struct snd_soc_codec *codec = dai->codec;
1261         int base = dai->driver->base;
1262         unsigned int reg;
1263
1264         if (tristate)
1265                 reg = ARIZONA_AIF1_TRI;
1266         else
1267                 reg = 0;
1268
1269         return snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL,
1270                                    ARIZONA_AIF1_TRI, reg);
1271 }
1272
1273 const struct snd_soc_dai_ops arizona_dai_ops = {
1274         .startup = arizona_startup,
1275         .set_fmt = arizona_set_fmt,
1276         .hw_params = arizona_hw_params,
1277         .set_sysclk = arizona_dai_set_sysclk,
1278         .set_tristate = arizona_set_tristate,
1279 };
1280 EXPORT_SYMBOL_GPL(arizona_dai_ops);
1281
1282 const struct snd_soc_dai_ops arizona_simple_dai_ops = {
1283         .startup = arizona_startup,
1284         .hw_params = arizona_hw_params_rate,
1285         .set_sysclk = arizona_dai_set_sysclk,
1286 };
1287 EXPORT_SYMBOL_GPL(arizona_simple_dai_ops);
1288
1289 int arizona_init_dai(struct arizona_priv *priv, int id)
1290 {
1291         struct arizona_dai_priv *dai_priv = &priv->dai[id];
1292
1293         dai_priv->clk = ARIZONA_CLK_SYSCLK;
1294
1295         return 0;
1296 }
1297 EXPORT_SYMBOL_GPL(arizona_init_dai);
1298
1299 static irqreturn_t arizona_fll_clock_ok(int irq, void *data)
1300 {
1301         struct arizona_fll *fll = data;
1302
1303         arizona_fll_dbg(fll, "clock OK\n");
1304
1305         complete(&fll->ok);
1306
1307         return IRQ_HANDLED;
1308 }
1309
1310 static struct {
1311         unsigned int min;
1312         unsigned int max;
1313         u16 fratio;
1314         int ratio;
1315 } fll_fratios[] = {
1316         {       0,    64000, 4, 16 },
1317         {   64000,   128000, 3,  8 },
1318         {  128000,   256000, 2,  4 },
1319         {  256000,  1000000, 1,  2 },
1320         { 1000000, 13500000, 0,  1 },
1321 };
1322
1323 static struct {
1324         unsigned int min;
1325         unsigned int max;
1326         u16 gain;
1327 } fll_gains[] = {
1328         {       0,   256000, 0 },
1329         {  256000,  1000000, 2 },
1330         { 1000000, 13500000, 4 },
1331 };
1332
1333 struct arizona_fll_cfg {
1334         int n;
1335         int theta;
1336         int lambda;
1337         int refdiv;
1338         int outdiv;
1339         int fratio;
1340         int gain;
1341 };
1342
1343 static int arizona_calc_fll(struct arizona_fll *fll,
1344                             struct arizona_fll_cfg *cfg,
1345                             unsigned int Fref,
1346                             unsigned int Fout)
1347 {
1348         unsigned int target, div, gcd_fll;
1349         int i, ratio;
1350
1351         arizona_fll_dbg(fll, "Fref=%u Fout=%u\n", Fref, Fout);
1352
1353         /* Fref must be <=13.5MHz */
1354         div = 1;
1355         cfg->refdiv = 0;
1356         while ((Fref / div) > 13500000) {
1357                 div *= 2;
1358                 cfg->refdiv++;
1359
1360                 if (div > 8) {
1361                         arizona_fll_err(fll,
1362                                         "Can't scale %dMHz in to <=13.5MHz\n",
1363                                         Fref);
1364                         return -EINVAL;
1365                 }
1366         }
1367
1368         /* Apply the division for our remaining calculations */
1369         Fref /= div;
1370
1371         /* Fvco should be over the targt; don't check the upper bound */
1372         div = 1;
1373         while (Fout * div < 90000000 * fll->vco_mult) {
1374                 div++;
1375                 if (div > 7) {
1376                         arizona_fll_err(fll, "No FLL_OUTDIV for Fout=%uHz\n",
1377                                         Fout);
1378                         return -EINVAL;
1379                 }
1380         }
1381         target = Fout * div / fll->vco_mult;
1382         cfg->outdiv = div;
1383
1384         arizona_fll_dbg(fll, "Fvco=%dHz\n", target);
1385
1386         /* Find an appropraite FLL_FRATIO and factor it out of the target */
1387         for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) {
1388                 if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) {
1389                         cfg->fratio = fll_fratios[i].fratio;
1390                         ratio = fll_fratios[i].ratio;
1391                         break;
1392                 }
1393         }
1394         if (i == ARRAY_SIZE(fll_fratios)) {
1395                 arizona_fll_err(fll, "Unable to find FRATIO for Fref=%uHz\n",
1396                                 Fref);
1397                 return -EINVAL;
1398         }
1399
1400         for (i = 0; i < ARRAY_SIZE(fll_gains); i++) {
1401                 if (fll_gains[i].min <= Fref && Fref <= fll_gains[i].max) {
1402                         cfg->gain = fll_gains[i].gain;
1403                         break;
1404                 }
1405         }
1406         if (i == ARRAY_SIZE(fll_gains)) {
1407                 arizona_fll_err(fll, "Unable to find gain for Fref=%uHz\n",
1408                                 Fref);
1409                 return -EINVAL;
1410         }
1411
1412         cfg->n = target / (ratio * Fref);
1413
1414         if (target % (ratio * Fref)) {
1415                 gcd_fll = gcd(target, ratio * Fref);
1416                 arizona_fll_dbg(fll, "GCD=%u\n", gcd_fll);
1417
1418                 cfg->theta = (target - (cfg->n * ratio * Fref))
1419                         / gcd_fll;
1420                 cfg->lambda = (ratio * Fref) / gcd_fll;
1421         } else {
1422                 cfg->theta = 0;
1423                 cfg->lambda = 0;
1424         }
1425
1426         /* Round down to 16bit range with cost of accuracy lost.
1427          * Denominator must be bigger than numerator so we only
1428          * take care of it.
1429          */
1430         while (cfg->lambda >= (1 << 16)) {
1431                 cfg->theta >>= 1;
1432                 cfg->lambda >>= 1;
1433         }
1434
1435         arizona_fll_dbg(fll, "N=%x THETA=%x LAMBDA=%x\n",
1436                         cfg->n, cfg->theta, cfg->lambda);
1437         arizona_fll_dbg(fll, "FRATIO=%x(%d) OUTDIV=%x REFCLK_DIV=%x\n",
1438                         cfg->fratio, cfg->fratio, cfg->outdiv, cfg->refdiv);
1439         arizona_fll_dbg(fll, "GAIN=%d\n", cfg->gain);
1440
1441         return 0;
1442
1443 }
1444
1445 static void arizona_apply_fll(struct arizona *arizona, unsigned int base,
1446                               struct arizona_fll_cfg *cfg, int source,
1447                               bool sync)
1448 {
1449         regmap_update_bits(arizona->regmap, base + 3,
1450                            ARIZONA_FLL1_THETA_MASK, cfg->theta);
1451         regmap_update_bits(arizona->regmap, base + 4,
1452                            ARIZONA_FLL1_LAMBDA_MASK, cfg->lambda);
1453         regmap_update_bits(arizona->regmap, base + 5,
1454                            ARIZONA_FLL1_FRATIO_MASK,
1455                            cfg->fratio << ARIZONA_FLL1_FRATIO_SHIFT);
1456         regmap_update_bits(arizona->regmap, base + 6,
1457                            ARIZONA_FLL1_CLK_REF_DIV_MASK |
1458                            ARIZONA_FLL1_CLK_REF_SRC_MASK,
1459                            cfg->refdiv << ARIZONA_FLL1_CLK_REF_DIV_SHIFT |
1460                            source << ARIZONA_FLL1_CLK_REF_SRC_SHIFT);
1461
1462         if (sync)
1463                 regmap_update_bits(arizona->regmap, base + 0x7,
1464                                    ARIZONA_FLL1_GAIN_MASK,
1465                                    cfg->gain << ARIZONA_FLL1_GAIN_SHIFT);
1466         else
1467                 regmap_update_bits(arizona->regmap, base + 0x9,
1468                                    ARIZONA_FLL1_GAIN_MASK,
1469                                    cfg->gain << ARIZONA_FLL1_GAIN_SHIFT);
1470
1471         regmap_update_bits(arizona->regmap, base + 2,
1472                            ARIZONA_FLL1_CTRL_UPD | ARIZONA_FLL1_N_MASK,
1473                            ARIZONA_FLL1_CTRL_UPD | cfg->n);
1474 }
1475
1476 static bool arizona_is_enabled_fll(struct arizona_fll *fll)
1477 {
1478         struct arizona *arizona = fll->arizona;
1479         unsigned int reg;
1480         int ret;
1481
1482         ret = regmap_read(arizona->regmap, fll->base + 1, &reg);
1483         if (ret != 0) {
1484                 arizona_fll_err(fll, "Failed to read current state: %d\n",
1485                                 ret);
1486                 return ret;
1487         }
1488
1489         return reg & ARIZONA_FLL1_ENA;
1490 }
1491
1492 static void arizona_enable_fll(struct arizona_fll *fll,
1493                               struct arizona_fll_cfg *ref,
1494                               struct arizona_fll_cfg *sync)
1495 {
1496         struct arizona *arizona = fll->arizona;
1497         int ret;
1498         bool use_sync = false;
1499
1500         /*
1501          * If we have both REFCLK and SYNCCLK then enable both,
1502          * otherwise apply the SYNCCLK settings to REFCLK.
1503          */
1504         if (fll->ref_src >= 0 && fll->ref_freq &&
1505             fll->ref_src != fll->sync_src) {
1506                 regmap_update_bits(arizona->regmap, fll->base + 5,
1507                                    ARIZONA_FLL1_OUTDIV_MASK,
1508                                    ref->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);
1509
1510                 arizona_apply_fll(arizona, fll->base, ref, fll->ref_src,
1511                                   false);
1512                 if (fll->sync_src >= 0) {
1513                         arizona_apply_fll(arizona, fll->base + 0x10, sync,
1514                                           fll->sync_src, true);
1515                         use_sync = true;
1516                 }
1517         } else if (fll->sync_src >= 0) {
1518                 regmap_update_bits(arizona->regmap, fll->base + 5,
1519                                    ARIZONA_FLL1_OUTDIV_MASK,
1520                                    sync->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);
1521
1522                 arizona_apply_fll(arizona, fll->base, sync,
1523                                   fll->sync_src, false);
1524
1525                 regmap_update_bits(arizona->regmap, fll->base + 0x11,
1526                                    ARIZONA_FLL1_SYNC_ENA, 0);
1527         } else {
1528                 arizona_fll_err(fll, "No clocks provided\n");
1529                 return;
1530         }
1531
1532         /*
1533          * Increase the bandwidth if we're not using a low frequency
1534          * sync source.
1535          */
1536         if (use_sync && fll->sync_freq > 100000)
1537                 regmap_update_bits(arizona->regmap, fll->base + 0x17,
1538                                    ARIZONA_FLL1_SYNC_BW, 0);
1539         else
1540                 regmap_update_bits(arizona->regmap, fll->base + 0x17,
1541                                    ARIZONA_FLL1_SYNC_BW, ARIZONA_FLL1_SYNC_BW);
1542
1543         if (!arizona_is_enabled_fll(fll))
1544                 pm_runtime_get(arizona->dev);
1545
1546         /* Clear any pending completions */
1547         try_wait_for_completion(&fll->ok);
1548
1549         regmap_update_bits(arizona->regmap, fll->base + 1,
1550                            ARIZONA_FLL1_FREERUN, 0);
1551         regmap_update_bits(arizona->regmap, fll->base + 1,
1552                            ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA);
1553         if (use_sync)
1554                 regmap_update_bits(arizona->regmap, fll->base + 0x11,
1555                                    ARIZONA_FLL1_SYNC_ENA,
1556                                    ARIZONA_FLL1_SYNC_ENA);
1557
1558         ret = wait_for_completion_timeout(&fll->ok,
1559                                           msecs_to_jiffies(250));
1560         if (ret == 0)
1561                 arizona_fll_warn(fll, "Timed out waiting for lock\n");
1562 }
1563
1564 static void arizona_disable_fll(struct arizona_fll *fll)
1565 {
1566         struct arizona *arizona = fll->arizona;
1567         bool change;
1568
1569         regmap_update_bits(arizona->regmap, fll->base + 1,
1570                            ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN);
1571         regmap_update_bits_check(arizona->regmap, fll->base + 1,
1572                                  ARIZONA_FLL1_ENA, 0, &change);
1573         regmap_update_bits(arizona->regmap, fll->base + 0x11,
1574                            ARIZONA_FLL1_SYNC_ENA, 0);
1575
1576         if (change)
1577                 pm_runtime_put_autosuspend(arizona->dev);
1578 }
1579
1580 int arizona_set_fll_refclk(struct arizona_fll *fll, int source,
1581                            unsigned int Fref, unsigned int Fout)
1582 {
1583         struct arizona_fll_cfg ref, sync;
1584         int ret;
1585
1586         if (fll->ref_src == source && fll->ref_freq == Fref)
1587                 return 0;
1588
1589         if (fll->fout) {
1590                 if (Fref > 0) {
1591                         ret = arizona_calc_fll(fll, &ref, Fref, fll->fout);
1592                         if (ret != 0)
1593                                 return ret;
1594                 }
1595
1596                 if (fll->sync_src >= 0) {
1597                         ret = arizona_calc_fll(fll, &sync, fll->sync_freq,
1598                                                fll->fout);
1599                         if (ret != 0)
1600                                 return ret;
1601                 }
1602         }
1603
1604         fll->ref_src = source;
1605         fll->ref_freq = Fref;
1606
1607         if (fll->fout && Fref > 0) {
1608                 arizona_enable_fll(fll, &ref, &sync);
1609         }
1610
1611         return 0;
1612 }
1613 EXPORT_SYMBOL_GPL(arizona_set_fll_refclk);
1614
1615 int arizona_set_fll(struct arizona_fll *fll, int source,
1616                     unsigned int Fref, unsigned int Fout)
1617 {
1618         struct arizona_fll_cfg ref, sync;
1619         int ret;
1620
1621         if (fll->sync_src == source &&
1622             fll->sync_freq == Fref && fll->fout == Fout)
1623                 return 0;
1624
1625         if (Fout) {
1626                 if (fll->ref_src >= 0) {
1627                         ret = arizona_calc_fll(fll, &ref, fll->ref_freq,
1628                                                Fout);
1629                         if (ret != 0)
1630                                 return ret;
1631                 }
1632
1633                 ret = arizona_calc_fll(fll, &sync, Fref, Fout);
1634                 if (ret != 0)
1635                         return ret;
1636         }
1637
1638         fll->sync_src = source;
1639         fll->sync_freq = Fref;
1640         fll->fout = Fout;
1641
1642         if (Fout) {
1643                 arizona_enable_fll(fll, &ref, &sync);
1644         } else {
1645                 arizona_disable_fll(fll);
1646         }
1647
1648         return 0;
1649 }
1650 EXPORT_SYMBOL_GPL(arizona_set_fll);
1651
1652 int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq,
1653                      int ok_irq, struct arizona_fll *fll)
1654 {
1655         int ret;
1656         unsigned int val;
1657
1658         init_completion(&fll->ok);
1659
1660         fll->id = id;
1661         fll->base = base;
1662         fll->arizona = arizona;
1663         fll->sync_src = ARIZONA_FLL_SRC_NONE;
1664
1665         /* Configure default refclk to 32kHz if we have one */
1666         regmap_read(arizona->regmap, ARIZONA_CLOCK_32K_1, &val);
1667         switch (val & ARIZONA_CLK_32K_SRC_MASK) {
1668         case ARIZONA_CLK_SRC_MCLK1:
1669         case ARIZONA_CLK_SRC_MCLK2:
1670                 fll->ref_src = val & ARIZONA_CLK_32K_SRC_MASK;
1671                 break;
1672         default:
1673                 fll->ref_src = ARIZONA_FLL_SRC_NONE;
1674         }
1675         fll->ref_freq = 32768;
1676
1677         snprintf(fll->lock_name, sizeof(fll->lock_name), "FLL%d lock", id);
1678         snprintf(fll->clock_ok_name, sizeof(fll->clock_ok_name),
1679                  "FLL%d clock OK", id);
1680
1681         ret = arizona_request_irq(arizona, ok_irq, fll->clock_ok_name,
1682                                   arizona_fll_clock_ok, fll);
1683         if (ret != 0) {
1684                 dev_err(arizona->dev, "Failed to get FLL%d clock OK IRQ: %d\n",
1685                         id, ret);
1686         }
1687
1688         regmap_update_bits(arizona->regmap, fll->base + 1,
1689                            ARIZONA_FLL1_FREERUN, 0);
1690
1691         return 0;
1692 }
1693 EXPORT_SYMBOL_GPL(arizona_init_fll);
1694
1695 /**
1696  * arizona_set_output_mode - Set the mode of the specified output
1697  *
1698  * @codec: Device to configure
1699  * @output: Output number
1700  * @diff: True to set the output to differential mode
1701  *
1702  * Some systems use external analogue switches to connect more
1703  * analogue devices to the CODEC than are supported by the device.  In
1704  * some systems this requires changing the switched output from single
1705  * ended to differential mode dynamically at runtime, an operation
1706  * supported using this function.
1707  *
1708  * Most systems have a single static configuration and should use
1709  * platform data instead.
1710  */
1711 int arizona_set_output_mode(struct snd_soc_codec *codec, int output, bool diff)
1712 {
1713         unsigned int reg, val;
1714
1715         if (output < 1 || output > 6)
1716                 return -EINVAL;
1717
1718         reg = ARIZONA_OUTPUT_PATH_CONFIG_1L + (output - 1) * 8;
1719
1720         if (diff)
1721                 val = ARIZONA_OUT1_MONO;
1722         else
1723                 val = 0;
1724
1725         return snd_soc_update_bits(codec, reg, ARIZONA_OUT1_MONO, val);
1726 }
1727 EXPORT_SYMBOL_GPL(arizona_set_output_mode);
1728
1729 MODULE_DESCRIPTION("ASoC Wolfson Arizona class device support");
1730 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
1731 MODULE_LICENSE("GPL");