1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Common code for ADAU1X61 and ADAU1X81 codecs
5 * Copyright 2011-2014 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
9 #include <linux/module.h>
10 #include <linux/init.h>
11 #include <linux/clk.h>
12 #include <linux/delay.h>
13 #include <linux/slab.h>
14 #include <sound/core.h>
15 #include <sound/pcm.h>
16 #include <sound/pcm_params.h>
17 #include <sound/soc.h>
18 #include <sound/tlv.h>
19 #include <linux/gcd.h>
20 #include <linux/i2c.h>
21 #include <linux/spi/spi.h>
22 #include <linux/regmap.h>
23 #include <asm/unaligned.h>
27 #include "adau-utils.h"
29 #define ADAU17X1_SAFELOAD_TARGET_ADDRESS 0x0006
30 #define ADAU17X1_SAFELOAD_TRIGGER 0x0007
31 #define ADAU17X1_SAFELOAD_DATA 0x0001
32 #define ADAU17X1_SAFELOAD_DATA_SIZE 20
33 #define ADAU17X1_WORD_SIZE 4
35 static const char * const adau17x1_capture_mixer_boost_text[] = {
36 "Normal operation", "Boost Level 1", "Boost Level 2", "Boost Level 3",
39 static SOC_ENUM_SINGLE_DECL(adau17x1_capture_boost_enum,
40 ADAU17X1_REC_POWER_MGMT, 5, adau17x1_capture_mixer_boost_text);
42 static const char * const adau17x1_mic_bias_mode_text[] = {
43 "Normal operation", "High performance",
46 static SOC_ENUM_SINGLE_DECL(adau17x1_mic_bias_mode_enum,
47 ADAU17X1_MICBIAS, 3, adau17x1_mic_bias_mode_text);
49 static const DECLARE_TLV_DB_MINMAX(adau17x1_digital_tlv, -9563, 0);
51 static const struct snd_kcontrol_new adau17x1_controls[] = {
52 SOC_DOUBLE_R_TLV("Digital Capture Volume",
53 ADAU17X1_LEFT_INPUT_DIGITAL_VOL,
54 ADAU17X1_RIGHT_INPUT_DIGITAL_VOL,
55 0, 0xff, 1, adau17x1_digital_tlv),
56 SOC_DOUBLE_R_TLV("Digital Playback Volume", ADAU17X1_DAC_CONTROL1,
57 ADAU17X1_DAC_CONTROL2, 0, 0xff, 1, adau17x1_digital_tlv),
59 SOC_SINGLE("ADC High Pass Filter Switch", ADAU17X1_ADC_CONTROL,
61 SOC_SINGLE("Playback De-emphasis Switch", ADAU17X1_DAC_CONTROL0,
64 SOC_ENUM("Capture Boost", adau17x1_capture_boost_enum),
66 SOC_ENUM("Mic Bias Mode", adau17x1_mic_bias_mode_enum),
69 static int adau17x1_setup_firmware(struct snd_soc_component *component,
72 static int adau17x1_pll_event(struct snd_soc_dapm_widget *w,
73 struct snd_kcontrol *kcontrol, int event)
75 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
76 struct adau *adau = snd_soc_component_get_drvdata(component);
78 if (SND_SOC_DAPM_EVENT_ON(event)) {
79 adau->pll_regs[5] = 1;
81 adau->pll_regs[5] = 0;
82 /* Bypass the PLL when disabled, otherwise registers will become
84 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
85 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL, 0);
88 /* The PLL register is 6 bytes long and can only be written at once. */
89 regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL,
90 adau->pll_regs, ARRAY_SIZE(adau->pll_regs));
92 if (SND_SOC_DAPM_EVENT_ON(event)) {
94 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
95 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL,
96 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL);
102 static int adau17x1_adc_fixup(struct snd_soc_dapm_widget *w,
103 struct snd_kcontrol *kcontrol, int event)
105 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
106 struct adau *adau = snd_soc_component_get_drvdata(component);
109 * If we are capturing, toggle the ADOSR bit in Converter Control 0 to
110 * avoid losing SNR (workaround from ADI). This must be done after
111 * the ADC(s) have been enabled. According to the data sheet, it is
112 * normally illegal to set this bit when the sampling rate is 96 kHz,
113 * but according to ADI it is acceptable for this workaround.
115 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
116 ADAU17X1_CONVERTER0_ADOSR, ADAU17X1_CONVERTER0_ADOSR);
117 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
118 ADAU17X1_CONVERTER0_ADOSR, 0);
123 static const char * const adau17x1_mono_stereo_text[] = {
125 "Mono Left Channel (L+R)",
126 "Mono Right Channel (L+R)",
130 static SOC_ENUM_SINGLE_DECL(adau17x1_dac_mode_enum,
131 ADAU17X1_DAC_CONTROL0, 6, adau17x1_mono_stereo_text);
133 static const struct snd_kcontrol_new adau17x1_dac_mode_mux =
134 SOC_DAPM_ENUM("DAC Mono-Stereo-Mode", adau17x1_dac_mode_enum);
136 static const struct snd_soc_dapm_widget adau17x1_dapm_widgets[] = {
137 SND_SOC_DAPM_SUPPLY_S("PLL", 3, SND_SOC_NOPM, 0, 0, adau17x1_pll_event,
138 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
140 SND_SOC_DAPM_SUPPLY("AIFCLK", SND_SOC_NOPM, 0, 0, NULL, 0),
142 SND_SOC_DAPM_SUPPLY("MICBIAS", ADAU17X1_MICBIAS, 0, 0, NULL, 0),
144 SND_SOC_DAPM_SUPPLY("Left Playback Enable", ADAU17X1_PLAY_POWER_MGMT,
146 SND_SOC_DAPM_SUPPLY("Right Playback Enable", ADAU17X1_PLAY_POWER_MGMT,
149 SND_SOC_DAPM_MUX("Left DAC Mode Mux", SND_SOC_NOPM, 0, 0,
150 &adau17x1_dac_mode_mux),
151 SND_SOC_DAPM_MUX("Right DAC Mode Mux", SND_SOC_NOPM, 0, 0,
152 &adau17x1_dac_mode_mux),
154 SND_SOC_DAPM_ADC_E("Left Decimator", NULL, ADAU17X1_ADC_CONTROL, 0, 0,
155 adau17x1_adc_fixup, SND_SOC_DAPM_POST_PMU),
156 SND_SOC_DAPM_ADC("Right Decimator", NULL, ADAU17X1_ADC_CONTROL, 1, 0),
157 SND_SOC_DAPM_DAC("Left DAC", NULL, ADAU17X1_DAC_CONTROL0, 0, 0),
158 SND_SOC_DAPM_DAC("Right DAC", NULL, ADAU17X1_DAC_CONTROL0, 1, 0),
161 static const struct snd_soc_dapm_route adau17x1_dapm_routes[] = {
162 { "Left Decimator", NULL, "SYSCLK" },
163 { "Right Decimator", NULL, "SYSCLK" },
164 { "Left DAC", NULL, "SYSCLK" },
165 { "Right DAC", NULL, "SYSCLK" },
166 { "Capture", NULL, "SYSCLK" },
167 { "Playback", NULL, "SYSCLK" },
169 { "Left DAC", NULL, "Left DAC Mode Mux" },
170 { "Right DAC", NULL, "Right DAC Mode Mux" },
172 { "Capture", NULL, "AIFCLK" },
173 { "Playback", NULL, "AIFCLK" },
176 static const struct snd_soc_dapm_route adau17x1_dapm_pll_route = {
177 "SYSCLK", NULL, "PLL",
181 * The MUX register for the Capture and Playback MUXs selects either DSP as
182 * source/destination or one of the TDM slots. The TDM slot is selected via
183 * snd_soc_dai_set_tdm_slot(), so we only expose whether to go to the DSP or
184 * directly to the DAI interface with this control.
186 static int adau17x1_dsp_mux_enum_put(struct snd_kcontrol *kcontrol,
187 struct snd_ctl_elem_value *ucontrol)
189 struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
190 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
191 struct adau *adau = snd_soc_component_get_drvdata(component);
192 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
193 struct snd_soc_dapm_update update = {};
194 unsigned int stream = e->shift_l;
195 unsigned int val, change;
198 if (ucontrol->value.enumerated.item[0] >= e->items)
201 switch (ucontrol->value.enumerated.item[0]) {
204 adau->dsp_bypass[stream] = false;
207 val = (adau->tdm_slot[stream] * 2) + 1;
208 adau->dsp_bypass[stream] = true;
212 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
213 reg = ADAU17X1_SERIAL_INPUT_ROUTE;
215 reg = ADAU17X1_SERIAL_OUTPUT_ROUTE;
217 change = snd_soc_component_test_bits(component, reg, 0xff, val);
219 update.kcontrol = kcontrol;
224 snd_soc_dapm_mux_update_power(dapm, kcontrol,
225 ucontrol->value.enumerated.item[0], e, &update);
231 static int adau17x1_dsp_mux_enum_get(struct snd_kcontrol *kcontrol,
232 struct snd_ctl_elem_value *ucontrol)
234 struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
235 struct adau *adau = snd_soc_component_get_drvdata(component);
236 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
237 unsigned int stream = e->shift_l;
238 unsigned int reg, val;
241 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
242 reg = ADAU17X1_SERIAL_INPUT_ROUTE;
244 reg = ADAU17X1_SERIAL_OUTPUT_ROUTE;
246 ret = regmap_read(adau->regmap, reg, &val);
252 ucontrol->value.enumerated.item[0] = val;
257 #define DECLARE_ADAU17X1_DSP_MUX_CTRL(_name, _label, _stream, _text) \
258 const struct snd_kcontrol_new _name = \
259 SOC_DAPM_ENUM_EXT(_label, (const struct soc_enum)\
260 SOC_ENUM_SINGLE(SND_SOC_NOPM, _stream, \
261 ARRAY_SIZE(_text), _text), \
262 adau17x1_dsp_mux_enum_get, adau17x1_dsp_mux_enum_put)
264 static const char * const adau17x1_dac_mux_text[] = {
269 static const char * const adau17x1_capture_mux_text[] = {
274 static DECLARE_ADAU17X1_DSP_MUX_CTRL(adau17x1_dac_mux, "DAC Playback Mux",
275 SNDRV_PCM_STREAM_PLAYBACK, adau17x1_dac_mux_text);
277 static DECLARE_ADAU17X1_DSP_MUX_CTRL(adau17x1_capture_mux, "Capture Mux",
278 SNDRV_PCM_STREAM_CAPTURE, adau17x1_capture_mux_text);
280 static const struct snd_soc_dapm_widget adau17x1_dsp_dapm_widgets[] = {
281 SND_SOC_DAPM_PGA("DSP", ADAU17X1_DSP_RUN, 0, 0, NULL, 0),
282 SND_SOC_DAPM_SIGGEN("DSP Siggen"),
284 SND_SOC_DAPM_MUX("DAC Playback Mux", SND_SOC_NOPM, 0, 0,
286 SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0,
287 &adau17x1_capture_mux),
290 static const struct snd_soc_dapm_route adau17x1_dsp_dapm_routes[] = {
291 { "DAC Playback Mux", "DSP", "DSP" },
292 { "DAC Playback Mux", "AIFIN", "Playback" },
294 { "Left DAC Mode Mux", "Stereo", "DAC Playback Mux" },
295 { "Left DAC Mode Mux", "Mono (L+R)", "DAC Playback Mux" },
296 { "Left DAC Mode Mux", "Mono Left Channel (L+R)", "DAC Playback Mux" },
297 { "Right DAC Mode Mux", "Stereo", "DAC Playback Mux" },
298 { "Right DAC Mode Mux", "Mono (L+R)", "DAC Playback Mux" },
299 { "Right DAC Mode Mux", "Mono Right Channel (L+R)", "DAC Playback Mux" },
301 { "Capture Mux", "DSP", "DSP" },
302 { "Capture Mux", "Decimator", "Left Decimator" },
303 { "Capture Mux", "Decimator", "Right Decimator" },
305 { "Capture", NULL, "Capture Mux" },
307 { "DSP", NULL, "DSP Siggen" },
309 { "DSP", NULL, "Left Decimator" },
310 { "DSP", NULL, "Right Decimator" },
311 { "DSP", NULL, "Playback" },
314 static const struct snd_soc_dapm_route adau17x1_no_dsp_dapm_routes[] = {
315 { "Left DAC Mode Mux", "Stereo", "Playback" },
316 { "Left DAC Mode Mux", "Mono (L+R)", "Playback" },
317 { "Left DAC Mode Mux", "Mono Left Channel (L+R)", "Playback" },
318 { "Right DAC Mode Mux", "Stereo", "Playback" },
319 { "Right DAC Mode Mux", "Mono (L+R)", "Playback" },
320 { "Right DAC Mode Mux", "Mono Right Channel (L+R)", "Playback" },
321 { "Capture", NULL, "Left Decimator" },
322 { "Capture", NULL, "Right Decimator" },
325 static bool adau17x1_has_dsp(struct adau *adau)
327 switch (adau->type) {
337 static bool adau17x1_has_safeload(struct adau *adau)
339 switch (adau->type) {
348 static int adau17x1_set_dai_pll(struct snd_soc_dai *dai, int pll_id,
349 int source, unsigned int freq_in, unsigned int freq_out)
351 struct snd_soc_component *component = dai->component;
352 struct adau *adau = snd_soc_component_get_drvdata(component);
355 if (freq_in < 8000000 || freq_in > 27000000)
358 ret = adau_calc_pll_cfg(freq_in, freq_out, adau->pll_regs);
362 /* The PLL register is 6 bytes long and can only be written at once. */
363 ret = regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL,
364 adau->pll_regs, ARRAY_SIZE(adau->pll_regs));
368 adau->pll_freq = freq_out;
373 static int adau17x1_set_dai_sysclk(struct snd_soc_dai *dai,
374 int clk_id, unsigned int freq, int dir)
376 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(dai->component);
377 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
382 case ADAU17X1_CLK_SRC_MCLK:
385 case ADAU17X1_CLK_SRC_PLL_AUTO:
389 case ADAU17X1_CLK_SRC_PLL:
396 switch (adau->clk_src) {
397 case ADAU17X1_CLK_SRC_MCLK:
400 case ADAU17X1_CLK_SRC_PLL:
401 case ADAU17X1_CLK_SRC_PLL_AUTO:
410 if (is_pll != was_pll) {
412 snd_soc_dapm_add_routes(dapm,
413 &adau17x1_dapm_pll_route, 1);
415 snd_soc_dapm_del_routes(dapm,
416 &adau17x1_dapm_pll_route, 1);
420 adau->clk_src = clk_id;
425 static int adau17x1_auto_pll(struct snd_soc_dai *dai,
426 struct snd_pcm_hw_params *params)
428 struct adau *adau = snd_soc_dai_get_drvdata(dai);
429 unsigned int pll_rate;
431 switch (params_rate(params)) {
439 pll_rate = 48000 * 1024;
448 pll_rate = 44100 * 1024;
454 return adau17x1_set_dai_pll(dai, ADAU17X1_PLL, ADAU17X1_PLL_SRC_MCLK,
455 clk_get_rate(adau->mclk), pll_rate);
458 static int adau17x1_hw_params(struct snd_pcm_substream *substream,
459 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
461 struct snd_soc_component *component = dai->component;
462 struct adau *adau = snd_soc_component_get_drvdata(component);
463 unsigned int val, div, dsp_div;
467 switch (adau->clk_src) {
468 case ADAU17X1_CLK_SRC_PLL_AUTO:
469 ret = adau17x1_auto_pll(dai, params);
473 case ADAU17X1_CLK_SRC_PLL:
474 freq = adau->pll_freq;
481 if (freq % params_rate(params) != 0)
484 switch (freq / params_rate(params)) {
489 case 6144: /* fs / 6 */
493 case 4096: /* fs / 4 */
497 case 3072: /* fs / 3 */
501 case 2048: /* fs / 2 */
505 case 1536: /* fs / 1.5 */
509 case 512: /* fs / 0.5 */
517 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
518 ADAU17X1_CONVERTER0_CONVSR_MASK, div);
519 if (adau17x1_has_dsp(adau)) {
520 regmap_write(adau->regmap, ADAU17X1_SERIAL_SAMPLING_RATE, div);
521 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dsp_div);
524 if (adau->sigmadsp) {
525 ret = adau17x1_setup_firmware(component, params_rate(params));
530 if (adau->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
533 switch (params_width(params)) {
535 val = ADAU17X1_SERIAL_PORT1_DELAY16;
538 val = ADAU17X1_SERIAL_PORT1_DELAY8;
541 val = ADAU17X1_SERIAL_PORT1_DELAY0;
547 return regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1,
548 ADAU17X1_SERIAL_PORT1_DELAY_MASK, val);
551 static int adau17x1_set_dai_fmt(struct snd_soc_dai *dai,
554 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
555 unsigned int ctrl0, ctrl1;
556 unsigned int ctrl0_mask;
559 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
560 case SND_SOC_DAIFMT_CBP_CFP:
561 ctrl0 = ADAU17X1_SERIAL_PORT0_MASTER;
564 case SND_SOC_DAIFMT_CBC_CFC:
566 adau->master = false;
572 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
573 case SND_SOC_DAIFMT_I2S:
575 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY1;
577 case SND_SOC_DAIFMT_LEFT_J:
578 case SND_SOC_DAIFMT_RIGHT_J:
580 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY0;
582 case SND_SOC_DAIFMT_DSP_A:
584 ctrl0 |= ADAU17X1_SERIAL_PORT0_PULSE_MODE;
585 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY1;
587 case SND_SOC_DAIFMT_DSP_B:
589 ctrl0 |= ADAU17X1_SERIAL_PORT0_PULSE_MODE;
590 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY0;
596 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
597 case SND_SOC_DAIFMT_NB_NF:
599 case SND_SOC_DAIFMT_IB_NF:
600 ctrl0 |= ADAU17X1_SERIAL_PORT0_BCLK_POL;
602 case SND_SOC_DAIFMT_NB_IF:
603 lrclk_pol = !lrclk_pol;
605 case SND_SOC_DAIFMT_IB_IF:
606 ctrl0 |= ADAU17X1_SERIAL_PORT0_BCLK_POL;
607 lrclk_pol = !lrclk_pol;
614 ctrl0 |= ADAU17X1_SERIAL_PORT0_LRCLK_POL;
616 /* Set the mask to update all relevant bits in ADAU17X1_SERIAL_PORT0 */
617 ctrl0_mask = ADAU17X1_SERIAL_PORT0_MASTER |
618 ADAU17X1_SERIAL_PORT0_LRCLK_POL |
619 ADAU17X1_SERIAL_PORT0_BCLK_POL |
620 ADAU17X1_SERIAL_PORT0_PULSE_MODE;
622 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT0, ctrl0_mask,
624 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1,
625 ADAU17X1_SERIAL_PORT1_DELAY_MASK, ctrl1);
627 adau->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
632 static int adau17x1_set_dai_tdm_slot(struct snd_soc_dai *dai,
633 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
635 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
636 unsigned int ser_ctrl0, ser_ctrl1;
637 unsigned int conv_ctrl0, conv_ctrl1;
649 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_STEREO;
652 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_TDM4;
655 if (adau->type == ADAU1361)
658 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_TDM8;
664 switch (slot_width * slots) {
666 if (adau->type == ADAU1761)
669 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK32;
672 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK64;
675 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK48;
678 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK128;
681 if (adau->type == ADAU1361)
684 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK256;
692 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(1);
693 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 0;
696 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(2);
697 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 1;
700 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(3);
701 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 2;
704 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(4);
705 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 3;
713 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(1);
714 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 0;
717 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(2);
718 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 1;
721 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(3);
722 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 2;
725 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(4);
726 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 3;
732 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
733 ADAU17X1_CONVERTER0_DAC_PAIR_MASK, conv_ctrl0);
734 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER1,
735 ADAU17X1_CONVERTER1_ADC_PAIR_MASK, conv_ctrl1);
736 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT0,
737 ADAU17X1_SERIAL_PORT0_TDM_MASK, ser_ctrl0);
738 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1,
739 ADAU17X1_SERIAL_PORT1_BCLK_MASK, ser_ctrl1);
741 if (!adau17x1_has_dsp(adau))
744 if (adau->dsp_bypass[SNDRV_PCM_STREAM_PLAYBACK]) {
745 regmap_write(adau->regmap, ADAU17X1_SERIAL_INPUT_ROUTE,
746 (adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] * 2) + 1);
749 if (adau->dsp_bypass[SNDRV_PCM_STREAM_CAPTURE]) {
750 regmap_write(adau->regmap, ADAU17X1_SERIAL_OUTPUT_ROUTE,
751 (adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] * 2) + 1);
757 static int adau17x1_startup(struct snd_pcm_substream *substream,
758 struct snd_soc_dai *dai)
760 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
763 return sigmadsp_restrict_params(adau->sigmadsp, substream);
768 const struct snd_soc_dai_ops adau17x1_dai_ops = {
769 .hw_params = adau17x1_hw_params,
770 .set_sysclk = adau17x1_set_dai_sysclk,
771 .set_fmt = adau17x1_set_dai_fmt,
772 .set_pll = adau17x1_set_dai_pll,
773 .set_tdm_slot = adau17x1_set_dai_tdm_slot,
774 .startup = adau17x1_startup,
776 EXPORT_SYMBOL_GPL(adau17x1_dai_ops);
778 int adau17x1_set_micbias_voltage(struct snd_soc_component *component,
779 enum adau17x1_micbias_voltage micbias)
781 struct adau *adau = snd_soc_component_get_drvdata(component);
784 case ADAU17X1_MICBIAS_0_90_AVDD:
785 case ADAU17X1_MICBIAS_0_65_AVDD:
791 return regmap_write(adau->regmap, ADAU17X1_MICBIAS, micbias << 2);
793 EXPORT_SYMBOL_GPL(adau17x1_set_micbias_voltage);
795 bool adau17x1_precious_register(struct device *dev, unsigned int reg)
797 /* SigmaDSP parameter memory */
803 EXPORT_SYMBOL_GPL(adau17x1_precious_register);
805 bool adau17x1_readable_register(struct device *dev, unsigned int reg)
807 /* SigmaDSP parameter memory */
812 case ADAU17X1_CLOCK_CONTROL:
813 case ADAU17X1_PLL_CONTROL:
814 case ADAU17X1_REC_POWER_MGMT:
815 case ADAU17X1_MICBIAS:
816 case ADAU17X1_SERIAL_PORT0:
817 case ADAU17X1_SERIAL_PORT1:
818 case ADAU17X1_CONVERTER0:
819 case ADAU17X1_CONVERTER1:
820 case ADAU17X1_LEFT_INPUT_DIGITAL_VOL:
821 case ADAU17X1_RIGHT_INPUT_DIGITAL_VOL:
822 case ADAU17X1_ADC_CONTROL:
823 case ADAU17X1_PLAY_POWER_MGMT:
824 case ADAU17X1_DAC_CONTROL0:
825 case ADAU17X1_DAC_CONTROL1:
826 case ADAU17X1_DAC_CONTROL2:
827 case ADAU17X1_SERIAL_PORT_PAD:
828 case ADAU17X1_CONTROL_PORT_PAD0:
829 case ADAU17X1_CONTROL_PORT_PAD1:
830 case ADAU17X1_DSP_SAMPLING_RATE:
831 case ADAU17X1_SERIAL_INPUT_ROUTE:
832 case ADAU17X1_SERIAL_OUTPUT_ROUTE:
833 case ADAU17X1_DSP_ENABLE:
834 case ADAU17X1_DSP_RUN:
835 case ADAU17X1_SERIAL_SAMPLING_RATE:
842 EXPORT_SYMBOL_GPL(adau17x1_readable_register);
844 bool adau17x1_volatile_register(struct device *dev, unsigned int reg)
846 /* SigmaDSP parameter and program memory */
851 /* The PLL register is 6 bytes long */
852 case ADAU17X1_PLL_CONTROL:
853 case ADAU17X1_PLL_CONTROL + 1:
854 case ADAU17X1_PLL_CONTROL + 2:
855 case ADAU17X1_PLL_CONTROL + 3:
856 case ADAU17X1_PLL_CONTROL + 4:
857 case ADAU17X1_PLL_CONTROL + 5:
865 EXPORT_SYMBOL_GPL(adau17x1_volatile_register);
867 static int adau17x1_setup_firmware(struct snd_soc_component *component,
872 struct adau *adau = snd_soc_component_get_drvdata(component);
873 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
875 /* Check if sample rate is the same as before. If it is there is no
876 * point in performing the below steps as the call to
877 * sigmadsp_setup(...) will return directly when it finds the sample
878 * rate to be the same as before. By checking this we can prevent an
879 * audiable popping noise which occours when toggling DSP_RUN.
881 if (adau->sigmadsp->current_samplerate == rate)
884 snd_soc_dapm_mutex_lock(dapm);
886 ret = regmap_read(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, &dspsr);
890 ret = regmap_read(adau->regmap, ADAU17X1_DSP_RUN, &dsp_run);
894 regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 1);
895 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, 0xf);
896 regmap_write(adau->regmap, ADAU17X1_DSP_RUN, 0);
898 ret = sigmadsp_setup(adau->sigmadsp, rate);
900 regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 0);
903 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dspsr);
904 regmap_write(adau->regmap, ADAU17X1_DSP_RUN, dsp_run);
907 snd_soc_dapm_mutex_unlock(dapm);
912 int adau17x1_add_widgets(struct snd_soc_component *component)
914 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
915 struct adau *adau = snd_soc_component_get_drvdata(component);
918 ret = snd_soc_add_component_controls(component, adau17x1_controls,
919 ARRAY_SIZE(adau17x1_controls));
922 ret = snd_soc_dapm_new_controls(dapm, adau17x1_dapm_widgets,
923 ARRAY_SIZE(adau17x1_dapm_widgets));
927 if (adau17x1_has_dsp(adau)) {
928 ret = snd_soc_dapm_new_controls(dapm, adau17x1_dsp_dapm_widgets,
929 ARRAY_SIZE(adau17x1_dsp_dapm_widgets));
936 ret = sigmadsp_attach(adau->sigmadsp, component);
938 dev_err(component->dev, "Failed to attach firmware: %d\n",
946 EXPORT_SYMBOL_GPL(adau17x1_add_widgets);
948 int adau17x1_add_routes(struct snd_soc_component *component)
950 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
951 struct adau *adau = snd_soc_component_get_drvdata(component);
954 ret = snd_soc_dapm_add_routes(dapm, adau17x1_dapm_routes,
955 ARRAY_SIZE(adau17x1_dapm_routes));
959 if (adau17x1_has_dsp(adau)) {
960 ret = snd_soc_dapm_add_routes(dapm, adau17x1_dsp_dapm_routes,
961 ARRAY_SIZE(adau17x1_dsp_dapm_routes));
963 ret = snd_soc_dapm_add_routes(dapm, adau17x1_no_dsp_dapm_routes,
964 ARRAY_SIZE(adau17x1_no_dsp_dapm_routes));
967 if (adau->clk_src != ADAU17X1_CLK_SRC_MCLK)
968 snd_soc_dapm_add_routes(dapm, &adau17x1_dapm_pll_route, 1);
972 EXPORT_SYMBOL_GPL(adau17x1_add_routes);
974 int adau17x1_resume(struct snd_soc_component *component)
976 struct adau *adau = snd_soc_component_get_drvdata(component);
978 if (adau->switch_mode)
979 adau->switch_mode(component->dev);
981 regcache_sync(adau->regmap);
985 EXPORT_SYMBOL_GPL(adau17x1_resume);
987 static int adau17x1_safeload(struct sigmadsp *sigmadsp, unsigned int addr,
988 const uint8_t bytes[], size_t len)
990 uint8_t buf[ADAU17X1_WORD_SIZE];
991 uint8_t data[ADAU17X1_SAFELOAD_DATA_SIZE];
992 unsigned int addr_offset;
993 unsigned int nbr_words;
996 /* write data to safeload addresses. Check if len is not a multiple of
997 * 4 bytes, if so we need to zero pad.
999 nbr_words = len / ADAU17X1_WORD_SIZE;
1000 if ((len - nbr_words * ADAU17X1_WORD_SIZE) == 0) {
1001 ret = regmap_raw_write(sigmadsp->control_data,
1002 ADAU17X1_SAFELOAD_DATA, bytes, len);
1005 memset(data, 0, ADAU17X1_SAFELOAD_DATA_SIZE);
1006 memcpy(data, bytes, len);
1007 ret = regmap_raw_write(sigmadsp->control_data,
1008 ADAU17X1_SAFELOAD_DATA, data,
1009 nbr_words * ADAU17X1_WORD_SIZE);
1015 /* Write target address, target address is offset by 1 */
1016 addr_offset = addr - 1;
1017 put_unaligned_be32(addr_offset, buf);
1018 ret = regmap_raw_write(sigmadsp->control_data,
1019 ADAU17X1_SAFELOAD_TARGET_ADDRESS, buf, ADAU17X1_WORD_SIZE);
1023 /* write nbr of words to trigger address */
1024 put_unaligned_be32(nbr_words, buf);
1025 ret = regmap_raw_write(sigmadsp->control_data,
1026 ADAU17X1_SAFELOAD_TRIGGER, buf, ADAU17X1_WORD_SIZE);
1033 static const struct sigmadsp_ops adau17x1_sigmadsp_ops = {
1034 .safeload = adau17x1_safeload,
1037 int adau17x1_probe(struct device *dev, struct regmap *regmap,
1038 enum adau17x1_type type, void (*switch_mode)(struct device *dev),
1039 const char *firmware_name)
1045 return PTR_ERR(regmap);
1047 adau = devm_kzalloc(dev, sizeof(*adau), GFP_KERNEL);
1051 adau->mclk = devm_clk_get(dev, "mclk");
1052 if (IS_ERR(adau->mclk)) {
1053 if (PTR_ERR(adau->mclk) != -ENOENT)
1054 return PTR_ERR(adau->mclk);
1055 /* Clock is optional (for the driver) */
1057 } else if (adau->mclk) {
1058 adau->clk_src = ADAU17X1_CLK_SRC_PLL_AUTO;
1061 * Any valid PLL output rate will work at this point, use one
1062 * that is likely to be chosen later as well. The register will
1063 * be written when the PLL is powered up for the first time.
1065 ret = adau_calc_pll_cfg(clk_get_rate(adau->mclk), 48000 * 1024,
1070 ret = clk_prepare_enable(adau->mclk);
1075 adau->regmap = regmap;
1076 adau->switch_mode = switch_mode;
1079 dev_set_drvdata(dev, adau);
1081 if (firmware_name) {
1082 if (adau17x1_has_safeload(adau)) {
1083 adau->sigmadsp = devm_sigmadsp_init_regmap(dev, regmap,
1084 &adau17x1_sigmadsp_ops, firmware_name);
1086 adau->sigmadsp = devm_sigmadsp_init_regmap(dev, regmap,
1087 NULL, firmware_name);
1089 if (IS_ERR(adau->sigmadsp)) {
1090 dev_warn(dev, "Could not find firmware file: %ld\n",
1091 PTR_ERR(adau->sigmadsp));
1092 adau->sigmadsp = NULL;
1101 EXPORT_SYMBOL_GPL(adau17x1_probe);
1103 void adau17x1_remove(struct device *dev)
1105 struct adau *adau = dev_get_drvdata(dev);
1107 clk_disable_unprepare(adau->mclk);
1109 EXPORT_SYMBOL_GPL(adau17x1_remove);
1111 MODULE_DESCRIPTION("ASoC ADAU1X61/ADAU1X81 common code");
1112 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
1113 MODULE_LICENSE("GPL");