2 * Common code for ADAU1X61 and ADAU1X81 codecs
4 * Copyright 2011-2014 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
7 * Licensed under the GPL-2 or later.
10 #include <linux/module.h>
11 #include <linux/init.h>
12 #include <linux/clk.h>
13 #include <linux/delay.h>
14 #include <linux/slab.h>
15 #include <sound/core.h>
16 #include <sound/pcm.h>
17 #include <sound/pcm_params.h>
18 #include <sound/soc.h>
19 #include <sound/tlv.h>
20 #include <linux/gcd.h>
21 #include <linux/i2c.h>
22 #include <linux/spi/spi.h>
23 #include <linux/regmap.h>
24 #include <asm/unaligned.h>
28 #include "adau-utils.h"
30 #define ADAU17X1_SAFELOAD_TARGET_ADDRESS 0x0006
31 #define ADAU17X1_SAFELOAD_TRIGGER 0x0007
32 #define ADAU17X1_SAFELOAD_DATA 0x0001
33 #define ADAU17X1_SAFELOAD_DATA_SIZE 20
34 #define ADAU17X1_WORD_SIZE 4
36 static const char * const adau17x1_capture_mixer_boost_text[] = {
37 "Normal operation", "Boost Level 1", "Boost Level 2", "Boost Level 3",
40 static SOC_ENUM_SINGLE_DECL(adau17x1_capture_boost_enum,
41 ADAU17X1_REC_POWER_MGMT, 5, adau17x1_capture_mixer_boost_text);
43 static const char * const adau17x1_mic_bias_mode_text[] = {
44 "Normal operation", "High performance",
47 static SOC_ENUM_SINGLE_DECL(adau17x1_mic_bias_mode_enum,
48 ADAU17X1_MICBIAS, 3, adau17x1_mic_bias_mode_text);
50 static const DECLARE_TLV_DB_MINMAX(adau17x1_digital_tlv, -9563, 0);
52 static const struct snd_kcontrol_new adau17x1_controls[] = {
53 SOC_DOUBLE_R_TLV("Digital Capture Volume",
54 ADAU17X1_LEFT_INPUT_DIGITAL_VOL,
55 ADAU17X1_RIGHT_INPUT_DIGITAL_VOL,
56 0, 0xff, 1, adau17x1_digital_tlv),
57 SOC_DOUBLE_R_TLV("Digital Playback Volume", ADAU17X1_DAC_CONTROL1,
58 ADAU17X1_DAC_CONTROL2, 0, 0xff, 1, adau17x1_digital_tlv),
60 SOC_SINGLE("ADC High Pass Filter Switch", ADAU17X1_ADC_CONTROL,
62 SOC_SINGLE("Playback De-emphasis Switch", ADAU17X1_DAC_CONTROL0,
65 SOC_ENUM("Capture Boost", adau17x1_capture_boost_enum),
67 SOC_ENUM("Mic Bias Mode", adau17x1_mic_bias_mode_enum),
70 static int adau17x1_setup_firmware(struct snd_soc_component *component,
73 static int adau17x1_pll_event(struct snd_soc_dapm_widget *w,
74 struct snd_kcontrol *kcontrol, int event)
76 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
77 struct adau *adau = snd_soc_component_get_drvdata(component);
79 if (SND_SOC_DAPM_EVENT_ON(event)) {
80 adau->pll_regs[5] = 1;
82 adau->pll_regs[5] = 0;
83 /* Bypass the PLL when disabled, otherwise registers will become
85 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
86 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL, 0);
89 /* The PLL register is 6 bytes long and can only be written at once. */
90 regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL,
91 adau->pll_regs, ARRAY_SIZE(adau->pll_regs));
93 if (SND_SOC_DAPM_EVENT_ON(event)) {
95 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
96 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL,
97 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL);
103 static int adau17x1_adc_fixup(struct snd_soc_dapm_widget *w,
104 struct snd_kcontrol *kcontrol, int event)
106 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
107 struct adau *adau = snd_soc_component_get_drvdata(component);
110 * If we are capturing, toggle the ADOSR bit in Converter Control 0 to
111 * avoid losing SNR (workaround from ADI). This must be done after
112 * the ADC(s) have been enabled. According to the data sheet, it is
113 * normally illegal to set this bit when the sampling rate is 96 kHz,
114 * but according to ADI it is acceptable for this workaround.
116 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
117 ADAU17X1_CONVERTER0_ADOSR, ADAU17X1_CONVERTER0_ADOSR);
118 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
119 ADAU17X1_CONVERTER0_ADOSR, 0);
124 static const char * const adau17x1_mono_stereo_text[] = {
126 "Mono Left Channel (L+R)",
127 "Mono Right Channel (L+R)",
131 static SOC_ENUM_SINGLE_DECL(adau17x1_dac_mode_enum,
132 ADAU17X1_DAC_CONTROL0, 6, adau17x1_mono_stereo_text);
134 static const struct snd_kcontrol_new adau17x1_dac_mode_mux =
135 SOC_DAPM_ENUM("DAC Mono-Stereo-Mode", adau17x1_dac_mode_enum);
137 static const struct snd_soc_dapm_widget adau17x1_dapm_widgets[] = {
138 SND_SOC_DAPM_SUPPLY_S("PLL", 3, SND_SOC_NOPM, 0, 0, adau17x1_pll_event,
139 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
141 SND_SOC_DAPM_SUPPLY("AIFCLK", SND_SOC_NOPM, 0, 0, NULL, 0),
143 SND_SOC_DAPM_SUPPLY("MICBIAS", ADAU17X1_MICBIAS, 0, 0, NULL, 0),
145 SND_SOC_DAPM_SUPPLY("Left Playback Enable", ADAU17X1_PLAY_POWER_MGMT,
147 SND_SOC_DAPM_SUPPLY("Right Playback Enable", ADAU17X1_PLAY_POWER_MGMT,
150 SND_SOC_DAPM_MUX("Left DAC Mode Mux", SND_SOC_NOPM, 0, 0,
151 &adau17x1_dac_mode_mux),
152 SND_SOC_DAPM_MUX("Right DAC Mode Mux", SND_SOC_NOPM, 0, 0,
153 &adau17x1_dac_mode_mux),
155 SND_SOC_DAPM_ADC_E("Left Decimator", NULL, ADAU17X1_ADC_CONTROL, 0, 0,
156 adau17x1_adc_fixup, SND_SOC_DAPM_POST_PMU),
157 SND_SOC_DAPM_ADC("Right Decimator", NULL, ADAU17X1_ADC_CONTROL, 1, 0),
158 SND_SOC_DAPM_DAC("Left DAC", NULL, ADAU17X1_DAC_CONTROL0, 0, 0),
159 SND_SOC_DAPM_DAC("Right DAC", NULL, ADAU17X1_DAC_CONTROL0, 1, 0),
162 static const struct snd_soc_dapm_route adau17x1_dapm_routes[] = {
163 { "Left Decimator", NULL, "SYSCLK" },
164 { "Right Decimator", NULL, "SYSCLK" },
165 { "Left DAC", NULL, "SYSCLK" },
166 { "Right DAC", NULL, "SYSCLK" },
167 { "Capture", NULL, "SYSCLK" },
168 { "Playback", NULL, "SYSCLK" },
170 { "Left DAC", NULL, "Left DAC Mode Mux" },
171 { "Right DAC", NULL, "Right DAC Mode Mux" },
173 { "Capture", NULL, "AIFCLK" },
174 { "Playback", NULL, "AIFCLK" },
177 static const struct snd_soc_dapm_route adau17x1_dapm_pll_route = {
178 "SYSCLK", NULL, "PLL",
182 * The MUX register for the Capture and Playback MUXs selects either DSP as
183 * source/destination or one of the TDM slots. The TDM slot is selected via
184 * snd_soc_dai_set_tdm_slot(), so we only expose whether to go to the DSP or
185 * directly to the DAI interface with this control.
187 static int adau17x1_dsp_mux_enum_put(struct snd_kcontrol *kcontrol,
188 struct snd_ctl_elem_value *ucontrol)
190 struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
191 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
192 struct adau *adau = snd_soc_component_get_drvdata(component);
193 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
194 struct snd_soc_dapm_update update = {};
195 unsigned int stream = e->shift_l;
196 unsigned int val, change;
199 if (ucontrol->value.enumerated.item[0] >= e->items)
202 switch (ucontrol->value.enumerated.item[0]) {
205 adau->dsp_bypass[stream] = false;
208 val = (adau->tdm_slot[stream] * 2) + 1;
209 adau->dsp_bypass[stream] = true;
213 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
214 reg = ADAU17X1_SERIAL_INPUT_ROUTE;
216 reg = ADAU17X1_SERIAL_OUTPUT_ROUTE;
218 change = snd_soc_component_test_bits(component, reg, 0xff, val);
220 update.kcontrol = kcontrol;
225 snd_soc_dapm_mux_update_power(dapm, kcontrol,
226 ucontrol->value.enumerated.item[0], e, &update);
232 static int adau17x1_dsp_mux_enum_get(struct snd_kcontrol *kcontrol,
233 struct snd_ctl_elem_value *ucontrol)
235 struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
236 struct adau *adau = snd_soc_component_get_drvdata(component);
237 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
238 unsigned int stream = e->shift_l;
239 unsigned int reg, val;
242 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
243 reg = ADAU17X1_SERIAL_INPUT_ROUTE;
245 reg = ADAU17X1_SERIAL_OUTPUT_ROUTE;
247 ret = regmap_read(adau->regmap, reg, &val);
253 ucontrol->value.enumerated.item[0] = val;
258 #define DECLARE_ADAU17X1_DSP_MUX_CTRL(_name, _label, _stream, _text) \
259 const struct snd_kcontrol_new _name = \
260 SOC_DAPM_ENUM_EXT(_label, (const struct soc_enum)\
261 SOC_ENUM_SINGLE(SND_SOC_NOPM, _stream, \
262 ARRAY_SIZE(_text), _text), \
263 adau17x1_dsp_mux_enum_get, adau17x1_dsp_mux_enum_put)
265 static const char * const adau17x1_dac_mux_text[] = {
270 static const char * const adau17x1_capture_mux_text[] = {
275 static DECLARE_ADAU17X1_DSP_MUX_CTRL(adau17x1_dac_mux, "DAC Playback Mux",
276 SNDRV_PCM_STREAM_PLAYBACK, adau17x1_dac_mux_text);
278 static DECLARE_ADAU17X1_DSP_MUX_CTRL(adau17x1_capture_mux, "Capture Mux",
279 SNDRV_PCM_STREAM_CAPTURE, adau17x1_capture_mux_text);
281 static const struct snd_soc_dapm_widget adau17x1_dsp_dapm_widgets[] = {
282 SND_SOC_DAPM_PGA("DSP", ADAU17X1_DSP_RUN, 0, 0, NULL, 0),
283 SND_SOC_DAPM_SIGGEN("DSP Siggen"),
285 SND_SOC_DAPM_MUX("DAC Playback Mux", SND_SOC_NOPM, 0, 0,
287 SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0,
288 &adau17x1_capture_mux),
291 static const struct snd_soc_dapm_route adau17x1_dsp_dapm_routes[] = {
292 { "DAC Playback Mux", "DSP", "DSP" },
293 { "DAC Playback Mux", "AIFIN", "Playback" },
295 { "Left DAC Mode Mux", "Stereo", "DAC Playback Mux" },
296 { "Left DAC Mode Mux", "Mono (L+R)", "DAC Playback Mux" },
297 { "Left DAC Mode Mux", "Mono Left Channel (L+R)", "DAC Playback Mux" },
298 { "Right DAC Mode Mux", "Stereo", "DAC Playback Mux" },
299 { "Right DAC Mode Mux", "Mono (L+R)", "DAC Playback Mux" },
300 { "Right DAC Mode Mux", "Mono Right Channel (L+R)", "DAC Playback Mux" },
302 { "Capture Mux", "DSP", "DSP" },
303 { "Capture Mux", "Decimator", "Left Decimator" },
304 { "Capture Mux", "Decimator", "Right Decimator" },
306 { "Capture", NULL, "Capture Mux" },
308 { "DSP", NULL, "DSP Siggen" },
310 { "DSP", NULL, "Left Decimator" },
311 { "DSP", NULL, "Right Decimator" },
312 { "DSP", NULL, "Playback" },
315 static const struct snd_soc_dapm_route adau17x1_no_dsp_dapm_routes[] = {
316 { "Left DAC Mode Mux", "Stereo", "Playback" },
317 { "Left DAC Mode Mux", "Mono (L+R)", "Playback" },
318 { "Left DAC Mode Mux", "Mono Left Channel (L+R)", "Playback" },
319 { "Right DAC Mode Mux", "Stereo", "Playback" },
320 { "Right DAC Mode Mux", "Mono (L+R)", "Playback" },
321 { "Right DAC Mode Mux", "Mono Right Channel (L+R)", "Playback" },
322 { "Capture", NULL, "Left Decimator" },
323 { "Capture", NULL, "Right Decimator" },
326 static bool adau17x1_has_dsp(struct adau *adau)
328 switch (adau->type) {
338 static bool adau17x1_has_safeload(struct adau *adau)
340 switch (adau->type) {
349 static int adau17x1_set_dai_pll(struct snd_soc_dai *dai, int pll_id,
350 int source, unsigned int freq_in, unsigned int freq_out)
352 struct snd_soc_component *component = dai->component;
353 struct adau *adau = snd_soc_component_get_drvdata(component);
356 if (freq_in < 8000000 || freq_in > 27000000)
359 ret = adau_calc_pll_cfg(freq_in, freq_out, adau->pll_regs);
363 /* The PLL register is 6 bytes long and can only be written at once. */
364 ret = regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL,
365 adau->pll_regs, ARRAY_SIZE(adau->pll_regs));
369 adau->pll_freq = freq_out;
374 static int adau17x1_set_dai_sysclk(struct snd_soc_dai *dai,
375 int clk_id, unsigned int freq, int dir)
377 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(dai->component);
378 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
383 case ADAU17X1_CLK_SRC_MCLK:
386 case ADAU17X1_CLK_SRC_PLL_AUTO:
390 case ADAU17X1_CLK_SRC_PLL:
397 switch (adau->clk_src) {
398 case ADAU17X1_CLK_SRC_MCLK:
401 case ADAU17X1_CLK_SRC_PLL:
402 case ADAU17X1_CLK_SRC_PLL_AUTO:
411 if (is_pll != was_pll) {
413 snd_soc_dapm_add_routes(dapm,
414 &adau17x1_dapm_pll_route, 1);
416 snd_soc_dapm_del_routes(dapm,
417 &adau17x1_dapm_pll_route, 1);
421 adau->clk_src = clk_id;
426 static int adau17x1_auto_pll(struct snd_soc_dai *dai,
427 struct snd_pcm_hw_params *params)
429 struct adau *adau = snd_soc_dai_get_drvdata(dai);
430 unsigned int pll_rate;
432 switch (params_rate(params)) {
440 pll_rate = 48000 * 1024;
449 pll_rate = 44100 * 1024;
455 return adau17x1_set_dai_pll(dai, ADAU17X1_PLL, ADAU17X1_PLL_SRC_MCLK,
456 clk_get_rate(adau->mclk), pll_rate);
459 static int adau17x1_hw_params(struct snd_pcm_substream *substream,
460 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
462 struct snd_soc_component *component = dai->component;
463 struct adau *adau = snd_soc_component_get_drvdata(component);
464 unsigned int val, div, dsp_div;
468 switch (adau->clk_src) {
469 case ADAU17X1_CLK_SRC_PLL_AUTO:
470 ret = adau17x1_auto_pll(dai, params);
474 case ADAU17X1_CLK_SRC_PLL:
475 freq = adau->pll_freq;
482 if (freq % params_rate(params) != 0)
485 switch (freq / params_rate(params)) {
490 case 6144: /* fs / 6 */
494 case 4096: /* fs / 4 */
498 case 3072: /* fs / 3 */
502 case 2048: /* fs / 2 */
506 case 1536: /* fs / 1.5 */
510 case 512: /* fs / 0.5 */
518 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
519 ADAU17X1_CONVERTER0_CONVSR_MASK, div);
520 if (adau17x1_has_dsp(adau)) {
521 regmap_write(adau->regmap, ADAU17X1_SERIAL_SAMPLING_RATE, div);
522 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dsp_div);
525 if (adau->sigmadsp) {
526 ret = adau17x1_setup_firmware(component, params_rate(params));
531 if (adau->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
534 switch (params_width(params)) {
536 val = ADAU17X1_SERIAL_PORT1_DELAY16;
539 val = ADAU17X1_SERIAL_PORT1_DELAY8;
542 val = ADAU17X1_SERIAL_PORT1_DELAY0;
548 return regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1,
549 ADAU17X1_SERIAL_PORT1_DELAY_MASK, val);
552 static int adau17x1_set_dai_fmt(struct snd_soc_dai *dai,
555 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
556 unsigned int ctrl0, ctrl1;
559 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
560 case SND_SOC_DAIFMT_CBM_CFM:
561 ctrl0 = ADAU17X1_SERIAL_PORT0_MASTER;
564 case SND_SOC_DAIFMT_CBS_CFS:
566 adau->master = false;
572 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
573 case SND_SOC_DAIFMT_I2S:
575 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY1;
577 case SND_SOC_DAIFMT_LEFT_J:
578 case SND_SOC_DAIFMT_RIGHT_J:
580 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY0;
582 case SND_SOC_DAIFMT_DSP_A:
584 ctrl0 |= ADAU17X1_SERIAL_PORT0_PULSE_MODE;
585 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY1;
587 case SND_SOC_DAIFMT_DSP_B:
589 ctrl0 |= ADAU17X1_SERIAL_PORT0_PULSE_MODE;
590 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY0;
596 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
597 case SND_SOC_DAIFMT_NB_NF:
599 case SND_SOC_DAIFMT_IB_NF:
600 ctrl0 |= ADAU17X1_SERIAL_PORT0_BCLK_POL;
602 case SND_SOC_DAIFMT_NB_IF:
603 lrclk_pol = !lrclk_pol;
605 case SND_SOC_DAIFMT_IB_IF:
606 ctrl0 |= ADAU17X1_SERIAL_PORT0_BCLK_POL;
607 lrclk_pol = !lrclk_pol;
614 ctrl0 |= ADAU17X1_SERIAL_PORT0_LRCLK_POL;
616 regmap_write(adau->regmap, ADAU17X1_SERIAL_PORT0, ctrl0);
617 regmap_write(adau->regmap, ADAU17X1_SERIAL_PORT1, ctrl1);
619 adau->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
624 static int adau17x1_set_dai_tdm_slot(struct snd_soc_dai *dai,
625 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
627 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
628 unsigned int ser_ctrl0, ser_ctrl1;
629 unsigned int conv_ctrl0, conv_ctrl1;
641 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_STEREO;
644 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_TDM4;
647 if (adau->type == ADAU1361)
650 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_TDM8;
656 switch (slot_width * slots) {
658 if (adau->type == ADAU1761)
661 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK32;
664 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK64;
667 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK48;
670 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK128;
673 if (adau->type == ADAU1361)
676 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK256;
684 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(1);
685 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 0;
688 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(2);
689 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 1;
692 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(3);
693 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 2;
696 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(4);
697 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 3;
705 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(1);
706 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 0;
709 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(2);
710 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 1;
713 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(3);
714 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 2;
717 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(4);
718 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 3;
724 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
725 ADAU17X1_CONVERTER0_DAC_PAIR_MASK, conv_ctrl0);
726 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER1,
727 ADAU17X1_CONVERTER1_ADC_PAIR_MASK, conv_ctrl1);
728 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT0,
729 ADAU17X1_SERIAL_PORT0_TDM_MASK, ser_ctrl0);
730 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1,
731 ADAU17X1_SERIAL_PORT1_BCLK_MASK, ser_ctrl1);
733 if (!adau17x1_has_dsp(adau))
736 if (adau->dsp_bypass[SNDRV_PCM_STREAM_PLAYBACK]) {
737 regmap_write(adau->regmap, ADAU17X1_SERIAL_INPUT_ROUTE,
738 (adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] * 2) + 1);
741 if (adau->dsp_bypass[SNDRV_PCM_STREAM_CAPTURE]) {
742 regmap_write(adau->regmap, ADAU17X1_SERIAL_OUTPUT_ROUTE,
743 (adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] * 2) + 1);
749 static int adau17x1_startup(struct snd_pcm_substream *substream,
750 struct snd_soc_dai *dai)
752 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
755 return sigmadsp_restrict_params(adau->sigmadsp, substream);
760 const struct snd_soc_dai_ops adau17x1_dai_ops = {
761 .hw_params = adau17x1_hw_params,
762 .set_sysclk = adau17x1_set_dai_sysclk,
763 .set_fmt = adau17x1_set_dai_fmt,
764 .set_pll = adau17x1_set_dai_pll,
765 .set_tdm_slot = adau17x1_set_dai_tdm_slot,
766 .startup = adau17x1_startup,
768 EXPORT_SYMBOL_GPL(adau17x1_dai_ops);
770 int adau17x1_set_micbias_voltage(struct snd_soc_component *component,
771 enum adau17x1_micbias_voltage micbias)
773 struct adau *adau = snd_soc_component_get_drvdata(component);
776 case ADAU17X1_MICBIAS_0_90_AVDD:
777 case ADAU17X1_MICBIAS_0_65_AVDD:
783 return regmap_write(adau->regmap, ADAU17X1_MICBIAS, micbias << 2);
785 EXPORT_SYMBOL_GPL(adau17x1_set_micbias_voltage);
787 bool adau17x1_precious_register(struct device *dev, unsigned int reg)
789 /* SigmaDSP parameter memory */
795 EXPORT_SYMBOL_GPL(adau17x1_precious_register);
797 bool adau17x1_readable_register(struct device *dev, unsigned int reg)
799 /* SigmaDSP parameter memory */
804 case ADAU17X1_CLOCK_CONTROL:
805 case ADAU17X1_PLL_CONTROL:
806 case ADAU17X1_REC_POWER_MGMT:
807 case ADAU17X1_MICBIAS:
808 case ADAU17X1_SERIAL_PORT0:
809 case ADAU17X1_SERIAL_PORT1:
810 case ADAU17X1_CONVERTER0:
811 case ADAU17X1_CONVERTER1:
812 case ADAU17X1_LEFT_INPUT_DIGITAL_VOL:
813 case ADAU17X1_RIGHT_INPUT_DIGITAL_VOL:
814 case ADAU17X1_ADC_CONTROL:
815 case ADAU17X1_PLAY_POWER_MGMT:
816 case ADAU17X1_DAC_CONTROL0:
817 case ADAU17X1_DAC_CONTROL1:
818 case ADAU17X1_DAC_CONTROL2:
819 case ADAU17X1_SERIAL_PORT_PAD:
820 case ADAU17X1_CONTROL_PORT_PAD0:
821 case ADAU17X1_CONTROL_PORT_PAD1:
822 case ADAU17X1_DSP_SAMPLING_RATE:
823 case ADAU17X1_SERIAL_INPUT_ROUTE:
824 case ADAU17X1_SERIAL_OUTPUT_ROUTE:
825 case ADAU17X1_DSP_ENABLE:
826 case ADAU17X1_DSP_RUN:
827 case ADAU17X1_SERIAL_SAMPLING_RATE:
834 EXPORT_SYMBOL_GPL(adau17x1_readable_register);
836 bool adau17x1_volatile_register(struct device *dev, unsigned int reg)
838 /* SigmaDSP parameter and program memory */
843 /* The PLL register is 6 bytes long */
844 case ADAU17X1_PLL_CONTROL:
845 case ADAU17X1_PLL_CONTROL + 1:
846 case ADAU17X1_PLL_CONTROL + 2:
847 case ADAU17X1_PLL_CONTROL + 3:
848 case ADAU17X1_PLL_CONTROL + 4:
849 case ADAU17X1_PLL_CONTROL + 5:
857 EXPORT_SYMBOL_GPL(adau17x1_volatile_register);
859 static int adau17x1_setup_firmware(struct snd_soc_component *component,
864 struct adau *adau = snd_soc_component_get_drvdata(component);
865 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
867 /* Check if sample rate is the same as before. If it is there is no
868 * point in performing the below steps as the call to
869 * sigmadsp_setup(...) will return directly when it finds the sample
870 * rate to be the same as before. By checking this we can prevent an
871 * audiable popping noise which occours when toggling DSP_RUN.
873 if (adau->sigmadsp->current_samplerate == rate)
876 snd_soc_dapm_mutex_lock(dapm);
878 ret = regmap_read(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, &dspsr);
882 ret = regmap_read(adau->regmap, ADAU17X1_DSP_RUN, &dsp_run);
886 regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 1);
887 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, 0xf);
888 regmap_write(adau->regmap, ADAU17X1_DSP_RUN, 0);
890 ret = sigmadsp_setup(adau->sigmadsp, rate);
892 regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 0);
895 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dspsr);
896 regmap_write(adau->regmap, ADAU17X1_DSP_RUN, dsp_run);
899 snd_soc_dapm_mutex_unlock(dapm);
904 int adau17x1_add_widgets(struct snd_soc_component *component)
906 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
907 struct adau *adau = snd_soc_component_get_drvdata(component);
910 ret = snd_soc_add_component_controls(component, adau17x1_controls,
911 ARRAY_SIZE(adau17x1_controls));
914 ret = snd_soc_dapm_new_controls(dapm, adau17x1_dapm_widgets,
915 ARRAY_SIZE(adau17x1_dapm_widgets));
919 if (adau17x1_has_dsp(adau)) {
920 ret = snd_soc_dapm_new_controls(dapm, adau17x1_dsp_dapm_widgets,
921 ARRAY_SIZE(adau17x1_dsp_dapm_widgets));
928 ret = sigmadsp_attach(adau->sigmadsp, component);
930 dev_err(component->dev, "Failed to attach firmware: %d\n",
938 EXPORT_SYMBOL_GPL(adau17x1_add_widgets);
940 int adau17x1_add_routes(struct snd_soc_component *component)
942 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
943 struct adau *adau = snd_soc_component_get_drvdata(component);
946 ret = snd_soc_dapm_add_routes(dapm, adau17x1_dapm_routes,
947 ARRAY_SIZE(adau17x1_dapm_routes));
951 if (adau17x1_has_dsp(adau)) {
952 ret = snd_soc_dapm_add_routes(dapm, adau17x1_dsp_dapm_routes,
953 ARRAY_SIZE(adau17x1_dsp_dapm_routes));
955 ret = snd_soc_dapm_add_routes(dapm, adau17x1_no_dsp_dapm_routes,
956 ARRAY_SIZE(adau17x1_no_dsp_dapm_routes));
959 if (adau->clk_src != ADAU17X1_CLK_SRC_MCLK)
960 snd_soc_dapm_add_routes(dapm, &adau17x1_dapm_pll_route, 1);
964 EXPORT_SYMBOL_GPL(adau17x1_add_routes);
966 int adau17x1_resume(struct snd_soc_component *component)
968 struct adau *adau = snd_soc_component_get_drvdata(component);
970 if (adau->switch_mode)
971 adau->switch_mode(component->dev);
973 regcache_sync(adau->regmap);
977 EXPORT_SYMBOL_GPL(adau17x1_resume);
979 static int adau17x1_safeload(struct sigmadsp *sigmadsp, unsigned int addr,
980 const uint8_t bytes[], size_t len)
982 uint8_t buf[ADAU17X1_WORD_SIZE];
983 uint8_t data[ADAU17X1_SAFELOAD_DATA_SIZE];
984 unsigned int addr_offset;
985 unsigned int nbr_words;
988 /* write data to safeload addresses. Check if len is not a multiple of
989 * 4 bytes, if so we need to zero pad.
991 nbr_words = len / ADAU17X1_WORD_SIZE;
992 if ((len - nbr_words * ADAU17X1_WORD_SIZE) == 0) {
993 ret = regmap_raw_write(sigmadsp->control_data,
994 ADAU17X1_SAFELOAD_DATA, bytes, len);
997 memset(data, 0, ADAU17X1_SAFELOAD_DATA_SIZE);
998 memcpy(data, bytes, len);
999 ret = regmap_raw_write(sigmadsp->control_data,
1000 ADAU17X1_SAFELOAD_DATA, data,
1001 nbr_words * ADAU17X1_WORD_SIZE);
1007 /* Write target address, target address is offset by 1 */
1008 addr_offset = addr - 1;
1009 put_unaligned_be32(addr_offset, buf);
1010 ret = regmap_raw_write(sigmadsp->control_data,
1011 ADAU17X1_SAFELOAD_TARGET_ADDRESS, buf, ADAU17X1_WORD_SIZE);
1015 /* write nbr of words to trigger address */
1016 put_unaligned_be32(nbr_words, buf);
1017 ret = regmap_raw_write(sigmadsp->control_data,
1018 ADAU17X1_SAFELOAD_TRIGGER, buf, ADAU17X1_WORD_SIZE);
1025 static const struct sigmadsp_ops adau17x1_sigmadsp_ops = {
1026 .safeload = adau17x1_safeload,
1029 int adau17x1_probe(struct device *dev, struct regmap *regmap,
1030 enum adau17x1_type type, void (*switch_mode)(struct device *dev),
1031 const char *firmware_name)
1037 return PTR_ERR(regmap);
1039 adau = devm_kzalloc(dev, sizeof(*adau), GFP_KERNEL);
1043 adau->mclk = devm_clk_get(dev, "mclk");
1044 if (IS_ERR(adau->mclk)) {
1045 if (PTR_ERR(adau->mclk) != -ENOENT)
1046 return PTR_ERR(adau->mclk);
1047 /* Clock is optional (for the driver) */
1049 } else if (adau->mclk) {
1050 adau->clk_src = ADAU17X1_CLK_SRC_PLL_AUTO;
1053 * Any valid PLL output rate will work at this point, use one
1054 * that is likely to be chosen later as well. The register will
1055 * be written when the PLL is powered up for the first time.
1057 ret = adau_calc_pll_cfg(clk_get_rate(adau->mclk), 48000 * 1024,
1062 ret = clk_prepare_enable(adau->mclk);
1067 adau->regmap = regmap;
1068 adau->switch_mode = switch_mode;
1071 dev_set_drvdata(dev, adau);
1073 if (firmware_name) {
1074 if (adau17x1_has_safeload(adau)) {
1075 adau->sigmadsp = devm_sigmadsp_init_regmap(dev, regmap,
1076 &adau17x1_sigmadsp_ops, firmware_name);
1078 adau->sigmadsp = devm_sigmadsp_init_regmap(dev, regmap,
1079 NULL, firmware_name);
1081 if (IS_ERR(adau->sigmadsp)) {
1082 dev_warn(dev, "Could not find firmware file: %ld\n",
1083 PTR_ERR(adau->sigmadsp));
1084 adau->sigmadsp = NULL;
1093 EXPORT_SYMBOL_GPL(adau17x1_probe);
1095 void adau17x1_remove(struct device *dev)
1097 struct adau *adau = dev_get_drvdata(dev);
1100 clk_disable_unprepare(adau->mclk);
1102 EXPORT_SYMBOL_GPL(adau17x1_remove);
1104 MODULE_DESCRIPTION("ASoC ADAU1X61/ADAU1X81 common code");
1105 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
1106 MODULE_LICENSE("GPL");