sound/pci/rme32.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *   ALSA driver for RME Digi32, Digi32/8 and Digi32 PRO audio interfaces
   4  *
   5  *      Copyright (c) 2002-2004 Martin Langer <martin-langer@gmx.de>,
   6  *                              Pilo Chambert <pilo.c@wanadoo.fr>
   7  *
   8  *      Thanks to :        Anders Torger <torger@ludd.luth.se>,
   9  *                         Henk Hesselink <henk@anda.nl>
  10  *                         for writing the digi96-driver
  11  *                         and RME for all informations.
  12  *
  13  * ****************************************************************************
  14  *
  15  * Note #1 "Sek'd models" ................................... martin 2002-12-07
  16  *
  17  * Identical soundcards by Sek'd were labeled:
  18  * RME Digi 32     = Sek'd Prodif 32
  19  * RME Digi 32 Pro = Sek'd Prodif 96
  20  * RME Digi 32/8   = Sek'd Prodif Gold
  21  *
  22  * ****************************************************************************
  23  *
  24  * Note #2 "full duplex mode" ............................... martin 2002-12-07
  25  *
  26  * Full duplex doesn't work. All cards (32, 32/8, 32Pro) are working identical
  27  * in this mode. Rec data and play data are using the same buffer therefore. At
  28  * first you have got the playing bits in the buffer and then (after playing
  29  * them) they were overwitten by the captured sound of the CS8412/14. Both
  30  * modes (play/record) are running harmonically hand in hand in the same buffer
  31  * and you have only one start bit plus one interrupt bit to control this
  32  * paired action.
  33  * This is opposite to the latter rme96 where playing and capturing is totally
  34  * separated and so their full duplex mode is supported by alsa (using two
  35  * start bits and two interrupts for two different buffers).
  36  * But due to the wrong sequence of playing and capturing ALSA shows no solved
  37  * full duplex support for the rme32 at the moment. That's bad, but I'm not
  38  * able to solve it. Are you motivated enough to solve this problem now? Your
  39  * patch would be welcome!
  40  *
  41  * ****************************************************************************
  42  *
  43  * "The story after the long seeking" -- tiwai
  44  *
  45  * Ok, the situation regarding the full duplex is now improved a bit.
  46  * In the fullduplex mode (given by the module parameter), the hardware buffer
  47  * is split to halves for read and write directions at the DMA pointer.
  48  * That is, the half above the current DMA pointer is used for write, and
  49  * the half below is used for read.  To mangle this strange behavior, an
  50  * software intermediate buffer is introduced.  This is, of course, not good
  51  * from the viewpoint of the data transfer efficiency.  However, this allows
  52  * you to use arbitrary buffer sizes, instead of the fixed I/O buffer size.
  53  *
  54  * ****************************************************************************
  55  */
  56
  57
  58 #include <linux/delay.h>
  59 #include <linux/gfp.h>
  60 #include <linux/init.h>
  61 #include <linux/interrupt.h>
  62 #include <linux/pci.h>
  63 #include <linux/module.h>
  64 #include <linux/io.h>
  65
  66 #include <sound/core.h>
  67 #include <sound/info.h>
  68 #include <sound/control.h>
  69 #include <sound/pcm.h>
  70 #include <sound/pcm_params.h>
  71 #include <sound/pcm-indirect.h>
  72 #include <sound/asoundef.h>
  73 #include <sound/initval.h>
  74
  75 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  76 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  77 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;     /* Enable this card */
  78 static bool fullduplex[SNDRV_CARDS]; // = {[0 ... (SNDRV_CARDS - 1)] = 1};
  79
  80 module_param_array(index, int, NULL, 0444);
  81 MODULE_PARM_DESC(index, "Index value for RME Digi32 soundcard.");
  82 module_param_array(id, charp, NULL, 0444);
  83 MODULE_PARM_DESC(id, "ID string for RME Digi32 soundcard.");
  84 module_param_array(enable, bool, NULL, 0444);
  85 MODULE_PARM_DESC(enable, "Enable RME Digi32 soundcard.");
  86 module_param_array(fullduplex, bool, NULL, 0444);
  87 MODULE_PARM_DESC(fullduplex, "Support full-duplex mode.");
  88 MODULE_AUTHOR("Martin Langer <martin-langer@gmx.de>, Pilo Chambert <pilo.c@wanadoo.fr>");
  89 MODULE_DESCRIPTION("RME Digi32, Digi32/8, Digi32 PRO");
  90 MODULE_LICENSE("GPL");
  91
  92 /* Defines for RME Digi32 series */
  93 #define RME32_SPDIF_NCHANNELS 2
  94
  95 /* Playback and capture buffer size */
  96 #define RME32_BUFFER_SIZE 0x20000
  97
  98 /* IO area size */
  99 #define RME32_IO_SIZE 0x30000
 100
 101 /* IO area offsets */
 102 #define RME32_IO_DATA_BUFFER        0x0
 103 #define RME32_IO_CONTROL_REGISTER   0x20000
 104 #define RME32_IO_GET_POS            0x20000
 105 #define RME32_IO_CONFIRM_ACTION_IRQ 0x20004
 106 #define RME32_IO_RESET_POS          0x20100
 107
 108 /* Write control register bits */
 109 #define RME32_WCR_START     (1 << 0)    /* startbit */
 110 #define RME32_WCR_MONO      (1 << 1)    /* 0=stereo, 1=mono
 111                                            Setting the whole card to mono
 112                                            doesn't seem to be very useful.
 113                                            A software-solution can handle
 114                                            full-duplex with one direction in
 115                                            stereo and the other way in mono.
 116                                            So, the hardware should work all
 117                                            the time in stereo! */
 118 #define RME32_WCR_MODE24    (1 << 2)    /* 0=16bit, 1=32bit */
 119 #define RME32_WCR_SEL       (1 << 3)    /* 0=input on output, 1=normal playback/capture */
 120 #define RME32_WCR_FREQ_0    (1 << 4)    /* frequency (play) */
 121 #define RME32_WCR_FREQ_1    (1 << 5)
 122 #define RME32_WCR_INP_0     (1 << 6)    /* input switch */
 123 #define RME32_WCR_INP_1     (1 << 7)
 124 #define RME32_WCR_RESET     (1 << 8)    /* Reset address */
 125 #define RME32_WCR_MUTE      (1 << 9)    /* digital mute for output */
 126 #define RME32_WCR_PRO       (1 << 10)   /* 1=professional, 0=consumer */
 127 #define RME32_WCR_DS_BM     (1 << 11)   /* 1=DoubleSpeed (only PRO-Version); 1=BlockMode (only Adat-Version) */
 128 #define RME32_WCR_ADAT      (1 << 12)   /* Adat Mode (only Adat-Version) */
 129 #define RME32_WCR_AUTOSYNC  (1 << 13)   /* AutoSync */
 130 #define RME32_WCR_PD        (1 << 14)   /* DAC Reset (only PRO-Version) */
 131 #define RME32_WCR_EMP       (1 << 15)   /* 1=Emphasis on (only PRO-Version) */
 132
 133 #define RME32_WCR_BITPOS_FREQ_0 4
 134 #define RME32_WCR_BITPOS_FREQ_1 5
 135 #define RME32_WCR_BITPOS_INP_0 6
 136 #define RME32_WCR_BITPOS_INP_1 7
 137
 138 /* Read control register bits */
 139 #define RME32_RCR_AUDIO_ADDR_MASK 0x1ffff
 140 #define RME32_RCR_LOCK      (1 << 23)   /* 1=locked, 0=not locked */
 141 #define RME32_RCR_ERF       (1 << 26)   /* 1=Error, 0=no Error */
 142 #define RME32_RCR_FREQ_0    (1 << 27)   /* CS841x frequency (record) */
 143 #define RME32_RCR_FREQ_1    (1 << 28)
 144 #define RME32_RCR_FREQ_2    (1 << 29)
 145 #define RME32_RCR_KMODE     (1 << 30)   /* card mode: 1=PLL, 0=quartz */
 146 #define RME32_RCR_IRQ       (1 << 31)   /* interrupt */
 147
 148 #define RME32_RCR_BITPOS_F0 27
 149 #define RME32_RCR_BITPOS_F1 28
 150 #define RME32_RCR_BITPOS_F2 29
 151
 152 /* Input types */
 153 #define RME32_INPUT_OPTICAL 0
 154 #define RME32_INPUT_COAXIAL 1
 155 #define RME32_INPUT_INTERNAL 2
 156 #define RME32_INPUT_XLR 3
 157
 158 /* Clock modes */
 159 #define RME32_CLOCKMODE_SLAVE 0
 160 #define RME32_CLOCKMODE_MASTER_32 1
 161 #define RME32_CLOCKMODE_MASTER_44 2
 162 #define RME32_CLOCKMODE_MASTER_48 3
 163
 164 /* Block sizes in bytes */
 165 #define RME32_BLOCK_SIZE 8192
 166
 167 /* Software intermediate buffer (max) size */
 168 #define RME32_MID_BUFFER_SIZE (1024*1024)
 169
 170 /* Hardware revisions */
 171 #define RME32_32_REVISION 192
 172 #define RME32_328_REVISION_OLD 100
 173 #define RME32_328_REVISION_NEW 101
 174 #define RME32_PRO_REVISION_WITH_8412 192
 175 #define RME32_PRO_REVISION_WITH_8414 150
 176
 177
 178 struct rme32 {
 179         spinlock_t lock;
 180         int irq;
 181         unsigned long port;
 182         void __iomem *iobase;
 183
 184         u32 wcreg;              /* cached write control register value */
 185         u32 wcreg_spdif;        /* S/PDIF setup */
 186         u32 wcreg_spdif_stream; /* S/PDIF setup (temporary) */
 187         u32 rcreg;              /* cached read control register value */
 188
 189         u8 rev;                 /* card revision number */
 190
 191         struct snd_pcm_substream *playback_substream;
 192         struct snd_pcm_substream *capture_substream;
 193
 194         int playback_frlog;     /* log2 of framesize */
 195         int capture_frlog;
 196
 197         size_t playback_periodsize;     /* in bytes, zero if not used */
 198         size_t capture_periodsize;      /* in bytes, zero if not used */
 199
 200         unsigned int fullduplex_mode;
 201         int running;
 202
 203         struct snd_pcm_indirect playback_pcm;
 204         struct snd_pcm_indirect capture_pcm;
 205
 206         struct snd_card *card;
 207         struct snd_pcm *spdif_pcm;
 208         struct snd_pcm *adat_pcm;
 209         struct pci_dev *pci;
 210         struct snd_kcontrol *spdif_ctl;
 211 };
 212
 213 static const struct pci_device_id snd_rme32_ids[] = {
 214         {PCI_VDEVICE(XILINX_RME, PCI_DEVICE_ID_RME_DIGI32), 0,},
 215         {PCI_VDEVICE(XILINX_RME, PCI_DEVICE_ID_RME_DIGI32_8), 0,},
 216         {PCI_VDEVICE(XILINX_RME, PCI_DEVICE_ID_RME_DIGI32_PRO), 0,},
 217         {0,}
 218 };
 219
 220 MODULE_DEVICE_TABLE(pci, snd_rme32_ids);
 221
 222 #define RME32_ISWORKING(rme32) ((rme32)->wcreg & RME32_WCR_START)
 223 #define RME32_PRO_WITH_8414(rme32) ((rme32)->pci->device == PCI_DEVICE_ID_RME_DIGI32_PRO && (rme32)->rev == RME32_PRO_REVISION_WITH_8414)
 224
 225 static int snd_rme32_playback_prepare(struct snd_pcm_substream *substream);
 226
 227 static int snd_rme32_capture_prepare(struct snd_pcm_substream *substream);
 228
 229 static int snd_rme32_pcm_trigger(struct snd_pcm_substream *substream, int cmd);
 230
 231 static void snd_rme32_proc_init(struct rme32 * rme32);
 232
 233 static int snd_rme32_create_switches(struct snd_card *card, struct rme32 * rme32);
 234
 235 static inline unsigned int snd_rme32_pcm_byteptr(struct rme32 * rme32)
 236 {
 237         return (readl(rme32->iobase + RME32_IO_GET_POS)
 238                 & RME32_RCR_AUDIO_ADDR_MASK);
 239 }
 240
 241 /* silence callback for halfduplex mode */
 242 static int snd_rme32_playback_silence(struct snd_pcm_substream *substream,
 243                                       int channel, unsigned long pos,
 244                                       unsigned long count)
 245 {
 246         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 247
 248         memset_io(rme32->iobase + RME32_IO_DATA_BUFFER + pos, 0, count);
 249         return 0;
 250 }
 251
 252 /* copy callback for halfduplex mode */
 253 static int snd_rme32_playback_copy(struct snd_pcm_substream *substream,
 254                                    int channel, unsigned long pos,
 255                                    void __user *src, unsigned long count)
 256 {
 257         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 258
 259         if (copy_from_user_toio(rme32->iobase + RME32_IO_DATA_BUFFER + pos,
 260                                 src, count))
 261                 return -EFAULT;
 262         return 0;
 263 }
 264
 265 static int snd_rme32_playback_copy_kernel(struct snd_pcm_substream *substream,
 266                                           int channel, unsigned long pos,
 267                                           void *src, unsigned long count)
 268 {
 269         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 270
 271         memcpy_toio(rme32->iobase + RME32_IO_DATA_BUFFER + pos, src, count);
 272         return 0;
 273 }
 274
 275 /* copy callback for halfduplex mode */
 276 static int snd_rme32_capture_copy(struct snd_pcm_substream *substream,
 277                                   int channel, unsigned long pos,
 278                                   void __user *dst, unsigned long count)
 279 {
 280         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 281
 282         if (copy_to_user_fromio(dst,
 283                             rme32->iobase + RME32_IO_DATA_BUFFER + pos,
 284                             count))
 285                 return -EFAULT;
 286         return 0;
 287 }
 288
 289 static int snd_rme32_capture_copy_kernel(struct snd_pcm_substream *substream,
 290                                          int channel, unsigned long pos,
 291                                          void *dst, unsigned long count)
 292 {
 293         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 294
 295         memcpy_fromio(dst, rme32->iobase + RME32_IO_DATA_BUFFER + pos, count);
 296         return 0;
 297 }
 298
 299 /*
 300  * SPDIF I/O capabilities (half-duplex mode)
 301  */
 302 static const struct snd_pcm_hardware snd_rme32_spdif_info = {
 303         .info =         (SNDRV_PCM_INFO_MMAP_IOMEM |
 304                          SNDRV_PCM_INFO_MMAP_VALID |
 305                          SNDRV_PCM_INFO_INTERLEAVED |
 306                          SNDRV_PCM_INFO_PAUSE |
 307                          SNDRV_PCM_INFO_SYNC_START |
 308                          SNDRV_PCM_INFO_SYNC_APPLPTR),
 309         .formats =      (SNDRV_PCM_FMTBIT_S16_LE |
 310                          SNDRV_PCM_FMTBIT_S32_LE),
 311         .rates =        (SNDRV_PCM_RATE_32000 |
 312                          SNDRV_PCM_RATE_44100 |
 313                          SNDRV_PCM_RATE_48000),
 314         .rate_min =     32000,
 315         .rate_max =     48000,
 316         .channels_min = 2,
 317         .channels_max = 2,
 318         .buffer_bytes_max = RME32_BUFFER_SIZE,
 319         .period_bytes_min = RME32_BLOCK_SIZE,
 320         .period_bytes_max = RME32_BLOCK_SIZE,
 321         .periods_min =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 322         .periods_max =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 323         .fifo_size =    0,
 324 };
 325
 326 /*
 327  * ADAT I/O capabilities (half-duplex mode)
 328  */
 329 static const struct snd_pcm_hardware snd_rme32_adat_info =
 330 {
 331         .info =              (SNDRV_PCM_INFO_MMAP_IOMEM |
 332                               SNDRV_PCM_INFO_MMAP_VALID |
 333                               SNDRV_PCM_INFO_INTERLEAVED |
 334                               SNDRV_PCM_INFO_PAUSE |
 335                               SNDRV_PCM_INFO_SYNC_START |
 336                               SNDRV_PCM_INFO_SYNC_APPLPTR),
 337         .formats=            SNDRV_PCM_FMTBIT_S16_LE,
 338         .rates =             (SNDRV_PCM_RATE_44100 |
 339                               SNDRV_PCM_RATE_48000),
 340         .rate_min =          44100,
 341         .rate_max =          48000,
 342         .channels_min =      8,
 343         .channels_max =      8,
 344         .buffer_bytes_max =  RME32_BUFFER_SIZE,
 345         .period_bytes_min =  RME32_BLOCK_SIZE,
 346         .period_bytes_max =  RME32_BLOCK_SIZE,
 347         .periods_min =      RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 348         .periods_max =      RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 349         .fifo_size =        0,
 350 };
 351
 352 /*
 353  * SPDIF I/O capabilities (full-duplex mode)
 354  */
 355 static const struct snd_pcm_hardware snd_rme32_spdif_fd_info = {
 356         .info =         (SNDRV_PCM_INFO_MMAP |
 357                          SNDRV_PCM_INFO_MMAP_VALID |
 358                          SNDRV_PCM_INFO_INTERLEAVED |
 359                          SNDRV_PCM_INFO_PAUSE |
 360                          SNDRV_PCM_INFO_SYNC_START |
 361                          SNDRV_PCM_INFO_SYNC_APPLPTR),
 362         .formats =      (SNDRV_PCM_FMTBIT_S16_LE |
 363                          SNDRV_PCM_FMTBIT_S32_LE),
 364         .rates =        (SNDRV_PCM_RATE_32000 |
 365                          SNDRV_PCM_RATE_44100 |
 366                          SNDRV_PCM_RATE_48000),
 367         .rate_min =     32000,
 368         .rate_max =     48000,
 369         .channels_min = 2,
 370         .channels_max = 2,
 371         .buffer_bytes_max = RME32_MID_BUFFER_SIZE,
 372         .period_bytes_min = RME32_BLOCK_SIZE,
 373         .period_bytes_max = RME32_BLOCK_SIZE,
 374         .periods_min =  2,
 375         .periods_max =  RME32_MID_BUFFER_SIZE / RME32_BLOCK_SIZE,
 376         .fifo_size =    0,
 377 };
 378
 379 /*
 380  * ADAT I/O capabilities (full-duplex mode)
 381  */
 382 static const struct snd_pcm_hardware snd_rme32_adat_fd_info =
 383 {
 384         .info =              (SNDRV_PCM_INFO_MMAP |
 385                               SNDRV_PCM_INFO_MMAP_VALID |
 386                               SNDRV_PCM_INFO_INTERLEAVED |
 387                               SNDRV_PCM_INFO_PAUSE |
 388                               SNDRV_PCM_INFO_SYNC_START |
 389                               SNDRV_PCM_INFO_SYNC_APPLPTR),
 390         .formats=            SNDRV_PCM_FMTBIT_S16_LE,
 391         .rates =             (SNDRV_PCM_RATE_44100 |
 392                               SNDRV_PCM_RATE_48000),
 393         .rate_min =          44100,
 394         .rate_max =          48000,
 395         .channels_min =      8,
 396         .channels_max =      8,
 397         .buffer_bytes_max =  RME32_MID_BUFFER_SIZE,
 398         .period_bytes_min =  RME32_BLOCK_SIZE,
 399         .period_bytes_max =  RME32_BLOCK_SIZE,
 400         .periods_min =      2,
 401         .periods_max =      RME32_MID_BUFFER_SIZE / RME32_BLOCK_SIZE,
 402         .fifo_size =        0,
 403 };
 404
 405 static void snd_rme32_reset_dac(struct rme32 *rme32)
 406 {
 407         writel(rme32->wcreg | RME32_WCR_PD,
 408                rme32->iobase + RME32_IO_CONTROL_REGISTER);
 409         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 410 }
 411
 412 static int snd_rme32_playback_getrate(struct rme32 * rme32)
 413 {
 414         int rate;
 415
 416         rate = ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
 417                (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
 418         switch (rate) {
 419         case 1:
 420                 rate = 32000;
 421                 break;
 422         case 2:
 423                 rate = 44100;
 424                 break;
 425         case 3:
 426                 rate = 48000;
 427                 break;
 428         default:
 429                 return -1;
 430         }
 431         return (rme32->wcreg & RME32_WCR_DS_BM) ? rate << 1 : rate;
 432 }
 433
 434 static int snd_rme32_capture_getrate(struct rme32 * rme32, int *is_adat)
 435 {
 436         int n;
 437
 438         *is_adat = 0;
 439         if (rme32->rcreg & RME32_RCR_LOCK) {
 440                 /* ADAT rate */
 441                 *is_adat = 1;
 442         }
 443         if (rme32->rcreg & RME32_RCR_ERF) {
 444                 return -1;
 445         }
 446
 447         /* S/PDIF rate */
 448         n = ((rme32->rcreg >> RME32_RCR_BITPOS_F0) & 1) +
 449                 (((rme32->rcreg >> RME32_RCR_BITPOS_F1) & 1) << 1) +
 450                 (((rme32->rcreg >> RME32_RCR_BITPOS_F2) & 1) << 2);
 451
 452         if (RME32_PRO_WITH_8414(rme32))
 453                 switch (n) {    /* supporting the CS8414 */
 454                 case 0:
 455                 case 1:
 456                 case 2:
 457                         return -1;
 458                 case 3:
 459                         return 96000;
 460                 case 4:
 461                         return 88200;
 462                 case 5:
 463                         return 48000;
 464                 case 6:
 465                         return 44100;
 466                 case 7:
 467                         return 32000;
 468                 default:
 469                         return -1;
 470                 }
 471         else
 472                 switch (n) {    /* supporting the CS8412 */
 473                 case 0:
 474                         return -1;
 475                 case 1:
 476                         return 48000;
 477                 case 2:
 478                         return 44100;
 479                 case 3:
 480                         return 32000;
 481                 case 4:
 482                         return 48000;
 483                 case 5:
 484                         return 44100;
 485                 case 6:
 486                         return 44056;
 487                 case 7:
 488                         return 32000;
 489                 default:
 490                         break;
 491                 }
 492         return -1;
 493 }
 494
 495 static int snd_rme32_playback_setrate(struct rme32 * rme32, int rate)
 496 {
 497         int ds;
 498
 499         ds = rme32->wcreg & RME32_WCR_DS_BM;
 500         switch (rate) {
 501         case 32000:
 502                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 503                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 504                         ~RME32_WCR_FREQ_1;
 505                 break;
 506         case 44100:
 507                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 508                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
 509                         ~RME32_WCR_FREQ_0;
 510                 break;
 511         case 48000:
 512                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 513                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 514                         RME32_WCR_FREQ_1;
 515                 break;
 516         case 64000:
 517                 if (rme32->pci->device != PCI_DEVICE_ID_RME_DIGI32_PRO)
 518                         return -EINVAL;
 519                 rme32->wcreg |= RME32_WCR_DS_BM;
 520                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 521                         ~RME32_WCR_FREQ_1;
 522                 break;
 523         case 88200:
 524                 if (rme32->pci->device != PCI_DEVICE_ID_RME_DIGI32_PRO)
 525                         return -EINVAL;
 526                 rme32->wcreg |= RME32_WCR_DS_BM;
 527                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
 528                         ~RME32_WCR_FREQ_0;
 529                 break;
 530         case 96000:
 531                 if (rme32->pci->device != PCI_DEVICE_ID_RME_DIGI32_PRO)
 532                         return -EINVAL;
 533                 rme32->wcreg |= RME32_WCR_DS_BM;
 534                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 535                         RME32_WCR_FREQ_1;
 536                 break;
 537         default:
 538                 return -EINVAL;
 539         }
 540         if ((!ds && rme32->wcreg & RME32_WCR_DS_BM) ||
 541             (ds && !(rme32->wcreg & RME32_WCR_DS_BM)))
 542         {
 543                 /* change to/from double-speed: reset the DAC (if available) */
 544                 snd_rme32_reset_dac(rme32);
 545         } else {
 546                 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 547         }
 548         return 0;
 549 }
 550
 551 static int snd_rme32_setclockmode(struct rme32 * rme32, int mode)
 552 {
 553         switch (mode) {
 554         case RME32_CLOCKMODE_SLAVE:
 555                 /* AutoSync */
 556                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) &
 557                         ~RME32_WCR_FREQ_1;
 558                 break;
 559         case RME32_CLOCKMODE_MASTER_32:
 560                 /* Internal 32.0kHz */
 561                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 562                         ~RME32_WCR_FREQ_1;
 563                 break;
 564         case RME32_CLOCKMODE_MASTER_44:
 565                 /* Internal 44.1kHz */
 566                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) |
 567                         RME32_WCR_FREQ_1;
 568                 break;
 569         case RME32_CLOCKMODE_MASTER_48:
 570                 /* Internal 48.0kHz */
 571                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 572                         RME32_WCR_FREQ_1;
 573                 break;
 574         default:
 575                 return -EINVAL;
 576         }
 577         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 578         return 0;
 579 }
 580
 581 static int snd_rme32_getclockmode(struct rme32 * rme32)
 582 {
 583         return ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
 584             (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
 585 }
 586
 587 static int snd_rme32_setinputtype(struct rme32 * rme32, int type)
 588 {
 589         switch (type) {
 590         case RME32_INPUT_OPTICAL:
 591                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) &
 592                         ~RME32_WCR_INP_1;
 593                 break;
 594         case RME32_INPUT_COAXIAL:
 595                 rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) &
 596                         ~RME32_WCR_INP_1;
 597                 break;
 598         case RME32_INPUT_INTERNAL:
 599                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) |
 600                         RME32_WCR_INP_1;
 601                 break;
 602         case RME32_INPUT_XLR:
 603                 rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) |
 604                         RME32_WCR_INP_1;
 605                 break;
 606         default:
 607                 return -EINVAL;
 608         }
 609         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 610         return 0;
 611 }
 612
 613 static int snd_rme32_getinputtype(struct rme32 * rme32)
 614 {
 615         return ((rme32->wcreg >> RME32_WCR_BITPOS_INP_0) & 1) +
 616             (((rme32->wcreg >> RME32_WCR_BITPOS_INP_1) & 1) << 1);
 617 }
 618
 619 static void
 620 snd_rme32_setframelog(struct rme32 * rme32, int n_channels, int is_playback)
 621 {
 622         int frlog;
 623
 624         if (n_channels == 2) {
 625                 frlog = 1;
 626         } else {
 627                 /* assume 8 channels */
 628                 frlog = 3;
 629         }
 630         if (is_playback) {
 631                 frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
 632                 rme32->playback_frlog = frlog;
 633         } else {
 634                 frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
 635                 rme32->capture_frlog = frlog;
 636         }
 637 }
 638
 639 static int snd_rme32_setformat(struct rme32 *rme32, snd_pcm_format_t format)
 640 {
 641         switch (format) {
 642         case SNDRV_PCM_FORMAT_S16_LE:
 643                 rme32->wcreg &= ~RME32_WCR_MODE24;
 644                 break;
 645         case SNDRV_PCM_FORMAT_S32_LE:
 646                 rme32->wcreg |= RME32_WCR_MODE24;
 647                 break;
 648         default:
 649                 return -EINVAL;
 650         }
 651         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 652         return 0;
 653 }
 654
 655 static int
 656 snd_rme32_playback_hw_params(struct snd_pcm_substream *substream,
 657                              struct snd_pcm_hw_params *params)
 658 {
 659         int err, rate, dummy;
 660         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 661         struct snd_pcm_runtime *runtime = substream->runtime;
 662
 663         if (!rme32->fullduplex_mode) {
 664                 runtime->dma_area = (void __force *)(rme32->iobase +
 665                                                      RME32_IO_DATA_BUFFER);
 666                 runtime->dma_addr = rme32->port + RME32_IO_DATA_BUFFER;
 667                 runtime->dma_bytes = RME32_BUFFER_SIZE;
 668         }
 669
 670         spin_lock_irq(&rme32->lock);
 671         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 672             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 673                 /* AutoSync */
 674                 if ((int)params_rate(params) != rate) {
 675                         spin_unlock_irq(&rme32->lock);
 676                         return -EIO;
 677                 }
 678         } else if ((err = snd_rme32_playback_setrate(rme32, params_rate(params))) < 0) {
 679                 spin_unlock_irq(&rme32->lock);
 680                 return err;
 681         }
 682         if ((err = snd_rme32_setformat(rme32, params_format(params))) < 0) {
 683                 spin_unlock_irq(&rme32->lock);
 684                 return err;
 685         }
 686
 687         snd_rme32_setframelog(rme32, params_channels(params), 1);
 688         if (rme32->capture_periodsize != 0) {
 689                 if (params_period_size(params) << rme32->playback_frlog != rme32->capture_periodsize) {
 690                         spin_unlock_irq(&rme32->lock);
 691                         return -EBUSY;
 692                 }
 693         }
 694         rme32->playback_periodsize = params_period_size(params) << rme32->playback_frlog;
 695         /* S/PDIF setup */
 696         if ((rme32->wcreg & RME32_WCR_ADAT) == 0) {
 697                 rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
 698                 rme32->wcreg |= rme32->wcreg_spdif_stream;
 699                 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 700         }
 701         spin_unlock_irq(&rme32->lock);
 702
 703         return 0;
 704 }
 705
 706 static int
 707 snd_rme32_capture_hw_params(struct snd_pcm_substream *substream,
 708                             struct snd_pcm_hw_params *params)
 709 {
 710         int err, isadat, rate;
 711         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 712         struct snd_pcm_runtime *runtime = substream->runtime;
 713
 714         if (!rme32->fullduplex_mode) {
 715                 runtime->dma_area = (void __force *)rme32->iobase +
 716                                         RME32_IO_DATA_BUFFER;
 717                 runtime->dma_addr = rme32->port + RME32_IO_DATA_BUFFER;
 718                 runtime->dma_bytes = RME32_BUFFER_SIZE;
 719         }
 720
 721         spin_lock_irq(&rme32->lock);
 722         /* enable AutoSync for record-preparing */
 723         rme32->wcreg |= RME32_WCR_AUTOSYNC;
 724         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 725
 726         if ((err = snd_rme32_setformat(rme32, params_format(params))) < 0) {
 727                 spin_unlock_irq(&rme32->lock);
 728                 return err;
 729         }
 730         if ((err = snd_rme32_playback_setrate(rme32, params_rate(params))) < 0) {
 731                 spin_unlock_irq(&rme32->lock);
 732                 return err;
 733         }
 734         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 735                 if ((int)params_rate(params) != rate) {
 736                         spin_unlock_irq(&rme32->lock);
 737                         return -EIO;
 738                 }
 739                 if ((isadat && runtime->hw.channels_min == 2) ||
 740                     (!isadat && runtime->hw.channels_min == 8)) {
 741                         spin_unlock_irq(&rme32->lock);
 742                         return -EIO;
 743                 }
 744         }
 745         /* AutoSync off for recording */
 746         rme32->wcreg &= ~RME32_WCR_AUTOSYNC;
 747         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 748
 749         snd_rme32_setframelog(rme32, params_channels(params), 0);
 750         if (rme32->playback_periodsize != 0) {
 751                 if (params_period_size(params) << rme32->capture_frlog !=
 752                     rme32->playback_periodsize) {
 753                         spin_unlock_irq(&rme32->lock);
 754                         return -EBUSY;
 755                 }
 756         }
 757         rme32->capture_periodsize =
 758             params_period_size(params) << rme32->capture_frlog;
 759         spin_unlock_irq(&rme32->lock);
 760
 761         return 0;
 762 }
 763
 764 static void snd_rme32_pcm_start(struct rme32 * rme32, int from_pause)
 765 {
 766         if (!from_pause) {
 767                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
 768         }
 769
 770         rme32->wcreg |= RME32_WCR_START;
 771         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 772 }
 773
 774 static void snd_rme32_pcm_stop(struct rme32 * rme32, int to_pause)
 775 {
 776         /*
 777          * Check if there is an unconfirmed IRQ, if so confirm it, or else
 778          * the hardware will not stop generating interrupts
 779          */
 780         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
 781         if (rme32->rcreg & RME32_RCR_IRQ) {
 782                 writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
 783         }
 784         rme32->wcreg &= ~RME32_WCR_START;
 785         if (rme32->wcreg & RME32_WCR_SEL)
 786                 rme32->wcreg |= RME32_WCR_MUTE;
 787         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 788         if (! to_pause)
 789                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
 790 }
 791
 792 static irqreturn_t snd_rme32_interrupt(int irq, void *dev_id)
 793 {
 794         struct rme32 *rme32 = (struct rme32 *) dev_id;
 795
 796         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
 797         if (!(rme32->rcreg & RME32_RCR_IRQ)) {
 798                 return IRQ_NONE;
 799         } else {
 800                 if (rme32->capture_substream) {
 801                         snd_pcm_period_elapsed(rme32->capture_substream);
 802                 }
 803                 if (rme32->playback_substream) {
 804                         snd_pcm_period_elapsed(rme32->playback_substream);
 805                 }
 806                 writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
 807         }
 808         return IRQ_HANDLED;
 809 }
 810
 811 static const unsigned int period_bytes[] = { RME32_BLOCK_SIZE };
 812
 813 static const struct snd_pcm_hw_constraint_list hw_constraints_period_bytes = {
 814         .count = ARRAY_SIZE(period_bytes),
 815         .list = period_bytes,
 816         .mask = 0
 817 };
 818
 819 static void snd_rme32_set_buffer_constraint(struct rme32 *rme32, struct snd_pcm_runtime *runtime)
 820 {
 821         if (! rme32->fullduplex_mode) {
 822                 snd_pcm_hw_constraint_single(runtime,
 823                                              SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
 824                                              RME32_BUFFER_SIZE);
 825                 snd_pcm_hw_constraint_list(runtime, 0,
 826                                            SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
 827                                            &hw_constraints_period_bytes);
 828         }
 829 }
 830
 831 static int snd_rme32_playback_spdif_open(struct snd_pcm_substream *substream)
 832 {
 833         int rate, dummy;
 834         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 835         struct snd_pcm_runtime *runtime = substream->runtime;
 836
 837         snd_pcm_set_sync(substream);
 838
 839         spin_lock_irq(&rme32->lock);
 840         if (rme32->playback_substream != NULL) {
 841                 spin_unlock_irq(&rme32->lock);
 842                 return -EBUSY;
 843         }
 844         rme32->wcreg &= ~RME32_WCR_ADAT;
 845         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 846         rme32->playback_substream = substream;
 847         spin_unlock_irq(&rme32->lock);
 848
 849         if (rme32->fullduplex_mode)
 850                 runtime->hw = snd_rme32_spdif_fd_info;
 851         else
 852                 runtime->hw = snd_rme32_spdif_info;
 853         if (rme32->pci->device == PCI_DEVICE_ID_RME_DIGI32_PRO) {
 854                 runtime->hw.rates |= SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000;
 855                 runtime->hw.rate_max = 96000;
 856         }
 857         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 858             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 859                 /* AutoSync */
 860                 runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
 861                 runtime->hw.rate_min = rate;
 862                 runtime->hw.rate_max = rate;
 863         }
 864
 865         snd_rme32_set_buffer_constraint(rme32, runtime);
 866
 867         rme32->wcreg_spdif_stream = rme32->wcreg_spdif;
 868         rme32->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 869         snd_ctl_notify(rme32->card, SNDRV_CTL_EVENT_MASK_VALUE |
 870                        SNDRV_CTL_EVENT_MASK_INFO, &rme32->spdif_ctl->id);
 871         return 0;
 872 }
 873
 874 static int snd_rme32_capture_spdif_open(struct snd_pcm_substream *substream)
 875 {
 876         int isadat, rate;
 877         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 878         struct snd_pcm_runtime *runtime = substream->runtime;
 879
 880         snd_pcm_set_sync(substream);
 881
 882         spin_lock_irq(&rme32->lock);
 883         if (rme32->capture_substream != NULL) {
 884                 spin_unlock_irq(&rme32->lock);
 885                 return -EBUSY;
 886         }
 887         rme32->capture_substream = substream;
 888         spin_unlock_irq(&rme32->lock);
 889
 890         if (rme32->fullduplex_mode)
 891                 runtime->hw = snd_rme32_spdif_fd_info;
 892         else
 893                 runtime->hw = snd_rme32_spdif_info;
 894         if (RME32_PRO_WITH_8414(rme32)) {
 895                 runtime->hw.rates |= SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000;
 896                 runtime->hw.rate_max = 96000;
 897         }
 898         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 899                 if (isadat) {
 900                         return -EIO;
 901                 }
 902                 runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
 903                 runtime->hw.rate_min = rate;
 904                 runtime->hw.rate_max = rate;
 905         }
 906
 907         snd_rme32_set_buffer_constraint(rme32, runtime);
 908
 909         return 0;
 910 }
 911
 912 static int
 913 snd_rme32_playback_adat_open(struct snd_pcm_substream *substream)
 914 {
 915         int rate, dummy;
 916         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 917         struct snd_pcm_runtime *runtime = substream->runtime;
 918
 919         snd_pcm_set_sync(substream);
 920
 921         spin_lock_irq(&rme32->lock);
 922         if (rme32->playback_substream != NULL) {
 923                 spin_unlock_irq(&rme32->lock);
 924                 return -EBUSY;
 925         }
 926         rme32->wcreg |= RME32_WCR_ADAT;
 927         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 928         rme32->playback_substream = substream;
 929         spin_unlock_irq(&rme32->lock);
 930
 931         if (rme32->fullduplex_mode)
 932                 runtime->hw = snd_rme32_adat_fd_info;
 933         else
 934                 runtime->hw = snd_rme32_adat_info;
 935         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 936             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 937                 /* AutoSync */
 938                 runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
 939                 runtime->hw.rate_min = rate;
 940                 runtime->hw.rate_max = rate;
 941         }
 942
 943         snd_rme32_set_buffer_constraint(rme32, runtime);
 944         return 0;
 945 }
 946
 947 static int
 948 snd_rme32_capture_adat_open(struct snd_pcm_substream *substream)
 949 {
 950         int isadat, rate;
 951         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 952         struct snd_pcm_runtime *runtime = substream->runtime;
 953
 954         if (rme32->fullduplex_mode)
 955                 runtime->hw = snd_rme32_adat_fd_info;
 956         else
 957                 runtime->hw = snd_rme32_adat_info;
 958         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 959                 if (!isadat) {
 960                         return -EIO;
 961                 }
 962                 runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
 963                 runtime->hw.rate_min = rate;
 964                 runtime->hw.rate_max = rate;
 965         }
 966
 967         snd_pcm_set_sync(substream);
 968
 969         spin_lock_irq(&rme32->lock);
 970         if (rme32->capture_substream != NULL) {
 971                 spin_unlock_irq(&rme32->lock);
 972                 return -EBUSY;
 973         }
 974         rme32->capture_substream = substream;
 975         spin_unlock_irq(&rme32->lock);
 976
 977         snd_rme32_set_buffer_constraint(rme32, runtime);
 978         return 0;
 979 }
 980
 981 static int snd_rme32_playback_close(struct snd_pcm_substream *substream)
 982 {
 983         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 984         int spdif = 0;
 985
 986         spin_lock_irq(&rme32->lock);
 987         rme32->playback_substream = NULL;
 988         rme32->playback_periodsize = 0;
 989         spdif = (rme32->wcreg & RME32_WCR_ADAT) == 0;
 990         spin_unlock_irq(&rme32->lock);
 991         if (spdif) {
 992                 rme32->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 993                 snd_ctl_notify(rme32->card, SNDRV_CTL_EVENT_MASK_VALUE |
 994                                SNDRV_CTL_EVENT_MASK_INFO,
 995                                &rme32->spdif_ctl->id);
 996         }
 997         return 0;
 998 }
 999
1000 static int snd_rme32_capture_close(struct snd_pcm_substream *substream)
1001 {
1002         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1003
1004         spin_lock_irq(&rme32->lock);
1005         rme32->capture_substream = NULL;
1006         rme32->capture_periodsize = 0;
1007         spin_unlock_irq(&rme32->lock);
1008         return 0;
1009 }
1010
1011 static int snd_rme32_playback_prepare(struct snd_pcm_substream *substream)
1012 {
1013         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1014
1015         spin_lock_irq(&rme32->lock);
1016         if (rme32->fullduplex_mode) {
1017                 memset(&rme32->playback_pcm, 0, sizeof(rme32->playback_pcm));
1018                 rme32->playback_pcm.hw_buffer_size = RME32_BUFFER_SIZE;
1019                 rme32->playback_pcm.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream);
1020         } else {
1021                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
1022         }
1023         if (rme32->wcreg & RME32_WCR_SEL)
1024                 rme32->wcreg &= ~RME32_WCR_MUTE;
1025         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1026         spin_unlock_irq(&rme32->lock);
1027         return 0;
1028 }
1029
1030 static int snd_rme32_capture_prepare(struct snd_pcm_substream *substream)
1031 {
1032         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1033
1034         spin_lock_irq(&rme32->lock);
1035         if (rme32->fullduplex_mode) {
1036                 memset(&rme32->capture_pcm, 0, sizeof(rme32->capture_pcm));
1037                 rme32->capture_pcm.hw_buffer_size = RME32_BUFFER_SIZE;
1038                 rme32->capture_pcm.hw_queue_size = RME32_BUFFER_SIZE / 2;
1039                 rme32->capture_pcm.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream);
1040         } else {
1041                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
1042         }
1043         spin_unlock_irq(&rme32->lock);
1044         return 0;
1045 }
1046
1047 static int
1048 snd_rme32_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1049 {
1050         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1051         struct snd_pcm_substream *s;
1052
1053         spin_lock(&rme32->lock);
1054         snd_pcm_group_for_each_entry(s, substream) {
1055                 if (s != rme32->playback_substream &&
1056                     s != rme32->capture_substream)
1057                         continue;
1058                 switch (cmd) {
1059                 case SNDRV_PCM_TRIGGER_START:
1060                         rme32->running |= (1 << s->stream);
1061                         if (rme32->fullduplex_mode) {
1062                                 /* remember the current DMA position */
1063                                 if (s == rme32->playback_substream) {
1064                                         rme32->playback_pcm.hw_io =
1065                                         rme32->playback_pcm.hw_data = snd_rme32_pcm_byteptr(rme32);
1066                                 } else {
1067                                         rme32->capture_pcm.hw_io =
1068                                         rme32->capture_pcm.hw_data = snd_rme32_pcm_byteptr(rme32);
1069                                 }
1070                         }
1071                         break;
1072                 case SNDRV_PCM_TRIGGER_STOP:
1073                         rme32->running &= ~(1 << s->stream);
1074                         break;
1075                 }
1076                 snd_pcm_trigger_done(s, substream);
1077         }
1078
1079         switch (cmd) {
1080         case SNDRV_PCM_TRIGGER_START:
1081                 if (rme32->running && ! RME32_ISWORKING(rme32))
1082                         snd_rme32_pcm_start(rme32, 0);
1083                 break;
1084         case SNDRV_PCM_TRIGGER_STOP:
1085                 if (! rme32->running && RME32_ISWORKING(rme32))
1086                         snd_rme32_pcm_stop(rme32, 0);
1087                 break;
1088         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1089                 if (rme32->running && RME32_ISWORKING(rme32))
1090                         snd_rme32_pcm_stop(rme32, 1);
1091                 break;
1092         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1093                 if (rme32->running && ! RME32_ISWORKING(rme32))
1094                         snd_rme32_pcm_start(rme32, 1);
1095                 break;
1096         }
1097         spin_unlock(&rme32->lock);
1098         return 0;
1099 }
1100
1101 /* pointer callback for halfduplex mode */
1102 static snd_pcm_uframes_t
1103 snd_rme32_playback_pointer(struct snd_pcm_substream *substream)
1104 {
1105         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1106         return snd_rme32_pcm_byteptr(rme32) >> rme32->playback_frlog;
1107 }
1108
1109 static snd_pcm_uframes_t
1110 snd_rme32_capture_pointer(struct snd_pcm_substream *substream)
1111 {
1112         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1113         return snd_rme32_pcm_byteptr(rme32) >> rme32->capture_frlog;
1114 }
1115
1116
1117 /* ack and pointer callbacks for fullduplex mode */
1118 static void snd_rme32_pb_trans_copy(struct snd_pcm_substream *substream,
1119                                     struct snd_pcm_indirect *rec, size_t bytes)
1120 {
1121         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1122         memcpy_toio(rme32->iobase + RME32_IO_DATA_BUFFER + rec->hw_data,
1123                     substream->runtime->dma_area + rec->sw_data, bytes);
1124 }
1125
1126 static int snd_rme32_playback_fd_ack(struct snd_pcm_substream *substream)
1127 {
1128         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1129         struct snd_pcm_indirect *rec, *cprec;
1130
1131         rec = &rme32->playback_pcm;
1132         cprec = &rme32->capture_pcm;
1133         spin_lock(&rme32->lock);
1134         rec->hw_queue_size = RME32_BUFFER_SIZE;
1135         if (rme32->running & (1 << SNDRV_PCM_STREAM_CAPTURE))
1136                 rec->hw_queue_size -= cprec->hw_ready;
1137         spin_unlock(&rme32->lock);
1138         return snd_pcm_indirect_playback_transfer(substream, rec,
1139                                                   snd_rme32_pb_trans_copy);
1140 }
1141
1142 static void snd_rme32_cp_trans_copy(struct snd_pcm_substream *substream,
1143                                     struct snd_pcm_indirect *rec, size_t bytes)
1144 {
1145         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1146         memcpy_fromio(substream->runtime->dma_area + rec->sw_data,
1147                       rme32->iobase + RME32_IO_DATA_BUFFER + rec->hw_data,
1148                       bytes);
1149 }
1150
1151 static int snd_rme32_capture_fd_ack(struct snd_pcm_substream *substream)
1152 {
1153         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1154         return snd_pcm_indirect_capture_transfer(substream, &rme32->capture_pcm,
1155                                                  snd_rme32_cp_trans_copy);
1156 }
1157
1158 static snd_pcm_uframes_t
1159 snd_rme32_playback_fd_pointer(struct snd_pcm_substream *substream)
1160 {
1161         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1162         return snd_pcm_indirect_playback_pointer(substream, &rme32->playback_pcm,
1163                                                  snd_rme32_pcm_byteptr(rme32));
1164 }
1165
1166 static snd_pcm_uframes_t
1167 snd_rme32_capture_fd_pointer(struct snd_pcm_substream *substream)
1168 {
1169         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1170         return snd_pcm_indirect_capture_pointer(substream, &rme32->capture_pcm,
1171                                                 snd_rme32_pcm_byteptr(rme32));
1172 }
1173
1174 /* for halfduplex mode */
1175 static const struct snd_pcm_ops snd_rme32_playback_spdif_ops = {
1176         .open =         snd_rme32_playback_spdif_open,
1177         .close =        snd_rme32_playback_close,
1178         .hw_params =    snd_rme32_playback_hw_params,
1179         .prepare =      snd_rme32_playback_prepare,
1180         .trigger =      snd_rme32_pcm_trigger,
1181         .pointer =      snd_rme32_playback_pointer,
1182         .copy_user =    snd_rme32_playback_copy,
1183         .copy_kernel =  snd_rme32_playback_copy_kernel,
1184         .fill_silence = snd_rme32_playback_silence,
1185         .mmap =         snd_pcm_lib_mmap_iomem,
1186 };
1187
1188 static const struct snd_pcm_ops snd_rme32_capture_spdif_ops = {
1189         .open =         snd_rme32_capture_spdif_open,
1190         .close =        snd_rme32_capture_close,
1191         .hw_params =    snd_rme32_capture_hw_params,
1192         .prepare =      snd_rme32_capture_prepare,
1193         .trigger =      snd_rme32_pcm_trigger,
1194         .pointer =      snd_rme32_capture_pointer,
1195         .copy_user =    snd_rme32_capture_copy,
1196         .copy_kernel =  snd_rme32_capture_copy_kernel,
1197         .mmap =         snd_pcm_lib_mmap_iomem,
1198 };
1199
1200 static const struct snd_pcm_ops snd_rme32_playback_adat_ops = {
1201         .open =         snd_rme32_playback_adat_open,
1202         .close =        snd_rme32_playback_close,
1203         .hw_params =    snd_rme32_playback_hw_params,
1204         .prepare =      snd_rme32_playback_prepare,
1205         .trigger =      snd_rme32_pcm_trigger,
1206         .pointer =      snd_rme32_playback_pointer,
1207         .copy_user =    snd_rme32_playback_copy,
1208         .copy_kernel =  snd_rme32_playback_copy_kernel,
1209         .fill_silence = snd_rme32_playback_silence,
1210         .mmap =         snd_pcm_lib_mmap_iomem,
1211 };
1212
1213 static const struct snd_pcm_ops snd_rme32_capture_adat_ops = {
1214         .open =         snd_rme32_capture_adat_open,
1215         .close =        snd_rme32_capture_close,
1216         .hw_params =    snd_rme32_capture_hw_params,
1217         .prepare =      snd_rme32_capture_prepare,
1218         .trigger =      snd_rme32_pcm_trigger,
1219         .pointer =      snd_rme32_capture_pointer,
1220         .copy_user =    snd_rme32_capture_copy,
1221         .copy_kernel =  snd_rme32_capture_copy_kernel,
1222         .mmap =         snd_pcm_lib_mmap_iomem,
1223 };
1224
1225 /* for fullduplex mode */
1226 static const struct snd_pcm_ops snd_rme32_playback_spdif_fd_ops = {
1227         .open =         snd_rme32_playback_spdif_open,
1228         .close =        snd_rme32_playback_close,
1229         .hw_params =    snd_rme32_playback_hw_params,
1230         .prepare =      snd_rme32_playback_prepare,
1231         .trigger =      snd_rme32_pcm_trigger,
1232         .pointer =      snd_rme32_playback_fd_pointer,
1233         .ack =          snd_rme32_playback_fd_ack,
1234 };
1235
1236 static const struct snd_pcm_ops snd_rme32_capture_spdif_fd_ops = {
1237         .open =         snd_rme32_capture_spdif_open,
1238         .close =        snd_rme32_capture_close,
1239         .hw_params =    snd_rme32_capture_hw_params,
1240         .prepare =      snd_rme32_capture_prepare,
1241         .trigger =      snd_rme32_pcm_trigger,
1242         .pointer =      snd_rme32_capture_fd_pointer,
1243         .ack =          snd_rme32_capture_fd_ack,
1244 };
1245
1246 static const struct snd_pcm_ops snd_rme32_playback_adat_fd_ops = {
1247         .open =         snd_rme32_playback_adat_open,
1248         .close =        snd_rme32_playback_close,
1249         .hw_params =    snd_rme32_playback_hw_params,
1250         .prepare =      snd_rme32_playback_prepare,
1251         .trigger =      snd_rme32_pcm_trigger,
1252         .pointer =      snd_rme32_playback_fd_pointer,
1253         .ack =          snd_rme32_playback_fd_ack,
1254 };
1255
1256 static const struct snd_pcm_ops snd_rme32_capture_adat_fd_ops = {
1257         .open =         snd_rme32_capture_adat_open,
1258         .close =        snd_rme32_capture_close,
1259         .hw_params =    snd_rme32_capture_hw_params,
1260         .prepare =      snd_rme32_capture_prepare,
1261         .trigger =      snd_rme32_pcm_trigger,
1262         .pointer =      snd_rme32_capture_fd_pointer,
1263         .ack =          snd_rme32_capture_fd_ack,
1264 };
1265
1266 static void snd_rme32_free(void *private_data)
1267 {
1268         struct rme32 *rme32 = (struct rme32 *) private_data;
1269
1270         if (rme32 == NULL) {
1271                 return;
1272         }
1273         if (rme32->irq >= 0) {
1274                 snd_rme32_pcm_stop(rme32, 0);
1275                 free_irq(rme32->irq, (void *) rme32);
1276                 rme32->irq = -1;
1277         }
1278         if (rme32->iobase) {
1279                 iounmap(rme32->iobase);
1280                 rme32->iobase = NULL;
1281         }
1282         if (rme32->port) {
1283                 pci_release_regions(rme32->pci);
1284                 rme32->port = 0;
1285         }
1286         pci_disable_device(rme32->pci);
1287 }
1288
1289 static void snd_rme32_free_spdif_pcm(struct snd_pcm *pcm)
1290 {
1291         struct rme32 *rme32 = (struct rme32 *) pcm->private_data;
1292         rme32->spdif_pcm = NULL;
1293 }
1294
1295 static void
1296 snd_rme32_free_adat_pcm(struct snd_pcm *pcm)
1297 {
1298         struct rme32 *rme32 = (struct rme32 *) pcm->private_data;
1299         rme32->adat_pcm = NULL;
1300 }
1301
1302 static int snd_rme32_create(struct rme32 *rme32)
1303 {
1304         struct pci_dev *pci = rme32->pci;
1305         int err;
1306
1307         rme32->irq = -1;
1308         spin_lock_init(&rme32->lock);
1309
1310         if ((err = pci_enable_device(pci)) < 0)
1311                 return err;
1312
1313         if ((err = pci_request_regions(pci, "RME32")) < 0)
1314                 return err;
1315         rme32->port = pci_resource_start(rme32->pci, 0);
1316
1317         rme32->iobase = ioremap(rme32->port, RME32_IO_SIZE);
1318         if (!rme32->iobase) {
1319                 dev_err(rme32->card->dev,
1320                         "unable to remap memory region 0x%lx-0x%lx\n",
1321                            rme32->port, rme32->port + RME32_IO_SIZE - 1);
1322                 return -ENOMEM;
1323         }
1324
1325         if (request_irq(pci->irq, snd_rme32_interrupt, IRQF_SHARED,
1326                         KBUILD_MODNAME, rme32)) {
1327                 dev_err(rme32->card->dev, "unable to grab IRQ %d\n", pci->irq);
1328                 return -EBUSY;
1329         }
1330         rme32->irq = pci->irq;
1331         rme32->card->sync_irq = rme32->irq;
1332
1333         /* read the card's revision number */
1334         pci_read_config_byte(pci, 8, &rme32->rev);
1335
1336         /* set up ALSA pcm device for S/PDIF */
1337         if ((err = snd_pcm_new(rme32->card, "Digi32 IEC958", 0, 1, 1, &rme32->spdif_pcm)) < 0) {
1338                 return err;
1339         }
1340         rme32->spdif_pcm->private_data = rme32;
1341         rme32->spdif_pcm->private_free = snd_rme32_free_spdif_pcm;
1342         strcpy(rme32->spdif_pcm->name, "Digi32 IEC958");
1343         if (rme32->fullduplex_mode) {
1344                 snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1345                                 &snd_rme32_playback_spdif_fd_ops);
1346                 snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_CAPTURE,
1347                                 &snd_rme32_capture_spdif_fd_ops);
1348                 snd_pcm_set_managed_buffer_all(rme32->spdif_pcm, SNDRV_DMA_TYPE_CONTINUOUS,
1349                                                NULL, 0, RME32_MID_BUFFER_SIZE);
1350                 rme32->spdif_pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1351         } else {
1352                 snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1353                                 &snd_rme32_playback_spdif_ops);
1354                 snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_CAPTURE,
1355                                 &snd_rme32_capture_spdif_ops);
1356                 rme32->spdif_pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
1357         }
1358
1359         /* set up ALSA pcm device for ADAT */
1360         if ((pci->device == PCI_DEVICE_ID_RME_DIGI32) ||
1361             (pci->device == PCI_DEVICE_ID_RME_DIGI32_PRO)) {
1362                 /* ADAT is not available on DIGI32 and DIGI32 Pro */
1363                 rme32->adat_pcm = NULL;
1364         }
1365         else {
1366                 if ((err = snd_pcm_new(rme32->card, "Digi32 ADAT", 1,
1367                                        1, 1, &rme32->adat_pcm)) < 0)
1368                 {
1369                         return err;
1370                 }
1371                 rme32->adat_pcm->private_data = rme32;
1372                 rme32->adat_pcm->private_free = snd_rme32_free_adat_pcm;
1373                 strcpy(rme32->adat_pcm->name, "Digi32 ADAT");
1374                 if (rme32->fullduplex_mode) {
1375                         snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1376                                         &snd_rme32_playback_adat_fd_ops);
1377                         snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_CAPTURE,
1378                                         &snd_rme32_capture_adat_fd_ops);
1379                         snd_pcm_set_managed_buffer_all(rme32->adat_pcm, SNDRV_DMA_TYPE_CONTINUOUS,
1380                                                        NULL,
1381                                                        0, RME32_MID_BUFFER_SIZE);
1382                         rme32->adat_pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1383                 } else {
1384                         snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1385                                         &snd_rme32_playback_adat_ops);
1386                         snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_CAPTURE,
1387                                         &snd_rme32_capture_adat_ops);
1388                         rme32->adat_pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
1389                 }
1390         }
1391
1392
1393         rme32->playback_periodsize = 0;
1394         rme32->capture_periodsize = 0;
1395
1396         /* make sure playback/capture is stopped, if by some reason active */
1397         snd_rme32_pcm_stop(rme32, 0);
1398
1399         /* reset DAC */
1400         snd_rme32_reset_dac(rme32);
1401
1402         /* reset buffer pointer */
1403         writel(0, rme32->iobase + RME32_IO_RESET_POS);
1404
1405         /* set default values in registers */
1406         rme32->wcreg = RME32_WCR_SEL |   /* normal playback */
1407                 RME32_WCR_INP_0 | /* input select */
1408                 RME32_WCR_MUTE;  /* muting on */
1409         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1410
1411
1412         /* init switch interface */
1413         if ((err = snd_rme32_create_switches(rme32->card, rme32)) < 0) {
1414                 return err;
1415         }
1416
1417         /* init proc interface */
1418         snd_rme32_proc_init(rme32);
1419
1420         rme32->capture_substream = NULL;
1421         rme32->playback_substream = NULL;
1422
1423         return 0;
1424 }
1425
1426 /*
1427  * proc interface
1428  */
1429
1430 static void
1431 snd_rme32_proc_read(struct snd_info_entry * entry, struct snd_info_buffer *buffer)
1432 {
1433         int n;
1434         struct rme32 *rme32 = (struct rme32 *) entry->private_data;
1435
1436         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
1437
1438         snd_iprintf(buffer, rme32->card->longname);
1439         snd_iprintf(buffer, " (index #%d)\n", rme32->card->number + 1);
1440
1441         snd_iprintf(buffer, "\nGeneral settings\n");
1442         if (rme32->fullduplex_mode)
1443                 snd_iprintf(buffer, "  Full-duplex mode\n");
1444         else
1445                 snd_iprintf(buffer, "  Half-duplex mode\n");
1446         if (RME32_PRO_WITH_8414(rme32)) {
1447                 snd_iprintf(buffer, "  receiver: CS8414\n");
1448         } else {
1449                 snd_iprintf(buffer, "  receiver: CS8412\n");
1450         }
1451         if (rme32->wcreg & RME32_WCR_MODE24) {
1452                 snd_iprintf(buffer, "  format: 24 bit");
1453         } else {
1454                 snd_iprintf(buffer, "  format: 16 bit");
1455         }
1456         if (rme32->wcreg & RME32_WCR_MONO) {
1457                 snd_iprintf(buffer, ", Mono\n");
1458         } else {
1459                 snd_iprintf(buffer, ", Stereo\n");
1460         }
1461
1462         snd_iprintf(buffer, "\nInput settings\n");
1463         switch (snd_rme32_getinputtype(rme32)) {
1464         case RME32_INPUT_OPTICAL:
1465                 snd_iprintf(buffer, "  input: optical");
1466                 break;
1467         case RME32_INPUT_COAXIAL:
1468                 snd_iprintf(buffer, "  input: coaxial");
1469                 break;
1470         case RME32_INPUT_INTERNAL:
1471                 snd_iprintf(buffer, "  input: internal");
1472                 break;
1473         case RME32_INPUT_XLR:
1474                 snd_iprintf(buffer, "  input: XLR");
1475                 break;
1476         }
1477         if (snd_rme32_capture_getrate(rme32, &n) < 0) {
1478                 snd_iprintf(buffer, "\n  sample rate: no valid signal\n");
1479         } else {
1480                 if (n) {
1481                         snd_iprintf(buffer, " (8 channels)\n");
1482                 } else {
1483                         snd_iprintf(buffer, " (2 channels)\n");
1484                 }
1485                 snd_iprintf(buffer, "  sample rate: %d Hz\n",
1486                             snd_rme32_capture_getrate(rme32, &n));
1487         }
1488
1489         snd_iprintf(buffer, "\nOutput settings\n");
1490         if (rme32->wcreg & RME32_WCR_SEL) {
1491                 snd_iprintf(buffer, "  output signal: normal playback");
1492         } else {
1493                 snd_iprintf(buffer, "  output signal: same as input");
1494         }
1495         if (rme32->wcreg & RME32_WCR_MUTE) {
1496                 snd_iprintf(buffer, " (muted)\n");
1497         } else {
1498                 snd_iprintf(buffer, "\n");
1499         }
1500
1501         /* master output frequency */
1502         if (!
1503             ((!(rme32->wcreg & RME32_WCR_FREQ_0))
1504              && (!(rme32->wcreg & RME32_WCR_FREQ_1)))) {
1505                 snd_iprintf(buffer, "  sample rate: %d Hz\n",
1506                             snd_rme32_playback_getrate(rme32));
1507         }
1508         if (rme32->rcreg & RME32_RCR_KMODE) {
1509                 snd_iprintf(buffer, "  sample clock source: AutoSync\n");
1510         } else {
1511                 snd_iprintf(buffer, "  sample clock source: Internal\n");
1512         }
1513         if (rme32->wcreg & RME32_WCR_PRO) {
1514                 snd_iprintf(buffer, "  format: AES/EBU (professional)\n");
1515         } else {
1516                 snd_iprintf(buffer, "  format: IEC958 (consumer)\n");
1517         }
1518         if (rme32->wcreg & RME32_WCR_EMP) {
1519                 snd_iprintf(buffer, "  emphasis: on\n");
1520         } else {
1521                 snd_iprintf(buffer, "  emphasis: off\n");
1522         }
1523 }
1524
1525 static void snd_rme32_proc_init(struct rme32 *rme32)
1526 {
1527         snd_card_ro_proc_new(rme32->card, "rme32", rme32, snd_rme32_proc_read);
1528 }
1529
1530 /*
1531  * control interface
1532  */
1533
1534 #define snd_rme32_info_loopback_control         snd_ctl_boolean_mono_info
1535
1536 static int
1537 snd_rme32_get_loopback_control(struct snd_kcontrol *kcontrol,
1538                                struct snd_ctl_elem_value *ucontrol)
1539 {
1540         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1541
1542         spin_lock_irq(&rme32->lock);
1543         ucontrol->value.integer.value[0] =
1544             rme32->wcreg & RME32_WCR_SEL ? 0 : 1;
1545         spin_unlock_irq(&rme32->lock);
1546         return 0;
1547 }
1548 static int
1549 snd_rme32_put_loopback_control(struct snd_kcontrol *kcontrol,
1550                                struct snd_ctl_elem_value *ucontrol)
1551 {
1552         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1553         unsigned int val;
1554         int change;
1555
1556         val = ucontrol->value.integer.value[0] ? 0 : RME32_WCR_SEL;
1557         spin_lock_irq(&rme32->lock);
1558         val = (rme32->wcreg & ~RME32_WCR_SEL) | val;
1559         change = val != rme32->wcreg;
1560         if (ucontrol->value.integer.value[0])
1561                 val &= ~RME32_WCR_MUTE;
1562         else
1563                 val |= RME32_WCR_MUTE;
1564         rme32->wcreg = val;
1565         writel(val, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1566         spin_unlock_irq(&rme32->lock);
1567         return change;
1568 }
1569
1570 static int
1571 snd_rme32_info_inputtype_control(struct snd_kcontrol *kcontrol,
1572                                  struct snd_ctl_elem_info *uinfo)
1573 {
1574         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1575         static const char * const texts[4] = {
1576                 "Optical", "Coaxial", "Internal", "XLR"
1577         };
1578         int num_items;
1579
1580         switch (rme32->pci->device) {
1581         case PCI_DEVICE_ID_RME_DIGI32:
1582         case PCI_DEVICE_ID_RME_DIGI32_8:
1583                 num_items = 3;
1584                 break;
1585         case PCI_DEVICE_ID_RME_DIGI32_PRO:
1586                 num_items = 4;
1587                 break;
1588         default:
1589                 snd_BUG();
1590                 return -EINVAL;
1591         }
1592         return snd_ctl_enum_info(uinfo, 1, num_items, texts);
1593 }
1594 static int
1595 snd_rme32_get_inputtype_control(struct snd_kcontrol *kcontrol,
1596                                 struct snd_ctl_elem_value *ucontrol)
1597 {
1598         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1599         unsigned int items = 3;
1600
1601         spin_lock_irq(&rme32->lock);
1602         ucontrol->value.enumerated.item[0] = snd_rme32_getinputtype(rme32);
1603
1604         switch (rme32->pci->device) {
1605         case PCI_DEVICE_ID_RME_DIGI32:
1606         case PCI_DEVICE_ID_RME_DIGI32_8:
1607                 items = 3;
1608                 break;
1609         case PCI_DEVICE_ID_RME_DIGI32_PRO:
1610                 items = 4;
1611                 break;
1612         default:
1613                 snd_BUG();
1614                 break;
1615         }
1616         if (ucontrol->value.enumerated.item[0] >= items) {
1617                 ucontrol->value.enumerated.item[0] = items - 1;
1618         }
1619
1620         spin_unlock_irq(&rme32->lock);
1621         return 0;
1622 }
1623 static int
1624 snd_rme32_put_inputtype_control(struct snd_kcontrol *kcontrol,
1625                                 struct snd_ctl_elem_value *ucontrol)
1626 {
1627         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1628         unsigned int val;
1629         int change, items = 3;
1630
1631         switch (rme32->pci->device) {
1632         case PCI_DEVICE_ID_RME_DIGI32:
1633         case PCI_DEVICE_ID_RME_DIGI32_8:
1634                 items = 3;
1635                 break;
1636         case PCI_DEVICE_ID_RME_DIGI32_PRO:
1637                 items = 4;
1638                 break;
1639         default:
1640                 snd_BUG();
1641                 break;
1642         }
1643         val = ucontrol->value.enumerated.item[0] % items;
1644
1645         spin_lock_irq(&rme32->lock);
1646         change = val != (unsigned int)snd_rme32_getinputtype(rme32);
1647         snd_rme32_setinputtype(rme32, val);
1648         spin_unlock_irq(&rme32->lock);
1649         return change;
1650 }
1651
1652 static int
1653 snd_rme32_info_clockmode_control(struct snd_kcontrol *kcontrol,
1654                                  struct snd_ctl_elem_info *uinfo)
1655 {
1656         static const char * const texts[4] = { "AutoSync",
1657                                   "Internal 32.0kHz",
1658                                   "Internal 44.1kHz",
1659                                   "Internal 48.0kHz" };
1660
1661         return snd_ctl_enum_info(uinfo, 1, 4, texts);
1662 }
1663 static int
1664 snd_rme32_get_clockmode_control(struct snd_kcontrol *kcontrol,
1665                                 struct snd_ctl_elem_value *ucontrol)
1666 {
1667         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1668
1669         spin_lock_irq(&rme32->lock);
1670         ucontrol->value.enumerated.item[0] = snd_rme32_getclockmode(rme32);
1671         spin_unlock_irq(&rme32->lock);
1672         return 0;
1673 }
1674 static int
1675 snd_rme32_put_clockmode_control(struct snd_kcontrol *kcontrol,
1676                                 struct snd_ctl_elem_value *ucontrol)
1677 {
1678         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1679         unsigned int val;
1680         int change;
1681
1682         val = ucontrol->value.enumerated.item[0] % 3;
1683         spin_lock_irq(&rme32->lock);
1684         change = val != (unsigned int)snd_rme32_getclockmode(rme32);
1685         snd_rme32_setclockmode(rme32, val);
1686         spin_unlock_irq(&rme32->lock);
1687         return change;
1688 }
1689
1690 static u32 snd_rme32_convert_from_aes(struct snd_aes_iec958 * aes)
1691 {
1692         u32 val = 0;
1693         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME32_WCR_PRO : 0;
1694         if (val & RME32_WCR_PRO)
1695                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME32_WCR_EMP : 0;
1696         else
1697                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME32_WCR_EMP : 0;
1698         return val;
1699 }
1700
1701 static void snd_rme32_convert_to_aes(struct snd_aes_iec958 * aes, u32 val)
1702 {
1703         aes->status[0] = ((val & RME32_WCR_PRO) ? IEC958_AES0_PROFESSIONAL : 0);
1704         if (val & RME32_WCR_PRO)
1705                 aes->status[0] |= (val & RME32_WCR_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
1706         else
1707                 aes->status[0] |= (val & RME32_WCR_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
1708 }
1709
1710 static int snd_rme32_control_spdif_info(struct snd_kcontrol *kcontrol,
1711                                         struct snd_ctl_elem_info *uinfo)
1712 {
1713         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1714         uinfo->count = 1;
1715         return 0;
1716 }
1717
1718 static int snd_rme32_control_spdif_get(struct snd_kcontrol *kcontrol,
1719                                        struct snd_ctl_elem_value *ucontrol)
1720 {
1721         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1722
1723         snd_rme32_convert_to_aes(&ucontrol->value.iec958,
1724                                  rme32->wcreg_spdif);
1725         return 0;
1726 }
1727
1728 static int snd_rme32_control_spdif_put(struct snd_kcontrol *kcontrol,
1729                                        struct snd_ctl_elem_value *ucontrol)
1730 {
1731         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1732         int change;
1733         u32 val;
1734
1735         val = snd_rme32_convert_from_aes(&ucontrol->value.iec958);
1736         spin_lock_irq(&rme32->lock);
1737         change = val != rme32->wcreg_spdif;
1738         rme32->wcreg_spdif = val;
1739         spin_unlock_irq(&rme32->lock);
1740         return change;
1741 }
1742
1743 static int snd_rme32_control_spdif_stream_info(struct snd_kcontrol *kcontrol,
1744                                                struct snd_ctl_elem_info *uinfo)
1745 {
1746         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1747         uinfo->count = 1;
1748         return 0;
1749 }
1750
1751 static int snd_rme32_control_spdif_stream_get(struct snd_kcontrol *kcontrol,
1752                                               struct snd_ctl_elem_value *
1753                                               ucontrol)
1754 {
1755         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1756
1757         snd_rme32_convert_to_aes(&ucontrol->value.iec958,
1758                                  rme32->wcreg_spdif_stream);
1759         return 0;
1760 }
1761
1762 static int snd_rme32_control_spdif_stream_put(struct snd_kcontrol *kcontrol,
1763                                               struct snd_ctl_elem_value *
1764                                               ucontrol)
1765 {
1766         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1767         int change;
1768         u32 val;
1769
1770         val = snd_rme32_convert_from_aes(&ucontrol->value.iec958);
1771         spin_lock_irq(&rme32->lock);
1772         change = val != rme32->wcreg_spdif_stream;
1773         rme32->wcreg_spdif_stream = val;
1774         rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
1775         rme32->wcreg |= val;
1776         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1777         spin_unlock_irq(&rme32->lock);
1778         return change;
1779 }
1780
1781 static int snd_rme32_control_spdif_mask_info(struct snd_kcontrol *kcontrol,
1782                                              struct snd_ctl_elem_info *uinfo)
1783 {
1784         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1785         uinfo->count = 1;
1786         return 0;
1787 }
1788
1789 static int snd_rme32_control_spdif_mask_get(struct snd_kcontrol *kcontrol,
1790                                             struct snd_ctl_elem_value *
1791                                             ucontrol)
1792 {
1793         ucontrol->value.iec958.status[0] = kcontrol->private_value;
1794         return 0;
1795 }
1796
1797 static const struct snd_kcontrol_new snd_rme32_controls[] = {
1798         {
1799                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1800                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1801                 .info = snd_rme32_control_spdif_info,
1802                 .get =  snd_rme32_control_spdif_get,
1803                 .put =  snd_rme32_control_spdif_put
1804         },
1805         {
1806                 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1807                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1808                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
1809                 .info = snd_rme32_control_spdif_stream_info,
1810                 .get =  snd_rme32_control_spdif_stream_get,
1811                 .put =  snd_rme32_control_spdif_stream_put
1812         },
1813         {
1814                 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1815                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1816                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1817                 .info = snd_rme32_control_spdif_mask_info,
1818                 .get =  snd_rme32_control_spdif_mask_get,
1819                 .private_value = IEC958_AES0_PROFESSIONAL | IEC958_AES0_CON_EMPHASIS
1820         },
1821         {
1822                 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1823                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1824                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1825                 .info = snd_rme32_control_spdif_mask_info,
1826                 .get =  snd_rme32_control_spdif_mask_get,
1827                 .private_value = IEC958_AES0_PROFESSIONAL | IEC958_AES0_PRO_EMPHASIS
1828         },
1829         {
1830                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1831                 .name = "Input Connector",
1832                 .info = snd_rme32_info_inputtype_control,
1833                 .get =  snd_rme32_get_inputtype_control,
1834                 .put =  snd_rme32_put_inputtype_control
1835         },
1836         {
1837                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1838                 .name = "Loopback Input",
1839                 .info = snd_rme32_info_loopback_control,
1840                 .get =  snd_rme32_get_loopback_control,
1841                 .put =  snd_rme32_put_loopback_control
1842         },
1843         {
1844                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1845                 .name = "Sample Clock Source",
1846                 .info = snd_rme32_info_clockmode_control,
1847                 .get =  snd_rme32_get_clockmode_control,
1848                 .put =  snd_rme32_put_clockmode_control
1849         }
1850 };
1851
1852 static int snd_rme32_create_switches(struct snd_card *card, struct rme32 * rme32)
1853 {
1854         int idx, err;
1855         struct snd_kcontrol *kctl;
1856
1857         for (idx = 0; idx < (int)ARRAY_SIZE(snd_rme32_controls); idx++) {
1858                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme32_controls[idx], rme32))) < 0)
1859                         return err;
1860                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
1861                         rme32->spdif_ctl = kctl;
1862         }
1863
1864         return 0;
1865 }
1866
1867 /*
1868  * Card initialisation
1869  */
1870
1871 static void snd_rme32_card_free(struct snd_card *card)
1872 {
1873         snd_rme32_free(card->private_data);
1874 }
1875
1876 static int
1877 snd_rme32_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
1878 {
1879         static int dev;
1880         struct rme32 *rme32;
1881         struct snd_card *card;
1882         int err;
1883
1884         if (dev >= SNDRV_CARDS) {
1885                 return -ENODEV;
1886         }
1887         if (!enable[dev]) {
1888                 dev++;
1889                 return -ENOENT;
1890         }
1891
1892         err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1893                            sizeof(struct rme32), &card);
1894         if (err < 0)
1895                 return err;
1896         card->private_free = snd_rme32_card_free;
1897         rme32 = (struct rme32 *) card->private_data;
1898         rme32->card = card;
1899         rme32->pci = pci;
1900         if (fullduplex[dev])
1901                 rme32->fullduplex_mode = 1;
1902         if ((err = snd_rme32_create(rme32)) < 0) {
1903                 snd_card_free(card);
1904                 return err;
1905         }
1906
1907         strcpy(card->driver, "Digi32");
1908         switch (rme32->pci->device) {
1909         case PCI_DEVICE_ID_RME_DIGI32:
1910                 strcpy(card->shortname, "RME Digi32");
1911                 break;
1912         case PCI_DEVICE_ID_RME_DIGI32_8:
1913                 strcpy(card->shortname, "RME Digi32/8");
1914                 break;
1915         case PCI_DEVICE_ID_RME_DIGI32_PRO:
1916                 strcpy(card->shortname, "RME Digi32 PRO");
1917                 break;
1918         }
1919         sprintf(card->longname, "%s (Rev. %d) at 0x%lx, irq %d",
1920                 card->shortname, rme32->rev, rme32->port, rme32->irq);
1921
1922         if ((err = snd_card_register(card)) < 0) {
1923                 snd_card_free(card);
1924                 return err;
1925         }
1926         pci_set_drvdata(pci, card);
1927         dev++;
1928         return 0;
1929 }
1930
1931 static void snd_rme32_remove(struct pci_dev *pci)
1932 {
1933         snd_card_free(pci_get_drvdata(pci));
1934 }
1935
1936 static struct pci_driver rme32_driver = {
1937         .name =         KBUILD_MODNAME,
1938         .id_table =     snd_rme32_ids,
1939         .probe =        snd_rme32_probe,
1940         .remove =       snd_rme32_remove,
1941 };
1942
1943 module_pci_driver(rme32_driver);