2 * Universal Interface for Intel High Definition Audio Codec
4 * HD audio interface patch for SigmaTel STAC92xx
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
7 * Matt Porter <mporter@embeddedalley.com>
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 #include <linux/init.h>
28 #include <linux/delay.h>
29 #include <linux/slab.h>
30 #include <linux/pci.h>
31 #include <linux/dmi.h>
32 #include <linux/module.h>
33 #include <sound/core.h>
34 #include <sound/jack.h>
35 #include <sound/tlv.h>
36 #include "hda_codec.h"
37 #include "hda_local.h"
38 #include "hda_auto_parser.h"
41 #include "hda_generic.h"
78 STAC_92HD73XX_NO_JD, /* no jack-detection */
91 STAC_92HD83XXX_PWR_REF,
93 STAC_DELL_VOSTRO_3500,
94 STAC_92HD83XXX_HP_cNB11_INTQUAD,
97 STAC_92HD83XXX_HP_LED,
98 STAC_92HD83XXX_HP_INV_LED,
99 STAC_92HD83XXX_HP_MIC_LED,
100 STAC_92HD83XXX_HEADSET_JACK,
104 STAC_92HD83XXX_MODELS
117 STAC_92HD71BXX_NO_DMIC,
118 STAC_92HD71BXX_NO_SMUX,
119 STAC_92HD71BXX_MODELS
149 STAC_922X_INTEL_MAC_GPIO,
154 STAC_D965_REF_NO_JD, /* no jack-detection */
163 STAC_DELL_BIOS_SPDIF,
174 struct sigmatel_spec {
175 struct hda_gen_spec gen;
177 unsigned int eapd_switch: 1;
178 unsigned int linear_tone_beep:1;
179 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
180 unsigned int volknob_init:1; /* special volume-knob initialization */
181 unsigned int powerdown_adcs:1;
182 unsigned int have_spdif_mux:1;
185 unsigned int eapd_mask;
186 unsigned int gpio_mask;
187 unsigned int gpio_dir;
188 unsigned int gpio_data;
189 unsigned int gpio_mute;
190 unsigned int gpio_led;
191 unsigned int gpio_led_polarity;
192 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
193 unsigned int vref_led;
194 int default_polarity;
196 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
197 bool mic_mute_led_on; /* current mic mute state */
200 unsigned int stream_delay;
202 /* analog loopback */
203 const struct snd_kcontrol_new *aloopback_ctl;
204 unsigned int aloopback;
205 unsigned char aloopback_mask;
206 unsigned char aloopback_shift;
208 /* power management */
209 unsigned int power_map_bits;
210 unsigned int num_pwrs;
211 const hda_nid_t *pwr_nids;
212 unsigned int active_adcs;
215 hda_nid_t anabeep_nid;
218 const char * const *spdif_labels;
219 struct hda_input_mux spdif_mux;
220 unsigned int cur_smux[2];
223 #define AC_VERB_IDT_SET_POWER_MAP 0x7ec
224 #define AC_VERB_IDT_GET_POWER_MAP 0xfec
226 static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
227 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
231 static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
232 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
236 static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
244 static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
245 struct hda_codec *codec,
246 struct snd_pcm_substream *substream,
249 struct sigmatel_spec *spec = codec->spec;
250 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
251 msleep(spec->stream_delay);
254 static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
255 struct hda_codec *codec,
256 struct snd_pcm_substream *substream,
259 struct sigmatel_spec *spec = codec->spec;
262 if (!spec->powerdown_adcs)
265 for (i = 0; i < spec->gen.num_all_adcs; i++) {
266 if (spec->gen.all_adcs[i] == hinfo->nid) {
273 case HDA_GEN_PCM_ACT_OPEN:
275 snd_hda_codec_write(codec, hinfo->nid, 0,
276 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
277 spec->active_adcs |= (1 << idx);
279 case HDA_GEN_PCM_ACT_CLOSE:
280 snd_hda_codec_write(codec, hinfo->nid, 0,
281 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
282 spec->active_adcs &= ~(1 << idx);
288 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
289 * funky external mute control using GPIO pins.
292 static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
293 unsigned int dir_mask, unsigned int data)
295 unsigned int gpiostate, gpiomask, gpiodir;
297 snd_printdd("%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
299 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
300 AC_VERB_GET_GPIO_DATA, 0);
301 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
303 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
304 AC_VERB_GET_GPIO_MASK, 0);
307 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
308 AC_VERB_GET_GPIO_DIRECTION, 0);
311 /* Configure GPIOx as CMOS */
312 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
314 snd_hda_codec_write(codec, codec->afg, 0,
315 AC_VERB_SET_GPIO_MASK, gpiomask);
316 snd_hda_codec_read(codec, codec->afg, 0,
317 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
321 snd_hda_codec_read(codec, codec->afg, 0,
322 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
325 /* hook for controlling mic-mute LED GPIO */
326 static void stac_capture_led_hook(struct hda_codec *codec,
327 struct snd_ctl_elem_value *ucontrol)
329 struct sigmatel_spec *spec = codec->spec;
335 mute = !(ucontrol->value.integer.value[0] ||
336 ucontrol->value.integer.value[1]);
337 if (spec->mic_mute_led_on != mute) {
338 spec->mic_mute_led_on = mute;
340 spec->gpio_data |= spec->mic_mute_led_gpio;
342 spec->gpio_data &= ~spec->mic_mute_led_gpio;
343 stac_gpio_set(codec, spec->gpio_mask,
344 spec->gpio_dir, spec->gpio_data);
348 static int stac_vrefout_set(struct hda_codec *codec,
349 hda_nid_t nid, unsigned int new_vref)
353 snd_printdd("%s, nid %x ctl %x\n", __func__, nid, new_vref);
354 pinctl = snd_hda_codec_read(codec, nid, 0,
355 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
361 pinctl &= ~AC_PINCTL_VREFEN;
362 pinctl |= (new_vref & AC_PINCTL_VREFEN);
364 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
371 /* update mute-LED accoring to the master switch */
372 static void stac_update_led_status(struct hda_codec *codec, int enabled)
374 struct sigmatel_spec *spec = codec->spec;
375 int muted = !enabled;
380 /* LED state is inverted on these systems */
381 if (spec->gpio_led_polarity)
384 if (!spec->vref_mute_led_nid) {
386 spec->gpio_data |= spec->gpio_led;
388 spec->gpio_data &= ~spec->gpio_led;
389 stac_gpio_set(codec, spec->gpio_mask,
390 spec->gpio_dir, spec->gpio_data);
392 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
393 stac_vrefout_set(codec, spec->vref_mute_led_nid,
398 /* vmaster hook to update mute LED */
399 static void stac_vmaster_hook(void *private_data, int val)
401 stac_update_led_status(private_data, val);
404 /* automute hook to handle GPIO mute and EAPD updates */
405 static void stac_update_outputs(struct hda_codec *codec)
407 struct sigmatel_spec *spec = codec->spec;
410 spec->gen.master_mute =
411 !(snd_hda_codec_read(codec, codec->afg, 0,
412 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
414 snd_hda_gen_update_outputs(codec);
416 if (spec->eapd_mask && spec->eapd_switch) {
417 unsigned int val = spec->gpio_data;
418 if (spec->gen.speaker_muted)
419 val &= ~spec->eapd_mask;
421 val |= spec->eapd_mask;
422 if (spec->gpio_data != val) {
423 spec->gpio_data = val;
424 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
430 static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
431 bool enable, bool do_write)
433 struct sigmatel_spec *spec = codec->spec;
434 unsigned int idx, val;
436 for (idx = 0; idx < spec->num_pwrs; idx++) {
437 if (spec->pwr_nids[idx] == nid)
440 if (idx >= spec->num_pwrs)
445 val = spec->power_map_bits;
451 /* power down unused output ports */
452 if (val != spec->power_map_bits) {
453 spec->power_map_bits = val;
455 snd_hda_codec_write(codec, codec->afg, 0,
456 AC_VERB_IDT_SET_POWER_MAP, val);
460 /* update power bit per jack plug/unplug */
461 static void jack_update_power(struct hda_codec *codec,
462 struct hda_jack_tbl *jack)
464 struct sigmatel_spec *spec = codec->spec;
470 if (jack && jack->nid) {
471 stac_toggle_power_map(codec, jack->nid,
472 snd_hda_jack_detect(codec, jack->nid),
477 /* update all jacks */
478 for (i = 0; i < spec->num_pwrs; i++) {
479 hda_nid_t nid = spec->pwr_nids[i];
480 jack = snd_hda_jack_tbl_get(codec, nid);
481 if (!jack || !jack->action)
483 if (jack->action == STAC_PWR_EVENT ||
484 jack->action <= HDA_GEN_LAST_EVENT)
485 stac_toggle_power_map(codec, nid,
486 snd_hda_jack_detect(codec, nid),
490 snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_IDT_SET_POWER_MAP,
491 spec->power_map_bits);
494 static void stac_hp_automute(struct hda_codec *codec,
495 struct hda_jack_tbl *jack)
497 snd_hda_gen_hp_automute(codec, jack);
498 jack_update_power(codec, jack);
501 static void stac_line_automute(struct hda_codec *codec,
502 struct hda_jack_tbl *jack)
504 snd_hda_gen_line_automute(codec, jack);
505 jack_update_power(codec, jack);
508 static void stac_mic_autoswitch(struct hda_codec *codec,
509 struct hda_jack_tbl *jack)
511 snd_hda_gen_mic_autoswitch(codec, jack);
512 jack_update_power(codec, jack);
515 static void stac_vref_event(struct hda_codec *codec, struct hda_jack_tbl *event)
519 data = snd_hda_codec_read(codec, codec->afg, 0,
520 AC_VERB_GET_GPIO_DATA, 0);
521 /* toggle VREF state based on GPIOx status */
522 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
523 !!(data & (1 << event->private_data)));
526 /* initialize the power map and enable the power event to jacks that
527 * haven't been assigned to automute
529 static void stac_init_power_map(struct hda_codec *codec)
531 struct sigmatel_spec *spec = codec->spec;
534 for (i = 0; i < spec->num_pwrs; i++) {
535 hda_nid_t nid = spec->pwr_nids[i];
536 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
537 def_conf = get_defcfg_connect(def_conf);
538 if (snd_hda_jack_tbl_get(codec, nid))
540 if (def_conf == AC_JACK_PORT_COMPLEX &&
541 !(spec->vref_mute_led_nid == nid ||
542 is_jack_detectable(codec, nid))) {
543 snd_hda_jack_detect_enable_callback(codec, nid,
547 if (def_conf == AC_JACK_PORT_NONE)
548 stac_toggle_power_map(codec, nid, false, false);
550 stac_toggle_power_map(codec, nid, true, false);
558 static inline bool get_int_hint(struct hda_codec *codec, const char *key,
561 return !snd_hda_get_int_hint(codec, key, valp);
564 /* override some hints from the hwdep entry */
565 static void stac_store_hints(struct hda_codec *codec)
567 struct sigmatel_spec *spec = codec->spec;
570 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
571 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
574 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
575 spec->gpio_mask &= spec->gpio_mask;
576 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
577 spec->gpio_dir &= spec->gpio_mask;
578 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
579 spec->eapd_mask &= spec->gpio_mask;
580 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
581 spec->gpio_mute &= spec->gpio_mask;
582 val = snd_hda_get_bool_hint(codec, "eapd_switch");
584 spec->eapd_switch = val;
591 #define stac_aloopback_info snd_ctl_boolean_mono_info
593 static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
594 struct snd_ctl_elem_value *ucontrol)
596 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
597 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
598 struct sigmatel_spec *spec = codec->spec;
600 ucontrol->value.integer.value[0] = !!(spec->aloopback &
601 (spec->aloopback_mask << idx));
605 static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
606 struct snd_ctl_elem_value *ucontrol)
608 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
609 struct sigmatel_spec *spec = codec->spec;
610 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
611 unsigned int dac_mode;
612 unsigned int val, idx_val;
614 idx_val = spec->aloopback_mask << idx;
615 if (ucontrol->value.integer.value[0])
616 val = spec->aloopback | idx_val;
618 val = spec->aloopback & ~idx_val;
619 if (spec->aloopback == val)
622 spec->aloopback = val;
624 /* Only return the bits defined by the shift value of the
625 * first two bytes of the mask
627 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
628 kcontrol->private_value & 0xFFFF, 0x0);
629 dac_mode >>= spec->aloopback_shift;
631 if (spec->aloopback & idx_val) {
632 snd_hda_power_up(codec);
635 snd_hda_power_down(codec);
636 dac_mode &= ~idx_val;
639 snd_hda_codec_write_cache(codec, codec->afg, 0,
640 kcontrol->private_value >> 16, dac_mode);
645 #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
647 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
648 .name = "Analog Loopback", \
650 .info = stac_aloopback_info, \
651 .get = stac_aloopback_get, \
652 .put = stac_aloopback_put, \
653 .private_value = verb_read | (verb_write << 16), \
657 * Mute LED handling on HP laptops
660 /* check whether it's a HP laptop with a docking port */
661 static bool hp_bnb2011_with_dock(struct hda_codec *codec)
663 if (codec->vendor_id != 0x111d7605 &&
664 codec->vendor_id != 0x111d76d1)
667 switch (codec->subsystem_id) {
701 static bool hp_blike_system(u32 subsystem_id)
703 switch (subsystem_id) {
730 static void set_hp_led_gpio(struct hda_codec *codec)
732 struct sigmatel_spec *spec = codec->spec;
738 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
739 gpio &= AC_GPIO_IO_COUNT;
741 spec->gpio_led = 0x08; /* GPIO 3 */
743 spec->gpio_led = 0x01; /* GPIO 0 */
747 * This method searches for the mute LED GPIO configuration
748 * provided as OEM string in SMBIOS. The format of that string
749 * is HP_Mute_LED_P_G or HP_Mute_LED_P
750 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
751 * that corresponds to the NOT muted state of the master volume
752 * and G is the index of the GPIO to use as the mute LED control (0..9)
753 * If _G portion is missing it is assigned based on the codec ID
755 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
756 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
759 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
760 * SMBIOS - at least the ones I have seen do not have them - which include
761 * my own system (HP Pavilion dv6-1110ax) and my cousin's
762 * HP Pavilion dv9500t CTO.
763 * Need more information on whether it is true across the entire series.
766 static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
768 struct sigmatel_spec *spec = codec->spec;
769 const struct dmi_device *dev = NULL;
771 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
772 get_int_hint(codec, "gpio_led_polarity",
773 &spec->gpio_led_polarity);
777 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
778 if (sscanf(dev->name, "HP_Mute_LED_%d_%x",
779 &spec->gpio_led_polarity,
780 &spec->gpio_led) == 2) {
781 unsigned int max_gpio;
782 max_gpio = snd_hda_param_read(codec, codec->afg,
784 max_gpio &= AC_GPIO_IO_COUNT;
785 if (spec->gpio_led < max_gpio)
786 spec->gpio_led = 1 << spec->gpio_led;
788 spec->vref_mute_led_nid = spec->gpio_led;
791 if (sscanf(dev->name, "HP_Mute_LED_%d",
792 &spec->gpio_led_polarity) == 1) {
793 set_hp_led_gpio(codec);
796 /* BIOS bug: unfilled OEM string */
797 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
798 set_hp_led_gpio(codec);
799 if (default_polarity >= 0)
800 spec->gpio_led_polarity = default_polarity;
802 spec->gpio_led_polarity = 1;
808 * Fallback case - if we don't find the DMI strings,
809 * we statically set the GPIO - if not a B-series system
810 * and default polarity is provided
812 if (!hp_blike_system(codec->subsystem_id) &&
813 (default_polarity == 0 || default_polarity == 1)) {
814 set_hp_led_gpio(codec);
815 spec->gpio_led_polarity = default_polarity;
821 /* check whether a built-in speaker is included in parsed pins */
822 static bool has_builtin_speaker(struct hda_codec *codec)
824 struct sigmatel_spec *spec = codec->spec;
828 if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
829 nid_pin = spec->gen.autocfg.line_out_pins;
830 nids = spec->gen.autocfg.line_outs;
832 nid_pin = spec->gen.autocfg.speaker_pins;
833 nids = spec->gen.autocfg.speaker_outs;
836 for (i = 0; i < nids; i++) {
837 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
838 if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
848 /* create PC beep volume controls */
849 static int stac_auto_create_beep_ctls(struct hda_codec *codec,
852 struct sigmatel_spec *spec = codec->spec;
853 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
854 struct snd_kcontrol_new *knew;
855 static struct snd_kcontrol_new abeep_mute_ctl =
856 HDA_CODEC_MUTE(NULL, 0, 0, 0);
857 static struct snd_kcontrol_new dbeep_mute_ctl =
858 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
859 static struct snd_kcontrol_new beep_vol_ctl =
860 HDA_CODEC_VOLUME(NULL, 0, 0, 0);
862 /* check for mute support for the the amp */
863 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
864 const struct snd_kcontrol_new *temp;
865 if (spec->anabeep_nid == nid)
866 temp = &abeep_mute_ctl;
868 temp = &dbeep_mute_ctl;
869 knew = snd_hda_gen_add_kctl(&spec->gen,
870 "Beep Playback Switch", temp);
873 knew->private_value =
874 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
877 /* check to see if there is volume support for the amp */
878 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
879 knew = snd_hda_gen_add_kctl(&spec->gen,
880 "Beep Playback Volume",
884 knew->private_value =
885 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
890 #ifdef CONFIG_SND_HDA_INPUT_BEEP
891 #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
893 static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
894 struct snd_ctl_elem_value *ucontrol)
896 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
897 ucontrol->value.integer.value[0] = codec->beep->enabled;
901 static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
902 struct snd_ctl_elem_value *ucontrol)
904 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
905 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
908 static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
909 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
910 .name = "Beep Playback Switch",
911 .info = stac_dig_beep_switch_info,
912 .get = stac_dig_beep_switch_get,
913 .put = stac_dig_beep_switch_put,
916 static int stac_beep_switch_ctl(struct hda_codec *codec)
918 struct sigmatel_spec *spec = codec->spec;
920 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
927 * SPDIF-out mux controls
930 static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
931 struct snd_ctl_elem_info *uinfo)
933 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
934 struct sigmatel_spec *spec = codec->spec;
935 return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
938 static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
939 struct snd_ctl_elem_value *ucontrol)
941 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
942 struct sigmatel_spec *spec = codec->spec;
943 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
945 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
949 static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
950 struct snd_ctl_elem_value *ucontrol)
952 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
953 struct sigmatel_spec *spec = codec->spec;
954 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
956 return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
957 spec->gen.autocfg.dig_out_pins[smux_idx],
958 &spec->cur_smux[smux_idx]);
961 static struct snd_kcontrol_new stac_smux_mixer = {
962 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
963 .name = "IEC958 Playback Source",
964 /* count set later */
965 .info = stac_smux_enum_info,
966 .get = stac_smux_enum_get,
967 .put = stac_smux_enum_put,
970 static const char * const stac_spdif_labels[] = {
971 "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
974 static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
976 struct sigmatel_spec *spec = codec->spec;
977 struct auto_pin_cfg *cfg = &spec->gen.autocfg;
978 const char * const *labels = spec->spdif_labels;
979 struct snd_kcontrol_new *kctl;
982 if (cfg->dig_outs < 1)
985 num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
990 labels = stac_spdif_labels;
991 for (i = 0; i < num_cons; i++) {
992 if (snd_BUG_ON(!labels[i]))
994 snd_hda_add_imux_item(&spec->spdif_mux, labels[i], i, NULL);
997 kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
1000 kctl->count = cfg->dig_outs;
1008 static const struct hda_verb stac9200_core_init[] = {
1009 /* set dac0mux for dac converter */
1010 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
1014 static const struct hda_verb stac9200_eapd_init[] = {
1015 /* set dac0mux for dac converter */
1016 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
1017 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1021 static const struct hda_verb dell_eq_core_init[] = {
1022 /* set master volume to max value without distortion
1023 * and direct control */
1024 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
1028 static const struct hda_verb stac92hd73xx_core_init[] = {
1029 /* set master volume and direct control */
1030 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1034 static const struct hda_verb stac92hd83xxx_core_init[] = {
1035 /* power state controls amps */
1036 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
1040 static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
1041 { 0x22, 0x785, 0x43 },
1042 { 0x22, 0x782, 0xe0 },
1043 { 0x22, 0x795, 0x00 },
1047 static const struct hda_verb stac92hd71bxx_core_init[] = {
1048 /* set master volume and direct control */
1049 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1053 static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
1054 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
1055 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1056 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1057 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1061 static const struct hda_verb stac925x_core_init[] = {
1062 /* set dac0mux for dac converter */
1063 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
1064 /* mute the master volume */
1065 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
1069 static const struct hda_verb stac922x_core_init[] = {
1070 /* set master volume and direct control */
1071 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1075 static const struct hda_verb d965_core_init[] = {
1076 /* unmute node 0x1b */
1077 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1078 /* select node 0x03 as DAC */
1079 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1083 static const struct hda_verb dell_3st_core_init[] = {
1084 /* don't set delta bit */
1085 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1086 /* unmute node 0x1b */
1087 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1088 /* select node 0x03 as DAC */
1089 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1093 static const struct hda_verb stac927x_core_init[] = {
1094 /* set master volume and direct control */
1095 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1096 /* enable analog pc beep path */
1097 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1101 static const struct hda_verb stac927x_volknob_core_init[] = {
1102 /* don't set delta bit */
1103 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1104 /* enable analog pc beep path */
1105 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1109 static const struct hda_verb stac9205_core_init[] = {
1110 /* set master volume and direct control */
1111 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1112 /* enable analog pc beep path */
1113 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1117 static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
1118 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
1120 static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
1121 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
1123 static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
1124 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
1126 static const struct snd_kcontrol_new stac92hd71bxx_loopback =
1127 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
1129 static const struct snd_kcontrol_new stac9205_loopback =
1130 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
1132 static const struct snd_kcontrol_new stac927x_loopback =
1133 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
1135 static const struct hda_pintbl ref9200_pin_configs[] = {
1136 { 0x08, 0x01c47010 },
1137 { 0x09, 0x01447010 },
1138 { 0x0d, 0x0221401f },
1139 { 0x0e, 0x01114010 },
1140 { 0x0f, 0x02a19020 },
1141 { 0x10, 0x01a19021 },
1142 { 0x11, 0x90100140 },
1143 { 0x12, 0x01813122 },
1147 static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
1148 { 0x08, 0x400000fe },
1149 { 0x09, 0x404500f4 },
1150 { 0x0d, 0x400100f0 },
1151 { 0x0e, 0x90110010 },
1152 { 0x0f, 0x400100f1 },
1153 { 0x10, 0x02a1902e },
1154 { 0x11, 0x500000f2 },
1155 { 0x12, 0x500000f3 },
1159 static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
1160 { 0x08, 0x400000fe },
1161 { 0x09, 0x404500f4 },
1162 { 0x0d, 0x400100f0 },
1163 { 0x0e, 0x90110010 },
1164 { 0x0f, 0x400100f1 },
1165 { 0x10, 0x02a1902e },
1166 { 0x11, 0x500000f2 },
1167 { 0x12, 0x500000f3 },
1172 STAC 9200 pin configs for
1177 static const struct hda_pintbl dell9200_d21_pin_configs[] = {
1178 { 0x08, 0x400001f0 },
1179 { 0x09, 0x400001f1 },
1180 { 0x0d, 0x02214030 },
1181 { 0x0e, 0x01014010 },
1182 { 0x0f, 0x02a19020 },
1183 { 0x10, 0x01a19021 },
1184 { 0x11, 0x90100140 },
1185 { 0x12, 0x01813122 },
1190 STAC 9200 pin configs for
1194 static const struct hda_pintbl dell9200_d22_pin_configs[] = {
1195 { 0x08, 0x400001f0 },
1196 { 0x09, 0x400001f1 },
1197 { 0x0d, 0x0221401f },
1198 { 0x0e, 0x01014010 },
1199 { 0x0f, 0x01813020 },
1200 { 0x10, 0x02a19021 },
1201 { 0x11, 0x90100140 },
1202 { 0x12, 0x400001f2 },
1207 STAC 9200 pin configs for
1208 102801C4 (Dell Dimension E310)
1215 static const struct hda_pintbl dell9200_d23_pin_configs[] = {
1216 { 0x08, 0x400001f0 },
1217 { 0x09, 0x400001f1 },
1218 { 0x0d, 0x0221401f },
1219 { 0x0e, 0x01014010 },
1220 { 0x0f, 0x01813020 },
1221 { 0x10, 0x01a19021 },
1222 { 0x11, 0x90100140 },
1223 { 0x12, 0x400001f2 },
1229 STAC 9200-32 pin configs for
1230 102801B5 (Dell Inspiron 630m)
1231 102801D8 (Dell Inspiron 640m)
1233 static const struct hda_pintbl dell9200_m21_pin_configs[] = {
1234 { 0x08, 0x40c003fa },
1235 { 0x09, 0x03441340 },
1236 { 0x0d, 0x0321121f },
1237 { 0x0e, 0x90170310 },
1238 { 0x0f, 0x408003fb },
1239 { 0x10, 0x03a11020 },
1240 { 0x11, 0x401003fc },
1241 { 0x12, 0x403003fd },
1246 STAC 9200-32 pin configs for
1247 102801C2 (Dell Latitude D620)
1249 102801CC (Dell Latitude D820)
1253 static const struct hda_pintbl dell9200_m22_pin_configs[] = {
1254 { 0x08, 0x40c003fa },
1255 { 0x09, 0x0144131f },
1256 { 0x0d, 0x0321121f },
1257 { 0x0e, 0x90170310 },
1258 { 0x0f, 0x90a70321 },
1259 { 0x10, 0x03a11020 },
1260 { 0x11, 0x401003fb },
1261 { 0x12, 0x40f000fc },
1266 STAC 9200-32 pin configs for
1267 102801CE (Dell XPS M1710)
1268 102801CF (Dell Precision M90)
1270 static const struct hda_pintbl dell9200_m23_pin_configs[] = {
1271 { 0x08, 0x40c003fa },
1272 { 0x09, 0x01441340 },
1273 { 0x0d, 0x0421421f },
1274 { 0x0e, 0x90170310 },
1275 { 0x0f, 0x408003fb },
1276 { 0x10, 0x04a1102e },
1277 { 0x11, 0x90170311 },
1278 { 0x12, 0x403003fc },
1283 STAC 9200-32 pin configs for
1286 102801CB (Dell Latitude 120L)
1289 static const struct hda_pintbl dell9200_m24_pin_configs[] = {
1290 { 0x08, 0x40c003fa },
1291 { 0x09, 0x404003fb },
1292 { 0x0d, 0x0321121f },
1293 { 0x0e, 0x90170310 },
1294 { 0x0f, 0x408003fc },
1295 { 0x10, 0x03a11020 },
1296 { 0x11, 0x401003fd },
1297 { 0x12, 0x403003fe },
1302 STAC 9200-32 pin configs for
1303 102801BD (Dell Inspiron E1505n)
1307 static const struct hda_pintbl dell9200_m25_pin_configs[] = {
1308 { 0x08, 0x40c003fa },
1309 { 0x09, 0x01441340 },
1310 { 0x0d, 0x0421121f },
1311 { 0x0e, 0x90170310 },
1312 { 0x0f, 0x408003fb },
1313 { 0x10, 0x04a11020 },
1314 { 0x11, 0x401003fc },
1315 { 0x12, 0x403003fd },
1320 STAC 9200-32 pin configs for
1321 102801F5 (Dell Inspiron 1501)
1324 static const struct hda_pintbl dell9200_m26_pin_configs[] = {
1325 { 0x08, 0x40c003fa },
1326 { 0x09, 0x404003fb },
1327 { 0x0d, 0x0421121f },
1328 { 0x0e, 0x90170310 },
1329 { 0x0f, 0x408003fc },
1330 { 0x10, 0x04a11020 },
1331 { 0x11, 0x401003fd },
1332 { 0x12, 0x403003fe },
1338 102801CD (Dell Inspiron E1705/9400)
1340 static const struct hda_pintbl dell9200_m27_pin_configs[] = {
1341 { 0x08, 0x40c003fa },
1342 { 0x09, 0x01441340 },
1343 { 0x0d, 0x0421121f },
1344 { 0x0e, 0x90170310 },
1345 { 0x0f, 0x90170310 },
1346 { 0x10, 0x04a11020 },
1347 { 0x11, 0x90170310 },
1348 { 0x12, 0x40f003fc },
1352 static const struct hda_pintbl oqo9200_pin_configs[] = {
1353 { 0x08, 0x40c000f0 },
1354 { 0x09, 0x404000f1 },
1355 { 0x0d, 0x0221121f },
1356 { 0x0e, 0x02211210 },
1357 { 0x0f, 0x90170111 },
1358 { 0x10, 0x90a70120 },
1359 { 0x11, 0x400000f2 },
1360 { 0x12, 0x400000f3 },
1365 static void stac9200_fixup_panasonic(struct hda_codec *codec,
1366 const struct hda_fixup *fix, int action)
1368 struct sigmatel_spec *spec = codec->spec;
1370 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
1371 spec->gpio_mask = spec->gpio_dir = 0x09;
1372 spec->gpio_data = 0x00;
1373 /* CF-74 has no headphone detection, and the driver should *NOT*
1374 * do detection and HP/speaker toggle because the hardware does it.
1376 spec->gen.suppress_auto_mute = 1;
1381 static const struct hda_fixup stac9200_fixups[] = {
1383 .type = HDA_FIXUP_PINS,
1384 .v.pins = ref9200_pin_configs,
1387 .type = HDA_FIXUP_PINS,
1388 .v.pins = oqo9200_pin_configs,
1390 .chain_id = STAC_9200_EAPD_INIT,
1392 [STAC_9200_DELL_D21] = {
1393 .type = HDA_FIXUP_PINS,
1394 .v.pins = dell9200_d21_pin_configs,
1396 [STAC_9200_DELL_D22] = {
1397 .type = HDA_FIXUP_PINS,
1398 .v.pins = dell9200_d22_pin_configs,
1400 [STAC_9200_DELL_D23] = {
1401 .type = HDA_FIXUP_PINS,
1402 .v.pins = dell9200_d23_pin_configs,
1404 [STAC_9200_DELL_M21] = {
1405 .type = HDA_FIXUP_PINS,
1406 .v.pins = dell9200_m21_pin_configs,
1408 [STAC_9200_DELL_M22] = {
1409 .type = HDA_FIXUP_PINS,
1410 .v.pins = dell9200_m22_pin_configs,
1412 [STAC_9200_DELL_M23] = {
1413 .type = HDA_FIXUP_PINS,
1414 .v.pins = dell9200_m23_pin_configs,
1416 [STAC_9200_DELL_M24] = {
1417 .type = HDA_FIXUP_PINS,
1418 .v.pins = dell9200_m24_pin_configs,
1420 [STAC_9200_DELL_M25] = {
1421 .type = HDA_FIXUP_PINS,
1422 .v.pins = dell9200_m25_pin_configs,
1424 [STAC_9200_DELL_M26] = {
1425 .type = HDA_FIXUP_PINS,
1426 .v.pins = dell9200_m26_pin_configs,
1428 [STAC_9200_DELL_M27] = {
1429 .type = HDA_FIXUP_PINS,
1430 .v.pins = dell9200_m27_pin_configs,
1433 .type = HDA_FIXUP_PINS,
1434 .v.pins = gateway9200_m4_pin_configs,
1436 .chain_id = STAC_9200_EAPD_INIT,
1438 [STAC_9200_M4_2] = {
1439 .type = HDA_FIXUP_PINS,
1440 .v.pins = gateway9200_m4_2_pin_configs,
1442 .chain_id = STAC_9200_EAPD_INIT,
1444 [STAC_9200_PANASONIC] = {
1445 .type = HDA_FIXUP_FUNC,
1446 .v.func = stac9200_fixup_panasonic,
1448 [STAC_9200_EAPD_INIT] = {
1449 .type = HDA_FIXUP_VERBS,
1450 .v.verbs = (const struct hda_verb[]) {
1451 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1457 static const struct hda_model_fixup stac9200_models[] = {
1458 { .id = STAC_REF, .name = "ref" },
1459 { .id = STAC_9200_OQO, .name = "oqo" },
1460 { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
1461 { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
1462 { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
1463 { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
1464 { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
1465 { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
1466 { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
1467 { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
1468 { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
1469 { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
1470 { .id = STAC_9200_M4, .name = "gateway-m4" },
1471 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
1472 { .id = STAC_9200_PANASONIC, .name = "panasonic" },
1476 static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
1477 /* SigmaTel reference board */
1478 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1479 "DFI LanParty", STAC_REF),
1480 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1481 "DFI LanParty", STAC_REF),
1482 /* Dell laptops have BIOS problem */
1483 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1484 "unknown Dell", STAC_9200_DELL_D21),
1485 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
1486 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1487 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1488 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1489 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1490 "unknown Dell", STAC_9200_DELL_D22),
1491 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1492 "unknown Dell", STAC_9200_DELL_D22),
1493 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
1494 "Dell Latitude D620", STAC_9200_DELL_M22),
1495 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1496 "unknown Dell", STAC_9200_DELL_D23),
1497 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1498 "unknown Dell", STAC_9200_DELL_D23),
1499 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1500 "unknown Dell", STAC_9200_DELL_M22),
1501 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1502 "unknown Dell", STAC_9200_DELL_M24),
1503 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1504 "unknown Dell", STAC_9200_DELL_M24),
1505 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
1506 "Dell Latitude 120L", STAC_9200_DELL_M24),
1507 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
1508 "Dell Latitude D820", STAC_9200_DELL_M22),
1509 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
1510 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
1511 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
1512 "Dell XPS M1710", STAC_9200_DELL_M23),
1513 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
1514 "Dell Precision M90", STAC_9200_DELL_M23),
1515 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1516 "unknown Dell", STAC_9200_DELL_M22),
1517 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1518 "unknown Dell", STAC_9200_DELL_M22),
1519 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
1520 "unknown Dell", STAC_9200_DELL_M22),
1521 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
1522 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1524 "unknown Dell", STAC_9200_DELL_D23),
1525 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1526 "unknown Dell", STAC_9200_DELL_D23),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1528 "unknown Dell", STAC_9200_DELL_D21),
1529 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1530 "unknown Dell", STAC_9200_DELL_D23),
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1532 "unknown Dell", STAC_9200_DELL_D21),
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1534 "unknown Dell", STAC_9200_DELL_M25),
1535 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1536 "unknown Dell", STAC_9200_DELL_M25),
1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
1538 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1540 "unknown Dell", STAC_9200_DELL_M26),
1542 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1543 /* Gateway machines needs EAPD to be set on resume */
1544 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1545 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1546 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
1548 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
1552 static const struct hda_pintbl ref925x_pin_configs[] = {
1553 { 0x07, 0x40c003f0 },
1554 { 0x08, 0x424503f2 },
1555 { 0x0a, 0x01813022 },
1556 { 0x0b, 0x02a19021 },
1557 { 0x0c, 0x90a70320 },
1558 { 0x0d, 0x02214210 },
1559 { 0x10, 0x01019020 },
1560 { 0x11, 0x9033032e },
1564 static const struct hda_pintbl stac925xM1_pin_configs[] = {
1565 { 0x07, 0x40c003f4 },
1566 { 0x08, 0x424503f2 },
1567 { 0x0a, 0x400000f3 },
1568 { 0x0b, 0x02a19020 },
1569 { 0x0c, 0x40a000f0 },
1570 { 0x0d, 0x90100210 },
1571 { 0x10, 0x400003f1 },
1572 { 0x11, 0x9033032e },
1576 static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
1577 { 0x07, 0x40c003f4 },
1578 { 0x08, 0x424503f2 },
1579 { 0x0a, 0x400000f3 },
1580 { 0x0b, 0x02a19020 },
1581 { 0x0c, 0x40a000f0 },
1582 { 0x0d, 0x90100210 },
1583 { 0x10, 0x400003f1 },
1584 { 0x11, 0x9033032e },
1588 static const struct hda_pintbl stac925xM2_pin_configs[] = {
1589 { 0x07, 0x40c003f4 },
1590 { 0x08, 0x424503f2 },
1591 { 0x0a, 0x400000f3 },
1592 { 0x0b, 0x02a19020 },
1593 { 0x0c, 0x40a000f0 },
1594 { 0x0d, 0x90100210 },
1595 { 0x10, 0x400003f1 },
1596 { 0x11, 0x9033032e },
1600 static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
1601 { 0x07, 0x40c003f4 },
1602 { 0x08, 0x424503f2 },
1603 { 0x0a, 0x400000f3 },
1604 { 0x0b, 0x02a19020 },
1605 { 0x0c, 0x40a000f0 },
1606 { 0x0d, 0x90100210 },
1607 { 0x10, 0x400003f1 },
1608 { 0x11, 0x9033032e },
1612 static const struct hda_pintbl stac925xM3_pin_configs[] = {
1613 { 0x07, 0x40c003f4 },
1614 { 0x08, 0x424503f2 },
1615 { 0x0a, 0x400000f3 },
1616 { 0x0b, 0x02a19020 },
1617 { 0x0c, 0x40a000f0 },
1618 { 0x0d, 0x90100210 },
1619 { 0x10, 0x400003f1 },
1620 { 0x11, 0x503303f3 },
1624 static const struct hda_pintbl stac925xM5_pin_configs[] = {
1625 { 0x07, 0x40c003f4 },
1626 { 0x08, 0x424503f2 },
1627 { 0x0a, 0x400000f3 },
1628 { 0x0b, 0x02a19020 },
1629 { 0x0c, 0x40a000f0 },
1630 { 0x0d, 0x90100210 },
1631 { 0x10, 0x400003f1 },
1632 { 0x11, 0x9033032e },
1636 static const struct hda_pintbl stac925xM6_pin_configs[] = {
1637 { 0x07, 0x40c003f4 },
1638 { 0x08, 0x424503f2 },
1639 { 0x0a, 0x400000f3 },
1640 { 0x0b, 0x02a19020 },
1641 { 0x0c, 0x40a000f0 },
1642 { 0x0d, 0x90100210 },
1643 { 0x10, 0x400003f1 },
1644 { 0x11, 0x90330320 },
1648 static const struct hda_fixup stac925x_fixups[] = {
1650 .type = HDA_FIXUP_PINS,
1651 .v.pins = ref925x_pin_configs,
1654 .type = HDA_FIXUP_PINS,
1655 .v.pins = stac925xM1_pin_configs,
1658 .type = HDA_FIXUP_PINS,
1659 .v.pins = stac925xM1_2_pin_configs,
1662 .type = HDA_FIXUP_PINS,
1663 .v.pins = stac925xM2_pin_configs,
1666 .type = HDA_FIXUP_PINS,
1667 .v.pins = stac925xM2_2_pin_configs,
1670 .type = HDA_FIXUP_PINS,
1671 .v.pins = stac925xM3_pin_configs,
1674 .type = HDA_FIXUP_PINS,
1675 .v.pins = stac925xM5_pin_configs,
1678 .type = HDA_FIXUP_PINS,
1679 .v.pins = stac925xM6_pin_configs,
1683 static const struct hda_model_fixup stac925x_models[] = {
1684 { .id = STAC_REF, .name = "ref" },
1685 { .id = STAC_M1, .name = "m1" },
1686 { .id = STAC_M1_2, .name = "m1-2" },
1687 { .id = STAC_M2, .name = "m2" },
1688 { .id = STAC_M2_2, .name = "m2-2" },
1689 { .id = STAC_M3, .name = "m3" },
1690 { .id = STAC_M5, .name = "m5" },
1691 { .id = STAC_M6, .name = "m6" },
1695 static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
1696 /* SigmaTel reference board */
1697 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
1698 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
1699 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
1701 /* Default table for unknown ID */
1702 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1704 /* gateway machines are checked via codec ssid */
1705 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1706 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1707 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1708 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
1709 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
1710 /* Not sure about the brand name for those */
1711 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1712 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1713 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1714 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
1718 static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
1719 { 0x0a, 0x02214030 },
1720 { 0x0b, 0x02a19040 },
1721 { 0x0c, 0x01a19020 },
1722 { 0x0d, 0x02214030 },
1723 { 0x0e, 0x0181302e },
1724 { 0x0f, 0x01014010 },
1725 { 0x10, 0x01014020 },
1726 { 0x11, 0x01014030 },
1727 { 0x12, 0x02319040 },
1728 { 0x13, 0x90a000f0 },
1729 { 0x14, 0x90a000f0 },
1730 { 0x22, 0x01452050 },
1731 { 0x23, 0x01452050 },
1735 static const struct hda_pintbl dell_m6_pin_configs[] = {
1736 { 0x0a, 0x0321101f },
1737 { 0x0b, 0x4f00000f },
1738 { 0x0c, 0x4f0000f0 },
1739 { 0x0d, 0x90170110 },
1740 { 0x0e, 0x03a11020 },
1741 { 0x0f, 0x0321101f },
1742 { 0x10, 0x4f0000f0 },
1743 { 0x11, 0x4f0000f0 },
1744 { 0x12, 0x4f0000f0 },
1745 { 0x13, 0x90a60160 },
1746 { 0x14, 0x4f0000f0 },
1747 { 0x22, 0x4f0000f0 },
1748 { 0x23, 0x4f0000f0 },
1752 static const struct hda_pintbl alienware_m17x_pin_configs[] = {
1753 { 0x0a, 0x0321101f },
1754 { 0x0b, 0x0321101f },
1755 { 0x0c, 0x03a11020 },
1756 { 0x0d, 0x03014020 },
1757 { 0x0e, 0x90170110 },
1758 { 0x0f, 0x4f0000f0 },
1759 { 0x10, 0x4f0000f0 },
1760 { 0x11, 0x4f0000f0 },
1761 { 0x12, 0x4f0000f0 },
1762 { 0x13, 0x90a60160 },
1763 { 0x14, 0x4f0000f0 },
1764 { 0x22, 0x4f0000f0 },
1765 { 0x23, 0x904601b0 },
1769 static const struct hda_pintbl intel_dg45id_pin_configs[] = {
1770 { 0x0a, 0x02214230 },
1771 { 0x0b, 0x02A19240 },
1772 { 0x0c, 0x01013214 },
1773 { 0x0d, 0x01014210 },
1774 { 0x0e, 0x01A19250 },
1775 { 0x0f, 0x01011212 },
1776 { 0x10, 0x01016211 },
1780 static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
1781 const struct hda_fixup *fix, int action)
1783 struct sigmatel_spec *spec = codec->spec;
1785 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1788 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
1789 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
1792 static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
1794 struct sigmatel_spec *spec = codec->spec;
1796 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
1797 spec->eapd_switch = 0;
1800 static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
1801 const struct hda_fixup *fix, int action)
1803 struct sigmatel_spec *spec = codec->spec;
1805 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1808 stac92hd73xx_fixup_dell(codec);
1809 snd_hda_add_verbs(codec, dell_eq_core_init);
1810 spec->volknob_init = 1;
1814 static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
1815 const struct hda_fixup *fix, int action)
1817 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1820 stac92hd73xx_fixup_dell(codec);
1821 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1825 static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
1826 const struct hda_fixup *fix, int action)
1828 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1831 stac92hd73xx_fixup_dell(codec);
1832 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1836 static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
1837 const struct hda_fixup *fix, int action)
1839 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1842 stac92hd73xx_fixup_dell(codec);
1843 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1844 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1847 static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
1848 const struct hda_fixup *fix, int action)
1850 struct sigmatel_spec *spec = codec->spec;
1852 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1855 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
1856 spec->eapd_switch = 0;
1859 static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
1860 const struct hda_fixup *fix, int action)
1862 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1863 codec->no_jack_detect = 1;
1866 static const struct hda_fixup stac92hd73xx_fixups[] = {
1867 [STAC_92HD73XX_REF] = {
1868 .type = HDA_FIXUP_FUNC,
1869 .v.func = stac92hd73xx_fixup_ref,
1871 [STAC_DELL_M6_AMIC] = {
1872 .type = HDA_FIXUP_FUNC,
1873 .v.func = stac92hd73xx_fixup_dell_m6_amic,
1875 [STAC_DELL_M6_DMIC] = {
1876 .type = HDA_FIXUP_FUNC,
1877 .v.func = stac92hd73xx_fixup_dell_m6_dmic,
1879 [STAC_DELL_M6_BOTH] = {
1880 .type = HDA_FIXUP_FUNC,
1881 .v.func = stac92hd73xx_fixup_dell_m6_both,
1884 .type = HDA_FIXUP_FUNC,
1885 .v.func = stac92hd73xx_fixup_dell_eq,
1887 [STAC_ALIENWARE_M17X] = {
1888 .type = HDA_FIXUP_FUNC,
1889 .v.func = stac92hd73xx_fixup_alienware_m17x,
1891 [STAC_92HD73XX_INTEL] = {
1892 .type = HDA_FIXUP_PINS,
1893 .v.pins = intel_dg45id_pin_configs,
1895 [STAC_92HD73XX_NO_JD] = {
1896 .type = HDA_FIXUP_FUNC,
1897 .v.func = stac92hd73xx_fixup_no_jd,
1901 static const struct hda_model_fixup stac92hd73xx_models[] = {
1902 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
1903 { .id = STAC_92HD73XX_REF, .name = "ref" },
1904 { .id = STAC_92HD73XX_INTEL, .name = "intel" },
1905 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
1906 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
1907 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
1908 { .id = STAC_DELL_EQ, .name = "dell-eq" },
1909 { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
1913 static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
1914 /* SigmaTel reference board */
1915 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1916 "DFI LanParty", STAC_92HD73XX_REF),
1917 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1918 "DFI LanParty", STAC_92HD73XX_REF),
1919 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1920 "Intel DG45ID", STAC_92HD73XX_INTEL),
1921 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1922 "Intel DG45FC", STAC_92HD73XX_INTEL),
1923 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1924 "Dell Studio 1535", STAC_DELL_M6_DMIC),
1925 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1926 "unknown Dell", STAC_DELL_M6_DMIC),
1927 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1928 "unknown Dell", STAC_DELL_M6_BOTH),
1929 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1930 "unknown Dell", STAC_DELL_M6_BOTH),
1931 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1932 "unknown Dell", STAC_DELL_M6_AMIC),
1933 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1934 "unknown Dell", STAC_DELL_M6_AMIC),
1935 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1936 "unknown Dell", STAC_DELL_M6_DMIC),
1937 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1938 "unknown Dell", STAC_DELL_M6_DMIC),
1939 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
1940 "Dell Studio 1537", STAC_DELL_M6_DMIC),
1941 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1942 "Dell Studio 17", STAC_DELL_M6_DMIC),
1943 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1944 "Dell Studio 1555", STAC_DELL_M6_DMIC),
1945 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1946 "Dell Studio 1557", STAC_DELL_M6_DMIC),
1947 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1948 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
1949 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
1950 "Dell Studio 1558", STAC_DELL_M6_DMIC),
1951 /* codec SSID matching */
1952 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1953 "Alienware M17x", STAC_ALIENWARE_M17X),
1954 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1955 "Alienware M17x", STAC_ALIENWARE_M17X),
1956 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
1957 "Alienware M17x R3", STAC_DELL_EQ),
1961 static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
1962 { 0x0a, 0x02214030 },
1963 { 0x0b, 0x02211010 },
1964 { 0x0c, 0x02a19020 },
1965 { 0x0d, 0x02170130 },
1966 { 0x0e, 0x01014050 },
1967 { 0x0f, 0x01819040 },
1968 { 0x10, 0x01014020 },
1969 { 0x11, 0x90a3014e },
1970 { 0x1f, 0x01451160 },
1971 { 0x20, 0x98560170 },
1975 static const struct hda_pintbl dell_s14_pin_configs[] = {
1976 { 0x0a, 0x0221403f },
1977 { 0x0b, 0x0221101f },
1978 { 0x0c, 0x02a19020 },
1979 { 0x0d, 0x90170110 },
1980 { 0x0e, 0x40f000f0 },
1981 { 0x0f, 0x40f000f0 },
1982 { 0x10, 0x40f000f0 },
1983 { 0x11, 0x90a60160 },
1984 { 0x1f, 0x40f000f0 },
1985 { 0x20, 0x40f000f0 },
1989 static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
1990 { 0x0a, 0x02a11020 },
1991 { 0x0b, 0x0221101f },
1992 { 0x0c, 0x400000f0 },
1993 { 0x0d, 0x90170110 },
1994 { 0x0e, 0x400000f1 },
1995 { 0x0f, 0x400000f2 },
1996 { 0x10, 0x400000f3 },
1997 { 0x11, 0x90a60160 },
1998 { 0x1f, 0x400000f4 },
1999 { 0x20, 0x400000f5 },
2003 static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
2004 { 0x0a, 0x03a12050 },
2005 { 0x0b, 0x0321201f },
2006 { 0x0c, 0x40f000f0 },
2007 { 0x0d, 0x90170110 },
2008 { 0x0e, 0x40f000f0 },
2009 { 0x0f, 0x40f000f0 },
2010 { 0x10, 0x90170110 },
2011 { 0x11, 0xd5a30140 },
2012 { 0x1f, 0x40f000f0 },
2013 { 0x20, 0x40f000f0 },
2017 static const struct hda_pintbl hp_zephyr_pin_configs[] = {
2018 { 0x0a, 0x01813050 },
2019 { 0x0b, 0x0421201f },
2020 { 0x0c, 0x04a1205e },
2021 { 0x0d, 0x96130310 },
2022 { 0x0e, 0x96130310 },
2023 { 0x0f, 0x0101401f },
2024 { 0x10, 0x1111611f },
2025 { 0x11, 0xd5a30130 },
2029 static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
2030 { 0x0a, 0x40f000f0 },
2031 { 0x0b, 0x0221101f },
2032 { 0x0c, 0x02a11020 },
2033 { 0x0d, 0x92170110 },
2034 { 0x0e, 0x40f000f0 },
2035 { 0x0f, 0x92170110 },
2036 { 0x10, 0x40f000f0 },
2037 { 0x11, 0xd5a30130 },
2038 { 0x1f, 0x40f000f0 },
2039 { 0x20, 0x40f000f0 },
2043 static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
2044 const struct hda_fixup *fix, int action)
2046 struct sigmatel_spec *spec = codec->spec;
2048 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2051 if (hp_bnb2011_with_dock(codec)) {
2052 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
2053 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
2056 if (find_mute_led_cfg(codec, spec->default_polarity))
2057 snd_printd("mute LED gpio %d polarity %d\n",
2059 spec->gpio_led_polarity);
2062 static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
2063 const struct hda_fixup *fix, int action)
2065 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2068 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
2069 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
2072 static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
2073 const struct hda_fixup *fix, int action)
2075 struct sigmatel_spec *spec = codec->spec;
2077 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2078 spec->default_polarity = 0;
2081 static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
2082 const struct hda_fixup *fix, int action)
2084 struct sigmatel_spec *spec = codec->spec;
2086 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2087 spec->default_polarity = 1;
2090 static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
2091 const struct hda_fixup *fix, int action)
2093 struct sigmatel_spec *spec = codec->spec;
2095 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2096 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
2097 codec->bus->avoid_link_reset = 1;
2101 static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
2102 const struct hda_fixup *fix, int action)
2104 struct sigmatel_spec *spec = codec->spec;
2106 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2107 spec->headset_jack = 1;
2110 static const struct hda_verb hp_bnb13_eq_verbs[] = {
2112 { 0x22, 0x7A6, 0x3E },
2113 { 0x22, 0x7A7, 0x68 },
2114 { 0x22, 0x7A8, 0x17 },
2115 { 0x22, 0x7A9, 0x3E },
2116 { 0x22, 0x7AA, 0x68 },
2117 { 0x22, 0x7AB, 0x17 },
2118 { 0x22, 0x7AC, 0x00 },
2119 { 0x22, 0x7AD, 0x80 },
2120 { 0x22, 0x7A6, 0x83 },
2121 { 0x22, 0x7A7, 0x2F },
2122 { 0x22, 0x7A8, 0xD1 },
2123 { 0x22, 0x7A9, 0x83 },
2124 { 0x22, 0x7AA, 0x2F },
2125 { 0x22, 0x7AB, 0xD1 },
2126 { 0x22, 0x7AC, 0x01 },
2127 { 0x22, 0x7AD, 0x80 },
2128 { 0x22, 0x7A6, 0x3E },
2129 { 0x22, 0x7A7, 0x68 },
2130 { 0x22, 0x7A8, 0x17 },
2131 { 0x22, 0x7A9, 0x3E },
2132 { 0x22, 0x7AA, 0x68 },
2133 { 0x22, 0x7AB, 0x17 },
2134 { 0x22, 0x7AC, 0x02 },
2135 { 0x22, 0x7AD, 0x80 },
2136 { 0x22, 0x7A6, 0x7C },
2137 { 0x22, 0x7A7, 0xC6 },
2138 { 0x22, 0x7A8, 0x0C },
2139 { 0x22, 0x7A9, 0x7C },
2140 { 0x22, 0x7AA, 0xC6 },
2141 { 0x22, 0x7AB, 0x0C },
2142 { 0x22, 0x7AC, 0x03 },
2143 { 0x22, 0x7AD, 0x80 },
2144 { 0x22, 0x7A6, 0xC3 },
2145 { 0x22, 0x7A7, 0x25 },
2146 { 0x22, 0x7A8, 0xAF },
2147 { 0x22, 0x7A9, 0xC3 },
2148 { 0x22, 0x7AA, 0x25 },
2149 { 0x22, 0x7AB, 0xAF },
2150 { 0x22, 0x7AC, 0x04 },
2151 { 0x22, 0x7AD, 0x80 },
2152 { 0x22, 0x7A6, 0x3E },
2153 { 0x22, 0x7A7, 0x85 },
2154 { 0x22, 0x7A8, 0x73 },
2155 { 0x22, 0x7A9, 0x3E },
2156 { 0x22, 0x7AA, 0x85 },
2157 { 0x22, 0x7AB, 0x73 },
2158 { 0x22, 0x7AC, 0x05 },
2159 { 0x22, 0x7AD, 0x80 },
2160 { 0x22, 0x7A6, 0x85 },
2161 { 0x22, 0x7A7, 0x39 },
2162 { 0x22, 0x7A8, 0xC7 },
2163 { 0x22, 0x7A9, 0x85 },
2164 { 0x22, 0x7AA, 0x39 },
2165 { 0x22, 0x7AB, 0xC7 },
2166 { 0x22, 0x7AC, 0x06 },
2167 { 0x22, 0x7AD, 0x80 },
2168 { 0x22, 0x7A6, 0x3C },
2169 { 0x22, 0x7A7, 0x90 },
2170 { 0x22, 0x7A8, 0xB0 },
2171 { 0x22, 0x7A9, 0x3C },
2172 { 0x22, 0x7AA, 0x90 },
2173 { 0x22, 0x7AB, 0xB0 },
2174 { 0x22, 0x7AC, 0x07 },
2175 { 0x22, 0x7AD, 0x80 },
2176 { 0x22, 0x7A6, 0x7A },
2177 { 0x22, 0x7A7, 0xC6 },
2178 { 0x22, 0x7A8, 0x39 },
2179 { 0x22, 0x7A9, 0x7A },
2180 { 0x22, 0x7AA, 0xC6 },
2181 { 0x22, 0x7AB, 0x39 },
2182 { 0x22, 0x7AC, 0x08 },
2183 { 0x22, 0x7AD, 0x80 },
2184 { 0x22, 0x7A6, 0xC4 },
2185 { 0x22, 0x7A7, 0xE9 },
2186 { 0x22, 0x7A8, 0xDC },
2187 { 0x22, 0x7A9, 0xC4 },
2188 { 0x22, 0x7AA, 0xE9 },
2189 { 0x22, 0x7AB, 0xDC },
2190 { 0x22, 0x7AC, 0x09 },
2191 { 0x22, 0x7AD, 0x80 },
2192 { 0x22, 0x7A6, 0x3D },
2193 { 0x22, 0x7A7, 0xE1 },
2194 { 0x22, 0x7A8, 0x0D },
2195 { 0x22, 0x7A9, 0x3D },
2196 { 0x22, 0x7AA, 0xE1 },
2197 { 0x22, 0x7AB, 0x0D },
2198 { 0x22, 0x7AC, 0x0A },
2199 { 0x22, 0x7AD, 0x80 },
2200 { 0x22, 0x7A6, 0x89 },
2201 { 0x22, 0x7A7, 0xB6 },
2202 { 0x22, 0x7A8, 0xEB },
2203 { 0x22, 0x7A9, 0x89 },
2204 { 0x22, 0x7AA, 0xB6 },
2205 { 0x22, 0x7AB, 0xEB },
2206 { 0x22, 0x7AC, 0x0B },
2207 { 0x22, 0x7AD, 0x80 },
2208 { 0x22, 0x7A6, 0x39 },
2209 { 0x22, 0x7A7, 0x9D },
2210 { 0x22, 0x7A8, 0xFE },
2211 { 0x22, 0x7A9, 0x39 },
2212 { 0x22, 0x7AA, 0x9D },
2213 { 0x22, 0x7AB, 0xFE },
2214 { 0x22, 0x7AC, 0x0C },
2215 { 0x22, 0x7AD, 0x80 },
2216 { 0x22, 0x7A6, 0x76 },
2217 { 0x22, 0x7A7, 0x49 },
2218 { 0x22, 0x7A8, 0x15 },
2219 { 0x22, 0x7A9, 0x76 },
2220 { 0x22, 0x7AA, 0x49 },
2221 { 0x22, 0x7AB, 0x15 },
2222 { 0x22, 0x7AC, 0x0D },
2223 { 0x22, 0x7AD, 0x80 },
2224 { 0x22, 0x7A6, 0xC8 },
2225 { 0x22, 0x7A7, 0x80 },
2226 { 0x22, 0x7A8, 0xF5 },
2227 { 0x22, 0x7A9, 0xC8 },
2228 { 0x22, 0x7AA, 0x80 },
2229 { 0x22, 0x7AB, 0xF5 },
2230 { 0x22, 0x7AC, 0x0E },
2231 { 0x22, 0x7AD, 0x80 },
2232 { 0x22, 0x7A6, 0x40 },
2233 { 0x22, 0x7A7, 0x00 },
2234 { 0x22, 0x7A8, 0x00 },
2235 { 0x22, 0x7A9, 0x40 },
2236 { 0x22, 0x7AA, 0x00 },
2237 { 0x22, 0x7AB, 0x00 },
2238 { 0x22, 0x7AC, 0x0F },
2239 { 0x22, 0x7AD, 0x80 },
2240 { 0x22, 0x7A6, 0x90 },
2241 { 0x22, 0x7A7, 0x68 },
2242 { 0x22, 0x7A8, 0xF1 },
2243 { 0x22, 0x7A9, 0x90 },
2244 { 0x22, 0x7AA, 0x68 },
2245 { 0x22, 0x7AB, 0xF1 },
2246 { 0x22, 0x7AC, 0x10 },
2247 { 0x22, 0x7AD, 0x80 },
2248 { 0x22, 0x7A6, 0x34 },
2249 { 0x22, 0x7A7, 0x47 },
2250 { 0x22, 0x7A8, 0x6C },
2251 { 0x22, 0x7A9, 0x34 },
2252 { 0x22, 0x7AA, 0x47 },
2253 { 0x22, 0x7AB, 0x6C },
2254 { 0x22, 0x7AC, 0x11 },
2255 { 0x22, 0x7AD, 0x80 },
2256 { 0x22, 0x7A6, 0x6F },
2257 { 0x22, 0x7A7, 0x97 },
2258 { 0x22, 0x7A8, 0x0F },
2259 { 0x22, 0x7A9, 0x6F },
2260 { 0x22, 0x7AA, 0x97 },
2261 { 0x22, 0x7AB, 0x0F },
2262 { 0x22, 0x7AC, 0x12 },
2263 { 0x22, 0x7AD, 0x80 },
2264 { 0x22, 0x7A6, 0xCB },
2265 { 0x22, 0x7A7, 0xB8 },
2266 { 0x22, 0x7A8, 0x94 },
2267 { 0x22, 0x7A9, 0xCB },
2268 { 0x22, 0x7AA, 0xB8 },
2269 { 0x22, 0x7AB, 0x94 },
2270 { 0x22, 0x7AC, 0x13 },
2271 { 0x22, 0x7AD, 0x80 },
2272 { 0x22, 0x7A6, 0x40 },
2273 { 0x22, 0x7A7, 0x00 },
2274 { 0x22, 0x7A8, 0x00 },
2275 { 0x22, 0x7A9, 0x40 },
2276 { 0x22, 0x7AA, 0x00 },
2277 { 0x22, 0x7AB, 0x00 },
2278 { 0x22, 0x7AC, 0x14 },
2279 { 0x22, 0x7AD, 0x80 },
2280 { 0x22, 0x7A6, 0x95 },
2281 { 0x22, 0x7A7, 0x76 },
2282 { 0x22, 0x7A8, 0x5B },
2283 { 0x22, 0x7A9, 0x95 },
2284 { 0x22, 0x7AA, 0x76 },
2285 { 0x22, 0x7AB, 0x5B },
2286 { 0x22, 0x7AC, 0x15 },
2287 { 0x22, 0x7AD, 0x80 },
2288 { 0x22, 0x7A6, 0x31 },
2289 { 0x22, 0x7A7, 0xAC },
2290 { 0x22, 0x7A8, 0x31 },
2291 { 0x22, 0x7A9, 0x31 },
2292 { 0x22, 0x7AA, 0xAC },
2293 { 0x22, 0x7AB, 0x31 },
2294 { 0x22, 0x7AC, 0x16 },
2295 { 0x22, 0x7AD, 0x80 },
2296 { 0x22, 0x7A6, 0x6A },
2297 { 0x22, 0x7A7, 0x89 },
2298 { 0x22, 0x7A8, 0xA5 },
2299 { 0x22, 0x7A9, 0x6A },
2300 { 0x22, 0x7AA, 0x89 },
2301 { 0x22, 0x7AB, 0xA5 },
2302 { 0x22, 0x7AC, 0x17 },
2303 { 0x22, 0x7AD, 0x80 },
2304 { 0x22, 0x7A6, 0xCE },
2305 { 0x22, 0x7A7, 0x53 },
2306 { 0x22, 0x7A8, 0xCF },
2307 { 0x22, 0x7A9, 0xCE },
2308 { 0x22, 0x7AA, 0x53 },
2309 { 0x22, 0x7AB, 0xCF },
2310 { 0x22, 0x7AC, 0x18 },
2311 { 0x22, 0x7AD, 0x80 },
2312 { 0x22, 0x7A6, 0x40 },
2313 { 0x22, 0x7A7, 0x00 },
2314 { 0x22, 0x7A8, 0x00 },
2315 { 0x22, 0x7A9, 0x40 },
2316 { 0x22, 0x7AA, 0x00 },
2317 { 0x22, 0x7AB, 0x00 },
2318 { 0x22, 0x7AC, 0x19 },
2319 { 0x22, 0x7AD, 0x80 },
2321 { 0x22, 0x7A6, 0x3E },
2322 { 0x22, 0x7A7, 0x88 },
2323 { 0x22, 0x7A8, 0xDC },
2324 { 0x22, 0x7A9, 0x3E },
2325 { 0x22, 0x7AA, 0x88 },
2326 { 0x22, 0x7AB, 0xDC },
2327 { 0x22, 0x7AC, 0x1A },
2328 { 0x22, 0x7AD, 0x80 },
2329 { 0x22, 0x7A6, 0x82 },
2330 { 0x22, 0x7A7, 0xEE },
2331 { 0x22, 0x7A8, 0x46 },
2332 { 0x22, 0x7A9, 0x82 },
2333 { 0x22, 0x7AA, 0xEE },
2334 { 0x22, 0x7AB, 0x46 },
2335 { 0x22, 0x7AC, 0x1B },
2336 { 0x22, 0x7AD, 0x80 },
2337 { 0x22, 0x7A6, 0x3E },
2338 { 0x22, 0x7A7, 0x88 },
2339 { 0x22, 0x7A8, 0xDC },
2340 { 0x22, 0x7A9, 0x3E },
2341 { 0x22, 0x7AA, 0x88 },
2342 { 0x22, 0x7AB, 0xDC },
2343 { 0x22, 0x7AC, 0x1C },
2344 { 0x22, 0x7AD, 0x80 },
2345 { 0x22, 0x7A6, 0x7D },
2346 { 0x22, 0x7A7, 0x09 },
2347 { 0x22, 0x7A8, 0x28 },
2348 { 0x22, 0x7A9, 0x7D },
2349 { 0x22, 0x7AA, 0x09 },
2350 { 0x22, 0x7AB, 0x28 },
2351 { 0x22, 0x7AC, 0x1D },
2352 { 0x22, 0x7AD, 0x80 },
2353 { 0x22, 0x7A6, 0xC2 },
2354 { 0x22, 0x7A7, 0xE5 },
2355 { 0x22, 0x7A8, 0xB4 },
2356 { 0x22, 0x7A9, 0xC2 },
2357 { 0x22, 0x7AA, 0xE5 },
2358 { 0x22, 0x7AB, 0xB4 },
2359 { 0x22, 0x7AC, 0x1E },
2360 { 0x22, 0x7AD, 0x80 },
2361 { 0x22, 0x7A6, 0x3E },
2362 { 0x22, 0x7A7, 0xA3 },
2363 { 0x22, 0x7A8, 0x1F },
2364 { 0x22, 0x7A9, 0x3E },
2365 { 0x22, 0x7AA, 0xA3 },
2366 { 0x22, 0x7AB, 0x1F },
2367 { 0x22, 0x7AC, 0x1F },
2368 { 0x22, 0x7AD, 0x80 },
2369 { 0x22, 0x7A6, 0x84 },
2370 { 0x22, 0x7A7, 0xCA },
2371 { 0x22, 0x7A8, 0xF1 },
2372 { 0x22, 0x7A9, 0x84 },
2373 { 0x22, 0x7AA, 0xCA },
2374 { 0x22, 0x7AB, 0xF1 },
2375 { 0x22, 0x7AC, 0x20 },
2376 { 0x22, 0x7AD, 0x80 },
2377 { 0x22, 0x7A6, 0x3C },
2378 { 0x22, 0x7A7, 0xD5 },
2379 { 0x22, 0x7A8, 0x9C },
2380 { 0x22, 0x7A9, 0x3C },
2381 { 0x22, 0x7AA, 0xD5 },
2382 { 0x22, 0x7AB, 0x9C },
2383 { 0x22, 0x7AC, 0x21 },
2384 { 0x22, 0x7AD, 0x80 },
2385 { 0x22, 0x7A6, 0x7B },
2386 { 0x22, 0x7A7, 0x35 },
2387 { 0x22, 0x7A8, 0x0F },
2388 { 0x22, 0x7A9, 0x7B },
2389 { 0x22, 0x7AA, 0x35 },
2390 { 0x22, 0x7AB, 0x0F },
2391 { 0x22, 0x7AC, 0x22 },
2392 { 0x22, 0x7AD, 0x80 },
2393 { 0x22, 0x7A6, 0xC4 },
2394 { 0x22, 0x7A7, 0x87 },
2395 { 0x22, 0x7A8, 0x45 },
2396 { 0x22, 0x7A9, 0xC4 },
2397 { 0x22, 0x7AA, 0x87 },
2398 { 0x22, 0x7AB, 0x45 },
2399 { 0x22, 0x7AC, 0x23 },
2400 { 0x22, 0x7AD, 0x80 },
2401 { 0x22, 0x7A6, 0x3E },
2402 { 0x22, 0x7A7, 0x0A },
2403 { 0x22, 0x7A8, 0x78 },
2404 { 0x22, 0x7A9, 0x3E },
2405 { 0x22, 0x7AA, 0x0A },
2406 { 0x22, 0x7AB, 0x78 },
2407 { 0x22, 0x7AC, 0x24 },
2408 { 0x22, 0x7AD, 0x80 },
2409 { 0x22, 0x7A6, 0x88 },
2410 { 0x22, 0x7A7, 0xE2 },
2411 { 0x22, 0x7A8, 0x05 },
2412 { 0x22, 0x7A9, 0x88 },
2413 { 0x22, 0x7AA, 0xE2 },
2414 { 0x22, 0x7AB, 0x05 },
2415 { 0x22, 0x7AC, 0x25 },
2416 { 0x22, 0x7AD, 0x80 },
2417 { 0x22, 0x7A6, 0x3A },
2418 { 0x22, 0x7A7, 0x1A },
2419 { 0x22, 0x7A8, 0xA3 },
2420 { 0x22, 0x7A9, 0x3A },
2421 { 0x22, 0x7AA, 0x1A },
2422 { 0x22, 0x7AB, 0xA3 },
2423 { 0x22, 0x7AC, 0x26 },
2424 { 0x22, 0x7AD, 0x80 },
2425 { 0x22, 0x7A6, 0x77 },
2426 { 0x22, 0x7A7, 0x1D },
2427 { 0x22, 0x7A8, 0xFB },
2428 { 0x22, 0x7A9, 0x77 },
2429 { 0x22, 0x7AA, 0x1D },
2430 { 0x22, 0x7AB, 0xFB },
2431 { 0x22, 0x7AC, 0x27 },
2432 { 0x22, 0x7AD, 0x80 },
2433 { 0x22, 0x7A6, 0xC7 },
2434 { 0x22, 0x7A7, 0xDA },
2435 { 0x22, 0x7A8, 0xE5 },
2436 { 0x22, 0x7A9, 0xC7 },
2437 { 0x22, 0x7AA, 0xDA },
2438 { 0x22, 0x7AB, 0xE5 },
2439 { 0x22, 0x7AC, 0x28 },
2440 { 0x22, 0x7AD, 0x80 },
2441 { 0x22, 0x7A6, 0x40 },
2442 { 0x22, 0x7A7, 0x00 },
2443 { 0x22, 0x7A8, 0x00 },
2444 { 0x22, 0x7A9, 0x40 },
2445 { 0x22, 0x7AA, 0x00 },
2446 { 0x22, 0x7AB, 0x00 },
2447 { 0x22, 0x7AC, 0x29 },
2448 { 0x22, 0x7AD, 0x80 },
2449 { 0x22, 0x7A6, 0x8E },
2450 { 0x22, 0x7A7, 0xD7 },
2451 { 0x22, 0x7A8, 0x22 },
2452 { 0x22, 0x7A9, 0x8E },
2453 { 0x22, 0x7AA, 0xD7 },
2454 { 0x22, 0x7AB, 0x22 },
2455 { 0x22, 0x7AC, 0x2A },
2456 { 0x22, 0x7AD, 0x80 },
2457 { 0x22, 0x7A6, 0x35 },
2458 { 0x22, 0x7A7, 0x26 },
2459 { 0x22, 0x7A8, 0xC6 },
2460 { 0x22, 0x7A9, 0x35 },
2461 { 0x22, 0x7AA, 0x26 },
2462 { 0x22, 0x7AB, 0xC6 },
2463 { 0x22, 0x7AC, 0x2B },
2464 { 0x22, 0x7AD, 0x80 },
2465 { 0x22, 0x7A6, 0x71 },
2466 { 0x22, 0x7A7, 0x28 },
2467 { 0x22, 0x7A8, 0xDE },
2468 { 0x22, 0x7A9, 0x71 },
2469 { 0x22, 0x7AA, 0x28 },
2470 { 0x22, 0x7AB, 0xDE },
2471 { 0x22, 0x7AC, 0x2C },
2472 { 0x22, 0x7AD, 0x80 },
2473 { 0x22, 0x7A6, 0xCA },
2474 { 0x22, 0x7A7, 0xD9 },
2475 { 0x22, 0x7A8, 0x3A },
2476 { 0x22, 0x7A9, 0xCA },
2477 { 0x22, 0x7AA, 0xD9 },
2478 { 0x22, 0x7AB, 0x3A },
2479 { 0x22, 0x7AC, 0x2D },
2480 { 0x22, 0x7AD, 0x80 },
2481 { 0x22, 0x7A6, 0x40 },
2482 { 0x22, 0x7A7, 0x00 },
2483 { 0x22, 0x7A8, 0x00 },
2484 { 0x22, 0x7A9, 0x40 },
2485 { 0x22, 0x7AA, 0x00 },
2486 { 0x22, 0x7AB, 0x00 },
2487 { 0x22, 0x7AC, 0x2E },
2488 { 0x22, 0x7AD, 0x80 },
2489 { 0x22, 0x7A6, 0x93 },
2490 { 0x22, 0x7A7, 0x5E },
2491 { 0x22, 0x7A8, 0xD8 },
2492 { 0x22, 0x7A9, 0x93 },
2493 { 0x22, 0x7AA, 0x5E },
2494 { 0x22, 0x7AB, 0xD8 },
2495 { 0x22, 0x7AC, 0x2F },
2496 { 0x22, 0x7AD, 0x80 },
2497 { 0x22, 0x7A6, 0x32 },
2498 { 0x22, 0x7A7, 0xB7 },
2499 { 0x22, 0x7A8, 0xB1 },
2500 { 0x22, 0x7A9, 0x32 },
2501 { 0x22, 0x7AA, 0xB7 },
2502 { 0x22, 0x7AB, 0xB1 },
2503 { 0x22, 0x7AC, 0x30 },
2504 { 0x22, 0x7AD, 0x80 },
2505 { 0x22, 0x7A6, 0x6C },
2506 { 0x22, 0x7A7, 0xA1 },
2507 { 0x22, 0x7A8, 0x28 },
2508 { 0x22, 0x7A9, 0x6C },
2509 { 0x22, 0x7AA, 0xA1 },
2510 { 0x22, 0x7AB, 0x28 },
2511 { 0x22, 0x7AC, 0x31 },
2512 { 0x22, 0x7AD, 0x80 },
2513 { 0x22, 0x7A6, 0xCD },
2514 { 0x22, 0x7A7, 0x48 },
2515 { 0x22, 0x7A8, 0x4F },
2516 { 0x22, 0x7A9, 0xCD },
2517 { 0x22, 0x7AA, 0x48 },
2518 { 0x22, 0x7AB, 0x4F },
2519 { 0x22, 0x7AC, 0x32 },
2520 { 0x22, 0x7AD, 0x80 },
2521 { 0x22, 0x7A6, 0x40 },
2522 { 0x22, 0x7A7, 0x00 },
2523 { 0x22, 0x7A8, 0x00 },
2524 { 0x22, 0x7A9, 0x40 },
2525 { 0x22, 0x7AA, 0x00 },
2526 { 0x22, 0x7AB, 0x00 },
2527 { 0x22, 0x7AC, 0x33 },
2528 { 0x22, 0x7AD, 0x80 },
2530 { 0x22, 0x782, 0xC1 },
2531 { 0x22, 0x771, 0x2C },
2532 { 0x22, 0x772, 0x2C },
2533 { 0x22, 0x788, 0x04 },
2534 { 0x01, 0x7B0, 0x08 },
2538 static const struct hda_fixup stac92hd83xxx_fixups[] = {
2539 [STAC_92HD83XXX_REF] = {
2540 .type = HDA_FIXUP_PINS,
2541 .v.pins = ref92hd83xxx_pin_configs,
2543 [STAC_92HD83XXX_PWR_REF] = {
2544 .type = HDA_FIXUP_PINS,
2545 .v.pins = ref92hd83xxx_pin_configs,
2548 .type = HDA_FIXUP_PINS,
2549 .v.pins = dell_s14_pin_configs,
2551 [STAC_DELL_VOSTRO_3500] = {
2552 .type = HDA_FIXUP_PINS,
2553 .v.pins = dell_vostro_3500_pin_configs,
2555 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
2556 .type = HDA_FIXUP_PINS,
2557 .v.pins = hp_cNB11_intquad_pin_configs,
2559 .chain_id = STAC_92HD83XXX_HP,
2561 [STAC_92HD83XXX_HP] = {
2562 .type = HDA_FIXUP_FUNC,
2563 .v.func = stac92hd83xxx_fixup_hp,
2565 [STAC_HP_DV7_4000] = {
2566 .type = HDA_FIXUP_PINS,
2567 .v.pins = hp_dv7_4000_pin_configs,
2569 .chain_id = STAC_92HD83XXX_HP,
2571 [STAC_HP_ZEPHYR] = {
2572 .type = HDA_FIXUP_FUNC,
2573 .v.func = stac92hd83xxx_fixup_hp_zephyr,
2575 .chain_id = STAC_92HD83XXX_HP,
2577 [STAC_92HD83XXX_HP_LED] = {
2578 .type = HDA_FIXUP_FUNC,
2579 .v.func = stac92hd83xxx_fixup_hp_led,
2581 .chain_id = STAC_92HD83XXX_HP,
2583 [STAC_92HD83XXX_HP_INV_LED] = {
2584 .type = HDA_FIXUP_FUNC,
2585 .v.func = stac92hd83xxx_fixup_hp_inv_led,
2587 .chain_id = STAC_92HD83XXX_HP,
2589 [STAC_92HD83XXX_HP_MIC_LED] = {
2590 .type = HDA_FIXUP_FUNC,
2591 .v.func = stac92hd83xxx_fixup_hp_mic_led,
2593 .chain_id = STAC_92HD83XXX_HP,
2595 [STAC_92HD83XXX_HEADSET_JACK] = {
2596 .type = HDA_FIXUP_FUNC,
2597 .v.func = stac92hd83xxx_fixup_headset_jack,
2599 [STAC_HP_ENVY_BASS] = {
2600 .type = HDA_FIXUP_PINS,
2601 .v.pins = (const struct hda_pintbl[]) {
2602 { 0x0f, 0x90170111 },
2606 [STAC_HP_BNB13_EQ] = {
2607 .type = HDA_FIXUP_VERBS,
2608 .v.verbs = hp_bnb13_eq_verbs,
2610 .chain_id = STAC_92HD83XXX_HP_MIC_LED,
2614 static const struct hda_model_fixup stac92hd83xxx_models[] = {
2615 { .id = STAC_92HD83XXX_REF, .name = "ref" },
2616 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
2617 { .id = STAC_DELL_S14, .name = "dell-s14" },
2618 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
2619 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
2620 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
2621 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
2622 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
2623 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
2624 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
2625 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
2626 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
2627 { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" },
2631 static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
2632 /* SigmaTel reference board */
2633 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2634 "DFI LanParty", STAC_92HD83XXX_REF),
2635 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2636 "DFI LanParty", STAC_92HD83XXX_REF),
2637 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
2638 "unknown Dell", STAC_DELL_S14),
2639 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
2640 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
2641 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
2642 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
2643 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
2644 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
2645 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
2646 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
2647 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
2648 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2649 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
2650 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
2651 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
2652 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2653 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
2654 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
2655 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
2656 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
2657 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
2658 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
2659 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
2660 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2661 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
2662 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2663 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
2664 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2665 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
2666 "HP Pavilion dv7", STAC_HP_DV7_4000),
2667 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
2668 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2669 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
2670 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2671 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
2672 "HP Envy Spectre", STAC_HP_ENVY_BASS),
2673 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
2674 "HP Folio", STAC_HP_BNB13_EQ),
2675 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8,
2676 "HP bNB13", STAC_HP_BNB13_EQ),
2677 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909,
2678 "HP bNB13", STAC_HP_BNB13_EQ),
2679 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A,
2680 "HP bNB13", STAC_HP_BNB13_EQ),
2681 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940,
2682 "HP bNB13", STAC_HP_BNB13_EQ),
2683 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941,
2684 "HP bNB13", STAC_HP_BNB13_EQ),
2685 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942,
2686 "HP bNB13", STAC_HP_BNB13_EQ),
2687 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943,
2688 "HP bNB13", STAC_HP_BNB13_EQ),
2689 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944,
2690 "HP bNB13", STAC_HP_BNB13_EQ),
2691 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945,
2692 "HP bNB13", STAC_HP_BNB13_EQ),
2693 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946,
2694 "HP bNB13", STAC_HP_BNB13_EQ),
2695 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948,
2696 "HP bNB13", STAC_HP_BNB13_EQ),
2697 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949,
2698 "HP bNB13", STAC_HP_BNB13_EQ),
2699 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A,
2700 "HP bNB13", STAC_HP_BNB13_EQ),
2701 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B,
2702 "HP bNB13", STAC_HP_BNB13_EQ),
2703 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C,
2704 "HP bNB13", STAC_HP_BNB13_EQ),
2705 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E,
2706 "HP bNB13", STAC_HP_BNB13_EQ),
2707 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F,
2708 "HP bNB13", STAC_HP_BNB13_EQ),
2709 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950,
2710 "HP bNB13", STAC_HP_BNB13_EQ),
2711 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951,
2712 "HP bNB13", STAC_HP_BNB13_EQ),
2713 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A,
2714 "HP bNB13", STAC_HP_BNB13_EQ),
2715 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B,
2716 "HP bNB13", STAC_HP_BNB13_EQ),
2717 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C,
2718 "HP bNB13", STAC_HP_BNB13_EQ),
2719 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991,
2720 "HP bNB13", STAC_HP_BNB13_EQ),
2721 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103,
2722 "HP bNB13", STAC_HP_BNB13_EQ),
2723 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104,
2724 "HP bNB13", STAC_HP_BNB13_EQ),
2725 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105,
2726 "HP bNB13", STAC_HP_BNB13_EQ),
2727 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106,
2728 "HP bNB13", STAC_HP_BNB13_EQ),
2729 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107,
2730 "HP bNB13", STAC_HP_BNB13_EQ),
2731 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108,
2732 "HP bNB13", STAC_HP_BNB13_EQ),
2733 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109,
2734 "HP bNB13", STAC_HP_BNB13_EQ),
2735 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A,
2736 "HP bNB13", STAC_HP_BNB13_EQ),
2737 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B,
2738 "HP bNB13", STAC_HP_BNB13_EQ),
2739 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C,
2740 "HP bNB13", STAC_HP_BNB13_EQ),
2741 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D,
2742 "HP bNB13", STAC_HP_BNB13_EQ),
2743 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E,
2744 "HP bNB13", STAC_HP_BNB13_EQ),
2745 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F,
2746 "HP bNB13", STAC_HP_BNB13_EQ),
2747 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120,
2748 "HP bNB13", STAC_HP_BNB13_EQ),
2749 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121,
2750 "HP bNB13", STAC_HP_BNB13_EQ),
2751 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122,
2752 "HP bNB13", STAC_HP_BNB13_EQ),
2753 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123,
2754 "HP bNB13", STAC_HP_BNB13_EQ),
2755 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E,
2756 "HP bNB13", STAC_HP_BNB13_EQ),
2757 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F,
2758 "HP bNB13", STAC_HP_BNB13_EQ),
2759 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140,
2760 "HP bNB13", STAC_HP_BNB13_EQ),
2761 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2,
2762 "HP bNB13", STAC_HP_BNB13_EQ),
2763 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3,
2764 "HP bNB13", STAC_HP_BNB13_EQ),
2765 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5,
2766 "HP bNB13", STAC_HP_BNB13_EQ),
2767 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6,
2768 "HP bNB13", STAC_HP_BNB13_EQ),
2769 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
2770 "HP", STAC_92HD83XXX_HP_MIC_LED),
2771 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000,
2772 "HP", STAC_92HD83XXX_HP_MIC_LED),
2773 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100,
2774 "HP", STAC_92HD83XXX_HP_MIC_LED),
2775 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
2776 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2777 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
2778 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2779 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
2780 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2781 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
2782 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2783 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
2784 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2785 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
2786 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2787 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
2788 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2789 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
2790 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2791 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
2792 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2793 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
2794 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2795 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
2796 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2797 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
2798 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2799 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
2800 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2801 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
2802 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2803 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
2804 "HP", STAC_HP_ZEPHYR),
2805 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
2806 "HP Mini", STAC_92HD83XXX_HP_LED),
2807 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
2808 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
2809 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
2810 "HP Mini", STAC_92HD83XXX_HP_LED),
2811 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
2815 /* HP dv7 bass switch - GPIO5 */
2816 #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
2817 static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
2818 struct snd_ctl_elem_value *ucontrol)
2820 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2821 struct sigmatel_spec *spec = codec->spec;
2822 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
2826 static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
2827 struct snd_ctl_elem_value *ucontrol)
2829 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2830 struct sigmatel_spec *spec = codec->spec;
2831 unsigned int gpio_data;
2833 gpio_data = (spec->gpio_data & ~0x20) |
2834 (ucontrol->value.integer.value[0] ? 0x20 : 0);
2835 if (gpio_data == spec->gpio_data)
2837 spec->gpio_data = gpio_data;
2838 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
2842 static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
2843 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2844 .info = stac_hp_bass_gpio_info,
2845 .get = stac_hp_bass_gpio_get,
2846 .put = stac_hp_bass_gpio_put,
2849 static int stac_add_hp_bass_switch(struct hda_codec *codec)
2851 struct sigmatel_spec *spec = codec->spec;
2853 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
2854 &stac_hp_bass_sw_ctrl))
2857 spec->gpio_mask |= 0x20;
2858 spec->gpio_dir |= 0x20;
2859 spec->gpio_data |= 0x20;
2863 static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
2864 { 0x0a, 0x02214030 },
2865 { 0x0b, 0x02a19040 },
2866 { 0x0c, 0x01a19020 },
2867 { 0x0d, 0x01014010 },
2868 { 0x0e, 0x0181302e },
2869 { 0x0f, 0x01014010 },
2870 { 0x14, 0x01019020 },
2871 { 0x18, 0x90a000f0 },
2872 { 0x19, 0x90a000f0 },
2873 { 0x1e, 0x01452050 },
2874 { 0x1f, 0x01452050 },
2878 static const struct hda_pintbl dell_m4_1_pin_configs[] = {
2879 { 0x0a, 0x0421101f },
2880 { 0x0b, 0x04a11221 },
2881 { 0x0c, 0x40f000f0 },
2882 { 0x0d, 0x90170110 },
2883 { 0x0e, 0x23a1902e },
2884 { 0x0f, 0x23014250 },
2885 { 0x14, 0x40f000f0 },
2886 { 0x18, 0x90a000f0 },
2887 { 0x19, 0x40f000f0 },
2888 { 0x1e, 0x4f0000f0 },
2889 { 0x1f, 0x4f0000f0 },
2893 static const struct hda_pintbl dell_m4_2_pin_configs[] = {
2894 { 0x0a, 0x0421101f },
2895 { 0x0b, 0x04a11221 },
2896 { 0x0c, 0x90a70330 },
2897 { 0x0d, 0x90170110 },
2898 { 0x0e, 0x23a1902e },
2899 { 0x0f, 0x23014250 },
2900 { 0x14, 0x40f000f0 },
2901 { 0x18, 0x40f000f0 },
2902 { 0x19, 0x40f000f0 },
2903 { 0x1e, 0x044413b0 },
2904 { 0x1f, 0x044413b0 },
2908 static const struct hda_pintbl dell_m4_3_pin_configs[] = {
2909 { 0x0a, 0x0421101f },
2910 { 0x0b, 0x04a11221 },
2911 { 0x0c, 0x90a70330 },
2912 { 0x0d, 0x90170110 },
2913 { 0x0e, 0x40f000f0 },
2914 { 0x0f, 0x40f000f0 },
2915 { 0x14, 0x40f000f0 },
2916 { 0x18, 0x90a000f0 },
2917 { 0x19, 0x40f000f0 },
2918 { 0x1e, 0x044413b0 },
2919 { 0x1f, 0x044413b0 },
2923 static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
2924 const struct hda_fixup *fix, int action)
2926 struct sigmatel_spec *spec = codec->spec;
2928 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2931 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
2932 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
2935 static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
2936 const struct hda_fixup *fix, int action)
2938 struct sigmatel_spec *spec = codec->spec;
2939 struct hda_jack_tbl *jack;
2941 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2944 /* Enable VREF power saving on GPIO1 detect */
2945 snd_hda_codec_write_cache(codec, codec->afg, 0,
2946 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
2947 snd_hda_jack_detect_enable_callback(codec, codec->afg,
2950 jack = snd_hda_jack_tbl_get(codec, codec->afg);
2952 jack->private_data = 0x02;
2954 spec->gpio_mask |= 0x02;
2956 /* enable internal microphone */
2957 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
2960 static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
2961 const struct hda_fixup *fix, int action)
2963 struct sigmatel_spec *spec = codec->spec;
2965 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2967 spec->gpio_led = 0x01;
2970 static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
2971 const struct hda_fixup *fix, int action)
2976 case HDA_FIXUP_ACT_PRE_PROBE:
2977 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
2980 case HDA_FIXUP_ACT_PROBE:
2981 /* enable bass on HP dv7 */
2982 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
2983 cap &= AC_GPIO_IO_COUNT;
2985 stac_add_hp_bass_switch(codec);
2990 static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
2991 const struct hda_fixup *fix, int action)
2993 struct sigmatel_spec *spec = codec->spec;
2995 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2997 spec->gpio_led = 0x08;
3001 static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
3002 const struct hda_fixup *fix, int action)
3004 struct sigmatel_spec *spec = codec->spec;
3006 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3009 if (hp_blike_system(codec->subsystem_id)) {
3010 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
3011 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
3012 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
3013 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
3014 /* It was changed in the BIOS to just satisfy MS DTM.
3015 * Lets turn it back into slaved HP
3017 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
3018 | (AC_JACK_HP_OUT <<
3019 AC_DEFCFG_DEVICE_SHIFT);
3020 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
3021 | AC_DEFCFG_SEQUENCE)))
3023 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
3027 if (find_mute_led_cfg(codec, 1))
3028 snd_printd("mute LED gpio %d polarity %d\n",
3030 spec->gpio_led_polarity);
3034 static const struct hda_fixup stac92hd71bxx_fixups[] = {
3035 [STAC_92HD71BXX_REF] = {
3036 .type = HDA_FIXUP_FUNC,
3037 .v.func = stac92hd71bxx_fixup_ref,
3039 [STAC_DELL_M4_1] = {
3040 .type = HDA_FIXUP_PINS,
3041 .v.pins = dell_m4_1_pin_configs,
3043 [STAC_DELL_M4_2] = {
3044 .type = HDA_FIXUP_PINS,
3045 .v.pins = dell_m4_2_pin_configs,
3047 [STAC_DELL_M4_3] = {
3048 .type = HDA_FIXUP_PINS,
3049 .v.pins = dell_m4_3_pin_configs,
3052 .type = HDA_FIXUP_FUNC,
3053 .v.func = stac92hd71bxx_fixup_hp_m4,
3055 .chain_id = STAC_92HD71BXX_HP,
3058 .type = HDA_FIXUP_FUNC,
3059 .v.func = stac92hd71bxx_fixup_hp_dv4,
3061 .chain_id = STAC_HP_DV5,
3064 .type = HDA_FIXUP_FUNC,
3065 .v.func = stac92hd71bxx_fixup_hp_dv5,
3067 .chain_id = STAC_92HD71BXX_HP,
3070 .type = HDA_FIXUP_FUNC,
3071 .v.func = stac92hd71bxx_fixup_hp_hdx,
3073 .chain_id = STAC_92HD71BXX_HP,
3075 [STAC_92HD71BXX_HP] = {
3076 .type = HDA_FIXUP_FUNC,
3077 .v.func = stac92hd71bxx_fixup_hp,
3081 static const struct hda_model_fixup stac92hd71bxx_models[] = {
3082 { .id = STAC_92HD71BXX_REF, .name = "ref" },
3083 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
3084 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
3085 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
3086 { .id = STAC_HP_M4, .name = "hp-m4" },
3087 { .id = STAC_HP_DV4, .name = "hp-dv4" },
3088 { .id = STAC_HP_DV5, .name = "hp-dv5" },
3089 { .id = STAC_HP_HDX, .name = "hp-hdx" },
3090 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
3094 static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
3095 /* SigmaTel reference board */
3096 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3097 "DFI LanParty", STAC_92HD71BXX_REF),
3098 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3099 "DFI LanParty", STAC_92HD71BXX_REF),
3100 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
3102 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
3104 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
3105 "HP dv4-7", STAC_HP_DV4),
3106 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
3107 "HP dv4-7", STAC_HP_DV5),
3108 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
3109 "HP HDX", STAC_HP_HDX), /* HDX18 */
3110 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
3111 "HP mini 1000", STAC_HP_M4),
3112 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
3113 "HP HDX", STAC_HP_HDX), /* HDX16 */
3114 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
3115 "HP dv6", STAC_HP_DV5),
3116 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
3117 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
3118 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
3119 "HP DV6", STAC_HP_DV5),
3120 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
3122 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
3123 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
3124 "unknown Dell", STAC_DELL_M4_1),
3125 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
3126 "unknown Dell", STAC_DELL_M4_1),
3127 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
3128 "unknown Dell", STAC_DELL_M4_1),
3129 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
3130 "unknown Dell", STAC_DELL_M4_1),
3131 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
3132 "unknown Dell", STAC_DELL_M4_1),
3133 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
3134 "unknown Dell", STAC_DELL_M4_1),
3135 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
3136 "unknown Dell", STAC_DELL_M4_1),
3137 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
3138 "unknown Dell", STAC_DELL_M4_2),
3139 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
3140 "unknown Dell", STAC_DELL_M4_2),
3141 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
3142 "unknown Dell", STAC_DELL_M4_2),
3143 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
3144 "unknown Dell", STAC_DELL_M4_2),
3145 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
3146 "unknown Dell", STAC_DELL_M4_3),
3150 static const struct hda_pintbl ref922x_pin_configs[] = {
3151 { 0x0a, 0x01014010 },
3152 { 0x0b, 0x01016011 },
3153 { 0x0c, 0x01012012 },
3154 { 0x0d, 0x0221401f },
3155 { 0x0e, 0x01813122 },
3156 { 0x0f, 0x01011014 },
3157 { 0x10, 0x01441030 },
3158 { 0x11, 0x01c41030 },
3159 { 0x15, 0x40000100 },
3160 { 0x1b, 0x40000100 },
3165 STAC 922X pin configs for
3172 static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
3173 { 0x0a, 0x02214030 },
3174 { 0x0b, 0x01a19021 },
3175 { 0x0c, 0x01111012 },
3176 { 0x0d, 0x01114010 },
3177 { 0x0e, 0x02a19020 },
3178 { 0x0f, 0x01117011 },
3179 { 0x10, 0x400001f0 },
3180 { 0x11, 0x400001f1 },
3181 { 0x15, 0x01813122 },
3182 { 0x1b, 0x400001f2 },
3187 STAC 922X pin configs for
3191 static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
3192 { 0x0a, 0x02214030 },
3193 { 0x0b, 0x01a19021 },
3194 { 0x0c, 0x01111012 },
3195 { 0x0d, 0x01114010 },
3196 { 0x0e, 0x02a19020 },
3197 { 0x0f, 0x01117011 },
3198 { 0x10, 0x01451140 },
3199 { 0x11, 0x400001f0 },
3200 { 0x15, 0x01813122 },
3201 { 0x1b, 0x400001f1 },
3206 STAC 922X pin configs for
3209 static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
3210 { 0x0a, 0x0321101f },
3211 { 0x0b, 0x01112024 },
3212 { 0x0c, 0x01111222 },
3213 { 0x0d, 0x91174220 },
3214 { 0x0e, 0x03a11050 },
3215 { 0x0f, 0x01116221 },
3216 { 0x10, 0x90a70330 },
3217 { 0x11, 0x01452340 },
3218 { 0x15, 0x40C003f1 },
3219 { 0x1b, 0x405003f0 },
3224 STAC 9221 A1 pin configs for
3225 102801D7 (Dell XPS M1210)
3227 static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
3228 { 0x0a, 0x02211211 },
3229 { 0x0b, 0x408103ff },
3230 { 0x0c, 0x02a1123e },
3231 { 0x0d, 0x90100310 },
3232 { 0x0e, 0x408003f1 },
3233 { 0x0f, 0x0221121f },
3234 { 0x10, 0x03451340 },
3235 { 0x11, 0x40c003f2 },
3236 { 0x15, 0x508003f3 },
3237 { 0x1b, 0x405003f4 },
3241 static const struct hda_pintbl d945gtp3_pin_configs[] = {
3242 { 0x0a, 0x0221401f },
3243 { 0x0b, 0x01a19022 },
3244 { 0x0c, 0x01813021 },
3245 { 0x0d, 0x01014010 },
3246 { 0x0e, 0x40000100 },
3247 { 0x0f, 0x40000100 },
3248 { 0x10, 0x40000100 },
3249 { 0x11, 0x40000100 },
3250 { 0x15, 0x02a19120 },
3251 { 0x1b, 0x40000100 },
3255 static const struct hda_pintbl d945gtp5_pin_configs[] = {
3256 { 0x0a, 0x0221401f },
3257 { 0x0b, 0x01011012 },
3258 { 0x0c, 0x01813024 },
3259 { 0x0d, 0x01014010 },
3260 { 0x0e, 0x01a19021 },
3261 { 0x0f, 0x01016011 },
3262 { 0x10, 0x01452130 },
3263 { 0x11, 0x40000100 },
3264 { 0x15, 0x02a19320 },
3265 { 0x1b, 0x40000100 },
3269 static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
3270 { 0x0a, 0x0121e21f },
3271 { 0x0b, 0x400000ff },
3272 { 0x0c, 0x9017e110 },
3273 { 0x0d, 0x400000fd },
3274 { 0x0e, 0x400000fe },
3275 { 0x0f, 0x0181e020 },
3276 { 0x10, 0x1145e030 },
3277 { 0x11, 0x11c5e240 },
3278 { 0x15, 0x400000fc },
3279 { 0x1b, 0x400000fb },
3283 static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
3284 { 0x0a, 0x0121e21f },
3285 { 0x0b, 0x90a7012e },
3286 { 0x0c, 0x9017e110 },
3287 { 0x0d, 0x400000fd },
3288 { 0x0e, 0x400000fe },
3289 { 0x0f, 0x0181e020 },
3290 { 0x10, 0x1145e230 },
3291 { 0x11, 0x500000fa },
3292 { 0x15, 0x400000fc },
3293 { 0x1b, 0x400000fb },
3297 static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
3298 { 0x0a, 0x0121e21f },
3299 { 0x0b, 0x90a7012e },
3300 { 0x0c, 0x9017e110 },
3301 { 0x0d, 0x400000fd },
3302 { 0x0e, 0x400000fe },
3303 { 0x0f, 0x0181e020 },
3304 { 0x10, 0x1145e230 },
3305 { 0x11, 0x11c5e240 },
3306 { 0x15, 0x400000fc },
3307 { 0x1b, 0x400000fb },
3311 static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
3312 { 0x0a, 0x0321e21f },
3313 { 0x0b, 0x03a1e02e },
3314 { 0x0c, 0x9017e110 },
3315 { 0x0d, 0x9017e11f },
3316 { 0x0e, 0x400000fe },
3317 { 0x0f, 0x0381e020 },
3318 { 0x10, 0x1345e230 },
3319 { 0x11, 0x13c5e240 },
3320 { 0x15, 0x400000fc },
3321 { 0x1b, 0x400000fb },
3325 static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
3326 { 0x0a, 0x0321e21f },
3327 { 0x0b, 0x03a1e02e },
3328 { 0x0c, 0x9017e110 },
3329 { 0x0d, 0x9017e11f },
3330 { 0x0e, 0x400000fe },
3331 { 0x0f, 0x0381e020 },
3332 { 0x10, 0x1345e230 },
3333 { 0x11, 0x13c5e240 },
3334 { 0x15, 0x400000fc },
3335 { 0x1b, 0x400000fb },
3339 static const struct hda_pintbl ecs202_pin_configs[] = {
3340 { 0x0a, 0x0221401f },
3341 { 0x0b, 0x02a19020 },
3342 { 0x0c, 0x01a19020 },
3343 { 0x0d, 0x01114010 },
3344 { 0x0e, 0x408000f0 },
3345 { 0x0f, 0x01813022 },
3346 { 0x10, 0x074510a0 },
3347 { 0x11, 0x40c400f1 },
3348 { 0x15, 0x9037012e },
3349 { 0x1b, 0x40e000f2 },
3353 /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
3354 static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
3355 SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3),
3356 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
3357 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
3358 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
3359 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
3360 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
3361 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
3362 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
3363 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
3364 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
3365 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
3366 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
3367 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
3371 static const struct hda_fixup stac922x_fixups[];
3373 /* remap the fixup from codec SSID and apply it */
3374 static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
3375 const struct hda_fixup *fix,
3378 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3380 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
3382 if (codec->fixup_id != STAC_INTEL_MAC_AUTO)
3383 snd_hda_apply_fixup(codec, action);
3386 static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
3387 const struct hda_fixup *fix,
3390 struct sigmatel_spec *spec = codec->spec;
3392 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3393 spec->gpio_mask = spec->gpio_dir = 0x03;
3394 spec->gpio_data = 0x03;
3398 static const struct hda_fixup stac922x_fixups[] = {
3400 .type = HDA_FIXUP_PINS,
3401 .v.pins = ref922x_pin_configs,
3404 .type = HDA_FIXUP_PINS,
3405 .v.pins = d945gtp3_pin_configs,
3408 .type = HDA_FIXUP_PINS,
3409 .v.pins = d945gtp5_pin_configs,
3411 [STAC_INTEL_MAC_AUTO] = {
3412 .type = HDA_FIXUP_FUNC,
3413 .v.func = stac922x_fixup_intel_mac_auto,
3415 [STAC_INTEL_MAC_V1] = {
3416 .type = HDA_FIXUP_PINS,
3417 .v.pins = intel_mac_v1_pin_configs,
3419 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3421 [STAC_INTEL_MAC_V2] = {
3422 .type = HDA_FIXUP_PINS,
3423 .v.pins = intel_mac_v2_pin_configs,
3425 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3427 [STAC_INTEL_MAC_V3] = {
3428 .type = HDA_FIXUP_PINS,
3429 .v.pins = intel_mac_v3_pin_configs,
3431 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3433 [STAC_INTEL_MAC_V4] = {
3434 .type = HDA_FIXUP_PINS,
3435 .v.pins = intel_mac_v4_pin_configs,
3437 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3439 [STAC_INTEL_MAC_V5] = {
3440 .type = HDA_FIXUP_PINS,
3441 .v.pins = intel_mac_v5_pin_configs,
3443 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3445 [STAC_922X_INTEL_MAC_GPIO] = {
3446 .type = HDA_FIXUP_FUNC,
3447 .v.func = stac922x_fixup_intel_mac_gpio,
3450 .type = HDA_FIXUP_PINS,
3451 .v.pins = ecs202_pin_configs,
3453 [STAC_922X_DELL_D81] = {
3454 .type = HDA_FIXUP_PINS,
3455 .v.pins = dell_922x_d81_pin_configs,
3457 [STAC_922X_DELL_D82] = {
3458 .type = HDA_FIXUP_PINS,
3459 .v.pins = dell_922x_d82_pin_configs,
3461 [STAC_922X_DELL_M81] = {
3462 .type = HDA_FIXUP_PINS,
3463 .v.pins = dell_922x_m81_pin_configs,
3465 [STAC_922X_DELL_M82] = {
3466 .type = HDA_FIXUP_PINS,
3467 .v.pins = dell_922x_m82_pin_configs,
3471 static const struct hda_model_fixup stac922x_models[] = {
3472 { .id = STAC_D945_REF, .name = "ref" },
3473 { .id = STAC_D945GTP5, .name = "5stack" },
3474 { .id = STAC_D945GTP3, .name = "3stack" },
3475 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
3476 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
3477 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
3478 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
3479 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
3480 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
3481 { .id = STAC_ECS_202, .name = "ecs202" },
3482 { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
3483 { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
3484 { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
3485 { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
3486 /* for backward compatibility */
3487 { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
3488 { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
3489 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
3490 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
3491 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
3492 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
3496 static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
3497 /* SigmaTel reference board */
3498 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3499 "DFI LanParty", STAC_D945_REF),
3500 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3501 "DFI LanParty", STAC_D945_REF),
3502 /* Intel 945G based systems */
3503 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
3504 "Intel D945G", STAC_D945GTP3),
3505 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
3506 "Intel D945G", STAC_D945GTP3),
3507 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
3508 "Intel D945G", STAC_D945GTP3),
3509 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
3510 "Intel D945G", STAC_D945GTP3),
3511 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
3512 "Intel D945G", STAC_D945GTP3),
3513 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
3514 "Intel D945G", STAC_D945GTP3),
3515 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
3516 "Intel D945G", STAC_D945GTP3),
3517 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
3518 "Intel D945G", STAC_D945GTP3),
3519 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
3520 "Intel D945G", STAC_D945GTP3),
3521 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
3522 "Intel D945G", STAC_D945GTP3),
3523 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
3524 "Intel D945G", STAC_D945GTP3),
3525 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
3526 "Intel D945G", STAC_D945GTP3),
3527 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
3528 "Intel D945G", STAC_D945GTP3),
3529 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
3530 "Intel D945G", STAC_D945GTP3),
3531 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
3532 "Intel D945G", STAC_D945GTP3),
3533 /* Intel D945G 5-stack systems */
3534 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
3535 "Intel D945G", STAC_D945GTP5),
3536 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
3537 "Intel D945G", STAC_D945GTP5),
3538 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
3539 "Intel D945G", STAC_D945GTP5),
3540 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
3541 "Intel D945G", STAC_D945GTP5),
3542 /* Intel 945P based systems */
3543 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
3544 "Intel D945P", STAC_D945GTP3),
3545 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
3546 "Intel D945P", STAC_D945GTP3),
3547 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
3548 "Intel D945P", STAC_D945GTP3),
3549 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
3550 "Intel D945P", STAC_D945GTP3),
3551 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
3552 "Intel D945P", STAC_D945GTP3),
3553 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
3554 "Intel D945P", STAC_D945GTP5),
3556 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
3557 "Intel D945", STAC_D945_REF),
3560 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
3561 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
3564 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
3565 "unknown Dell", STAC_922X_DELL_D81),
3566 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
3567 "unknown Dell", STAC_922X_DELL_D81),
3568 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
3569 "unknown Dell", STAC_922X_DELL_D81),
3570 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
3571 "unknown Dell", STAC_922X_DELL_D82),
3572 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
3573 "unknown Dell", STAC_922X_DELL_M81),
3574 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
3575 "unknown Dell", STAC_922X_DELL_D82),
3576 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
3577 "unknown Dell", STAC_922X_DELL_D81),
3578 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
3579 "unknown Dell", STAC_922X_DELL_D81),
3580 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
3581 "Dell XPS M1210", STAC_922X_DELL_M82),
3582 /* ECS/PC Chips boards */
3583 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
3584 "ECS/PC chips", STAC_ECS_202),
3588 static const struct hda_pintbl ref927x_pin_configs[] = {
3589 { 0x0a, 0x02214020 },
3590 { 0x0b, 0x02a19080 },
3591 { 0x0c, 0x0181304e },
3592 { 0x0d, 0x01014010 },
3593 { 0x0e, 0x01a19040 },
3594 { 0x0f, 0x01011012 },
3595 { 0x10, 0x01016011 },
3596 { 0x11, 0x0101201f },
3597 { 0x12, 0x183301f0 },
3598 { 0x13, 0x18a001f0 },
3599 { 0x14, 0x18a001f0 },
3600 { 0x21, 0x01442070 },
3601 { 0x22, 0x01c42190 },
3602 { 0x23, 0x40000100 },
3606 static const struct hda_pintbl d965_3st_pin_configs[] = {
3607 { 0x0a, 0x0221401f },
3608 { 0x0b, 0x02a19120 },
3609 { 0x0c, 0x40000100 },
3610 { 0x0d, 0x01014011 },
3611 { 0x0e, 0x01a19021 },
3612 { 0x0f, 0x01813024 },
3613 { 0x10, 0x40000100 },
3614 { 0x11, 0x40000100 },
3615 { 0x12, 0x40000100 },
3616 { 0x13, 0x40000100 },
3617 { 0x14, 0x40000100 },
3618 { 0x21, 0x40000100 },
3619 { 0x22, 0x40000100 },
3620 { 0x23, 0x40000100 },
3624 static const struct hda_pintbl d965_5st_pin_configs[] = {
3625 { 0x0a, 0x02214020 },
3626 { 0x0b, 0x02a19080 },
3627 { 0x0c, 0x0181304e },
3628 { 0x0d, 0x01014010 },
3629 { 0x0e, 0x01a19040 },
3630 { 0x0f, 0x01011012 },
3631 { 0x10, 0x01016011 },
3632 { 0x11, 0x40000100 },
3633 { 0x12, 0x40000100 },
3634 { 0x13, 0x40000100 },
3635 { 0x14, 0x40000100 },
3636 { 0x21, 0x01442070 },
3637 { 0x22, 0x40000100 },
3638 { 0x23, 0x40000100 },
3642 static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
3643 { 0x0a, 0x40000100 },
3644 { 0x0b, 0x40000100 },
3645 { 0x0c, 0x0181304e },
3646 { 0x0d, 0x01014010 },
3647 { 0x0e, 0x01a19040 },
3648 { 0x0f, 0x01011012 },
3649 { 0x10, 0x01016011 },
3650 { 0x11, 0x40000100 },
3651 { 0x12, 0x40000100 },
3652 { 0x13, 0x40000100 },
3653 { 0x14, 0x40000100 },
3654 { 0x21, 0x01442070 },
3655 { 0x22, 0x40000100 },
3656 { 0x23, 0x40000100 },
3660 static const struct hda_pintbl dell_3st_pin_configs[] = {
3661 { 0x0a, 0x02211230 },
3662 { 0x0b, 0x02a11220 },
3663 { 0x0c, 0x01a19040 },
3664 { 0x0d, 0x01114210 },
3665 { 0x0e, 0x01111212 },
3666 { 0x0f, 0x01116211 },
3667 { 0x10, 0x01813050 },
3668 { 0x11, 0x01112214 },
3669 { 0x12, 0x403003fa },
3670 { 0x13, 0x90a60040 },
3671 { 0x14, 0x90a60040 },
3672 { 0x21, 0x404003fb },
3673 { 0x22, 0x40c003fc },
3674 { 0x23, 0x40000100 },
3678 static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
3679 const struct hda_fixup *fix, int action)
3681 /* no jack detecion for ref-no-jd model */
3682 if (action == HDA_FIXUP_ACT_PRE_PROBE)
3683 codec->no_jack_detect = 1;
3686 static void stac927x_fixup_ref(struct hda_codec *codec,
3687 const struct hda_fixup *fix, int action)
3689 struct sigmatel_spec *spec = codec->spec;
3691 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3692 snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
3693 spec->eapd_mask = spec->gpio_mask = 0;
3694 spec->gpio_dir = spec->gpio_data = 0;
3698 static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
3699 const struct hda_fixup *fix, int action)
3701 struct sigmatel_spec *spec = codec->spec;
3703 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3706 if (codec->subsystem_id != 0x1028022f) {
3707 /* GPIO2 High = Enable EAPD */
3708 spec->eapd_mask = spec->gpio_mask = 0x04;
3709 spec->gpio_dir = spec->gpio_data = 0x04;
3712 snd_hda_add_verbs(codec, dell_3st_core_init);
3713 spec->volknob_init = 1;
3716 static void stac927x_fixup_volknob(struct hda_codec *codec,
3717 const struct hda_fixup *fix, int action)
3719 struct sigmatel_spec *spec = codec->spec;
3721 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3722 snd_hda_add_verbs(codec, stac927x_volknob_core_init);
3723 spec->volknob_init = 1;
3727 static const struct hda_fixup stac927x_fixups[] = {
3728 [STAC_D965_REF_NO_JD] = {
3729 .type = HDA_FIXUP_FUNC,
3730 .v.func = stac927x_fixup_ref_no_jd,
3732 .chain_id = STAC_D965_REF,
3735 .type = HDA_FIXUP_FUNC,
3736 .v.func = stac927x_fixup_ref,
3739 .type = HDA_FIXUP_PINS,
3740 .v.pins = d965_3st_pin_configs,
3742 .chain_id = STAC_D965_VERBS,
3745 .type = HDA_FIXUP_PINS,
3746 .v.pins = d965_5st_pin_configs,
3748 .chain_id = STAC_D965_VERBS,
3750 [STAC_D965_VERBS] = {
3751 .type = HDA_FIXUP_VERBS,
3752 .v.verbs = d965_core_init,
3754 [STAC_D965_5ST_NO_FP] = {
3755 .type = HDA_FIXUP_PINS,
3756 .v.pins = d965_5st_no_fp_pin_configs,
3759 .type = HDA_FIXUP_PINS,
3760 .v.pins = dell_3st_pin_configs,
3762 .chain_id = STAC_927X_DELL_DMIC,
3764 [STAC_DELL_BIOS] = {
3765 .type = HDA_FIXUP_PINS,
3766 .v.pins = (const struct hda_pintbl[]) {
3767 /* correct the front output jack as a hp out */
3768 { 0x0f, 0x0221101f },
3769 /* correct the front input jack as a mic */
3770 { 0x0e, 0x02a79130 },
3774 .chain_id = STAC_927X_DELL_DMIC,
3776 [STAC_DELL_BIOS_AMIC] = {
3777 .type = HDA_FIXUP_PINS,
3778 .v.pins = (const struct hda_pintbl[]) {
3779 /* configure the analog microphone on some laptops */
3780 { 0x0c, 0x90a79130 },
3784 .chain_id = STAC_DELL_BIOS,
3786 [STAC_DELL_BIOS_SPDIF] = {
3787 .type = HDA_FIXUP_PINS,
3788 .v.pins = (const struct hda_pintbl[]) {
3789 /* correct the device field to SPDIF out */
3790 { 0x21, 0x01442070 },
3794 .chain_id = STAC_DELL_BIOS,
3796 [STAC_927X_DELL_DMIC] = {
3797 .type = HDA_FIXUP_FUNC,
3798 .v.func = stac927x_fixup_dell_dmic,
3800 [STAC_927X_VOLKNOB] = {
3801 .type = HDA_FIXUP_FUNC,
3802 .v.func = stac927x_fixup_volknob,
3806 static const struct hda_model_fixup stac927x_models[] = {
3807 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
3808 { .id = STAC_D965_REF, .name = "ref" },
3809 { .id = STAC_D965_3ST, .name = "3stack" },
3810 { .id = STAC_D965_5ST, .name = "5stack" },
3811 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
3812 { .id = STAC_DELL_3ST, .name = "dell-3stack" },
3813 { .id = STAC_DELL_BIOS, .name = "dell-bios" },
3814 { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" },
3815 { .id = STAC_927X_VOLKNOB, .name = "volknob" },
3819 static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
3820 /* SigmaTel reference board */
3821 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3822 "DFI LanParty", STAC_D965_REF),
3823 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3824 "DFI LanParty", STAC_D965_REF),
3825 /* Intel 946 based systems */
3826 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
3827 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
3828 /* 965 based 3 stack systems */
3829 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
3830 "Intel D965", STAC_D965_3ST),
3831 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
3832 "Intel D965", STAC_D965_3ST),
3833 /* Dell 3 stack systems */
3834 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
3835 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
3836 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
3837 /* Dell 3 stack systems with verb table in BIOS */
3838 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
3839 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
3840 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
3841 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
3842 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
3843 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
3844 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
3845 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
3846 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
3847 /* 965 based 5 stack systems */
3848 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
3849 "Intel D965", STAC_D965_5ST),
3850 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
3851 "Intel D965", STAC_D965_5ST),
3852 /* volume-knob fixes */
3853 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3857 static const struct hda_pintbl ref9205_pin_configs[] = {
3858 { 0x0a, 0x40000100 },
3859 { 0x0b, 0x40000100 },
3860 { 0x0c, 0x01016011 },
3861 { 0x0d, 0x01014010 },
3862 { 0x0e, 0x01813122 },
3863 { 0x0f, 0x01a19021 },
3864 { 0x14, 0x01019020 },
3865 { 0x16, 0x40000100 },
3866 { 0x17, 0x90a000f0 },
3867 { 0x18, 0x90a000f0 },
3868 { 0x21, 0x01441030 },
3869 { 0x22, 0x01c41030 },
3874 STAC 9205 pin configs for
3881 10280228 (Dell Vostro 1500)
3882 10280229 (Dell Vostro 1700)
3884 static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
3885 { 0x0a, 0x0321101F },
3886 { 0x0b, 0x03A11020 },
3887 { 0x0c, 0x400003FA },
3888 { 0x0d, 0x90170310 },
3889 { 0x0e, 0x400003FB },
3890 { 0x0f, 0x400003FC },
3891 { 0x14, 0x400003FD },
3892 { 0x16, 0x40F000F9 },
3893 { 0x17, 0x90A60330 },
3894 { 0x18, 0x400003FF },
3895 { 0x21, 0x0144131F },
3896 { 0x22, 0x40C003FE },
3901 STAC 9205 pin configs for
3905 102801FF (Dell Precision M4300)
3910 static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
3911 { 0x0a, 0x0321101f },
3912 { 0x0b, 0x03a11020 },
3913 { 0x0c, 0x90a70330 },
3914 { 0x0d, 0x90170310 },
3915 { 0x0e, 0x400000fe },
3916 { 0x0f, 0x400000ff },
3917 { 0x14, 0x400000fd },
3918 { 0x16, 0x40f000f9 },
3919 { 0x17, 0x400000fa },
3920 { 0x18, 0x400000fc },
3921 { 0x21, 0x0144131f },
3922 { 0x22, 0x40c003f8 },
3923 /* Enable SPDIF in/out */
3924 { 0x1f, 0x01441030 },
3925 { 0x20, 0x1c410030 },
3929 static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
3930 { 0x0a, 0x0421101f },
3931 { 0x0b, 0x04a11020 },
3932 { 0x0c, 0x400003fa },
3933 { 0x0d, 0x90170310 },
3934 { 0x0e, 0x400003fb },
3935 { 0x0f, 0x400003fc },
3936 { 0x14, 0x400003fd },
3937 { 0x16, 0x400003f9 },
3938 { 0x17, 0x90a60330 },
3939 { 0x18, 0x400003ff },
3940 { 0x21, 0x01441340 },
3941 { 0x22, 0x40c003fe },
3945 static void stac9205_fixup_ref(struct hda_codec *codec,
3946 const struct hda_fixup *fix, int action)
3948 struct sigmatel_spec *spec = codec->spec;
3950 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3951 snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
3952 /* SPDIF-In enabled */
3953 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
3957 static void stac9205_fixup_dell_m43(struct hda_codec *codec,
3958 const struct hda_fixup *fix, int action)
3960 struct sigmatel_spec *spec = codec->spec;
3961 struct hda_jack_tbl *jack;
3963 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3964 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
3966 /* Enable unsol response for GPIO4/Dock HP connection */
3967 snd_hda_codec_write_cache(codec, codec->afg, 0,
3968 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
3969 snd_hda_jack_detect_enable_callback(codec, codec->afg,
3972 jack = snd_hda_jack_tbl_get(codec, codec->afg);
3974 jack->private_data = 0x01;
3976 spec->gpio_dir = 0x0b;
3977 spec->eapd_mask = 0x01;
3978 spec->gpio_mask = 0x1b;
3979 spec->gpio_mute = 0x10;
3980 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
3983 spec->gpio_data = 0x01;
3987 static void stac9205_fixup_eapd(struct hda_codec *codec,
3988 const struct hda_fixup *fix, int action)
3990 struct sigmatel_spec *spec = codec->spec;
3992 if (action == HDA_FIXUP_ACT_PRE_PROBE)
3993 spec->eapd_switch = 0;
3996 static const struct hda_fixup stac9205_fixups[] = {
3998 .type = HDA_FIXUP_FUNC,
3999 .v.func = stac9205_fixup_ref,
4001 [STAC_9205_DELL_M42] = {
4002 .type = HDA_FIXUP_PINS,
4003 .v.pins = dell_9205_m42_pin_configs,
4005 [STAC_9205_DELL_M43] = {
4006 .type = HDA_FIXUP_FUNC,
4007 .v.func = stac9205_fixup_dell_m43,
4009 [STAC_9205_DELL_M44] = {
4010 .type = HDA_FIXUP_PINS,
4011 .v.pins = dell_9205_m44_pin_configs,
4013 [STAC_9205_EAPD] = {
4014 .type = HDA_FIXUP_FUNC,
4015 .v.func = stac9205_fixup_eapd,
4020 static const struct hda_model_fixup stac9205_models[] = {
4021 { .id = STAC_9205_REF, .name = "ref" },
4022 { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
4023 { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
4024 { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
4025 { .id = STAC_9205_EAPD, .name = "eapd" },
4029 static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
4030 /* SigmaTel reference board */
4031 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
4032 "DFI LanParty", STAC_9205_REF),
4033 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
4034 "SigmaTel", STAC_9205_REF),
4035 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
4036 "DFI LanParty", STAC_9205_REF),
4038 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
4039 "unknown Dell", STAC_9205_DELL_M42),
4040 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
4041 "unknown Dell", STAC_9205_DELL_M42),
4042 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
4043 "Dell Precision", STAC_9205_DELL_M43),
4044 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
4045 "Dell Precision", STAC_9205_DELL_M43),
4046 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
4047 "Dell Precision", STAC_9205_DELL_M43),
4048 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
4049 "unknown Dell", STAC_9205_DELL_M42),
4050 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
4051 "unknown Dell", STAC_9205_DELL_M42),
4052 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
4053 "Dell Precision", STAC_9205_DELL_M43),
4054 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
4055 "Dell Precision M4300", STAC_9205_DELL_M43),
4056 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
4057 "unknown Dell", STAC_9205_DELL_M42),
4058 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
4059 "Dell Precision", STAC_9205_DELL_M43),
4060 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
4061 "Dell Precision", STAC_9205_DELL_M43),
4062 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
4063 "Dell Precision", STAC_9205_DELL_M43),
4064 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
4065 "Dell Inspiron", STAC_9205_DELL_M44),
4066 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
4067 "Dell Vostro 1500", STAC_9205_DELL_M42),
4068 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
4069 "Dell Vostro 1700", STAC_9205_DELL_M42),
4071 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
4072 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
4076 static int stac_parse_auto_config(struct hda_codec *codec)
4078 struct sigmatel_spec *spec = codec->spec;
4082 if (spec->headset_jack)
4083 flags |= HDA_PINCFG_HEADSET_MIC;
4085 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
4090 spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
4091 spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
4093 spec->gen.automute_hook = stac_update_outputs;
4094 spec->gen.hp_automute_hook = stac_hp_automute;
4095 spec->gen.line_automute_hook = stac_line_automute;
4096 spec->gen.mic_autoswitch_hook = stac_mic_autoswitch;
4098 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
4102 /* minimum value is actually mute */
4103 spec->gen.vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
4105 /* setup analog beep controls */
4106 if (spec->anabeep_nid > 0) {
4107 err = stac_auto_create_beep_ctls(codec,
4113 /* setup digital beep controls and input device */
4114 #ifdef CONFIG_SND_HDA_INPUT_BEEP
4115 if (spec->gen.beep_nid) {
4116 hda_nid_t nid = spec->gen.beep_nid;
4119 err = stac_auto_create_beep_ctls(codec, nid);
4123 /* IDT/STAC codecs have linear beep tone parameter */
4124 codec->beep->linear_tone = spec->linear_tone_beep;
4125 /* if no beep switch is available, make its own one */
4126 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
4127 if (!(caps & AC_AMPCAP_MUTE)) {
4128 err = stac_beep_switch_ctl(codec);
4137 spec->gen.vmaster_mute.hook = stac_vmaster_hook;
4139 if (spec->aloopback_ctl &&
4140 snd_hda_get_bool_hint(codec, "loopback") == 1) {
4141 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
4145 if (spec->have_spdif_mux) {
4146 err = stac_create_spdif_mux_ctls(codec);
4151 stac_init_power_map(codec);
4157 static int stac_init(struct hda_codec *codec)
4159 struct sigmatel_spec *spec = codec->spec;
4162 /* override some hints */
4163 stac_store_hints(codec);
4166 /* turn on EAPD statically when spec->eapd_switch isn't set.
4167 * otherwise, unsol event will turn it on/off dynamically
4169 if (!spec->eapd_switch)
4170 spec->gpio_data |= spec->eapd_mask;
4171 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
4173 snd_hda_gen_init(codec);
4175 /* sync the power-map */
4177 snd_hda_codec_write(codec, codec->afg, 0,
4178 AC_VERB_IDT_SET_POWER_MAP,
4179 spec->power_map_bits);
4181 /* power down inactive ADCs */
4182 if (spec->powerdown_adcs) {
4183 for (i = 0; i < spec->gen.num_all_adcs; i++) {
4184 if (spec->active_adcs & (1 << i))
4186 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
4187 AC_VERB_SET_POWER_STATE,
4195 static void stac_shutup(struct hda_codec *codec)
4197 struct sigmatel_spec *spec = codec->spec;
4199 snd_hda_shutup_pins(codec);
4201 if (spec->eapd_mask)
4202 stac_gpio_set(codec, spec->gpio_mask,
4203 spec->gpio_dir, spec->gpio_data &
4207 #define stac_free snd_hda_gen_free
4209 #ifdef CONFIG_PROC_FS
4210 static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4211 struct hda_codec *codec, hda_nid_t nid)
4213 if (nid == codec->afg)
4214 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4215 snd_hda_codec_read(codec, nid, 0,
4216 AC_VERB_IDT_GET_POWER_MAP, 0));
4219 static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4220 struct hda_codec *codec,
4223 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4224 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4227 /* stac92hd71bxx, stac92hd73xx */
4228 static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4229 struct hda_codec *codec, hda_nid_t nid)
4231 stac92hd_proc_hook(buffer, codec, nid);
4232 if (nid == codec->afg)
4233 analog_loop_proc_hook(buffer, codec, 0xfa0);
4236 static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4237 struct hda_codec *codec, hda_nid_t nid)
4239 if (nid == codec->afg)
4240 analog_loop_proc_hook(buffer, codec, 0xfe0);
4243 static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4244 struct hda_codec *codec, hda_nid_t nid)
4246 if (nid == codec->afg)
4247 analog_loop_proc_hook(buffer, codec, 0xfeb);
4250 #define stac92hd_proc_hook NULL
4251 #define stac92hd7x_proc_hook NULL
4252 #define stac9205_proc_hook NULL
4253 #define stac927x_proc_hook NULL
4257 static int stac_suspend(struct hda_codec *codec)
4263 static void stac_set_power_state(struct hda_codec *codec, hda_nid_t fg,
4264 unsigned int power_state)
4266 unsigned int afg_power_state = power_state;
4267 struct sigmatel_spec *spec = codec->spec;
4269 if (power_state == AC_PWRST_D3) {
4270 if (spec->vref_mute_led_nid) {
4271 /* with vref-out pin used for mute led control
4272 * codec AFG is prevented from D3 state
4274 afg_power_state = AC_PWRST_D1;
4276 /* this delay seems necessary to avoid click noise at power-down */
4279 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE,
4281 snd_hda_codec_set_power_to_all(codec, fg, power_state);
4284 #define stac_suspend NULL
4285 #define stac_set_power_state NULL
4286 #endif /* CONFIG_PM */
4288 static const struct hda_codec_ops stac_patch_ops = {
4289 .build_controls = snd_hda_gen_build_controls,
4290 .build_pcms = snd_hda_gen_build_pcms,
4293 .unsol_event = snd_hda_jack_unsol_event,
4295 .suspend = stac_suspend,
4297 .reboot_notify = stac_shutup,
4300 static int alloc_stac_spec(struct hda_codec *codec)
4302 struct sigmatel_spec *spec;
4304 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4307 snd_hda_gen_spec_init(&spec->gen);
4309 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
4313 static int patch_stac9200(struct hda_codec *codec)
4315 struct sigmatel_spec *spec;
4318 err = alloc_stac_spec(codec);
4323 spec->linear_tone_beep = 1;
4324 spec->gen.own_eapd_ctl = 1;
4326 codec->patch_ops = stac_patch_ops;
4327 codec->power_filter = snd_hda_codec_eapd_power_filter;
4329 snd_hda_add_verbs(codec, stac9200_eapd_init);
4331 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
4333 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4335 err = stac_parse_auto_config(codec);
4341 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4346 static int patch_stac925x(struct hda_codec *codec)
4348 struct sigmatel_spec *spec;
4351 err = alloc_stac_spec(codec);
4356 spec->linear_tone_beep = 1;
4357 spec->gen.own_eapd_ctl = 1;
4359 codec->patch_ops = stac_patch_ops;
4361 snd_hda_add_verbs(codec, stac925x_core_init);
4363 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
4365 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4367 err = stac_parse_auto_config(codec);
4373 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4378 static int patch_stac92hd73xx(struct hda_codec *codec)
4380 struct sigmatel_spec *spec;
4384 err = alloc_stac_spec(codec);
4389 spec->linear_tone_beep = 0;
4390 spec->gen.mixer_nid = 0x1d;
4391 spec->have_spdif_mux = 1;
4393 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
4394 if (num_dacs < 3 || num_dacs > 5) {
4395 printk(KERN_WARNING "hda_codec: Could not determine "
4396 "number of channels defaulting to DAC count\n");
4401 case 0x3: /* 6 Channel */
4402 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
4404 case 0x4: /* 8 Channel */
4405 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
4407 case 0x5: /* 10 Channel */
4408 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
4412 spec->aloopback_mask = 0x01;
4413 spec->aloopback_shift = 8;
4415 spec->gen.beep_nid = 0x1c; /* digital beep */
4417 /* GPIO0 High = Enable EAPD */
4418 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4419 spec->gpio_data = 0x01;
4421 spec->eapd_switch = 1;
4423 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4424 spec->pwr_nids = stac92hd73xx_pwr_nids;
4426 spec->gen.own_eapd_ctl = 1;
4427 spec->gen.power_down_unused = 1;
4429 codec->patch_ops = stac_patch_ops;
4431 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
4432 stac92hd73xx_fixups);
4433 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4435 if (!spec->volknob_init)
4436 snd_hda_add_verbs(codec, stac92hd73xx_core_init);
4438 err = stac_parse_auto_config(codec);
4444 /* Don't GPIO-mute speakers if there are no internal speakers, because
4445 * the GPIO might be necessary for Headphone
4447 if (spec->eapd_switch && !has_builtin_speaker(codec))
4448 spec->eapd_switch = 0;
4450 codec->proc_widget_hook = stac92hd7x_proc_hook;
4452 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4457 static void stac_setup_gpio(struct hda_codec *codec)
4459 struct sigmatel_spec *spec = codec->spec;
4461 spec->gpio_mask |= spec->eapd_mask;
4462 if (spec->gpio_led) {
4463 if (!spec->vref_mute_led_nid) {
4464 spec->gpio_mask |= spec->gpio_led;
4465 spec->gpio_dir |= spec->gpio_led;
4466 spec->gpio_data |= spec->gpio_led;
4468 codec->patch_ops.set_power_state =
4469 stac_set_power_state;
4473 if (spec->mic_mute_led_gpio) {
4474 spec->gpio_mask |= spec->mic_mute_led_gpio;
4475 spec->gpio_dir |= spec->mic_mute_led_gpio;
4476 spec->mic_mute_led_on = true;
4477 spec->gpio_data |= spec->mic_mute_led_gpio;
4479 spec->gen.cap_sync_hook = stac_capture_led_hook;
4483 static int patch_stac92hd83xxx(struct hda_codec *codec)
4485 struct sigmatel_spec *spec;
4488 err = alloc_stac_spec(codec);
4492 codec->epss = 0; /* longer delay needed for D3 */
4495 spec->linear_tone_beep = 0;
4496 spec->gen.own_eapd_ctl = 1;
4497 spec->gen.power_down_unused = 1;
4498 spec->gen.mixer_nid = 0x1b;
4500 spec->gen.beep_nid = 0x21; /* digital beep */
4501 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4502 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4503 spec->default_polarity = -1; /* no default cfg */
4505 codec->patch_ops = stac_patch_ops;
4507 snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
4509 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
4510 stac92hd83xxx_fixups);
4511 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4513 stac_setup_gpio(codec);
4515 err = stac_parse_auto_config(codec);
4521 codec->proc_widget_hook = stac92hd_proc_hook;
4523 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4528 static const hda_nid_t stac92hd95_pwr_nids[] = {
4529 0x0a, 0x0b, 0x0c, 0x0d
4532 static int patch_stac92hd95(struct hda_codec *codec)
4534 struct sigmatel_spec *spec;
4537 err = alloc_stac_spec(codec);
4541 codec->epss = 0; /* longer delay needed for D3 */
4544 spec->linear_tone_beep = 0;
4545 spec->gen.own_eapd_ctl = 1;
4546 spec->gen.power_down_unused = 1;
4548 spec->gen.beep_nid = 0x19; /* digital beep */
4549 spec->pwr_nids = stac92hd95_pwr_nids;
4550 spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
4551 spec->default_polarity = -1; /* no default cfg */
4553 codec->patch_ops = stac_patch_ops;
4555 err = stac_parse_auto_config(codec);
4561 codec->proc_widget_hook = stac92hd_proc_hook;
4566 static int patch_stac92hd71bxx(struct hda_codec *codec)
4568 struct sigmatel_spec *spec;
4569 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
4572 err = alloc_stac_spec(codec);
4577 spec->linear_tone_beep = 0;
4578 spec->gen.own_eapd_ctl = 1;
4579 spec->gen.power_down_unused = 1;
4580 spec->gen.mixer_nid = 0x17;
4581 spec->have_spdif_mux = 1;
4583 codec->patch_ops = stac_patch_ops;
4586 spec->gpio_mask = 0x01;
4587 spec->gpio_dir = 0x01;
4588 spec->gpio_data = 0x01;
4590 switch (codec->vendor_id) {
4591 case 0x111d76b6: /* 4 Port without Analog Mixer */
4595 case 0x111d7608: /* 5 Port with Analog Mixer */
4596 if ((codec->revision_id & 0xf) == 0 ||
4597 (codec->revision_id & 0xf) == 1)
4598 spec->stream_delay = 40; /* 40 milliseconds */
4602 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
4603 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
4605 case 0x111d7603: /* 6 Port with Analog Mixer */
4606 if ((codec->revision_id & 0xf) == 1)
4607 spec->stream_delay = 40; /* 40 milliseconds */
4612 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
4613 snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
4615 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
4616 snd_hda_sequence_write_cache(codec, unmute_init);
4618 spec->aloopback_ctl = &stac92hd71bxx_loopback;
4619 spec->aloopback_mask = 0x50;
4620 spec->aloopback_shift = 0;
4622 spec->powerdown_adcs = 1;
4623 spec->gen.beep_nid = 0x26; /* digital beep */
4624 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
4625 spec->pwr_nids = stac92hd71bxx_pwr_nids;
4627 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
4628 stac92hd71bxx_fixups);
4629 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4631 stac_setup_gpio(codec);
4633 err = stac_parse_auto_config(codec);
4639 codec->proc_widget_hook = stac92hd7x_proc_hook;
4641 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4646 static int patch_stac922x(struct hda_codec *codec)
4648 struct sigmatel_spec *spec;
4651 err = alloc_stac_spec(codec);
4656 spec->linear_tone_beep = 1;
4657 spec->gen.own_eapd_ctl = 1;
4659 codec->patch_ops = stac_patch_ops;
4661 snd_hda_add_verbs(codec, stac922x_core_init);
4663 /* Fix Mux capture level; max to 2 */
4664 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4665 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4666 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4667 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4668 (0 << AC_AMPCAP_MUTE_SHIFT));
4670 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
4672 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4674 err = stac_parse_auto_config(codec);
4680 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4685 static const char * const stac927x_spdif_labels[] = {
4686 "Digital Playback", "ADAT", "Analog Mux 1",
4687 "Analog Mux 2", "Analog Mux 3", NULL
4690 static int patch_stac927x(struct hda_codec *codec)
4692 struct sigmatel_spec *spec;
4695 err = alloc_stac_spec(codec);
4700 spec->linear_tone_beep = 1;
4701 spec->gen.own_eapd_ctl = 1;
4702 spec->have_spdif_mux = 1;
4703 spec->spdif_labels = stac927x_spdif_labels;
4705 spec->gen.beep_nid = 0x23; /* digital beep */
4707 /* GPIO0 High = Enable EAPD */
4708 spec->eapd_mask = spec->gpio_mask = 0x01;
4709 spec->gpio_dir = spec->gpio_data = 0x01;
4711 spec->aloopback_ctl = &stac927x_loopback;
4712 spec->aloopback_mask = 0x40;
4713 spec->aloopback_shift = 0;
4714 spec->eapd_switch = 1;
4716 codec->patch_ops = stac_patch_ops;
4718 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
4720 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4722 if (!spec->volknob_init)
4723 snd_hda_add_verbs(codec, stac927x_core_init);
4725 err = stac_parse_auto_config(codec);
4731 codec->proc_widget_hook = stac927x_proc_hook;
4735 * The STAC927x seem to require fairly long delays for certain
4736 * command sequences. With too short delays (even if the answer
4737 * is set to RIRB properly), it results in the silence output
4738 * on some hardwares like Dell.
4740 * The below flag enables the longer delay (see get_response
4743 codec->bus->needs_damn_long_delay = 1;
4745 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4750 static int patch_stac9205(struct hda_codec *codec)
4752 struct sigmatel_spec *spec;
4755 err = alloc_stac_spec(codec);
4760 spec->linear_tone_beep = 1;
4761 spec->gen.own_eapd_ctl = 1;
4762 spec->have_spdif_mux = 1;
4764 spec->gen.beep_nid = 0x23; /* digital beep */
4766 snd_hda_add_verbs(codec, stac9205_core_init);
4767 spec->aloopback_ctl = &stac9205_loopback;
4769 spec->aloopback_mask = 0x40;
4770 spec->aloopback_shift = 0;
4772 /* GPIO0 High = EAPD */
4773 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4774 spec->gpio_data = 0x01;
4776 /* Turn on/off EAPD per HP plugging */
4777 spec->eapd_switch = 1;
4779 codec->patch_ops = stac_patch_ops;
4781 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
4783 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4785 err = stac_parse_auto_config(codec);
4791 codec->proc_widget_hook = stac9205_proc_hook;
4793 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4802 static const struct hda_verb stac9872_core_init[] = {
4803 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
4804 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4808 static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
4809 { 0x0a, 0x03211020 },
4810 { 0x0b, 0x411111f0 },
4811 { 0x0c, 0x411111f0 },
4812 { 0x0d, 0x03a15030 },
4813 { 0x0e, 0x411111f0 },
4814 { 0x0f, 0x90170110 },
4815 { 0x11, 0x411111f0 },
4816 { 0x13, 0x411111f0 },
4817 { 0x14, 0x90a7013e },
4821 static const struct hda_model_fixup stac9872_models[] = {
4822 { .id = STAC_9872_VAIO, .name = "vaio" },
4826 static const struct hda_fixup stac9872_fixups[] = {
4827 [STAC_9872_VAIO] = {
4828 .type = HDA_FIXUP_PINS,
4829 .v.pins = stac9872_vaio_pin_configs,
4833 static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
4834 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
4835 "Sony VAIO F/S", STAC_9872_VAIO),
4839 static int patch_stac9872(struct hda_codec *codec)
4841 struct sigmatel_spec *spec;
4844 err = alloc_stac_spec(codec);
4849 spec->linear_tone_beep = 1;
4850 spec->gen.own_eapd_ctl = 1;
4852 codec->patch_ops = stac_patch_ops;
4854 snd_hda_add_verbs(codec, stac9872_core_init);
4856 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
4858 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4860 err = stac_parse_auto_config(codec);
4866 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4875 static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4876 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4877 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4878 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4879 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4880 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4881 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4882 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
4883 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4884 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4885 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4886 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4887 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4888 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
4889 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4890 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4891 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4892 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4893 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4894 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4895 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4896 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4897 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4898 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
4899 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4900 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4901 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4902 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4903 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4904 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
4905 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
4906 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
4907 /* The following does not take into account .id=0x83847661 when subsys =
4908 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4909 * currently not fully supported.
4911 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4912 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4913 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
4914 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
4915 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4916 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4917 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4918 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4919 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4920 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4921 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4922 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
4923 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
4924 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
4925 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
4926 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
4927 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
4928 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
4929 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
4930 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
4931 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
4932 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
4933 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
4934 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
4935 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4936 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
4937 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
4938 { .id = 0x111d7695, .name = "92HD95", .patch = patch_stac92hd95 },
4939 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4940 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4941 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4942 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4943 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4944 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4945 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4946 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4947 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
4948 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
4949 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
4950 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
4951 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
4952 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
4953 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
4954 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
4955 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
4956 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
4957 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
4958 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
4959 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
4960 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
4961 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
4962 { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
4963 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
4964 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
4965 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
4966 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
4967 { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
4968 { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
4969 { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
4970 { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
4971 { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
4972 { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
4973 { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
4974 { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
4975 { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
4976 { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
4977 { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
4978 { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
4982 MODULE_ALIAS("snd-hda-codec-id:8384*");
4983 MODULE_ALIAS("snd-hda-codec-id:111d*");
4985 MODULE_LICENSE("GPL");
4986 MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
4988 static struct hda_codec_preset_list sigmatel_list = {
4989 .preset = snd_hda_preset_sigmatel,
4990 .owner = THIS_MODULE,
4993 static int __init patch_sigmatel_init(void)
4995 return snd_hda_add_codec_preset(&sigmatel_list);
4998 static void __exit patch_sigmatel_exit(void)
5000 snd_hda_delete_codec_preset(&sigmatel_list);
5003 module_init(patch_sigmatel_init)
5004 module_exit(patch_sigmatel_exit)