sound/pci/hda/patch_hdmi.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *
   4  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   5  *
   6  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   7  *  Copyright (c) 2006 ATI Technologies Inc.
   8  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   9  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  10  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  11  *
  12  *  Authors:
  13  *                      Wu Fengguang <wfg@linux.intel.com>
  14  *
  15  *  Maintained by:
  16  *                      Wu Fengguang <wfg@linux.intel.com>
  17  */
  18
  19 #include <linux/init.h>
  20 #include <linux/delay.h>
  21 #include <linux/pci.h>
  22 #include <linux/slab.h>
  23 #include <linux/module.h>
  24 #include <linux/pm_runtime.h>
  25 #include <sound/core.h>
  26 #include <sound/jack.h>
  27 #include <sound/asoundef.h>
  28 #include <sound/tlv.h>
  29 #include <sound/hdaudio.h>
  30 #include <sound/hda_i915.h>
  31 #include <sound/hda_chmap.h>
  32 #include <sound/hda_codec.h>
  33 #include "hda_local.h"
  34 #include "hda_jack.h"
  35 #include "hda_controller.h"
  36
  37 static bool static_hdmi_pcm;
  38 module_param(static_hdmi_pcm, bool, 0644);
  39 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  40
  41 static bool enable_acomp = true;
  42 module_param(enable_acomp, bool, 0444);
  43 MODULE_PARM_DESC(enable_acomp, "Enable audio component binding (default=yes)");
  44
  45 static bool enable_silent_stream =
  46 IS_ENABLED(CONFIG_SND_HDA_INTEL_HDMI_SILENT_STREAM);
  47 module_param(enable_silent_stream, bool, 0644);
  48 MODULE_PARM_DESC(enable_silent_stream, "Enable Silent Stream for HDMI devices");
  49
  50 struct hdmi_spec_per_cvt {
  51         hda_nid_t cvt_nid;
  52         int assigned;
  53         unsigned int channels_min;
  54         unsigned int channels_max;
  55         u32 rates;
  56         u64 formats;
  57         unsigned int maxbps;
  58 };
  59
  60 /* max. connections to a widget */
  61 #define HDA_MAX_CONNECTIONS     32
  62
  63 struct hdmi_spec_per_pin {
  64         hda_nid_t pin_nid;
  65         int dev_id;
  66         /* pin idx, different device entries on the same pin use the same idx */
  67         int pin_nid_idx;
  68         int num_mux_nids;
  69         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  70         int mux_idx;
  71         hda_nid_t cvt_nid;
  72
  73         struct hda_codec *codec;
  74         struct hdmi_eld sink_eld;
  75         struct mutex lock;
  76         struct delayed_work work;
  77         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  78         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  79         int repoll_count;
  80         bool setup; /* the stream has been set up by prepare callback */
  81         bool silent_stream;
  82         int channels; /* current number of channels */
  83         bool non_pcm;
  84         bool chmap_set;         /* channel-map override by ALSA API? */
  85         unsigned char chmap[8]; /* ALSA API channel-map */
  86 #ifdef CONFIG_SND_PROC_FS
  87         struct snd_info_entry *proc_entry;
  88 #endif
  89 };
  90
  91 /* operations used by generic code that can be overridden by patches */
  92 struct hdmi_ops {
  93         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
  94                            int dev_id, unsigned char *buf, int *eld_size);
  95
  96         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
  97                                     int dev_id,
  98                                     int ca, int active_channels, int conn_type);
  99
 100         /* enable/disable HBR (HD passthrough) */
 101         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid,
 102                              int dev_id, bool hbr);
 103
 104         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 105                             hda_nid_t pin_nid, int dev_id, u32 stream_tag,
 106                             int format);
 107
 108         void (*pin_cvt_fixup)(struct hda_codec *codec,
 109                               struct hdmi_spec_per_pin *per_pin,
 110                               hda_nid_t cvt_nid);
 111 };
 112
 113 struct hdmi_pcm {
 114         struct hda_pcm *pcm;
 115         struct snd_jack *jack;
 116         struct snd_kcontrol *eld_ctl;
 117 };
 118
 119 struct hdmi_spec {
 120         struct hda_codec *codec;
 121         int num_cvts;
 122         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 123         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 124
 125         /*
 126          * num_pins is the number of virtual pins
 127          * for example, there are 3 pins, and each pin
 128          * has 4 device entries, then the num_pins is 12
 129          */
 130         int num_pins;
 131         /*
 132          * num_nids is the number of real pins
 133          * In the above example, num_nids is 3
 134          */
 135         int num_nids;
 136         /*
 137          * dev_num is the number of device entries
 138          * on each pin.
 139          * In the above example, dev_num is 4
 140          */
 141         int dev_num;
 142         struct snd_array pins; /* struct hdmi_spec_per_pin */
 143         struct hdmi_pcm pcm_rec[16];
 144         struct mutex pcm_lock;
 145         struct mutex bind_lock; /* for audio component binding */
 146         /* pcm_bitmap means which pcms have been assigned to pins*/
 147         unsigned long pcm_bitmap;
 148         int pcm_used;   /* counter of pcm_rec[] */
 149         /* bitmap shows whether the pcm is opened in user space
 150          * bit 0 means the first playback PCM (PCM3);
 151          * bit 1 means the second playback PCM, and so on.
 152          */
 153         unsigned long pcm_in_use;
 154
 155         struct hdmi_eld temp_eld;
 156         struct hdmi_ops ops;
 157
 158         bool dyn_pin_out;
 159         bool dyn_pcm_assign;
 160         bool dyn_pcm_no_legacy;
 161         bool intel_hsw_fixup;   /* apply Intel platform-specific fixups */
 162         /*
 163          * Non-generic VIA/NVIDIA specific
 164          */
 165         struct hda_multi_out multiout;
 166         struct hda_pcm_stream pcm_playback;
 167
 168         bool use_acomp_notifier; /* use eld_notify callback for hotplug */
 169         bool acomp_registered; /* audio component registered in this driver */
 170         bool force_connect; /* force connectivity */
 171         struct drm_audio_component_audio_ops drm_audio_ops;
 172         int (*port2pin)(struct hda_codec *, int); /* reverse port/pin mapping */
 173
 174         struct hdac_chmap chmap;
 175         hda_nid_t vendor_nid;
 176         const int *port_map;
 177         int port_num;
 178         bool send_silent_stream; /* Flag to enable silent stream feature */
 179 };
 180
 181 #ifdef CONFIG_SND_HDA_COMPONENT
 182 static inline bool codec_has_acomp(struct hda_codec *codec)
 183 {
 184         struct hdmi_spec *spec = codec->spec;
 185         return spec->use_acomp_notifier;
 186 }
 187 #else
 188 #define codec_has_acomp(codec)  false
 189 #endif
 190
 191 struct hdmi_audio_infoframe {
 192         u8 type; /* 0x84 */
 193         u8 ver;  /* 0x01 */
 194         u8 len;  /* 0x0a */
 195
 196         u8 checksum;
 197
 198         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 199         u8 SS01_SF24;
 200         u8 CXT04;
 201         u8 CA;
 202         u8 LFEPBL01_LSV36_DM_INH7;
 203 };
 204
 205 struct dp_audio_infoframe {
 206         u8 type; /* 0x84 */
 207         u8 len;  /* 0x1b */
 208         u8 ver;  /* 0x11 << 2 */
 209
 210         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 211         u8 SS01_SF24;
 212         u8 CXT04;
 213         u8 CA;
 214         u8 LFEPBL01_LSV36_DM_INH7;
 215 };
 216
 217 union audio_infoframe {
 218         struct hdmi_audio_infoframe hdmi;
 219         struct dp_audio_infoframe dp;
 220         u8 bytes[0];
 221 };
 222
 223 /*
 224  * HDMI routines
 225  */
 226
 227 #define get_pin(spec, idx) \
 228         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 229 #define get_cvt(spec, idx) \
 230         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 231 /* obtain hdmi_pcm object assigned to idx */
 232 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 233 /* obtain hda_pcm object assigned to idx */
 234 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 235
 236 static int pin_id_to_pin_index(struct hda_codec *codec,
 237                                hda_nid_t pin_nid, int dev_id)
 238 {
 239         struct hdmi_spec *spec = codec->spec;
 240         int pin_idx;
 241         struct hdmi_spec_per_pin *per_pin;
 242
 243         /*
 244          * (dev_id == -1) means it is NON-MST pin
 245          * return the first virtual pin on this port
 246          */
 247         if (dev_id == -1)
 248                 dev_id = 0;
 249
 250         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 251                 per_pin = get_pin(spec, pin_idx);
 252                 if ((per_pin->pin_nid == pin_nid) &&
 253                         (per_pin->dev_id == dev_id))
 254                         return pin_idx;
 255         }
 256
 257         codec_warn(codec, "HDMI: pin NID 0x%x not registered\n", pin_nid);
 258         return -EINVAL;
 259 }
 260
 261 static int hinfo_to_pcm_index(struct hda_codec *codec,
 262                         struct hda_pcm_stream *hinfo)
 263 {
 264         struct hdmi_spec *spec = codec->spec;
 265         int pcm_idx;
 266
 267         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 268                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 269                         return pcm_idx;
 270
 271         codec_warn(codec, "HDMI: hinfo %p not tied to a PCM\n", hinfo);
 272         return -EINVAL;
 273 }
 274
 275 static int hinfo_to_pin_index(struct hda_codec *codec,
 276                               struct hda_pcm_stream *hinfo)
 277 {
 278         struct hdmi_spec *spec = codec->spec;
 279         struct hdmi_spec_per_pin *per_pin;
 280         int pin_idx;
 281
 282         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 283                 per_pin = get_pin(spec, pin_idx);
 284                 if (per_pin->pcm &&
 285                         per_pin->pcm->pcm->stream == hinfo)
 286                         return pin_idx;
 287         }
 288
 289         codec_dbg(codec, "HDMI: hinfo %p (pcm %d) not registered\n", hinfo,
 290                   hinfo_to_pcm_index(codec, hinfo));
 291         return -EINVAL;
 292 }
 293
 294 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
 295                                                 int pcm_idx)
 296 {
 297         int i;
 298         struct hdmi_spec_per_pin *per_pin;
 299
 300         for (i = 0; i < spec->num_pins; i++) {
 301                 per_pin = get_pin(spec, i);
 302                 if (per_pin->pcm_idx == pcm_idx)
 303                         return per_pin;
 304         }
 305         return NULL;
 306 }
 307
 308 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 309 {
 310         struct hdmi_spec *spec = codec->spec;
 311         int cvt_idx;
 312
 313         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 314                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 315                         return cvt_idx;
 316
 317         codec_warn(codec, "HDMI: cvt NID 0x%x not registered\n", cvt_nid);
 318         return -EINVAL;
 319 }
 320
 321 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 322                         struct snd_ctl_elem_info *uinfo)
 323 {
 324         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 325         struct hdmi_spec *spec = codec->spec;
 326         struct hdmi_spec_per_pin *per_pin;
 327         struct hdmi_eld *eld;
 328         int pcm_idx;
 329
 330         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 331
 332         pcm_idx = kcontrol->private_value;
 333         mutex_lock(&spec->pcm_lock);
 334         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 335         if (!per_pin) {
 336                 /* no pin is bound to the pcm */
 337                 uinfo->count = 0;
 338                 goto unlock;
 339         }
 340         eld = &per_pin->sink_eld;
 341         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 342
 343  unlock:
 344         mutex_unlock(&spec->pcm_lock);
 345         return 0;
 346 }
 347
 348 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 349                         struct snd_ctl_elem_value *ucontrol)
 350 {
 351         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 352         struct hdmi_spec *spec = codec->spec;
 353         struct hdmi_spec_per_pin *per_pin;
 354         struct hdmi_eld *eld;
 355         int pcm_idx;
 356         int err = 0;
 357
 358         pcm_idx = kcontrol->private_value;
 359         mutex_lock(&spec->pcm_lock);
 360         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 361         if (!per_pin) {
 362                 /* no pin is bound to the pcm */
 363                 memset(ucontrol->value.bytes.data, 0,
 364                        ARRAY_SIZE(ucontrol->value.bytes.data));
 365                 goto unlock;
 366         }
 367
 368         eld = &per_pin->sink_eld;
 369         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
 370             eld->eld_size > ELD_MAX_SIZE) {
 371                 snd_BUG();
 372                 err = -EINVAL;
 373                 goto unlock;
 374         }
 375
 376         memset(ucontrol->value.bytes.data, 0,
 377                ARRAY_SIZE(ucontrol->value.bytes.data));
 378         if (eld->eld_valid)
 379                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 380                        eld->eld_size);
 381
 382  unlock:
 383         mutex_unlock(&spec->pcm_lock);
 384         return err;
 385 }
 386
 387 static const struct snd_kcontrol_new eld_bytes_ctl = {
 388         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE |
 389                 SNDRV_CTL_ELEM_ACCESS_SKIP_CHECK,
 390         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 391         .name = "ELD",
 392         .info = hdmi_eld_ctl_info,
 393         .get = hdmi_eld_ctl_get,
 394 };
 395
 396 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
 397                         int device)
 398 {
 399         struct snd_kcontrol *kctl;
 400         struct hdmi_spec *spec = codec->spec;
 401         int err;
 402
 403         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 404         if (!kctl)
 405                 return -ENOMEM;
 406         kctl->private_value = pcm_idx;
 407         kctl->id.device = device;
 408
 409         /* no pin nid is associated with the kctl now
 410          * tbd: associate pin nid to eld ctl later
 411          */
 412         err = snd_hda_ctl_add(codec, 0, kctl);
 413         if (err < 0)
 414                 return err;
 415
 416         get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
 417         return 0;
 418 }
 419
 420 #ifdef BE_PARANOID
 421 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 422                                 int *packet_index, int *byte_index)
 423 {
 424         int val;
 425
 426         val = snd_hda_codec_read(codec, pin_nid, 0,
 427                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 428
 429         *packet_index = val >> 5;
 430         *byte_index = val & 0x1f;
 431 }
 432 #endif
 433
 434 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 435                                 int packet_index, int byte_index)
 436 {
 437         int val;
 438
 439         val = (packet_index << 5) | (byte_index & 0x1f);
 440
 441         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 442 }
 443
 444 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 445                                 unsigned char val)
 446 {
 447         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 448 }
 449
 450 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 451 {
 452         struct hdmi_spec *spec = codec->spec;
 453         int pin_out;
 454
 455         /* Unmute */
 456         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 457                 snd_hda_codec_write(codec, pin_nid, 0,
 458                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 459
 460         if (spec->dyn_pin_out)
 461                 /* Disable pin out until stream is active */
 462                 pin_out = 0;
 463         else
 464                 /* Enable pin out: some machines with GM965 gets broken output
 465                  * when the pin is disabled or changed while using with HDMI
 466                  */
 467                 pin_out = PIN_OUT;
 468
 469         snd_hda_codec_write(codec, pin_nid, 0,
 470                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 471 }
 472
 473 /*
 474  * ELD proc files
 475  */
 476
 477 #ifdef CONFIG_SND_PROC_FS
 478 static void print_eld_info(struct snd_info_entry *entry,
 479                            struct snd_info_buffer *buffer)
 480 {
 481         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 482
 483         mutex_lock(&per_pin->lock);
 484         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 485         mutex_unlock(&per_pin->lock);
 486 }
 487
 488 static void write_eld_info(struct snd_info_entry *entry,
 489                            struct snd_info_buffer *buffer)
 490 {
 491         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 492
 493         mutex_lock(&per_pin->lock);
 494         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 495         mutex_unlock(&per_pin->lock);
 496 }
 497
 498 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 499 {
 500         char name[32];
 501         struct hda_codec *codec = per_pin->codec;
 502         struct snd_info_entry *entry;
 503         int err;
 504
 505         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 506         err = snd_card_proc_new(codec->card, name, &entry);
 507         if (err < 0)
 508                 return err;
 509
 510         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 511         entry->c.text.write = write_eld_info;
 512         entry->mode |= 0200;
 513         per_pin->proc_entry = entry;
 514
 515         return 0;
 516 }
 517
 518 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 519 {
 520         if (!per_pin->codec->bus->shutdown) {
 521                 snd_info_free_entry(per_pin->proc_entry);
 522                 per_pin->proc_entry = NULL;
 523         }
 524 }
 525 #else
 526 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 527                                int index)
 528 {
 529         return 0;
 530 }
 531 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 532 {
 533 }
 534 #endif
 535
 536 /*
 537  * Audio InfoFrame routines
 538  */
 539
 540 /*
 541  * Enable Audio InfoFrame Transmission
 542  */
 543 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 544                                        hda_nid_t pin_nid)
 545 {
 546         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 547         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 548                                                 AC_DIPXMIT_BEST);
 549 }
 550
 551 /*
 552  * Disable Audio InfoFrame Transmission
 553  */
 554 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 555                                       hda_nid_t pin_nid)
 556 {
 557         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 558         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 559                                                 AC_DIPXMIT_DISABLE);
 560 }
 561
 562 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 563 {
 564 #ifdef CONFIG_SND_DEBUG_VERBOSE
 565         int i;
 566         int size;
 567
 568         size = snd_hdmi_get_eld_size(codec, pin_nid);
 569         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 570
 571         for (i = 0; i < 8; i++) {
 572                 size = snd_hda_codec_read(codec, pin_nid, 0,
 573                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 574                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 575         }
 576 #endif
 577 }
 578
 579 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 580 {
 581 #ifdef BE_PARANOID
 582         int i, j;
 583         int size;
 584         int pi, bi;
 585         for (i = 0; i < 8; i++) {
 586                 size = snd_hda_codec_read(codec, pin_nid, 0,
 587                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 588                 if (size == 0)
 589                         continue;
 590
 591                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 592                 for (j = 1; j < 1000; j++) {
 593                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 594                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 595                         if (pi != i)
 596                                 codec_dbg(codec, "dip index %d: %d != %d\n",
 597                                                 bi, pi, i);
 598                         if (bi == 0) /* byte index wrapped around */
 599                                 break;
 600                 }
 601                 codec_dbg(codec,
 602                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 603                         i, size, j);
 604         }
 605 #endif
 606 }
 607
 608 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 609 {
 610         u8 *bytes = (u8 *)hdmi_ai;
 611         u8 sum = 0;
 612         int i;
 613
 614         hdmi_ai->checksum = 0;
 615
 616         for (i = 0; i < sizeof(*hdmi_ai); i++)
 617                 sum += bytes[i];
 618
 619         hdmi_ai->checksum = -sum;
 620 }
 621
 622 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 623                                       hda_nid_t pin_nid,
 624                                       u8 *dip, int size)
 625 {
 626         int i;
 627
 628         hdmi_debug_dip_size(codec, pin_nid);
 629         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 630
 631         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 632         for (i = 0; i < size; i++)
 633                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 634 }
 635
 636 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 637                                     u8 *dip, int size)
 638 {
 639         u8 val;
 640         int i;
 641
 642         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 643         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 644                                                             != AC_DIPXMIT_BEST)
 645                 return false;
 646
 647         for (i = 0; i < size; i++) {
 648                 val = snd_hda_codec_read(codec, pin_nid, 0,
 649                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 650                 if (val != dip[i])
 651                         return false;
 652         }
 653
 654         return true;
 655 }
 656
 657 static int hdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
 658                             int dev_id, unsigned char *buf, int *eld_size)
 659 {
 660         snd_hda_set_dev_select(codec, nid, dev_id);
 661
 662         return snd_hdmi_get_eld(codec, nid, buf, eld_size);
 663 }
 664
 665 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
 666                                      hda_nid_t pin_nid, int dev_id,
 667                                      int ca, int active_channels,
 668                                      int conn_type)
 669 {
 670         union audio_infoframe ai;
 671
 672         memset(&ai, 0, sizeof(ai));
 673         if (conn_type == 0) { /* HDMI */
 674                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 675
 676                 hdmi_ai->type           = 0x84;
 677                 hdmi_ai->ver            = 0x01;
 678                 hdmi_ai->len            = 0x0a;
 679                 hdmi_ai->CC02_CT47      = active_channels - 1;
 680                 hdmi_ai->CA             = ca;
 681                 hdmi_checksum_audio_infoframe(hdmi_ai);
 682         } else if (conn_type == 1) { /* DisplayPort */
 683                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 684
 685                 dp_ai->type             = 0x84;
 686                 dp_ai->len              = 0x1b;
 687                 dp_ai->ver              = 0x11 << 2;
 688                 dp_ai->CC02_CT47        = active_channels - 1;
 689                 dp_ai->CA               = ca;
 690         } else {
 691                 codec_dbg(codec, "HDMI: unknown connection type at pin NID 0x%x\n", pin_nid);
 692                 return;
 693         }
 694
 695         snd_hda_set_dev_select(codec, pin_nid, dev_id);
 696
 697         /*
 698          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 699          * sizeof(*dp_ai) to avoid partial match/update problems when
 700          * the user switches between HDMI/DP monitors.
 701          */
 702         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 703                                         sizeof(ai))) {
 704                 codec_dbg(codec, "%s: pin NID=0x%x channels=%d ca=0x%02x\n",
 705                           __func__, pin_nid, active_channels, ca);
 706                 hdmi_stop_infoframe_trans(codec, pin_nid);
 707                 hdmi_fill_audio_infoframe(codec, pin_nid,
 708                                             ai.bytes, sizeof(ai));
 709                 hdmi_start_infoframe_trans(codec, pin_nid);
 710         }
 711 }
 712
 713 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
 714                                        struct hdmi_spec_per_pin *per_pin,
 715                                        bool non_pcm)
 716 {
 717         struct hdmi_spec *spec = codec->spec;
 718         struct hdac_chmap *chmap = &spec->chmap;
 719         hda_nid_t pin_nid = per_pin->pin_nid;
 720         int dev_id = per_pin->dev_id;
 721         int channels = per_pin->channels;
 722         int active_channels;
 723         struct hdmi_eld *eld;
 724         int ca;
 725
 726         if (!channels)
 727                 return;
 728
 729         snd_hda_set_dev_select(codec, pin_nid, dev_id);
 730
 731         /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
 732         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 733                 snd_hda_codec_write(codec, pin_nid, 0,
 734                                             AC_VERB_SET_AMP_GAIN_MUTE,
 735                                             AMP_OUT_UNMUTE);
 736
 737         eld = &per_pin->sink_eld;
 738
 739         ca = snd_hdac_channel_allocation(&codec->core,
 740                         eld->info.spk_alloc, channels,
 741                         per_pin->chmap_set, non_pcm, per_pin->chmap);
 742
 743         active_channels = snd_hdac_get_active_channels(ca);
 744
 745         chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
 746                                                 active_channels);
 747
 748         /*
 749          * always configure channel mapping, it may have been changed by the
 750          * user in the meantime
 751          */
 752         snd_hdac_setup_channel_mapping(&spec->chmap,
 753                                 pin_nid, non_pcm, ca, channels,
 754                                 per_pin->chmap, per_pin->chmap_set);
 755
 756         spec->ops.pin_setup_infoframe(codec, pin_nid, dev_id,
 757                                       ca, active_channels, eld->info.conn_type);
 758
 759         per_pin->non_pcm = non_pcm;
 760 }
 761
 762 /*
 763  * Unsolicited events
 764  */
 765
 766 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 767
 768 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid,
 769                                       int dev_id)
 770 {
 771         struct hdmi_spec *spec = codec->spec;
 772         int pin_idx = pin_id_to_pin_index(codec, nid, dev_id);
 773
 774         if (pin_idx < 0)
 775                 return;
 776         mutex_lock(&spec->pcm_lock);
 777         hdmi_present_sense(get_pin(spec, pin_idx), 1);
 778         mutex_unlock(&spec->pcm_lock);
 779 }
 780
 781 static void jack_callback(struct hda_codec *codec,
 782                           struct hda_jack_callback *jack)
 783 {
 784         /* stop polling when notification is enabled */
 785         if (codec_has_acomp(codec))
 786                 return;
 787
 788         check_presence_and_report(codec, jack->nid, jack->dev_id);
 789 }
 790
 791 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res,
 792                                  struct hda_jack_tbl *jack)
 793 {
 794         jack->jack_dirty = 1;
 795
 796         codec_dbg(codec,
 797                 "HDMI hot plug event: Codec=%d NID=0x%x Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
 798                 codec->addr, jack->nid, jack->dev_id, !!(res & AC_UNSOL_RES_IA),
 799                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
 800
 801         check_presence_and_report(codec, jack->nid, jack->dev_id);
 802 }
 803
 804 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 805 {
 806         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 807         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 808         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 809         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 810
 811         codec_info(codec,
 812                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 813                 codec->addr,
 814                 tag,
 815                 subtag,
 816                 cp_state,
 817                 cp_ready);
 818
 819         /* TODO */
 820         if (cp_state) {
 821                 ;
 822         }
 823         if (cp_ready) {
 824                 ;
 825         }
 826 }
 827
 828
 829 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 830 {
 831         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 832         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 833         struct hda_jack_tbl *jack;
 834
 835         if (codec_has_acomp(codec))
 836                 return;
 837
 838         if (codec->dp_mst) {
 839                 int dev_entry =
 840                         (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 841
 842                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, dev_entry);
 843         } else {
 844                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, 0);
 845         }
 846
 847         if (!jack) {
 848                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
 849                 return;
 850         }
 851
 852         if (subtag == 0)
 853                 hdmi_intrinsic_event(codec, res, jack);
 854         else
 855                 hdmi_non_intrinsic_event(codec, res);
 856 }
 857
 858 static void haswell_verify_D0(struct hda_codec *codec,
 859                 hda_nid_t cvt_nid, hda_nid_t nid)
 860 {
 861         int pwr;
 862
 863         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
 864          * thus pins could only choose converter 0 for use. Make sure the
 865          * converters are in correct power state */
 866         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
 867                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
 868
 869         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
 870                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
 871                                     AC_PWRST_D0);
 872                 msleep(40);
 873                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
 874                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
 875                 codec_dbg(codec, "Haswell HDMI audio: Power for NID 0x%x is now D%d\n", nid, pwr);
 876         }
 877 }
 878
 879 /*
 880  * Callbacks
 881  */
 882
 883 /* HBR should be Non-PCM, 8 channels */
 884 #define is_hbr_format(format) \
 885         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 886
 887 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
 888                               int dev_id, bool hbr)
 889 {
 890         int pinctl, new_pinctl;
 891
 892         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 893                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
 894                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 895                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 896
 897                 if (pinctl < 0)
 898                         return hbr ? -EINVAL : 0;
 899
 900                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 901                 if (hbr)
 902                         new_pinctl |= AC_PINCTL_EPT_HBR;
 903                 else
 904                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 905
 906                 codec_dbg(codec,
 907                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
 908                             pin_nid,
 909                             pinctl == new_pinctl ? "" : "new-",
 910                             new_pinctl);
 911
 912                 if (pinctl != new_pinctl)
 913                         snd_hda_codec_write(codec, pin_nid, 0,
 914                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 915                                             new_pinctl);
 916         } else if (hbr)
 917                 return -EINVAL;
 918
 919         return 0;
 920 }
 921
 922 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 923                               hda_nid_t pin_nid, int dev_id,
 924                               u32 stream_tag, int format)
 925 {
 926         struct hdmi_spec *spec = codec->spec;
 927         unsigned int param;
 928         int err;
 929
 930         err = spec->ops.pin_hbr_setup(codec, pin_nid, dev_id,
 931                                       is_hbr_format(format));
 932
 933         if (err) {
 934                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
 935                 return err;
 936         }
 937
 938         if (spec->intel_hsw_fixup) {
 939
 940                 /*
 941                  * on recent platforms IEC Coding Type is required for HBR
 942                  * support, read current Digital Converter settings and set
 943                  * ICT bitfield if needed.
 944                  */
 945                 param = snd_hda_codec_read(codec, cvt_nid, 0,
 946                                            AC_VERB_GET_DIGI_CONVERT_1, 0);
 947
 948                 param = (param >> 16) & ~(AC_DIG3_ICT);
 949
 950                 /* on recent platforms ICT mode is required for HBR support */
 951                 if (is_hbr_format(format))
 952                         param |= 0x1;
 953
 954                 snd_hda_codec_write(codec, cvt_nid, 0,
 955                                     AC_VERB_SET_DIGI_CONVERT_3, param);
 956         }
 957
 958         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 959         return 0;
 960 }
 961
 962 /* Try to find an available converter
 963  * If pin_idx is less then zero, just try to find an available converter.
 964  * Otherwise, try to find an available converter and get the cvt mux index
 965  * of the pin.
 966  */
 967 static int hdmi_choose_cvt(struct hda_codec *codec,
 968                            int pin_idx, int *cvt_id)
 969 {
 970         struct hdmi_spec *spec = codec->spec;
 971         struct hdmi_spec_per_pin *per_pin;
 972         struct hdmi_spec_per_cvt *per_cvt = NULL;
 973         int cvt_idx, mux_idx = 0;
 974
 975         /* pin_idx < 0 means no pin will be bound to the converter */
 976         if (pin_idx < 0)
 977                 per_pin = NULL;
 978         else
 979                 per_pin = get_pin(spec, pin_idx);
 980
 981         if (per_pin && per_pin->silent_stream) {
 982                 cvt_idx = cvt_nid_to_cvt_index(codec, per_pin->cvt_nid);
 983                 if (cvt_id)
 984                         *cvt_id = cvt_idx;
 985                 return 0;
 986         }
 987
 988         /* Dynamically assign converter to stream */
 989         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
 990                 per_cvt = get_cvt(spec, cvt_idx);
 991
 992                 /* Must not already be assigned */
 993                 if (per_cvt->assigned)
 994                         continue;
 995                 if (per_pin == NULL)
 996                         break;
 997                 /* Must be in pin's mux's list of converters */
 998                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
 999                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1000                                 break;
1001                 /* Not in mux list */
1002                 if (mux_idx == per_pin->num_mux_nids)
1003                         continue;
1004                 break;
1005         }
1006
1007         /* No free converters */
1008         if (cvt_idx == spec->num_cvts)
1009                 return -EBUSY;
1010
1011         if (per_pin != NULL)
1012                 per_pin->mux_idx = mux_idx;
1013
1014         if (cvt_id)
1015                 *cvt_id = cvt_idx;
1016
1017         return 0;
1018 }
1019
1020 /* Assure the pin select the right convetor */
1021 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1022                         struct hdmi_spec_per_pin *per_pin)
1023 {
1024         hda_nid_t pin_nid = per_pin->pin_nid;
1025         int mux_idx, curr;
1026
1027         mux_idx = per_pin->mux_idx;
1028         curr = snd_hda_codec_read(codec, pin_nid, 0,
1029                                           AC_VERB_GET_CONNECT_SEL, 0);
1030         if (curr != mux_idx)
1031                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1032                                             AC_VERB_SET_CONNECT_SEL,
1033                                             mux_idx);
1034 }
1035
1036 /* get the mux index for the converter of the pins
1037  * converter's mux index is the same for all pins on Intel platform
1038  */
1039 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1040                         hda_nid_t cvt_nid)
1041 {
1042         int i;
1043
1044         for (i = 0; i < spec->num_cvts; i++)
1045                 if (spec->cvt_nids[i] == cvt_nid)
1046                         return i;
1047         return -EINVAL;
1048 }
1049
1050 /* Intel HDMI workaround to fix audio routing issue:
1051  * For some Intel display codecs, pins share the same connection list.
1052  * So a conveter can be selected by multiple pins and playback on any of these
1053  * pins will generate sound on the external display, because audio flows from
1054  * the same converter to the display pipeline. Also muting one pin may make
1055  * other pins have no sound output.
1056  * So this function assures that an assigned converter for a pin is not selected
1057  * by any other pins.
1058  */
1059 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1060                                          hda_nid_t pin_nid,
1061                                          int dev_id, int mux_idx)
1062 {
1063         struct hdmi_spec *spec = codec->spec;
1064         hda_nid_t nid;
1065         int cvt_idx, curr;
1066         struct hdmi_spec_per_cvt *per_cvt;
1067         struct hdmi_spec_per_pin *per_pin;
1068         int pin_idx;
1069
1070         /* configure the pins connections */
1071         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1072                 int dev_id_saved;
1073                 int dev_num;
1074
1075                 per_pin = get_pin(spec, pin_idx);
1076                 /*
1077                  * pin not connected to monitor
1078                  * no need to operate on it
1079                  */
1080                 if (!per_pin->pcm)
1081                         continue;
1082
1083                 if ((per_pin->pin_nid == pin_nid) &&
1084                         (per_pin->dev_id == dev_id))
1085                         continue;
1086
1087                 /*
1088                  * if per_pin->dev_id >= dev_num,
1089                  * snd_hda_get_dev_select() will fail,
1090                  * and the following operation is unpredictable.
1091                  * So skip this situation.
1092                  */
1093                 dev_num = snd_hda_get_num_devices(codec, per_pin->pin_nid) + 1;
1094                 if (per_pin->dev_id >= dev_num)
1095                         continue;
1096
1097                 nid = per_pin->pin_nid;
1098
1099                 /*
1100                  * Calling this function should not impact
1101                  * on the device entry selection
1102                  * So let's save the dev id for each pin,
1103                  * and restore it when return
1104                  */
1105                 dev_id_saved = snd_hda_get_dev_select(codec, nid);
1106                 snd_hda_set_dev_select(codec, nid, per_pin->dev_id);
1107                 curr = snd_hda_codec_read(codec, nid, 0,
1108                                           AC_VERB_GET_CONNECT_SEL, 0);
1109                 if (curr != mux_idx) {
1110                         snd_hda_set_dev_select(codec, nid, dev_id_saved);
1111                         continue;
1112                 }
1113
1114
1115                 /* choose an unassigned converter. The conveters in the
1116                  * connection list are in the same order as in the codec.
1117                  */
1118                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1119                         per_cvt = get_cvt(spec, cvt_idx);
1120                         if (!per_cvt->assigned) {
1121                                 codec_dbg(codec,
1122                                           "choose cvt %d for pin NID 0x%x\n",
1123                                           cvt_idx, nid);
1124                                 snd_hda_codec_write_cache(codec, nid, 0,
1125                                             AC_VERB_SET_CONNECT_SEL,
1126                                             cvt_idx);
1127                                 break;
1128                         }
1129                 }
1130                 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1131         }
1132 }
1133
1134 /* A wrapper of intel_not_share_asigned_cvt() */
1135 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1136                         hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid)
1137 {
1138         int mux_idx;
1139         struct hdmi_spec *spec = codec->spec;
1140
1141         /* On Intel platform, the mapping of converter nid to
1142          * mux index of the pins are always the same.
1143          * The pin nid may be 0, this means all pins will not
1144          * share the converter.
1145          */
1146         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1147         if (mux_idx >= 0)
1148                 intel_not_share_assigned_cvt(codec, pin_nid, dev_id, mux_idx);
1149 }
1150
1151 /* skeleton caller of pin_cvt_fixup ops */
1152 static void pin_cvt_fixup(struct hda_codec *codec,
1153                           struct hdmi_spec_per_pin *per_pin,
1154                           hda_nid_t cvt_nid)
1155 {
1156         struct hdmi_spec *spec = codec->spec;
1157
1158         if (spec->ops.pin_cvt_fixup)
1159                 spec->ops.pin_cvt_fixup(codec, per_pin, cvt_nid);
1160 }
1161
1162 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1163  * in dyn_pcm_assign mode.
1164  */
1165 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1166                          struct hda_codec *codec,
1167                          struct snd_pcm_substream *substream)
1168 {
1169         struct hdmi_spec *spec = codec->spec;
1170         struct snd_pcm_runtime *runtime = substream->runtime;
1171         int cvt_idx, pcm_idx;
1172         struct hdmi_spec_per_cvt *per_cvt = NULL;
1173         int err;
1174
1175         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1176         if (pcm_idx < 0)
1177                 return -EINVAL;
1178
1179         err = hdmi_choose_cvt(codec, -1, &cvt_idx);
1180         if (err)
1181                 return err;
1182
1183         per_cvt = get_cvt(spec, cvt_idx);
1184         per_cvt->assigned = 1;
1185         hinfo->nid = per_cvt->cvt_nid;
1186
1187         pin_cvt_fixup(codec, NULL, per_cvt->cvt_nid);
1188
1189         set_bit(pcm_idx, &spec->pcm_in_use);
1190         /* todo: setup spdif ctls assign */
1191
1192         /* Initially set the converter's capabilities */
1193         hinfo->channels_min = per_cvt->channels_min;
1194         hinfo->channels_max = per_cvt->channels_max;
1195         hinfo->rates = per_cvt->rates;
1196         hinfo->formats = per_cvt->formats;
1197         hinfo->maxbps = per_cvt->maxbps;
1198
1199         /* Store the updated parameters */
1200         runtime->hw.channels_min = hinfo->channels_min;
1201         runtime->hw.channels_max = hinfo->channels_max;
1202         runtime->hw.formats = hinfo->formats;
1203         runtime->hw.rates = hinfo->rates;
1204
1205         snd_pcm_hw_constraint_step(substream->runtime, 0,
1206                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1207         return 0;
1208 }
1209
1210 /*
1211  * HDA PCM callbacks
1212  */
1213 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1214                          struct hda_codec *codec,
1215                          struct snd_pcm_substream *substream)
1216 {
1217         struct hdmi_spec *spec = codec->spec;
1218         struct snd_pcm_runtime *runtime = substream->runtime;
1219         int pin_idx, cvt_idx, pcm_idx;
1220         struct hdmi_spec_per_pin *per_pin;
1221         struct hdmi_eld *eld;
1222         struct hdmi_spec_per_cvt *per_cvt = NULL;
1223         int err;
1224
1225         /* Validate hinfo */
1226         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1227         if (pcm_idx < 0)
1228                 return -EINVAL;
1229
1230         mutex_lock(&spec->pcm_lock);
1231         pin_idx = hinfo_to_pin_index(codec, hinfo);
1232         if (!spec->dyn_pcm_assign) {
1233                 if (snd_BUG_ON(pin_idx < 0)) {
1234                         err = -EINVAL;
1235                         goto unlock;
1236                 }
1237         } else {
1238                 /* no pin is assigned to the PCM
1239                  * PA need pcm open successfully when probe
1240                  */
1241                 if (pin_idx < 0) {
1242                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1243                         goto unlock;
1244                 }
1245         }
1246
1247         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1248         if (err < 0)
1249                 goto unlock;
1250
1251         per_cvt = get_cvt(spec, cvt_idx);
1252         /* Claim converter */
1253         per_cvt->assigned = 1;
1254
1255         set_bit(pcm_idx, &spec->pcm_in_use);
1256         per_pin = get_pin(spec, pin_idx);
1257         per_pin->cvt_nid = per_cvt->cvt_nid;
1258         hinfo->nid = per_cvt->cvt_nid;
1259
1260         /* flip stripe flag for the assigned stream if supported */
1261         if (get_wcaps(codec, per_cvt->cvt_nid) & AC_WCAP_STRIPE)
1262                 azx_stream(get_azx_dev(substream))->stripe = 1;
1263
1264         snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1265         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1266                             AC_VERB_SET_CONNECT_SEL,
1267                             per_pin->mux_idx);
1268
1269         /* configure unused pins to choose other converters */
1270         pin_cvt_fixup(codec, per_pin, 0);
1271
1272         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1273
1274         /* Initially set the converter's capabilities */
1275         hinfo->channels_min = per_cvt->channels_min;
1276         hinfo->channels_max = per_cvt->channels_max;
1277         hinfo->rates = per_cvt->rates;
1278         hinfo->formats = per_cvt->formats;
1279         hinfo->maxbps = per_cvt->maxbps;
1280
1281         eld = &per_pin->sink_eld;
1282         /* Restrict capabilities by ELD if this isn't disabled */
1283         if (!static_hdmi_pcm && eld->eld_valid) {
1284                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1285                 if (hinfo->channels_min > hinfo->channels_max ||
1286                     !hinfo->rates || !hinfo->formats) {
1287                         per_cvt->assigned = 0;
1288                         hinfo->nid = 0;
1289                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1290                         err = -ENODEV;
1291                         goto unlock;
1292                 }
1293         }
1294
1295         /* Store the updated parameters */
1296         runtime->hw.channels_min = hinfo->channels_min;
1297         runtime->hw.channels_max = hinfo->channels_max;
1298         runtime->hw.formats = hinfo->formats;
1299         runtime->hw.rates = hinfo->rates;
1300
1301         snd_pcm_hw_constraint_step(substream->runtime, 0,
1302                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1303  unlock:
1304         mutex_unlock(&spec->pcm_lock);
1305         return err;
1306 }
1307
1308 /*
1309  * HDA/HDMI auto parsing
1310  */
1311 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1312 {
1313         struct hdmi_spec *spec = codec->spec;
1314         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1315         hda_nid_t pin_nid = per_pin->pin_nid;
1316         int dev_id = per_pin->dev_id;
1317         int conns;
1318
1319         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1320                 codec_warn(codec,
1321                            "HDMI: pin NID 0x%x wcaps %#x does not support connection list\n",
1322                            pin_nid, get_wcaps(codec, pin_nid));
1323                 return -EINVAL;
1324         }
1325
1326         snd_hda_set_dev_select(codec, pin_nid, dev_id);
1327
1328         if (spec->intel_hsw_fixup) {
1329                 conns = spec->num_cvts;
1330                 memcpy(per_pin->mux_nids, spec->cvt_nids,
1331                        sizeof(hda_nid_t) * conns);
1332         } else {
1333                 conns = snd_hda_get_raw_connections(codec, pin_nid,
1334                                                     per_pin->mux_nids,
1335                                                     HDA_MAX_CONNECTIONS);
1336         }
1337
1338         /* all the device entries on the same pin have the same conn list */
1339         per_pin->num_mux_nids = conns;
1340
1341         return 0;
1342 }
1343
1344 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1345                               struct hdmi_spec_per_pin *per_pin)
1346 {
1347         int i;
1348
1349         /* on the new machines, try to assign the pcm slot dynamically,
1350          * not use the preferred fixed map (legacy way) anymore.
1351          */
1352         if (spec->dyn_pcm_no_legacy)
1353                 goto last_try;
1354
1355         /*
1356          * generic_hdmi_build_pcms() may allocate extra PCMs on some
1357          * platforms (with maximum of 'num_nids + dev_num - 1')
1358          *
1359          * The per_pin of pin_nid_idx=n and dev_id=m prefers to get pcm-n
1360          * if m==0. This guarantees that dynamic pcm assignments are compatible
1361          * with the legacy static per_pin-pcm assignment that existed in the
1362          * days before DP-MST.
1363          *
1364          * Intel DP-MST prefers this legacy behavior for compatibility, too.
1365          *
1366          * per_pin of m!=0 prefers to get pcm=(num_nids + (m - 1)).
1367          */
1368
1369         if (per_pin->dev_id == 0 || spec->intel_hsw_fixup) {
1370                 if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1371                         return per_pin->pin_nid_idx;
1372         } else {
1373                 i = spec->num_nids + (per_pin->dev_id - 1);
1374                 if (i < spec->pcm_used && !(test_bit(i, &spec->pcm_bitmap)))
1375                         return i;
1376         }
1377
1378         /* have a second try; check the area over num_nids */
1379         for (i = spec->num_nids; i < spec->pcm_used; i++) {
1380                 if (!test_bit(i, &spec->pcm_bitmap))
1381                         return i;
1382         }
1383
1384  last_try:
1385         /* the last try; check the empty slots in pins */
1386         for (i = 0; i < spec->num_nids; i++) {
1387                 if (!test_bit(i, &spec->pcm_bitmap))
1388                         return i;
1389         }
1390         return -EBUSY;
1391 }
1392
1393 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1394                                 struct hdmi_spec_per_pin *per_pin)
1395 {
1396         int idx;
1397
1398         /* pcm already be attached to the pin */
1399         if (per_pin->pcm)
1400                 return;
1401         idx = hdmi_find_pcm_slot(spec, per_pin);
1402         if (idx == -EBUSY)
1403                 return;
1404         per_pin->pcm_idx = idx;
1405         per_pin->pcm = get_hdmi_pcm(spec, idx);
1406         set_bit(idx, &spec->pcm_bitmap);
1407 }
1408
1409 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1410                                 struct hdmi_spec_per_pin *per_pin)
1411 {
1412         int idx;
1413
1414         /* pcm already be detached from the pin */
1415         if (!per_pin->pcm)
1416                 return;
1417         idx = per_pin->pcm_idx;
1418         per_pin->pcm_idx = -1;
1419         per_pin->pcm = NULL;
1420         if (idx >= 0 && idx < spec->pcm_used)
1421                 clear_bit(idx, &spec->pcm_bitmap);
1422 }
1423
1424 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1425                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1426 {
1427         int mux_idx;
1428
1429         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1430                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1431                         break;
1432         return mux_idx;
1433 }
1434
1435 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1436
1437 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1438                            struct hdmi_spec_per_pin *per_pin)
1439 {
1440         struct hda_codec *codec = per_pin->codec;
1441         struct hda_pcm *pcm;
1442         struct hda_pcm_stream *hinfo;
1443         struct snd_pcm_substream *substream;
1444         int mux_idx;
1445         bool non_pcm;
1446
1447         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1448                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1449         else
1450                 return;
1451         if (!pcm->pcm)
1452                 return;
1453         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1454                 return;
1455
1456         /* hdmi audio only uses playback and one substream */
1457         hinfo = pcm->stream;
1458         substream = pcm->pcm->streams[0].substream;
1459
1460         per_pin->cvt_nid = hinfo->nid;
1461
1462         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1463         if (mux_idx < per_pin->num_mux_nids) {
1464                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1465                                    per_pin->dev_id);
1466                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1467                                 AC_VERB_SET_CONNECT_SEL,
1468                                 mux_idx);
1469         }
1470         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1471
1472         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1473         if (substream->runtime)
1474                 per_pin->channels = substream->runtime->channels;
1475         per_pin->setup = true;
1476         per_pin->mux_idx = mux_idx;
1477
1478         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1479 }
1480
1481 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1482                            struct hdmi_spec_per_pin *per_pin)
1483 {
1484         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1485                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1486
1487         per_pin->chmap_set = false;
1488         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1489
1490         per_pin->setup = false;
1491         per_pin->channels = 0;
1492 }
1493
1494 static struct snd_jack *pin_idx_to_pcm_jack(struct hda_codec *codec,
1495                                             struct hdmi_spec_per_pin *per_pin)
1496 {
1497         struct hdmi_spec *spec = codec->spec;
1498
1499         if (per_pin->pcm_idx >= 0)
1500                 return spec->pcm_rec[per_pin->pcm_idx].jack;
1501         else
1502                 return NULL;
1503 }
1504
1505 /* update per_pin ELD from the given new ELD;
1506  * setup info frame and notification accordingly
1507  * also notify ELD kctl and report jack status changes
1508  */
1509 static void update_eld(struct hda_codec *codec,
1510                        struct hdmi_spec_per_pin *per_pin,
1511                        struct hdmi_eld *eld,
1512                        int repoll)
1513 {
1514         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1515         struct hdmi_spec *spec = codec->spec;
1516         struct snd_jack *pcm_jack;
1517         bool old_eld_valid = pin_eld->eld_valid;
1518         bool eld_changed;
1519         int pcm_idx;
1520
1521         if (eld->eld_valid) {
1522                 if (eld->eld_size <= 0 ||
1523                     snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1524                                        eld->eld_size) < 0) {
1525                         eld->eld_valid = false;
1526                         if (repoll) {
1527                                 schedule_delayed_work(&per_pin->work,
1528                                                       msecs_to_jiffies(300));
1529                                 return;
1530                         }
1531                 }
1532         }
1533
1534         if (!eld->eld_valid || eld->eld_size <= 0) {
1535                 eld->eld_valid = false;
1536                 eld->eld_size = 0;
1537         }
1538
1539         /* for monitor disconnection, save pcm_idx firstly */
1540         pcm_idx = per_pin->pcm_idx;
1541
1542         /*
1543          * pcm_idx >=0 before update_eld() means it is in monitor
1544          * disconnected event. Jack must be fetched before update_eld().
1545          */
1546         pcm_jack = pin_idx_to_pcm_jack(codec, per_pin);
1547
1548         if (spec->dyn_pcm_assign) {
1549                 if (eld->eld_valid) {
1550                         hdmi_attach_hda_pcm(spec, per_pin);
1551                         hdmi_pcm_setup_pin(spec, per_pin);
1552                 } else {
1553                         hdmi_pcm_reset_pin(spec, per_pin);
1554                         hdmi_detach_hda_pcm(spec, per_pin);
1555                 }
1556         }
1557         /* if pcm_idx == -1, it means this is in monitor connection event
1558          * we can get the correct pcm_idx now.
1559          */
1560         if (pcm_idx == -1)
1561                 pcm_idx = per_pin->pcm_idx;
1562         if (!pcm_jack)
1563                 pcm_jack = pin_idx_to_pcm_jack(codec, per_pin);
1564
1565         if (eld->eld_valid)
1566                 snd_hdmi_show_eld(codec, &eld->info);
1567
1568         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1569         eld_changed |= (pin_eld->monitor_present != eld->monitor_present);
1570         if (!eld_changed && eld->eld_valid && pin_eld->eld_valid)
1571                 if (pin_eld->eld_size != eld->eld_size ||
1572                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1573                            eld->eld_size) != 0)
1574                         eld_changed = true;
1575
1576         if (eld_changed) {
1577                 pin_eld->monitor_present = eld->monitor_present;
1578                 pin_eld->eld_valid = eld->eld_valid;
1579                 pin_eld->eld_size = eld->eld_size;
1580                 if (eld->eld_valid)
1581                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1582                                eld->eld_size);
1583                 pin_eld->info = eld->info;
1584         }
1585
1586         /*
1587          * Re-setup pin and infoframe. This is needed e.g. when
1588          * - sink is first plugged-in
1589          * - transcoder can change during stream playback on Haswell
1590          *   and this can make HW reset converter selection on a pin.
1591          */
1592         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1593                 pin_cvt_fixup(codec, per_pin, 0);
1594                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1595         }
1596
1597         if (eld_changed && pcm_idx >= 0)
1598                 snd_ctl_notify(codec->card,
1599                                SNDRV_CTL_EVENT_MASK_VALUE |
1600                                SNDRV_CTL_EVENT_MASK_INFO,
1601                                &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1602
1603         if (eld_changed && pcm_jack)
1604                 snd_jack_report(pcm_jack,
1605                                 (eld->monitor_present && eld->eld_valid) ?
1606                                 SND_JACK_AVOUT : 0);
1607 }
1608
1609 /* update ELD and jack state via HD-audio verbs */
1610 static void hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1611                                          int repoll)
1612 {
1613         struct hda_codec *codec = per_pin->codec;
1614         struct hdmi_spec *spec = codec->spec;
1615         struct hdmi_eld *eld = &spec->temp_eld;
1616         hda_nid_t pin_nid = per_pin->pin_nid;
1617         int dev_id = per_pin->dev_id;
1618         /*
1619          * Always execute a GetPinSense verb here, even when called from
1620          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1621          * response's PD bit is not the real PD value, but indicates that
1622          * the real PD value changed. An older version of the HD-audio
1623          * specification worked this way. Hence, we just ignore the data in
1624          * the unsolicited response to avoid custom WARs.
1625          */
1626         int present;
1627         int ret;
1628
1629         ret = snd_hda_power_up_pm(codec);
1630         if (ret < 0 && pm_runtime_suspended(hda_codec_dev(codec)))
1631                 goto out;
1632
1633         present = snd_hda_jack_pin_sense(codec, pin_nid, dev_id);
1634
1635         mutex_lock(&per_pin->lock);
1636         eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1637         if (eld->monitor_present)
1638                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1639         else
1640                 eld->eld_valid = false;
1641
1642         codec_dbg(codec,
1643                 "HDMI status: Codec=%d NID=0x%x Presence_Detect=%d ELD_Valid=%d\n",
1644                 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
1645
1646         if (eld->eld_valid) {
1647                 if (spec->ops.pin_get_eld(codec, pin_nid, dev_id,
1648                                           eld->eld_buffer, &eld->eld_size) < 0)
1649                         eld->eld_valid = false;
1650         }
1651
1652         update_eld(codec, per_pin, eld, repoll);
1653         mutex_unlock(&per_pin->lock);
1654  out:
1655         snd_hda_power_down_pm(codec);
1656 }
1657
1658 #define I915_SILENT_RATE                48000
1659 #define I915_SILENT_CHANNELS            2
1660 #define I915_SILENT_FORMAT              SNDRV_PCM_FORMAT_S16_LE
1661 #define I915_SILENT_FORMAT_BITS 16
1662 #define I915_SILENT_FMT_MASK            0xf
1663
1664 static void silent_stream_enable(struct hda_codec *codec,
1665                                  struct hdmi_spec_per_pin *per_pin)
1666 {
1667         struct hdmi_spec *spec = codec->spec;
1668         struct hdmi_spec_per_cvt *per_cvt;
1669         int cvt_idx, pin_idx, err;
1670         unsigned int format;
1671
1672         mutex_lock(&per_pin->lock);
1673
1674         if (per_pin->setup) {
1675                 codec_dbg(codec, "hdmi: PCM already open, no silent stream\n");
1676                 goto unlock_out;
1677         }
1678
1679         pin_idx = pin_id_to_pin_index(codec, per_pin->pin_nid, per_pin->dev_id);
1680         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1681         if (err) {
1682                 codec_err(codec, "hdmi: no free converter to enable silent mode\n");
1683                 goto unlock_out;
1684         }
1685
1686         per_cvt = get_cvt(spec, cvt_idx);
1687         per_cvt->assigned = 1;
1688         per_pin->cvt_nid = per_cvt->cvt_nid;
1689         per_pin->silent_stream = true;
1690
1691         codec_dbg(codec, "hdmi: enabling silent stream pin-NID=0x%x cvt-NID=0x%x\n",
1692                   per_pin->pin_nid, per_cvt->cvt_nid);
1693
1694         snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1695         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1696                                   AC_VERB_SET_CONNECT_SEL,
1697                                   per_pin->mux_idx);
1698
1699         /* configure unused pins to choose other converters */
1700         pin_cvt_fixup(codec, per_pin, 0);
1701
1702         snd_hdac_sync_audio_rate(&codec->core, per_pin->pin_nid,
1703                                  per_pin->dev_id, I915_SILENT_RATE);
1704
1705         /* trigger silent stream generation in hw */
1706         format = snd_hdac_calc_stream_format(I915_SILENT_RATE, I915_SILENT_CHANNELS,
1707                                              I915_SILENT_FORMAT, I915_SILENT_FORMAT_BITS, 0);
1708         snd_hda_codec_setup_stream(codec, per_pin->cvt_nid,
1709                                    I915_SILENT_FMT_MASK, I915_SILENT_FMT_MASK, format);
1710         usleep_range(100, 200);
1711         snd_hda_codec_setup_stream(codec, per_pin->cvt_nid, I915_SILENT_FMT_MASK, 0, format);
1712
1713         per_pin->channels = I915_SILENT_CHANNELS;
1714         hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1715
1716  unlock_out:
1717         mutex_unlock(&per_pin->lock);
1718 }
1719
1720 static void silent_stream_disable(struct hda_codec *codec,
1721                                   struct hdmi_spec_per_pin *per_pin)
1722 {
1723         struct hdmi_spec *spec = codec->spec;
1724         struct hdmi_spec_per_cvt *per_cvt;
1725         int cvt_idx;
1726
1727         mutex_lock(&per_pin->lock);
1728         if (!per_pin->silent_stream)
1729                 goto unlock_out;
1730
1731         codec_dbg(codec, "HDMI: disable silent stream on pin-NID=0x%x cvt-NID=0x%x\n",
1732                   per_pin->pin_nid, per_pin->cvt_nid);
1733
1734         cvt_idx = cvt_nid_to_cvt_index(codec, per_pin->cvt_nid);
1735         if (cvt_idx >= 0 && cvt_idx < spec->num_cvts) {
1736                 per_cvt = get_cvt(spec, cvt_idx);
1737                 per_cvt->assigned = 0;
1738         }
1739
1740         per_pin->cvt_nid = 0;
1741         per_pin->silent_stream = false;
1742
1743  unlock_out:
1744         mutex_unlock(&per_pin->lock);
1745 }
1746
1747 /* update ELD and jack state via audio component */
1748 static void sync_eld_via_acomp(struct hda_codec *codec,
1749                                struct hdmi_spec_per_pin *per_pin)
1750 {
1751         struct hdmi_spec *spec = codec->spec;
1752         struct hdmi_eld *eld = &spec->temp_eld;
1753         bool monitor_prev, monitor_next;
1754
1755         mutex_lock(&per_pin->lock);
1756         eld->monitor_present = false;
1757         monitor_prev = per_pin->sink_eld.monitor_present;
1758         eld->eld_size = snd_hdac_acomp_get_eld(&codec->core, per_pin->pin_nid,
1759                                       per_pin->dev_id, &eld->monitor_present,
1760                                       eld->eld_buffer, ELD_MAX_SIZE);
1761         eld->eld_valid = (eld->eld_size > 0);
1762         update_eld(codec, per_pin, eld, 0);
1763         monitor_next = per_pin->sink_eld.monitor_present;
1764         mutex_unlock(&per_pin->lock);
1765
1766         /*
1767          * Power-up will call hdmi_present_sense, so the PM calls
1768          * have to be done without mutex held.
1769          */
1770
1771         if (spec->send_silent_stream) {
1772                 int pm_ret;
1773
1774                 if (!monitor_prev && monitor_next) {
1775                         pm_ret = snd_hda_power_up_pm(codec);
1776                         if (pm_ret < 0)
1777                                 codec_err(codec,
1778                                 "Monitor plugged-in, Failed to power up codec ret=[%d]\n",
1779                                 pm_ret);
1780                         silent_stream_enable(codec, per_pin);
1781                 } else if (monitor_prev && !monitor_next) {
1782                         silent_stream_disable(codec, per_pin);
1783                         pm_ret = snd_hda_power_down_pm(codec);
1784                         if (pm_ret < 0)
1785                                 codec_err(codec,
1786                                 "Monitor plugged-out, Failed to power down codec ret=[%d]\n",
1787                                 pm_ret);
1788                 }
1789         }
1790 }
1791
1792 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1793 {
1794         struct hda_codec *codec = per_pin->codec;
1795
1796         if (!codec_has_acomp(codec))
1797                 hdmi_present_sense_via_verbs(per_pin, repoll);
1798         else
1799                 sync_eld_via_acomp(codec, per_pin);
1800 }
1801
1802 static void hdmi_repoll_eld(struct work_struct *work)
1803 {
1804         struct hdmi_spec_per_pin *per_pin =
1805         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1806         struct hda_codec *codec = per_pin->codec;
1807         struct hdmi_spec *spec = codec->spec;
1808         struct hda_jack_tbl *jack;
1809
1810         jack = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid,
1811                                         per_pin->dev_id);
1812         if (jack)
1813                 jack->jack_dirty = 1;
1814
1815         if (per_pin->repoll_count++ > 6)
1816                 per_pin->repoll_count = 0;
1817
1818         mutex_lock(&spec->pcm_lock);
1819         hdmi_present_sense(per_pin, per_pin->repoll_count);
1820         mutex_unlock(&spec->pcm_lock);
1821 }
1822
1823 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1824 {
1825         struct hdmi_spec *spec = codec->spec;
1826         unsigned int caps, config;
1827         int pin_idx;
1828         struct hdmi_spec_per_pin *per_pin;
1829         int err;
1830         int dev_num, i;
1831
1832         caps = snd_hda_query_pin_caps(codec, pin_nid);
1833         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1834                 return 0;
1835
1836         /*
1837          * For DP MST audio, Configuration Default is the same for
1838          * all device entries on the same pin
1839          */
1840         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1841         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE &&
1842             !spec->force_connect)
1843                 return 0;
1844
1845         /*
1846          * To simplify the implementation, malloc all
1847          * the virtual pins in the initialization statically
1848          */
1849         if (spec->intel_hsw_fixup) {
1850                 /*
1851                  * On Intel platforms, device entries count returned
1852                  * by AC_PAR_DEVLIST_LEN is dynamic, and depends on
1853                  * the type of receiver that is connected. Allocate pin
1854                  * structures based on worst case.
1855                  */
1856                 dev_num = spec->dev_num;
1857         } else if (spec->dyn_pcm_assign && codec->dp_mst) {
1858                 dev_num = snd_hda_get_num_devices(codec, pin_nid) + 1;
1859                 /*
1860                  * spec->dev_num is the maxinum number of device entries
1861                  * among all the pins
1862                  */
1863                 spec->dev_num = (spec->dev_num > dev_num) ?
1864                         spec->dev_num : dev_num;
1865         } else {
1866                 /*
1867                  * If the platform doesn't support DP MST,
1868                  * manually set dev_num to 1. This means
1869                  * the pin has only one device entry.
1870                  */
1871                 dev_num = 1;
1872                 spec->dev_num = 1;
1873         }
1874
1875         for (i = 0; i < dev_num; i++) {
1876                 pin_idx = spec->num_pins;
1877                 per_pin = snd_array_new(&spec->pins);
1878
1879                 if (!per_pin)
1880                         return -ENOMEM;
1881
1882                 if (spec->dyn_pcm_assign) {
1883                         per_pin->pcm = NULL;
1884                         per_pin->pcm_idx = -1;
1885                 } else {
1886                         per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1887                         per_pin->pcm_idx = pin_idx;
1888                 }
1889                 per_pin->pin_nid = pin_nid;
1890                 per_pin->pin_nid_idx = spec->num_nids;
1891                 per_pin->dev_id = i;
1892                 per_pin->non_pcm = false;
1893                 snd_hda_set_dev_select(codec, pin_nid, i);
1894                 err = hdmi_read_pin_conn(codec, pin_idx);
1895                 if (err < 0)
1896                         return err;
1897                 spec->num_pins++;
1898         }
1899         spec->num_nids++;
1900
1901         return 0;
1902 }
1903
1904 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1905 {
1906         struct hdmi_spec *spec = codec->spec;
1907         struct hdmi_spec_per_cvt *per_cvt;
1908         unsigned int chans;
1909         int err;
1910
1911         chans = get_wcaps(codec, cvt_nid);
1912         chans = get_wcaps_channels(chans);
1913
1914         per_cvt = snd_array_new(&spec->cvts);
1915         if (!per_cvt)
1916                 return -ENOMEM;
1917
1918         per_cvt->cvt_nid = cvt_nid;
1919         per_cvt->channels_min = 2;
1920         if (chans <= 16) {
1921                 per_cvt->channels_max = chans;
1922                 if (chans > spec->chmap.channels_max)
1923                         spec->chmap.channels_max = chans;
1924         }
1925
1926         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1927                                           &per_cvt->rates,
1928                                           &per_cvt->formats,
1929                                           &per_cvt->maxbps);
1930         if (err < 0)
1931                 return err;
1932
1933         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1934                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1935         spec->num_cvts++;
1936
1937         return 0;
1938 }
1939
1940 static const struct snd_pci_quirk force_connect_list[] = {
1941         SND_PCI_QUIRK(0x103c, 0x870f, "HP", 1),
1942         SND_PCI_QUIRK(0x103c, 0x871a, "HP", 1),
1943         {}
1944 };
1945
1946 static int hdmi_parse_codec(struct hda_codec *codec)
1947 {
1948         struct hdmi_spec *spec = codec->spec;
1949         hda_nid_t start_nid;
1950         unsigned int caps;
1951         int i, nodes;
1952         const struct snd_pci_quirk *q;
1953
1954         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &start_nid);
1955         if (!start_nid || nodes < 0) {
1956                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1957                 return -EINVAL;
1958         }
1959
1960         q = snd_pci_quirk_lookup(codec->bus->pci, force_connect_list);
1961
1962         if (q && q->value)
1963                 spec->force_connect = true;
1964
1965         /*
1966          * hdmi_add_pin() assumes total amount of converters to
1967          * be known, so first discover all converters
1968          */
1969         for (i = 0; i < nodes; i++) {
1970                 hda_nid_t nid = start_nid + i;
1971
1972                 caps = get_wcaps(codec, nid);
1973
1974                 if (!(caps & AC_WCAP_DIGITAL))
1975                         continue;
1976
1977                 if (get_wcaps_type(caps) == AC_WID_AUD_OUT)
1978                         hdmi_add_cvt(codec, nid);
1979         }
1980
1981         /* discover audio pins */
1982         for (i = 0; i < nodes; i++) {
1983                 hda_nid_t nid = start_nid + i;
1984
1985                 caps = get_wcaps(codec, nid);
1986
1987                 if (!(caps & AC_WCAP_DIGITAL))
1988                         continue;
1989
1990                 if (get_wcaps_type(caps) == AC_WID_PIN)
1991                         hdmi_add_pin(codec, nid);
1992         }
1993
1994         return 0;
1995 }
1996
1997 /*
1998  */
1999 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
2000 {
2001         struct hda_spdif_out *spdif;
2002         bool non_pcm;
2003
2004         mutex_lock(&codec->spdif_mutex);
2005         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
2006         /* Add sanity check to pass klockwork check.
2007          * This should never happen.
2008          */
2009         if (WARN_ON(spdif == NULL)) {
2010                 mutex_unlock(&codec->spdif_mutex);
2011                 return true;
2012         }
2013         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
2014         mutex_unlock(&codec->spdif_mutex);
2015         return non_pcm;
2016 }
2017
2018 /*
2019  * HDMI callbacks
2020  */
2021
2022 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2023                                            struct hda_codec *codec,
2024                                            unsigned int stream_tag,
2025                                            unsigned int format,
2026                                            struct snd_pcm_substream *substream)
2027 {
2028         hda_nid_t cvt_nid = hinfo->nid;
2029         struct hdmi_spec *spec = codec->spec;
2030         int pin_idx;
2031         struct hdmi_spec_per_pin *per_pin;
2032         struct snd_pcm_runtime *runtime = substream->runtime;
2033         bool non_pcm;
2034         int pinctl, stripe;
2035         int err = 0;
2036
2037         mutex_lock(&spec->pcm_lock);
2038         pin_idx = hinfo_to_pin_index(codec, hinfo);
2039         if (spec->dyn_pcm_assign && pin_idx < 0) {
2040                 /* when dyn_pcm_assign and pcm is not bound to a pin
2041                  * skip pin setup and return 0 to make audio playback
2042                  * be ongoing
2043                  */
2044                 pin_cvt_fixup(codec, NULL, cvt_nid);
2045                 snd_hda_codec_setup_stream(codec, cvt_nid,
2046                                         stream_tag, 0, format);
2047                 goto unlock;
2048         }
2049
2050         if (snd_BUG_ON(pin_idx < 0)) {
2051                 err = -EINVAL;
2052                 goto unlock;
2053         }
2054         per_pin = get_pin(spec, pin_idx);
2055
2056         /* Verify pin:cvt selections to avoid silent audio after S3.
2057          * After S3, the audio driver restores pin:cvt selections
2058          * but this can happen before gfx is ready and such selection
2059          * is overlooked by HW. Thus multiple pins can share a same
2060          * default convertor and mute control will affect each other,
2061          * which can cause a resumed audio playback become silent
2062          * after S3.
2063          */
2064         pin_cvt_fixup(codec, per_pin, 0);
2065
2066         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
2067         /* Todo: add DP1.2 MST audio support later */
2068         if (codec_has_acomp(codec))
2069                 snd_hdac_sync_audio_rate(&codec->core, per_pin->pin_nid,
2070                                          per_pin->dev_id, runtime->rate);
2071
2072         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
2073         mutex_lock(&per_pin->lock);
2074         per_pin->channels = substream->runtime->channels;
2075         per_pin->setup = true;
2076
2077         if (get_wcaps(codec, cvt_nid) & AC_WCAP_STRIPE) {
2078                 stripe = snd_hdac_get_stream_stripe_ctl(&codec->bus->core,
2079                                                         substream);
2080                 snd_hda_codec_write(codec, cvt_nid, 0,
2081                                     AC_VERB_SET_STRIPE_CONTROL,
2082                                     stripe);
2083         }
2084
2085         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
2086         mutex_unlock(&per_pin->lock);
2087         if (spec->dyn_pin_out) {
2088                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2089                                        per_pin->dev_id);
2090                 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2091                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2092                 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2093                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
2094                                     pinctl | PIN_OUT);
2095         }
2096
2097         /* snd_hda_set_dev_select() has been called before */
2098         err = spec->ops.setup_stream(codec, cvt_nid, per_pin->pin_nid,
2099                                      per_pin->dev_id, stream_tag, format);
2100  unlock:
2101         mutex_unlock(&spec->pcm_lock);
2102         return err;
2103 }
2104
2105 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2106                                              struct hda_codec *codec,
2107                                              struct snd_pcm_substream *substream)
2108 {
2109         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
2110         return 0;
2111 }
2112
2113 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
2114                           struct hda_codec *codec,
2115                           struct snd_pcm_substream *substream)
2116 {
2117         struct hdmi_spec *spec = codec->spec;
2118         int cvt_idx, pin_idx, pcm_idx;
2119         struct hdmi_spec_per_cvt *per_cvt;
2120         struct hdmi_spec_per_pin *per_pin;
2121         int pinctl;
2122         int err = 0;
2123
2124         mutex_lock(&spec->pcm_lock);
2125         if (hinfo->nid) {
2126                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
2127                 if (snd_BUG_ON(pcm_idx < 0)) {
2128                         err = -EINVAL;
2129                         goto unlock;
2130                 }
2131                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
2132                 if (snd_BUG_ON(cvt_idx < 0)) {
2133                         err = -EINVAL;
2134                         goto unlock;
2135                 }
2136                 per_cvt = get_cvt(spec, cvt_idx);
2137                 per_cvt->assigned = 0;
2138                 hinfo->nid = 0;
2139
2140                 azx_stream(get_azx_dev(substream))->stripe = 0;
2141
2142                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2143                 clear_bit(pcm_idx, &spec->pcm_in_use);
2144                 pin_idx = hinfo_to_pin_index(codec, hinfo);
2145                 if (spec->dyn_pcm_assign && pin_idx < 0)
2146                         goto unlock;
2147
2148                 if (snd_BUG_ON(pin_idx < 0)) {
2149                         err = -EINVAL;
2150                         goto unlock;
2151                 }
2152                 per_pin = get_pin(spec, pin_idx);
2153
2154                 if (spec->dyn_pin_out) {
2155                         snd_hda_set_dev_select(codec, per_pin->pin_nid,
2156                                                per_pin->dev_id);
2157                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2158                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2159                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2160                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
2161                                             pinctl & ~PIN_OUT);
2162                 }
2163
2164                 mutex_lock(&per_pin->lock);
2165                 per_pin->chmap_set = false;
2166                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
2167
2168                 per_pin->setup = false;
2169                 per_pin->channels = 0;
2170                 mutex_unlock(&per_pin->lock);
2171         }
2172
2173 unlock:
2174         mutex_unlock(&spec->pcm_lock);
2175
2176         return err;
2177 }
2178
2179 static const struct hda_pcm_ops generic_ops = {
2180         .open = hdmi_pcm_open,
2181         .close = hdmi_pcm_close,
2182         .prepare = generic_hdmi_playback_pcm_prepare,
2183         .cleanup = generic_hdmi_playback_pcm_cleanup,
2184 };
2185
2186 static int hdmi_get_spk_alloc(struct hdac_device *hdac, int pcm_idx)
2187 {
2188         struct hda_codec *codec = hdac_to_hda_codec(hdac);
2189         struct hdmi_spec *spec = codec->spec;
2190         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2191
2192         if (!per_pin)
2193                 return 0;
2194
2195         return per_pin->sink_eld.info.spk_alloc;
2196 }
2197
2198 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
2199                                         unsigned char *chmap)
2200 {
2201         struct hda_codec *codec = hdac_to_hda_codec(hdac);
2202         struct hdmi_spec *spec = codec->spec;
2203         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2204
2205         /* chmap is already set to 0 in caller */
2206         if (!per_pin)
2207                 return;
2208
2209         memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
2210 }
2211
2212 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
2213                                 unsigned char *chmap, int prepared)
2214 {
2215         struct hda_codec *codec = hdac_to_hda_codec(hdac);
2216         struct hdmi_spec *spec = codec->spec;
2217         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2218
2219         if (!per_pin)
2220                 return;
2221         mutex_lock(&per_pin->lock);
2222         per_pin->chmap_set = true;
2223         memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
2224         if (prepared)
2225                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2226         mutex_unlock(&per_pin->lock);
2227 }
2228
2229 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
2230 {
2231         struct hda_codec *codec = hdac_to_hda_codec(hdac);
2232         struct hdmi_spec *spec = codec->spec;
2233         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2234
2235         return per_pin ? true:false;
2236 }
2237
2238 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2239 {
2240         struct hdmi_spec *spec = codec->spec;
2241         int idx, pcm_num;
2242
2243         /*
2244          * for non-mst mode, pcm number is the same as before
2245          * for DP MST mode without extra PCM, pcm number is same
2246          * for DP MST mode with extra PCMs, pcm number is
2247          *  (nid number + dev_num - 1)
2248          * dev_num is the device entry number in a pin
2249          */
2250
2251         if (codec->mst_no_extra_pcms)
2252                 pcm_num = spec->num_nids;
2253         else
2254                 pcm_num = spec->num_nids + spec->dev_num - 1;
2255
2256         codec_dbg(codec, "hdmi: pcm_num set to %d\n", pcm_num);
2257
2258         for (idx = 0; idx < pcm_num; idx++) {
2259                 struct hda_pcm *info;
2260                 struct hda_pcm_stream *pstr;
2261
2262                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", idx);
2263                 if (!info)
2264                         return -ENOMEM;
2265
2266                 spec->pcm_rec[idx].pcm = info;
2267                 spec->pcm_used++;
2268                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2269                 info->own_chmap = true;
2270
2271                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2272                 pstr->substreams = 1;
2273                 pstr->ops = generic_ops;
2274                 /* pcm number is less than 16 */
2275                 if (spec->pcm_used >= 16)
2276                         break;
2277                 /* other pstr fields are set in open */
2278         }
2279
2280         return 0;
2281 }
2282
2283 static void free_hdmi_jack_priv(struct snd_jack *jack)
2284 {
2285         struct hdmi_pcm *pcm = jack->private_data;
2286
2287         pcm->jack = NULL;
2288 }
2289
2290 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2291 {
2292         char hdmi_str[32] = "HDMI/DP";
2293         struct hdmi_spec *spec = codec->spec;
2294         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pcm_idx);
2295         struct snd_jack *jack;
2296         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2297         int err;
2298
2299         if (pcmdev > 0)
2300                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2301         if (!spec->dyn_pcm_assign &&
2302             !is_jack_detectable(codec, per_pin->pin_nid))
2303                 strncat(hdmi_str, " Phantom",
2304                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2305
2306         err = snd_jack_new(codec->card, hdmi_str, SND_JACK_AVOUT, &jack,
2307                            true, false);
2308         if (err < 0)
2309                 return err;
2310
2311         spec->pcm_rec[pcm_idx].jack = jack;
2312         jack->private_data = &spec->pcm_rec[pcm_idx];
2313         jack->private_free = free_hdmi_jack_priv;
2314         return 0;
2315 }
2316
2317 static int generic_hdmi_build_controls(struct hda_codec *codec)
2318 {
2319         struct hdmi_spec *spec = codec->spec;
2320         int dev, err;
2321         int pin_idx, pcm_idx;
2322
2323         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2324                 if (!get_pcm_rec(spec, pcm_idx)->pcm) {
2325                         /* no PCM: mark this for skipping permanently */
2326                         set_bit(pcm_idx, &spec->pcm_bitmap);
2327                         continue;
2328                 }
2329
2330                 err = generic_hdmi_build_jack(codec, pcm_idx);
2331                 if (err < 0)
2332                         return err;
2333
2334                 /* create the spdif for each pcm
2335                  * pin will be bound when monitor is connected
2336                  */
2337                 if (spec->dyn_pcm_assign)
2338                         err = snd_hda_create_dig_out_ctls(codec,
2339                                           0, spec->cvt_nids[0],
2340                                           HDA_PCM_TYPE_HDMI);
2341                 else {
2342                         struct hdmi_spec_per_pin *per_pin =
2343                                 get_pin(spec, pcm_idx);
2344                         err = snd_hda_create_dig_out_ctls(codec,
2345                                                   per_pin->pin_nid,
2346                                                   per_pin->mux_nids[0],
2347                                                   HDA_PCM_TYPE_HDMI);
2348                 }
2349                 if (err < 0)
2350                         return err;
2351                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2352
2353                 dev = get_pcm_rec(spec, pcm_idx)->device;
2354                 if (dev != SNDRV_PCM_INVALID_DEVICE) {
2355                         /* add control for ELD Bytes */
2356                         err = hdmi_create_eld_ctl(codec, pcm_idx, dev);
2357                         if (err < 0)
2358                                 return err;
2359                 }
2360         }
2361
2362         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2363                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2364                 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
2365
2366                 pin_eld->eld_valid = false;
2367                 hdmi_present_sense(per_pin, 0);
2368         }
2369
2370         /* add channel maps */
2371         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2372                 struct hda_pcm *pcm;
2373
2374                 pcm = get_pcm_rec(spec, pcm_idx);
2375                 if (!pcm || !pcm->pcm)
2376                         break;
2377                 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2378                 if (err < 0)
2379                         return err;
2380         }
2381
2382         return 0;
2383 }
2384
2385 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2386 {
2387         struct hdmi_spec *spec = codec->spec;
2388         int pin_idx;
2389
2390         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2391                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2392
2393                 per_pin->codec = codec;
2394                 mutex_init(&per_pin->lock);
2395                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2396                 eld_proc_new(per_pin, pin_idx);
2397         }
2398         return 0;
2399 }
2400
2401 static int generic_hdmi_init(struct hda_codec *codec)
2402 {
2403         struct hdmi_spec *spec = codec->spec;
2404         int pin_idx;
2405
2406         mutex_lock(&spec->bind_lock);
2407         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2408                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2409                 hda_nid_t pin_nid = per_pin->pin_nid;
2410                 int dev_id = per_pin->dev_id;
2411
2412                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
2413                 hdmi_init_pin(codec, pin_nid);
2414                 if (codec_has_acomp(codec))
2415                         continue;
2416                 snd_hda_jack_detect_enable_callback_mst(codec, pin_nid, dev_id,
2417                                                         jack_callback);
2418         }
2419         mutex_unlock(&spec->bind_lock);
2420         return 0;
2421 }
2422
2423 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2424 {
2425         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2426         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2427 }
2428
2429 static void hdmi_array_free(struct hdmi_spec *spec)
2430 {
2431         snd_array_free(&spec->pins);
2432         snd_array_free(&spec->cvts);
2433 }
2434
2435 static void generic_spec_free(struct hda_codec *codec)
2436 {
2437         struct hdmi_spec *spec = codec->spec;
2438
2439         if (spec) {
2440                 hdmi_array_free(spec);
2441                 kfree(spec);
2442                 codec->spec = NULL;
2443         }
2444         codec->dp_mst = false;
2445 }
2446
2447 static void generic_hdmi_free(struct hda_codec *codec)
2448 {
2449         struct hdmi_spec *spec = codec->spec;
2450         int pin_idx, pcm_idx;
2451
2452         if (spec->acomp_registered) {
2453                 snd_hdac_acomp_exit(&codec->bus->core);
2454         } else if (codec_has_acomp(codec)) {
2455                 snd_hdac_acomp_register_notifier(&codec->bus->core, NULL);
2456         }
2457         codec->relaxed_resume = 0;
2458
2459         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2460                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2461                 cancel_delayed_work_sync(&per_pin->work);
2462                 eld_proc_free(per_pin);
2463         }
2464
2465         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2466                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2467                         continue;
2468                 if (spec->dyn_pcm_assign)
2469                         snd_device_free(codec->card,
2470                                         spec->pcm_rec[pcm_idx].jack);
2471                 else
2472                         spec->pcm_rec[pcm_idx].jack = NULL;
2473         }
2474
2475         generic_spec_free(codec);
2476 }
2477
2478 #ifdef CONFIG_PM
2479 static int generic_hdmi_suspend(struct hda_codec *codec)
2480 {
2481         struct hdmi_spec *spec = codec->spec;
2482         int pin_idx;
2483
2484         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2485                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2486                 cancel_delayed_work_sync(&per_pin->work);
2487         }
2488         return 0;
2489 }
2490
2491 static int generic_hdmi_resume(struct hda_codec *codec)
2492 {
2493         struct hdmi_spec *spec = codec->spec;
2494         int pin_idx;
2495
2496         codec->patch_ops.init(codec);
2497         snd_hda_regmap_sync(codec);
2498
2499         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2500                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2501                 hdmi_present_sense(per_pin, 1);
2502         }
2503         return 0;
2504 }
2505 #endif
2506
2507 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2508         .init                   = generic_hdmi_init,
2509         .free                   = generic_hdmi_free,
2510         .build_pcms             = generic_hdmi_build_pcms,
2511         .build_controls         = generic_hdmi_build_controls,
2512         .unsol_event            = hdmi_unsol_event,
2513 #ifdef CONFIG_PM
2514         .suspend                = generic_hdmi_suspend,
2515         .resume                 = generic_hdmi_resume,
2516 #endif
2517 };
2518
2519 static const struct hdmi_ops generic_standard_hdmi_ops = {
2520         .pin_get_eld                            = hdmi_pin_get_eld,
2521         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2522         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2523         .setup_stream                           = hdmi_setup_stream,
2524 };
2525
2526 /* allocate codec->spec and assign/initialize generic parser ops */
2527 static int alloc_generic_hdmi(struct hda_codec *codec)
2528 {
2529         struct hdmi_spec *spec;
2530
2531         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2532         if (!spec)
2533                 return -ENOMEM;
2534
2535         spec->codec = codec;
2536         spec->ops = generic_standard_hdmi_ops;
2537         spec->dev_num = 1;      /* initialize to 1 */
2538         mutex_init(&spec->pcm_lock);
2539         mutex_init(&spec->bind_lock);
2540         snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2541
2542         spec->chmap.ops.get_chmap = hdmi_get_chmap;
2543         spec->chmap.ops.set_chmap = hdmi_set_chmap;
2544         spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2545         spec->chmap.ops.get_spk_alloc = hdmi_get_spk_alloc;
2546
2547         codec->spec = spec;
2548         hdmi_array_init(spec, 4);
2549
2550         codec->patch_ops = generic_hdmi_patch_ops;
2551
2552         return 0;
2553 }
2554
2555 /* generic HDMI parser */
2556 static int patch_generic_hdmi(struct hda_codec *codec)
2557 {
2558         int err;
2559
2560         err = alloc_generic_hdmi(codec);
2561         if (err < 0)
2562                 return err;
2563
2564         err = hdmi_parse_codec(codec);
2565         if (err < 0) {
2566                 generic_spec_free(codec);
2567                 return err;
2568         }
2569
2570         generic_hdmi_init_per_pins(codec);
2571         return 0;
2572 }
2573
2574 /*
2575  * generic audio component binding
2576  */
2577
2578 /* turn on / off the unsol event jack detection dynamically */
2579 static void reprogram_jack_detect(struct hda_codec *codec, hda_nid_t nid,
2580                                   int dev_id, bool use_acomp)
2581 {
2582         struct hda_jack_tbl *tbl;
2583
2584         tbl = snd_hda_jack_tbl_get_mst(codec, nid, dev_id);
2585         if (tbl) {
2586                 /* clear unsol even if component notifier is used, or re-enable
2587                  * if notifier is cleared
2588                  */
2589                 unsigned int val = use_acomp ? 0 : (AC_USRSP_EN | tbl->tag);
2590                 snd_hda_codec_write_cache(codec, nid, 0,
2591                                           AC_VERB_SET_UNSOLICITED_ENABLE, val);
2592         }
2593 }
2594
2595 /* set up / clear component notifier dynamically */
2596 static void generic_acomp_notifier_set(struct drm_audio_component *acomp,
2597                                        bool use_acomp)
2598 {
2599         struct hdmi_spec *spec;
2600         int i;
2601
2602         spec = container_of(acomp->audio_ops, struct hdmi_spec, drm_audio_ops);
2603         mutex_lock(&spec->bind_lock);
2604         spec->use_acomp_notifier = use_acomp;
2605         spec->codec->relaxed_resume = use_acomp;
2606         spec->codec->bus->keep_power = 0;
2607         /* reprogram each jack detection logic depending on the notifier */
2608         for (i = 0; i < spec->num_pins; i++)
2609                 reprogram_jack_detect(spec->codec,
2610                                       get_pin(spec, i)->pin_nid,
2611                                       get_pin(spec, i)->dev_id,
2612                                       use_acomp);
2613         mutex_unlock(&spec->bind_lock);
2614 }
2615
2616 /* enable / disable the notifier via master bind / unbind */
2617 static int generic_acomp_master_bind(struct device *dev,
2618                                      struct drm_audio_component *acomp)
2619 {
2620         generic_acomp_notifier_set(acomp, true);
2621         return 0;
2622 }
2623
2624 static void generic_acomp_master_unbind(struct device *dev,
2625                                         struct drm_audio_component *acomp)
2626 {
2627         generic_acomp_notifier_set(acomp, false);
2628 }
2629
2630 /* check whether both HD-audio and DRM PCI devices belong to the same bus */
2631 static int match_bound_vga(struct device *dev, int subtype, void *data)
2632 {
2633         struct hdac_bus *bus = data;
2634         struct pci_dev *pci, *master;
2635
2636         if (!dev_is_pci(dev) || !dev_is_pci(bus->dev))
2637                 return 0;
2638         master = to_pci_dev(bus->dev);
2639         pci = to_pci_dev(dev);
2640         return master->bus == pci->bus;
2641 }
2642
2643 /* audio component notifier for AMD/Nvidia HDMI codecs */
2644 static void generic_acomp_pin_eld_notify(void *audio_ptr, int port, int dev_id)
2645 {
2646         struct hda_codec *codec = audio_ptr;
2647         struct hdmi_spec *spec = codec->spec;
2648         hda_nid_t pin_nid = spec->port2pin(codec, port);
2649
2650         if (!pin_nid)
2651                 return;
2652         if (get_wcaps_type(get_wcaps(codec, pin_nid)) != AC_WID_PIN)
2653                 return;
2654         /* skip notification during system suspend (but not in runtime PM);
2655          * the state will be updated at resume
2656          */
2657         if (codec->core.dev.power.power_state.event == PM_EVENT_SUSPEND)
2658                 return;
2659         /* ditto during suspend/resume process itself */
2660         if (snd_hdac_is_in_pm(&codec->core))
2661                 return;
2662
2663         check_presence_and_report(codec, pin_nid, dev_id);
2664 }
2665
2666 /* set up the private drm_audio_ops from the template */
2667 static void setup_drm_audio_ops(struct hda_codec *codec,
2668                                 const struct drm_audio_component_audio_ops *ops)
2669 {
2670         struct hdmi_spec *spec = codec->spec;
2671
2672         spec->drm_audio_ops.audio_ptr = codec;
2673         /* intel_audio_codec_enable() or intel_audio_codec_disable()
2674          * will call pin_eld_notify with using audio_ptr pointer
2675          * We need make sure audio_ptr is really setup
2676          */
2677         wmb();
2678         spec->drm_audio_ops.pin2port = ops->pin2port;
2679         spec->drm_audio_ops.pin_eld_notify = ops->pin_eld_notify;
2680         spec->drm_audio_ops.master_bind = ops->master_bind;
2681         spec->drm_audio_ops.master_unbind = ops->master_unbind;
2682 }
2683
2684 /* initialize the generic HDMI audio component */
2685 static void generic_acomp_init(struct hda_codec *codec,
2686                                const struct drm_audio_component_audio_ops *ops,
2687                                int (*port2pin)(struct hda_codec *, int))
2688 {
2689         struct hdmi_spec *spec = codec->spec;
2690
2691         if (!enable_acomp) {
2692                 codec_info(codec, "audio component disabled by module option\n");
2693                 return;
2694         }
2695
2696         spec->port2pin = port2pin;
2697         setup_drm_audio_ops(codec, ops);
2698         if (!snd_hdac_acomp_init(&codec->bus->core, &spec->drm_audio_ops,
2699                                  match_bound_vga, 0)) {
2700                 spec->acomp_registered = true;
2701         }
2702 }
2703
2704 /*
2705  * Intel codec parsers and helpers
2706  */
2707
2708 #define INTEL_GET_VENDOR_VERB   0xf81
2709 #define INTEL_SET_VENDOR_VERB   0x781
2710 #define INTEL_EN_DP12           0x02    /* enable DP 1.2 features */
2711 #define INTEL_EN_ALL_PIN_CVTS   0x01    /* enable 2nd & 3rd pins and convertors */
2712
2713 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2714                                           bool update_tree)
2715 {
2716         unsigned int vendor_param;
2717         struct hdmi_spec *spec = codec->spec;
2718
2719         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2720                                 INTEL_GET_VENDOR_VERB, 0);
2721         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2722                 return;
2723
2724         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2725         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2726                                 INTEL_SET_VENDOR_VERB, vendor_param);
2727         if (vendor_param == -1)
2728                 return;
2729
2730         if (update_tree)
2731                 snd_hda_codec_update_widgets(codec);
2732 }
2733
2734 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2735 {
2736         unsigned int vendor_param;
2737         struct hdmi_spec *spec = codec->spec;
2738
2739         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2740                                 INTEL_GET_VENDOR_VERB, 0);
2741         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2742                 return;
2743
2744         /* enable DP1.2 mode */
2745         vendor_param |= INTEL_EN_DP12;
2746         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2747         snd_hda_codec_write_cache(codec, spec->vendor_nid, 0,
2748                                 INTEL_SET_VENDOR_VERB, vendor_param);
2749 }
2750
2751 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2752  * Otherwise you may get severe h/w communication errors.
2753  */
2754 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2755                                 unsigned int power_state)
2756 {
2757         if (power_state == AC_PWRST_D0) {
2758                 intel_haswell_enable_all_pins(codec, false);
2759                 intel_haswell_fixup_enable_dp12(codec);
2760         }
2761
2762         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2763         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2764 }
2765
2766 /* There is a fixed mapping between audio pin node and display port.
2767  * on SNB, IVY, HSW, BSW, SKL, BXT, KBL:
2768  * Pin Widget 5 - PORT B (port = 1 in i915 driver)
2769  * Pin Widget 6 - PORT C (port = 2 in i915 driver)
2770  * Pin Widget 7 - PORT D (port = 3 in i915 driver)
2771  *
2772  * on VLV, ILK:
2773  * Pin Widget 4 - PORT B (port = 1 in i915 driver)
2774  * Pin Widget 5 - PORT C (port = 2 in i915 driver)
2775  * Pin Widget 6 - PORT D (port = 3 in i915 driver)
2776  */
2777 static int intel_base_nid(struct hda_codec *codec)
2778 {
2779         switch (codec->core.vendor_id) {
2780         case 0x80860054: /* ILK */
2781         case 0x80862804: /* ILK */
2782         case 0x80862882: /* VLV */
2783                 return 4;
2784         default:
2785                 return 5;
2786         }
2787 }
2788
2789 static int intel_pin2port(void *audio_ptr, int pin_nid)
2790 {
2791         struct hda_codec *codec = audio_ptr;
2792         struct hdmi_spec *spec = codec->spec;
2793         int base_nid, i;
2794
2795         if (!spec->port_num) {
2796                 base_nid = intel_base_nid(codec);
2797                 if (WARN_ON(pin_nid < base_nid || pin_nid >= base_nid + 3))
2798                         return -1;
2799                 return pin_nid - base_nid + 1;
2800         }
2801
2802         /*
2803          * looking for the pin number in the mapping table and return
2804          * the index which indicate the port number
2805          */
2806         for (i = 0; i < spec->port_num; i++) {
2807                 if (pin_nid == spec->port_map[i])
2808                         return i;
2809         }
2810
2811         codec_info(codec, "Can't find the HDMI/DP port for pin NID 0x%x\n", pin_nid);
2812         return -1;
2813 }
2814
2815 static int intel_port2pin(struct hda_codec *codec, int port)
2816 {
2817         struct hdmi_spec *spec = codec->spec;
2818
2819         if (!spec->port_num) {
2820                 /* we assume only from port-B to port-D */
2821                 if (port < 1 || port > 3)
2822                         return 0;
2823                 return port + intel_base_nid(codec) - 1;
2824         }
2825
2826         if (port < 0 || port >= spec->port_num)
2827                 return 0;
2828         return spec->port_map[port];
2829 }
2830
2831 static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe)
2832 {
2833         struct hda_codec *codec = audio_ptr;
2834         int pin_nid;
2835         int dev_id = pipe;
2836
2837         pin_nid = intel_port2pin(codec, port);
2838         if (!pin_nid)
2839                 return;
2840         /* skip notification during system suspend (but not in runtime PM);
2841          * the state will be updated at resume
2842          */
2843         if (codec->core.dev.power.power_state.event == PM_EVENT_SUSPEND)
2844                 return;
2845         /* ditto during suspend/resume process itself */
2846         if (snd_hdac_is_in_pm(&codec->core))
2847                 return;
2848
2849         snd_hdac_i915_set_bclk(&codec->bus->core);
2850         check_presence_and_report(codec, pin_nid, dev_id);
2851 }
2852
2853 static const struct drm_audio_component_audio_ops intel_audio_ops = {
2854         .pin2port = intel_pin2port,
2855         .pin_eld_notify = intel_pin_eld_notify,
2856 };
2857
2858 /* register i915 component pin_eld_notify callback */
2859 static void register_i915_notifier(struct hda_codec *codec)
2860 {
2861         struct hdmi_spec *spec = codec->spec;
2862
2863         spec->use_acomp_notifier = true;
2864         spec->port2pin = intel_port2pin;
2865         setup_drm_audio_ops(codec, &intel_audio_ops);
2866         snd_hdac_acomp_register_notifier(&codec->bus->core,
2867                                         &spec->drm_audio_ops);
2868         /* no need for forcible resume for jack check thanks to notifier */
2869         codec->relaxed_resume = 1;
2870 }
2871
2872 /* setup_stream ops override for HSW+ */
2873 static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
2874                                  hda_nid_t pin_nid, int dev_id, u32 stream_tag,
2875                                  int format)
2876 {
2877         haswell_verify_D0(codec, cvt_nid, pin_nid);
2878         return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
2879                                  stream_tag, format);
2880 }
2881
2882 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2883 static void i915_pin_cvt_fixup(struct hda_codec *codec,
2884                                struct hdmi_spec_per_pin *per_pin,
2885                                hda_nid_t cvt_nid)
2886 {
2887         if (per_pin) {
2888                 haswell_verify_D0(codec, per_pin->cvt_nid, per_pin->pin_nid);
2889                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2890                                per_pin->dev_id);
2891                 intel_verify_pin_cvt_connect(codec, per_pin);
2892                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
2893                                      per_pin->dev_id, per_pin->mux_idx);
2894         } else {
2895                 intel_not_share_assigned_cvt_nid(codec, 0, 0, cvt_nid);
2896         }
2897 }
2898
2899 /* precondition and allocation for Intel codecs */
2900 static int alloc_intel_hdmi(struct hda_codec *codec)
2901 {
2902         int err;
2903
2904         /* requires i915 binding */
2905         if (!codec->bus->core.audio_component) {
2906                 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2907                 /* set probe_id here to prevent generic fallback binding */
2908                 codec->probe_id = HDA_CODEC_ID_SKIP_PROBE;
2909                 return -ENODEV;
2910         }
2911
2912         err = alloc_generic_hdmi(codec);
2913         if (err < 0)
2914                 return err;
2915         /* no need to handle unsol events */
2916         codec->patch_ops.unsol_event = NULL;
2917         return 0;
2918 }
2919
2920 /* parse and post-process for Intel codecs */
2921 static int parse_intel_hdmi(struct hda_codec *codec)
2922 {
2923         int err, retries = 3;
2924
2925         do {
2926                 err = hdmi_parse_codec(codec);
2927         } while (err < 0 && retries--);
2928
2929         if (err < 0) {
2930                 generic_spec_free(codec);
2931                 return err;
2932         }
2933
2934         generic_hdmi_init_per_pins(codec);
2935         register_i915_notifier(codec);
2936         return 0;
2937 }
2938
2939 /* Intel Haswell and onwards; audio component with eld notifier */
2940 static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid,
2941                                  const int *port_map, int port_num, int dev_num)
2942 {
2943         struct hdmi_spec *spec;
2944         int err;
2945
2946         err = alloc_intel_hdmi(codec);
2947         if (err < 0)
2948                 return err;
2949         spec = codec->spec;
2950         codec->dp_mst = true;
2951         spec->dyn_pcm_assign = true;
2952         spec->vendor_nid = vendor_nid;
2953         spec->port_map = port_map;
2954         spec->port_num = port_num;
2955         spec->intel_hsw_fixup = true;
2956         spec->dev_num = dev_num;
2957
2958         intel_haswell_enable_all_pins(codec, true);
2959         intel_haswell_fixup_enable_dp12(codec);
2960
2961         codec->display_power_control = 1;
2962
2963         codec->patch_ops.set_power_state = haswell_set_power_state;
2964         codec->depop_delay = 0;
2965         codec->auto_runtime_pm = 1;
2966
2967         spec->ops.setup_stream = i915_hsw_setup_stream;
2968         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2969
2970         /*
2971          * Enable silent stream feature, if it is enabled via
2972          * module param or Kconfig option
2973          */
2974         if (enable_silent_stream)
2975                 spec->send_silent_stream = true;
2976
2977         return parse_intel_hdmi(codec);
2978 }
2979
2980 static int patch_i915_hsw_hdmi(struct hda_codec *codec)
2981 {
2982         return intel_hsw_common_init(codec, 0x08, NULL, 0, 3);
2983 }
2984
2985 static int patch_i915_glk_hdmi(struct hda_codec *codec)
2986 {
2987         return intel_hsw_common_init(codec, 0x0b, NULL, 0, 3);
2988 }
2989
2990 static int patch_i915_icl_hdmi(struct hda_codec *codec)
2991 {
2992         /*
2993          * pin to port mapping table where the value indicate the pin number and
2994          * the index indicate the port number.
2995          */
2996         static const int map[] = {0x0, 0x4, 0x6, 0x8, 0xa, 0xb};
2997
2998         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map), 3);
2999 }
3000
3001 static int patch_i915_tgl_hdmi(struct hda_codec *codec)
3002 {
3003         /*
3004          * pin to port mapping table where the value indicate the pin number and
3005          * the index indicate the port number.
3006          */
3007         static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
3008         int ret;
3009
3010         ret = intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map), 4);
3011         if (!ret) {
3012                 struct hdmi_spec *spec = codec->spec;
3013
3014                 spec->dyn_pcm_no_legacy = true;
3015         }
3016
3017         return ret;
3018 }
3019
3020 /* Intel Baytrail and Braswell; with eld notifier */
3021 static int patch_i915_byt_hdmi(struct hda_codec *codec)
3022 {
3023         struct hdmi_spec *spec;
3024         int err;
3025
3026         err = alloc_intel_hdmi(codec);
3027         if (err < 0)
3028                 return err;
3029         spec = codec->spec;
3030
3031         /* For Valleyview/Cherryview, only the display codec is in the display
3032          * power well and can use link_power ops to request/release the power.
3033          */
3034         codec->display_power_control = 1;
3035
3036         codec->depop_delay = 0;
3037         codec->auto_runtime_pm = 1;
3038
3039         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
3040
3041         return parse_intel_hdmi(codec);
3042 }
3043
3044 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
3045 static int patch_i915_cpt_hdmi(struct hda_codec *codec)
3046 {
3047         int err;
3048
3049         err = alloc_intel_hdmi(codec);
3050         if (err < 0)
3051                 return err;
3052         return parse_intel_hdmi(codec);
3053 }
3054
3055 /*
3056  * Shared non-generic implementations
3057  */
3058
3059 static int simple_playback_build_pcms(struct hda_codec *codec)
3060 {
3061         struct hdmi_spec *spec = codec->spec;
3062         struct hda_pcm *info;
3063         unsigned int chans;
3064         struct hda_pcm_stream *pstr;
3065         struct hdmi_spec_per_cvt *per_cvt;
3066
3067         per_cvt = get_cvt(spec, 0);
3068         chans = get_wcaps(codec, per_cvt->cvt_nid);
3069         chans = get_wcaps_channels(chans);
3070
3071         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
3072         if (!info)
3073                 return -ENOMEM;
3074         spec->pcm_rec[0].pcm = info;
3075         info->pcm_type = HDA_PCM_TYPE_HDMI;
3076         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
3077         *pstr = spec->pcm_playback;
3078         pstr->nid = per_cvt->cvt_nid;
3079         if (pstr->channels_max <= 2 && chans && chans <= 16)
3080                 pstr->channels_max = chans;
3081
3082         return 0;
3083 }
3084
3085 /* unsolicited event for jack sensing */
3086 static void simple_hdmi_unsol_event(struct hda_codec *codec,
3087                                     unsigned int res)
3088 {
3089         snd_hda_jack_set_dirty_all(codec);
3090         snd_hda_jack_report_sync(codec);
3091 }
3092
3093 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
3094  * as long as spec->pins[] is set correctly
3095  */
3096 #define simple_hdmi_build_jack  generic_hdmi_build_jack
3097
3098 static int simple_playback_build_controls(struct hda_codec *codec)
3099 {
3100         struct hdmi_spec *spec = codec->spec;
3101         struct hdmi_spec_per_cvt *per_cvt;
3102         int err;
3103
3104         per_cvt = get_cvt(spec, 0);
3105         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
3106                                           per_cvt->cvt_nid,
3107                                           HDA_PCM_TYPE_HDMI);
3108         if (err < 0)
3109                 return err;
3110         return simple_hdmi_build_jack(codec, 0);
3111 }
3112
3113 static int simple_playback_init(struct hda_codec *codec)
3114 {
3115         struct hdmi_spec *spec = codec->spec;
3116         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
3117         hda_nid_t pin = per_pin->pin_nid;
3118
3119         snd_hda_codec_write(codec, pin, 0,
3120                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
3121         /* some codecs require to unmute the pin */
3122         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
3123                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
3124                                     AMP_OUT_UNMUTE);
3125         snd_hda_jack_detect_enable(codec, pin, per_pin->dev_id);
3126         return 0;
3127 }
3128
3129 static void simple_playback_free(struct hda_codec *codec)
3130 {
3131         struct hdmi_spec *spec = codec->spec;
3132
3133         hdmi_array_free(spec);
3134         kfree(spec);
3135 }
3136
3137 /*
3138  * Nvidia specific implementations
3139  */
3140
3141 #define Nv_VERB_SET_Channel_Allocation          0xF79
3142 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
3143 #define Nv_VERB_SET_Audio_Protection_On         0xF98
3144 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
3145
3146 #define nvhdmi_master_con_nid_7x        0x04
3147 #define nvhdmi_master_pin_nid_7x        0x05
3148
3149 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
3150         /*front, rear, clfe, rear_surr */
3151         0x6, 0x8, 0xa, 0xc,
3152 };
3153
3154 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
3155         /* set audio protect on */
3156         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3157         /* enable digital output on pin widget */
3158         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3159         {} /* terminator */
3160 };
3161
3162 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
3163         /* set audio protect on */
3164         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3165         /* enable digital output on pin widget */
3166         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3167         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3168         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3169         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3170         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3171         {} /* terminator */
3172 };
3173
3174 #ifdef LIMITED_RATE_FMT_SUPPORT
3175 /* support only the safe format and rate */
3176 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
3177 #define SUPPORTED_MAXBPS        16
3178 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
3179 #else
3180 /* support all rates and formats */
3181 #define SUPPORTED_RATES \
3182         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
3183         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
3184          SNDRV_PCM_RATE_192000)
3185 #define SUPPORTED_MAXBPS        24
3186 #define SUPPORTED_FORMATS \
3187         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
3188 #endif
3189
3190 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
3191 {
3192         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
3193         return 0;
3194 }
3195
3196 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
3197 {
3198         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
3199         return 0;
3200 }
3201
3202 static const unsigned int channels_2_6_8[] = {
3203         2, 6, 8
3204 };
3205
3206 static const unsigned int channels_2_8[] = {
3207         2, 8
3208 };
3209
3210 static const struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
3211         .count = ARRAY_SIZE(channels_2_6_8),
3212         .list = channels_2_6_8,
3213         .mask = 0,
3214 };
3215
3216 static const struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
3217         .count = ARRAY_SIZE(channels_2_8),
3218         .list = channels_2_8,
3219         .mask = 0,
3220 };
3221
3222 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
3223                                     struct hda_codec *codec,
3224                                     struct snd_pcm_substream *substream)
3225 {
3226         struct hdmi_spec *spec = codec->spec;
3227         const struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
3228
3229         switch (codec->preset->vendor_id) {
3230         case 0x10de0002:
3231         case 0x10de0003:
3232         case 0x10de0005:
3233         case 0x10de0006:
3234                 hw_constraints_channels = &hw_constraints_2_8_channels;
3235                 break;
3236         case 0x10de0007:
3237                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
3238                 break;
3239         default:
3240                 break;
3241         }
3242
3243         if (hw_constraints_channels != NULL) {
3244                 snd_pcm_hw_constraint_list(substream->runtime, 0,
3245                                 SNDRV_PCM_HW_PARAM_CHANNELS,
3246                                 hw_constraints_channels);
3247         } else {
3248                 snd_pcm_hw_constraint_step(substream->runtime, 0,
3249                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
3250         }
3251
3252         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3253 }
3254
3255 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
3256                                      struct hda_codec *codec,
3257                                      struct snd_pcm_substream *substream)
3258 {
3259         struct hdmi_spec *spec = codec->spec;
3260         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3261 }
3262
3263 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3264                                        struct hda_codec *codec,
3265                                        unsigned int stream_tag,
3266                                        unsigned int format,
3267                                        struct snd_pcm_substream *substream)
3268 {
3269         struct hdmi_spec *spec = codec->spec;
3270         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3271                                              stream_tag, format, substream);
3272 }
3273
3274 static const struct hda_pcm_stream simple_pcm_playback = {
3275         .substreams = 1,
3276         .channels_min = 2,
3277         .channels_max = 2,
3278         .ops = {
3279                 .open = simple_playback_pcm_open,
3280                 .close = simple_playback_pcm_close,
3281                 .prepare = simple_playback_pcm_prepare
3282         },
3283 };
3284
3285 static const struct hda_codec_ops simple_hdmi_patch_ops = {
3286         .build_controls = simple_playback_build_controls,
3287         .build_pcms = simple_playback_build_pcms,
3288         .init = simple_playback_init,
3289         .free = simple_playback_free,
3290         .unsol_event = simple_hdmi_unsol_event,
3291 };
3292
3293 static int patch_simple_hdmi(struct hda_codec *codec,
3294                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
3295 {
3296         struct hdmi_spec *spec;
3297         struct hdmi_spec_per_cvt *per_cvt;
3298         struct hdmi_spec_per_pin *per_pin;
3299
3300         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3301         if (!spec)
3302                 return -ENOMEM;
3303
3304         spec->codec = codec;
3305         codec->spec = spec;
3306         hdmi_array_init(spec, 1);
3307
3308         spec->multiout.num_dacs = 0;  /* no analog */
3309         spec->multiout.max_channels = 2;
3310         spec->multiout.dig_out_nid = cvt_nid;
3311         spec->num_cvts = 1;
3312         spec->num_pins = 1;
3313         per_pin = snd_array_new(&spec->pins);
3314         per_cvt = snd_array_new(&spec->cvts);
3315         if (!per_pin || !per_cvt) {
3316                 simple_playback_free(codec);
3317                 return -ENOMEM;
3318         }
3319         per_cvt->cvt_nid = cvt_nid;
3320         per_pin->pin_nid = pin_nid;
3321         spec->pcm_playback = simple_pcm_playback;
3322
3323         codec->patch_ops = simple_hdmi_patch_ops;
3324
3325         return 0;
3326 }
3327
3328 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
3329                                                     int channels)
3330 {
3331         unsigned int chanmask;
3332         int chan = channels ? (channels - 1) : 1;
3333
3334         switch (channels) {
3335         default:
3336         case 0:
3337         case 2:
3338                 chanmask = 0x00;
3339                 break;
3340         case 4:
3341                 chanmask = 0x08;
3342                 break;
3343         case 6:
3344                 chanmask = 0x0b;
3345                 break;
3346         case 8:
3347                 chanmask = 0x13;
3348                 break;
3349         }
3350
3351         /* Set the audio infoframe channel allocation and checksum fields.  The
3352          * channel count is computed implicitly by the hardware. */
3353         snd_hda_codec_write(codec, 0x1, 0,
3354                         Nv_VERB_SET_Channel_Allocation, chanmask);
3355
3356         snd_hda_codec_write(codec, 0x1, 0,
3357                         Nv_VERB_SET_Info_Frame_Checksum,
3358                         (0x71 - chan - chanmask));
3359 }
3360
3361 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3362                                    struct hda_codec *codec,
3363                                    struct snd_pcm_substream *substream)
3364 {
3365         struct hdmi_spec *spec = codec->spec;
3366         int i;
3367
3368         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3369                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3370         for (i = 0; i < 4; i++) {
3371                 /* set the stream id */
3372                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3373                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
3374                 /* set the stream format */
3375                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3376                                 AC_VERB_SET_STREAM_FORMAT, 0);
3377         }
3378
3379         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3380          * streams are disabled. */
3381         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3382
3383         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3384 }
3385
3386 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3387                                      struct hda_codec *codec,
3388                                      unsigned int stream_tag,
3389                                      unsigned int format,
3390                                      struct snd_pcm_substream *substream)
3391 {
3392         int chs;
3393         unsigned int dataDCC2, channel_id;
3394         int i;
3395         struct hdmi_spec *spec = codec->spec;
3396         struct hda_spdif_out *spdif;
3397         struct hdmi_spec_per_cvt *per_cvt;
3398
3399         mutex_lock(&codec->spdif_mutex);
3400         per_cvt = get_cvt(spec, 0);
3401         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3402
3403         chs = substream->runtime->channels;
3404
3405         dataDCC2 = 0x2;
3406
3407         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3408         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3409                 snd_hda_codec_write(codec,
3410                                 nvhdmi_master_con_nid_7x,
3411                                 0,
3412                                 AC_VERB_SET_DIGI_CONVERT_1,
3413                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3414
3415         /* set the stream id */
3416         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3417                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3418
3419         /* set the stream format */
3420         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3421                         AC_VERB_SET_STREAM_FORMAT, format);
3422
3423         /* turn on again (if needed) */
3424         /* enable and set the channel status audio/data flag */
3425         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3426                 snd_hda_codec_write(codec,
3427                                 nvhdmi_master_con_nid_7x,
3428                                 0,
3429                                 AC_VERB_SET_DIGI_CONVERT_1,
3430                                 spdif->ctls & 0xff);
3431                 snd_hda_codec_write(codec,
3432                                 nvhdmi_master_con_nid_7x,
3433                                 0,
3434                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3435         }
3436
3437         for (i = 0; i < 4; i++) {
3438                 if (chs == 2)
3439                         channel_id = 0;
3440                 else
3441                         channel_id = i * 2;
3442
3443                 /* turn off SPDIF once;
3444                  *otherwise the IEC958 bits won't be updated
3445                  */
3446                 if (codec->spdif_status_reset &&
3447                 (spdif->ctls & AC_DIG1_ENABLE))
3448                         snd_hda_codec_write(codec,
3449                                 nvhdmi_con_nids_7x[i],
3450                                 0,
3451                                 AC_VERB_SET_DIGI_CONVERT_1,
3452                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3453                 /* set the stream id */
3454                 snd_hda_codec_write(codec,
3455                                 nvhdmi_con_nids_7x[i],
3456                                 0,
3457                                 AC_VERB_SET_CHANNEL_STREAMID,
3458                                 (stream_tag << 4) | channel_id);
3459                 /* set the stream format */
3460                 snd_hda_codec_write(codec,
3461                                 nvhdmi_con_nids_7x[i],
3462                                 0,
3463                                 AC_VERB_SET_STREAM_FORMAT,
3464                                 format);
3465                 /* turn on again (if needed) */
3466                 /* enable and set the channel status audio/data flag */
3467                 if (codec->spdif_status_reset &&
3468                 (spdif->ctls & AC_DIG1_ENABLE)) {
3469                         snd_hda_codec_write(codec,
3470                                         nvhdmi_con_nids_7x[i],
3471                                         0,
3472                                         AC_VERB_SET_DIGI_CONVERT_1,
3473                                         spdif->ctls & 0xff);
3474                         snd_hda_codec_write(codec,
3475                                         nvhdmi_con_nids_7x[i],
3476                                         0,
3477                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3478                 }
3479         }
3480
3481         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3482
3483         mutex_unlock(&codec->spdif_mutex);
3484         return 0;
3485 }
3486
3487 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3488         .substreams = 1,
3489         .channels_min = 2,
3490         .channels_max = 8,
3491         .nid = nvhdmi_master_con_nid_7x,
3492         .rates = SUPPORTED_RATES,
3493         .maxbps = SUPPORTED_MAXBPS,
3494         .formats = SUPPORTED_FORMATS,
3495         .ops = {
3496                 .open = simple_playback_pcm_open,
3497                 .close = nvhdmi_8ch_7x_pcm_close,
3498                 .prepare = nvhdmi_8ch_7x_pcm_prepare
3499         },
3500 };
3501
3502 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3503 {
3504         struct hdmi_spec *spec;
3505         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3506                                     nvhdmi_master_pin_nid_7x);
3507         if (err < 0)
3508                 return err;
3509
3510         codec->patch_ops.init = nvhdmi_7x_init_2ch;
3511         /* override the PCM rates, etc, as the codec doesn't give full list */
3512         spec = codec->spec;
3513         spec->pcm_playback.rates = SUPPORTED_RATES;
3514         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3515         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3516         return 0;
3517 }
3518
3519 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3520 {
3521         struct hdmi_spec *spec = codec->spec;
3522         int err = simple_playback_build_pcms(codec);
3523         if (!err) {
3524                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3525                 info->own_chmap = true;
3526         }
3527         return err;
3528 }
3529
3530 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3531 {
3532         struct hdmi_spec *spec = codec->spec;
3533         struct hda_pcm *info;
3534         struct snd_pcm_chmap *chmap;
3535         int err;
3536
3537         err = simple_playback_build_controls(codec);
3538         if (err < 0)
3539                 return err;
3540
3541         /* add channel maps */
3542         info = get_pcm_rec(spec, 0);
3543         err = snd_pcm_add_chmap_ctls(info->pcm,
3544                                      SNDRV_PCM_STREAM_PLAYBACK,
3545                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3546         if (err < 0)
3547                 return err;
3548         switch (codec->preset->vendor_id) {
3549         case 0x10de0002:
3550         case 0x10de0003:
3551         case 0x10de0005:
3552         case 0x10de0006:
3553                 chmap->channel_mask = (1U << 2) | (1U << 8);
3554                 break;
3555         case 0x10de0007:
3556                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3557         }
3558         return 0;
3559 }
3560
3561 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3562 {
3563         struct hdmi_spec *spec;
3564         int err = patch_nvhdmi_2ch(codec);
3565         if (err < 0)
3566                 return err;
3567         spec = codec->spec;
3568         spec->multiout.max_channels = 8;
3569         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3570         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3571         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3572         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3573
3574         /* Initialize the audio infoframe channel mask and checksum to something
3575          * valid */
3576         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3577
3578         return 0;
3579 }
3580
3581 /*
3582  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3583  * - 0x10de0015
3584  * - 0x10de0040
3585  */
3586 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
3587                 struct hdac_cea_channel_speaker_allocation *cap, int channels)
3588 {
3589         if (cap->ca_index == 0x00 && channels == 2)
3590                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3591
3592         /* If the speaker allocation matches the channel count, it is OK. */
3593         if (cap->channels != channels)
3594                 return -1;
3595
3596         /* all channels are remappable freely */
3597         return SNDRV_CTL_TLVT_CHMAP_VAR;
3598 }
3599
3600 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
3601                 int ca, int chs, unsigned char *map)
3602 {
3603         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3604                 return -EINVAL;
3605
3606         return 0;
3607 }
3608
3609 /* map from pin NID to port; port is 0-based */
3610 /* for Nvidia: assume widget NID starting from 4, with step 1 (4, 5, 6, ...) */
3611 static int nvhdmi_pin2port(void *audio_ptr, int pin_nid)
3612 {
3613         return pin_nid - 4;
3614 }
3615
3616 /* reverse-map from port to pin NID: see above */
3617 static int nvhdmi_port2pin(struct hda_codec *codec, int port)
3618 {
3619         return port + 4;
3620 }
3621
3622 static const struct drm_audio_component_audio_ops nvhdmi_audio_ops = {
3623         .pin2port = nvhdmi_pin2port,
3624         .pin_eld_notify = generic_acomp_pin_eld_notify,
3625         .master_bind = generic_acomp_master_bind,
3626         .master_unbind = generic_acomp_master_unbind,
3627 };
3628
3629 static int patch_nvhdmi(struct hda_codec *codec)
3630 {
3631         struct hdmi_spec *spec;
3632         int err;
3633
3634         err = alloc_generic_hdmi(codec);
3635         if (err < 0)
3636                 return err;
3637         codec->dp_mst = true;
3638
3639         spec = codec->spec;
3640         spec->dyn_pcm_assign = true;
3641
3642         err = hdmi_parse_codec(codec);
3643         if (err < 0) {
3644                 generic_spec_free(codec);
3645                 return err;
3646         }
3647
3648         generic_hdmi_init_per_pins(codec);
3649
3650         spec->dyn_pin_out = true;
3651
3652         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3653                 nvhdmi_chmap_cea_alloc_validate_get_type;
3654         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3655
3656         codec->link_down_at_suspend = 1;
3657
3658         generic_acomp_init(codec, &nvhdmi_audio_ops, nvhdmi_port2pin);
3659
3660         return 0;
3661 }
3662
3663 static int patch_nvhdmi_legacy(struct hda_codec *codec)
3664 {
3665         struct hdmi_spec *spec;
3666         int err;
3667
3668         err = patch_generic_hdmi(codec);
3669         if (err)
3670                 return err;
3671
3672         spec = codec->spec;
3673         spec->dyn_pin_out = true;
3674
3675         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3676                 nvhdmi_chmap_cea_alloc_validate_get_type;
3677         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3678
3679         codec->link_down_at_suspend = 1;
3680
3681         return 0;
3682 }
3683
3684 /*
3685  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3686  * accessed using vendor-defined verbs. These registers can be used for
3687  * interoperability between the HDA and HDMI drivers.
3688  */
3689
3690 /* Audio Function Group node */
3691 #define NVIDIA_AFG_NID 0x01
3692
3693 /*
3694  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3695  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3696  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3697  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3698  * additional bit (at position 30) to signal the validity of the format.
3699  *
3700  * | 31      | 30    | 29  16 | 15   0 |
3701  * +---------+-------+--------+--------+
3702  * | TRIGGER | VALID | UNUSED | FORMAT |
3703  * +-----------------------------------|
3704  *
3705  * Note that for the trigger bit to take effect it needs to change value
3706  * (i.e. it needs to be toggled).
3707  */
3708 #define NVIDIA_GET_SCRATCH0             0xfa6
3709 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3710 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3711 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3712 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3713 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3714 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3715
3716 #define NVIDIA_GET_SCRATCH1             0xfab
3717 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3718 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3719 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3720 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3721
3722 /*
3723  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3724  * the format is invalidated so that the HDMI codec can be disabled.
3725  */
3726 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3727 {
3728         unsigned int value;
3729
3730         /* bits [31:30] contain the trigger and valid bits */
3731         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3732                                    NVIDIA_GET_SCRATCH0, 0);
3733         value = (value >> 24) & 0xff;
3734
3735         /* bits [15:0] are used to store the HDA format */
3736         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3737                             NVIDIA_SET_SCRATCH0_BYTE0,
3738                             (format >> 0) & 0xff);
3739         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3740                             NVIDIA_SET_SCRATCH0_BYTE1,
3741                             (format >> 8) & 0xff);
3742
3743         /* bits [16:24] are unused */
3744         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3745                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3746
3747         /*
3748          * Bit 30 signals that the data is valid and hence that HDMI audio can
3749          * be enabled.
3750          */
3751         if (format == 0)
3752                 value &= ~NVIDIA_SCRATCH_VALID;
3753         else
3754                 value |= NVIDIA_SCRATCH_VALID;
3755
3756         /*
3757          * Whenever the trigger bit is toggled, an interrupt is raised in the
3758          * HDMI codec. The HDMI driver will use that as trigger to update its
3759          * configuration.
3760          */
3761         value ^= NVIDIA_SCRATCH_TRIGGER;
3762
3763         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3764                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3765 }
3766
3767 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3768                                   struct hda_codec *codec,
3769                                   unsigned int stream_tag,
3770                                   unsigned int format,
3771                                   struct snd_pcm_substream *substream)
3772 {
3773         int err;
3774
3775         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3776                                                 format, substream);
3777         if (err < 0)
3778                 return err;
3779
3780         /* notify the HDMI codec of the format change */
3781         tegra_hdmi_set_format(codec, format);
3782
3783         return 0;
3784 }
3785
3786 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3787                                   struct hda_codec *codec,
3788                                   struct snd_pcm_substream *substream)
3789 {
3790         /* invalidate the format in the HDMI codec */
3791         tegra_hdmi_set_format(codec, 0);
3792
3793         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3794 }
3795
3796 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3797 {
3798         struct hdmi_spec *spec = codec->spec;
3799         unsigned int i;
3800
3801         for (i = 0; i < spec->num_pins; i++) {
3802                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3803
3804                 if (pcm->pcm_type == type)
3805                         return pcm;
3806         }
3807
3808         return NULL;
3809 }
3810
3811 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3812 {
3813         struct hda_pcm_stream *stream;
3814         struct hda_pcm *pcm;
3815         int err;
3816
3817         err = generic_hdmi_build_pcms(codec);
3818         if (err < 0)
3819                 return err;
3820
3821         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3822         if (!pcm)
3823                 return -ENODEV;
3824
3825         /*
3826          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3827          * codec about format changes.
3828          */
3829         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3830         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3831         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3832
3833         return 0;
3834 }
3835
3836 static int patch_tegra_hdmi(struct hda_codec *codec)
3837 {
3838         struct hdmi_spec *spec;
3839         int err;
3840
3841         err = patch_generic_hdmi(codec);
3842         if (err)
3843                 return err;
3844
3845         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3846         spec = codec->spec;
3847         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3848                 nvhdmi_chmap_cea_alloc_validate_get_type;
3849         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3850
3851         return 0;
3852 }
3853
3854 /*
3855  * ATI/AMD-specific implementations
3856  */
3857
3858 #define is_amdhdmi_rev3_or_later(codec) \
3859         ((codec)->core.vendor_id == 0x1002aa01 && \
3860          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3861 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3862
3863 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3864 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3865 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3866 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3867 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3868 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3869 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3870 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3871 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3872 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3873 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3874 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3875 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3876 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3877 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3878 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3879 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3880 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3881 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3882 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3883 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3884 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3885 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3886 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3887 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3888
3889 /* AMD specific HDA cvt verbs */
3890 #define ATI_VERB_SET_RAMP_RATE          0x770
3891 #define ATI_VERB_GET_RAMP_RATE          0xf70
3892
3893 #define ATI_OUT_ENABLE 0x1
3894
3895 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3896 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3897
3898 #define ATI_HBR_CAPABLE 0x01
3899 #define ATI_HBR_ENABLE 0x10
3900
3901 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3902                                int dev_id, unsigned char *buf, int *eld_size)
3903 {
3904         WARN_ON(dev_id != 0);
3905         /* call hda_eld.c ATI/AMD-specific function */
3906         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3907                                     is_amdhdmi_rev3_or_later(codec));
3908 }
3909
3910 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec,
3911                                         hda_nid_t pin_nid, int dev_id, int ca,
3912                                         int active_channels, int conn_type)
3913 {
3914         WARN_ON(dev_id != 0);
3915         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3916 }
3917
3918 static int atihdmi_paired_swap_fc_lfe(int pos)
3919 {
3920         /*
3921          * ATI/AMD have automatic FC/LFE swap built-in
3922          * when in pairwise mapping mode.
3923          */
3924
3925         switch (pos) {
3926                 /* see channel_allocations[].speakers[] */
3927                 case 2: return 3;
3928                 case 3: return 2;
3929                 default: break;
3930         }
3931
3932         return pos;
3933 }
3934
3935 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3936                         int ca, int chs, unsigned char *map)
3937 {
3938         struct hdac_cea_channel_speaker_allocation *cap;
3939         int i, j;
3940
3941         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3942
3943         cap = snd_hdac_get_ch_alloc_from_ca(ca);
3944         for (i = 0; i < chs; ++i) {
3945                 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3946                 bool ok = false;
3947                 bool companion_ok = false;
3948
3949                 if (!mask)
3950                         continue;
3951
3952                 for (j = 0 + i % 2; j < 8; j += 2) {
3953                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3954                         if (cap->speakers[chan_idx] == mask) {
3955                                 /* channel is in a supported position */
3956                                 ok = true;
3957
3958                                 if (i % 2 == 0 && i + 1 < chs) {
3959                                         /* even channel, check the odd companion */
3960                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3961                                         int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3962                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3963
3964                                         if (comp_mask_req == comp_mask_act)
3965                                                 companion_ok = true;
3966                                         else
3967                                                 return -EINVAL;
3968                                 }
3969                                 break;
3970                         }
3971                 }
3972
3973                 if (!ok)
3974                         return -EINVAL;
3975
3976                 if (companion_ok)
3977                         i++; /* companion channel already checked */
3978         }
3979
3980         return 0;
3981 }
3982
3983 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3984                 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3985 {
3986         struct hda_codec *codec = hdac_to_hda_codec(hdac);
3987         int verb;
3988         int ati_channel_setup = 0;
3989
3990         if (hdmi_slot > 7)
3991                 return -EINVAL;
3992
3993         if (!has_amd_full_remap_support(codec)) {
3994                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3995
3996                 /* In case this is an odd slot but without stream channel, do not
3997                  * disable the slot since the corresponding even slot could have a
3998                  * channel. In case neither have a channel, the slot pair will be
3999                  * disabled when this function is called for the even slot. */
4000                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
4001                         return 0;
4002
4003                 hdmi_slot -= hdmi_slot % 2;
4004
4005                 if (stream_channel != 0xf)
4006                         stream_channel -= stream_channel % 2;
4007         }
4008
4009         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
4010
4011         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
4012
4013         if (stream_channel != 0xf)
4014                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
4015
4016         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
4017 }
4018
4019 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
4020                                 hda_nid_t pin_nid, int asp_slot)
4021 {
4022         struct hda_codec *codec = hdac_to_hda_codec(hdac);
4023         bool was_odd = false;
4024         int ati_asp_slot = asp_slot;
4025         int verb;
4026         int ati_channel_setup;
4027
4028         if (asp_slot > 7)
4029                 return -EINVAL;
4030
4031         if (!has_amd_full_remap_support(codec)) {
4032                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
4033                 if (ati_asp_slot % 2 != 0) {
4034                         ati_asp_slot -= 1;
4035                         was_odd = true;
4036                 }
4037         }
4038
4039         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
4040
4041         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
4042
4043         if (!(ati_channel_setup & ATI_OUT_ENABLE))
4044                 return 0xf;
4045
4046         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
4047 }
4048
4049 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
4050                 struct hdac_chmap *chmap,
4051                 struct hdac_cea_channel_speaker_allocation *cap,
4052                 int channels)
4053 {
4054         int c;
4055
4056         /*
4057          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
4058          * we need to take that into account (a single channel may take 2
4059          * channel slots if we need to carry a silent channel next to it).
4060          * On Rev3+ AMD codecs this function is not used.
4061          */
4062         int chanpairs = 0;
4063
4064         /* We only produce even-numbered channel count TLVs */
4065         if ((channels % 2) != 0)
4066                 return -1;
4067
4068         for (c = 0; c < 7; c += 2) {
4069                 if (cap->speakers[c] || cap->speakers[c+1])
4070                         chanpairs++;
4071         }
4072
4073         if (chanpairs * 2 != channels)
4074                 return -1;
4075
4076         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
4077 }
4078
4079 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
4080                 struct hdac_cea_channel_speaker_allocation *cap,
4081                 unsigned int *chmap, int channels)
4082 {
4083         /* produce paired maps for pre-rev3 ATI/AMD codecs */
4084         int count = 0;
4085         int c;
4086
4087         for (c = 7; c >= 0; c--) {
4088                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
4089                 int spk = cap->speakers[chan];
4090                 if (!spk) {
4091                         /* add N/A channel if the companion channel is occupied */
4092                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
4093                                 chmap[count++] = SNDRV_CHMAP_NA;
4094
4095                         continue;
4096                 }
4097
4098                 chmap[count++] = snd_hdac_spk_to_chmap(spk);
4099         }
4100
4101         WARN_ON(count != channels);
4102 }
4103
4104 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
4105                                  int dev_id, bool hbr)
4106 {
4107         int hbr_ctl, hbr_ctl_new;
4108
4109         WARN_ON(dev_id != 0);
4110
4111         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
4112         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
4113                 if (hbr)
4114                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
4115                 else
4116                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
4117
4118                 codec_dbg(codec,
4119                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
4120                                 pin_nid,
4121                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
4122                                 hbr_ctl_new);
4123
4124                 if (hbr_ctl != hbr_ctl_new)
4125                         snd_hda_codec_write(codec, pin_nid, 0,
4126                                                 ATI_VERB_SET_HBR_CONTROL,
4127                                                 hbr_ctl_new);
4128
4129         } else if (hbr)
4130                 return -EINVAL;
4131
4132         return 0;
4133 }
4134
4135 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
4136                                 hda_nid_t pin_nid, int dev_id,
4137                                 u32 stream_tag, int format)
4138 {
4139         if (is_amdhdmi_rev3_or_later(codec)) {
4140                 int ramp_rate = 180; /* default as per AMD spec */
4141                 /* disable ramp-up/down for non-pcm as per AMD spec */
4142                 if (format & AC_FMT_TYPE_NON_PCM)
4143                         ramp_rate = 0;
4144
4145                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
4146         }
4147
4148         return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
4149                                  stream_tag, format);
4150 }
4151
4152
4153 static int atihdmi_init(struct hda_codec *codec)
4154 {
4155         struct hdmi_spec *spec = codec->spec;
4156         int pin_idx, err;
4157
4158         err = generic_hdmi_init(codec);
4159
4160         if (err)
4161                 return err;
4162
4163         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
4164                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
4165
4166                 /* make sure downmix information in infoframe is zero */
4167                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
4168
4169                 /* enable channel-wise remap mode if supported */
4170                 if (has_amd_full_remap_support(codec))
4171                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
4172                                             ATI_VERB_SET_MULTICHANNEL_MODE,
4173                                             ATI_MULTICHANNEL_MODE_SINGLE);
4174         }
4175         codec->auto_runtime_pm = 1;
4176
4177         return 0;
4178 }
4179
4180 /* map from pin NID to port; port is 0-based */
4181 /* for AMD: assume widget NID starting from 3, with step 2 (3, 5, 7, ...) */
4182 static int atihdmi_pin2port(void *audio_ptr, int pin_nid)
4183 {
4184         return pin_nid / 2 - 1;
4185 }
4186
4187 /* reverse-map from port to pin NID: see above */
4188 static int atihdmi_port2pin(struct hda_codec *codec, int port)
4189 {
4190         return port * 2 + 3;
4191 }
4192
4193 static const struct drm_audio_component_audio_ops atihdmi_audio_ops = {
4194         .pin2port = atihdmi_pin2port,
4195         .pin_eld_notify = generic_acomp_pin_eld_notify,
4196         .master_bind = generic_acomp_master_bind,
4197         .master_unbind = generic_acomp_master_unbind,
4198 };
4199
4200 static int patch_atihdmi(struct hda_codec *codec)
4201 {
4202         struct hdmi_spec *spec;
4203         struct hdmi_spec_per_cvt *per_cvt;
4204         int err, cvt_idx;
4205
4206         err = patch_generic_hdmi(codec);
4207
4208         if (err)
4209                 return err;
4210
4211         codec->patch_ops.init = atihdmi_init;
4212
4213         spec = codec->spec;
4214
4215         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
4216         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
4217         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
4218         spec->ops.setup_stream = atihdmi_setup_stream;
4219
4220         spec->chmap.ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
4221         spec->chmap.ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
4222
4223         if (!has_amd_full_remap_support(codec)) {
4224                 /* override to ATI/AMD-specific versions with pairwise mapping */
4225                 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
4226                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
4227                 spec->chmap.ops.cea_alloc_to_tlv_chmap =
4228                                 atihdmi_paired_cea_alloc_to_tlv_chmap;
4229                 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
4230         }
4231
4232         /* ATI/AMD converters do not advertise all of their capabilities */
4233         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
4234                 per_cvt = get_cvt(spec, cvt_idx);
4235                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
4236                 per_cvt->rates |= SUPPORTED_RATES;
4237                 per_cvt->formats |= SUPPORTED_FORMATS;
4238                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
4239         }
4240
4241         spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
4242
4243         /* AMD GPUs have neither EPSS nor CLKSTOP bits, hence preventing
4244          * the link-down as is.  Tell the core to allow it.
4245          */
4246         codec->link_down_at_suspend = 1;
4247
4248         generic_acomp_init(codec, &atihdmi_audio_ops, atihdmi_port2pin);
4249
4250         return 0;
4251 }
4252
4253 /* VIA HDMI Implementation */
4254 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
4255 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
4256
4257 static int patch_via_hdmi(struct hda_codec *codec)
4258 {
4259         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
4260 }
4261
4262 /*
4263  * patch entries
4264  */
4265 static const struct hda_device_id snd_hda_id_hdmi[] = {
4266 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
4267 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
4268 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
4269 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
4270 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
4271 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
4272 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
4273 HDA_CODEC_ENTRY(0x10de0001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4274 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4275 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4276 HDA_CODEC_ENTRY(0x10de0004, "GPU 04 HDMI",      patch_nvhdmi_8ch_7x),
4277 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4278 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4279 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
4280 HDA_CODEC_ENTRY(0x10de0008, "GPU 08 HDMI/DP",   patch_nvhdmi_legacy),
4281 HDA_CODEC_ENTRY(0x10de0009, "GPU 09 HDMI/DP",   patch_nvhdmi_legacy),
4282 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi_legacy),
4283 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi_legacy),
4284 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi_legacy),
4285 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi_legacy),
4286 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi_legacy),
4287 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi_legacy),
4288 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi_legacy),
4289 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi_legacy),
4290 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi_legacy),
4291 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi_legacy),
4292 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi_legacy),
4293 /* 17 is known to be absent */
4294 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi_legacy),
4295 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi_legacy),
4296 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi_legacy),
4297 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi_legacy),
4298 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi_legacy),
4299 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
4300 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
4301 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
4302 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
4303 HDA_CODEC_ENTRY(0x10de002d, "Tegra186 HDMI/DP0", patch_tegra_hdmi),
4304 HDA_CODEC_ENTRY(0x10de002e, "Tegra186 HDMI/DP1", patch_tegra_hdmi),
4305 HDA_CODEC_ENTRY(0x10de002f, "Tegra194 HDMI/DP2", patch_tegra_hdmi),
4306 HDA_CODEC_ENTRY(0x10de0030, "Tegra194 HDMI/DP3", patch_tegra_hdmi),
4307 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
4308 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
4309 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
4310 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
4311 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
4312 HDA_CODEC_ENTRY(0x10de0045, "GPU 45 HDMI/DP",   patch_nvhdmi),
4313 HDA_CODEC_ENTRY(0x10de0050, "GPU 50 HDMI/DP",   patch_nvhdmi),
4314 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
4315 HDA_CODEC_ENTRY(0x10de0052, "GPU 52 HDMI/DP",   patch_nvhdmi),
4316 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
4317 HDA_CODEC_ENTRY(0x10de0061, "GPU 61 HDMI/DP",   patch_nvhdmi),
4318 HDA_CODEC_ENTRY(0x10de0062, "GPU 62 HDMI/DP",   patch_nvhdmi),
4319 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
4320 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
4321 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
4322 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
4323 HDA_CODEC_ENTRY(0x10de0073, "GPU 73 HDMI/DP",   patch_nvhdmi),
4324 HDA_CODEC_ENTRY(0x10de0074, "GPU 74 HDMI/DP",   patch_nvhdmi),
4325 HDA_CODEC_ENTRY(0x10de0076, "GPU 76 HDMI/DP",   patch_nvhdmi),
4326 HDA_CODEC_ENTRY(0x10de007b, "GPU 7b HDMI/DP",   patch_nvhdmi),
4327 HDA_CODEC_ENTRY(0x10de007c, "GPU 7c HDMI/DP",   patch_nvhdmi),
4328 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
4329 HDA_CODEC_ENTRY(0x10de007e, "GPU 7e HDMI/DP",   patch_nvhdmi),
4330 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP",   patch_nvhdmi),
4331 HDA_CODEC_ENTRY(0x10de0081, "GPU 81 HDMI/DP",   patch_nvhdmi),
4332 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP",   patch_nvhdmi),
4333 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
4334 HDA_CODEC_ENTRY(0x10de0084, "GPU 84 HDMI/DP",   patch_nvhdmi),
4335 HDA_CODEC_ENTRY(0x10de0090, "GPU 90 HDMI/DP",   patch_nvhdmi),
4336 HDA_CODEC_ENTRY(0x10de0091, "GPU 91 HDMI/DP",   patch_nvhdmi),
4337 HDA_CODEC_ENTRY(0x10de0092, "GPU 92 HDMI/DP",   patch_nvhdmi),
4338 HDA_CODEC_ENTRY(0x10de0093, "GPU 93 HDMI/DP",   patch_nvhdmi),
4339 HDA_CODEC_ENTRY(0x10de0094, "GPU 94 HDMI/DP",   patch_nvhdmi),
4340 HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI/DP",   patch_nvhdmi),
4341 HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP",   patch_nvhdmi),
4342 HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP",   patch_nvhdmi),
4343 HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP",   patch_nvhdmi),
4344 HDA_CODEC_ENTRY(0x10de009a, "GPU 9a HDMI/DP",   patch_nvhdmi),
4345 HDA_CODEC_ENTRY(0x10de009d, "GPU 9d HDMI/DP",   patch_nvhdmi),
4346 HDA_CODEC_ENTRY(0x10de009e, "GPU 9e HDMI/DP",   patch_nvhdmi),
4347 HDA_CODEC_ENTRY(0x10de009f, "GPU 9f HDMI/DP",   patch_nvhdmi),
4348 HDA_CODEC_ENTRY(0x10de00a0, "GPU a0 HDMI/DP",   patch_nvhdmi),
4349 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4350 HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI",    patch_nvhdmi_2ch),
4351 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
4352 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
4353 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
4354 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
4355 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4356 HDA_CODEC_ENTRY(0x80862800, "Geminilake HDMI",  patch_i915_glk_hdmi),
4357 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
4358 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
4359 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
4360 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4361 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi),
4362 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi),
4363 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_i915_hsw_hdmi),
4364 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_i915_hsw_hdmi),
4365 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_i915_hsw_hdmi),
4366 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_i915_hsw_hdmi),
4367 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_i915_hsw_hdmi),
4368 HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI",  patch_i915_glk_hdmi),
4369 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI",  patch_i915_glk_hdmi),
4370 HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI",     patch_i915_icl_hdmi),
4371 HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI",   patch_i915_tgl_hdmi),
4372 HDA_CODEC_ENTRY(0x80862814, "DG1 HDMI", patch_i915_tgl_hdmi),
4373 HDA_CODEC_ENTRY(0x80862815, "Alderlake HDMI",   patch_i915_tgl_hdmi),
4374 HDA_CODEC_ENTRY(0x8086281c, "Alderlake-P HDMI", patch_i915_tgl_hdmi),
4375 HDA_CODEC_ENTRY(0x80862816, "Rocketlake HDMI",  patch_i915_tgl_hdmi),
4376 HDA_CODEC_ENTRY(0x8086281a, "Jasperlake HDMI",  patch_i915_icl_hdmi),
4377 HDA_CODEC_ENTRY(0x8086281b, "Elkhartlake HDMI", patch_i915_icl_hdmi),
4378 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
4379 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
4380 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_i915_byt_hdmi),
4381 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
4382 /* special ID for generic HDMI */
4383 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
4384 {} /* terminator */
4385 };
4386 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
4387
4388 MODULE_LICENSE("GPL");
4389 MODULE_DESCRIPTION("HDMI HD-audio codec");
4390 MODULE_ALIAS("snd-hda-codec-intelhdmi");
4391 MODULE_ALIAS("snd-hda-codec-nvhdmi");
4392 MODULE_ALIAS("snd-hda-codec-atihdmi");
4393
4394 static struct hda_codec_driver hdmi_driver = {
4395         .id = snd_hda_id_hdmi,
4396 };
4397
4398 module_hda_codec_driver(hdmi_driver);