1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
6 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
7 * Copyright (c) 2006 ATI Technologies Inc.
8 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
9 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
10 * Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
13 * Wu Fengguang <wfg@linux.intel.com>
16 * Wu Fengguang <wfg@linux.intel.com>
19 #include <linux/init.h>
20 #include <linux/delay.h>
21 #include <linux/pci.h>
22 #include <linux/slab.h>
23 #include <linux/module.h>
24 #include <linux/pm_runtime.h>
25 #include <sound/core.h>
26 #include <sound/jack.h>
27 #include <sound/asoundef.h>
28 #include <sound/tlv.h>
29 #include <sound/hdaudio.h>
30 #include <sound/hda_i915.h>
31 #include <sound/hda_chmap.h>
32 #include <sound/hda_codec.h>
33 #include "hda_local.h"
35 #include "hda_controller.h"
37 static bool static_hdmi_pcm;
38 module_param(static_hdmi_pcm, bool, 0644);
39 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
41 static bool enable_acomp = true;
42 module_param(enable_acomp, bool, 0444);
43 MODULE_PARM_DESC(enable_acomp, "Enable audio component binding (default=yes)");
45 static bool enable_silent_stream =
46 IS_ENABLED(CONFIG_SND_HDA_INTEL_HDMI_SILENT_STREAM);
47 module_param(enable_silent_stream, bool, 0644);
48 MODULE_PARM_DESC(enable_silent_stream, "Enable Silent Stream for HDMI devices");
50 struct hdmi_spec_per_cvt {
53 unsigned int channels_min;
54 unsigned int channels_max;
60 /* max. connections to a widget */
61 #define HDA_MAX_CONNECTIONS 32
63 struct hdmi_spec_per_pin {
66 /* pin idx, different device entries on the same pin use the same idx */
69 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
73 struct hda_codec *codec;
74 struct hdmi_eld sink_eld;
76 struct delayed_work work;
77 struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
78 int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
80 bool setup; /* the stream has been set up by prepare callback */
82 int channels; /* current number of channels */
84 bool chmap_set; /* channel-map override by ALSA API? */
85 unsigned char chmap[8]; /* ALSA API channel-map */
86 #ifdef CONFIG_SND_PROC_FS
87 struct snd_info_entry *proc_entry;
91 /* operations used by generic code that can be overridden by patches */
93 int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
94 int dev_id, unsigned char *buf, int *eld_size);
96 void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
98 int ca, int active_channels, int conn_type);
100 /* enable/disable HBR (HD passthrough) */
101 int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid,
102 int dev_id, bool hbr);
104 int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
105 hda_nid_t pin_nid, int dev_id, u32 stream_tag,
108 void (*pin_cvt_fixup)(struct hda_codec *codec,
109 struct hdmi_spec_per_pin *per_pin,
115 struct snd_jack *jack;
116 struct snd_kcontrol *eld_ctl;
120 struct hda_codec *codec;
122 struct snd_array cvts; /* struct hdmi_spec_per_cvt */
123 hda_nid_t cvt_nids[4]; /* only for haswell fix */
126 * num_pins is the number of virtual pins
127 * for example, there are 3 pins, and each pin
128 * has 4 device entries, then the num_pins is 12
132 * num_nids is the number of real pins
133 * In the above example, num_nids is 3
137 * dev_num is the number of device entries
139 * In the above example, dev_num is 4
142 struct snd_array pins; /* struct hdmi_spec_per_pin */
143 struct hdmi_pcm pcm_rec[16];
144 struct mutex pcm_lock;
145 struct mutex bind_lock; /* for audio component binding */
146 /* pcm_bitmap means which pcms have been assigned to pins*/
147 unsigned long pcm_bitmap;
148 int pcm_used; /* counter of pcm_rec[] */
149 /* bitmap shows whether the pcm is opened in user space
150 * bit 0 means the first playback PCM (PCM3);
151 * bit 1 means the second playback PCM, and so on.
153 unsigned long pcm_in_use;
155 struct hdmi_eld temp_eld;
160 bool intel_hsw_fixup; /* apply Intel platform-specific fixups */
162 * Non-generic VIA/NVIDIA specific
164 struct hda_multi_out multiout;
165 struct hda_pcm_stream pcm_playback;
167 bool use_acomp_notifier; /* use eld_notify callback for hotplug */
168 bool acomp_registered; /* audio component registered in this driver */
169 bool force_connect; /* force connectivity */
170 struct drm_audio_component_audio_ops drm_audio_ops;
171 int (*port2pin)(struct hda_codec *, int); /* reverse port/pin mapping */
173 struct hdac_chmap chmap;
174 hda_nid_t vendor_nid;
177 bool send_silent_stream; /* Flag to enable silent stream feature */
180 #ifdef CONFIG_SND_HDA_COMPONENT
181 static inline bool codec_has_acomp(struct hda_codec *codec)
183 struct hdmi_spec *spec = codec->spec;
184 return spec->use_acomp_notifier;
187 #define codec_has_acomp(codec) false
190 struct hdmi_audio_infoframe {
197 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
201 u8 LFEPBL01_LSV36_DM_INH7;
204 struct dp_audio_infoframe {
207 u8 ver; /* 0x11 << 2 */
209 u8 CC02_CT47; /* match with HDMI infoframe from this on */
213 u8 LFEPBL01_LSV36_DM_INH7;
216 union audio_infoframe {
217 struct hdmi_audio_infoframe hdmi;
218 struct dp_audio_infoframe dp;
226 #define get_pin(spec, idx) \
227 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
228 #define get_cvt(spec, idx) \
229 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
230 /* obtain hdmi_pcm object assigned to idx */
231 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
232 /* obtain hda_pcm object assigned to idx */
233 #define get_pcm_rec(spec, idx) (get_hdmi_pcm(spec, idx)->pcm)
235 static int pin_id_to_pin_index(struct hda_codec *codec,
236 hda_nid_t pin_nid, int dev_id)
238 struct hdmi_spec *spec = codec->spec;
240 struct hdmi_spec_per_pin *per_pin;
243 * (dev_id == -1) means it is NON-MST pin
244 * return the first virtual pin on this port
249 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
250 per_pin = get_pin(spec, pin_idx);
251 if ((per_pin->pin_nid == pin_nid) &&
252 (per_pin->dev_id == dev_id))
256 codec_warn(codec, "HDMI: pin NID 0x%x not registered\n", pin_nid);
260 static int hinfo_to_pcm_index(struct hda_codec *codec,
261 struct hda_pcm_stream *hinfo)
263 struct hdmi_spec *spec = codec->spec;
266 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
267 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
270 codec_warn(codec, "HDMI: hinfo %p not tied to a PCM\n", hinfo);
274 static int hinfo_to_pin_index(struct hda_codec *codec,
275 struct hda_pcm_stream *hinfo)
277 struct hdmi_spec *spec = codec->spec;
278 struct hdmi_spec_per_pin *per_pin;
281 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
282 per_pin = get_pin(spec, pin_idx);
284 per_pin->pcm->pcm->stream == hinfo)
288 codec_dbg(codec, "HDMI: hinfo %p (pcm %d) not registered\n", hinfo,
289 hinfo_to_pcm_index(codec, hinfo));
293 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
297 struct hdmi_spec_per_pin *per_pin;
299 for (i = 0; i < spec->num_pins; i++) {
300 per_pin = get_pin(spec, i);
301 if (per_pin->pcm_idx == pcm_idx)
307 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
309 struct hdmi_spec *spec = codec->spec;
312 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
313 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
316 codec_warn(codec, "HDMI: cvt NID 0x%x not registered\n", cvt_nid);
320 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
321 struct snd_ctl_elem_info *uinfo)
323 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
324 struct hdmi_spec *spec = codec->spec;
325 struct hdmi_spec_per_pin *per_pin;
326 struct hdmi_eld *eld;
329 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
331 pcm_idx = kcontrol->private_value;
332 mutex_lock(&spec->pcm_lock);
333 per_pin = pcm_idx_to_pin(spec, pcm_idx);
335 /* no pin is bound to the pcm */
339 eld = &per_pin->sink_eld;
340 uinfo->count = eld->eld_valid ? eld->eld_size : 0;
343 mutex_unlock(&spec->pcm_lock);
347 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
348 struct snd_ctl_elem_value *ucontrol)
350 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
351 struct hdmi_spec *spec = codec->spec;
352 struct hdmi_spec_per_pin *per_pin;
353 struct hdmi_eld *eld;
357 pcm_idx = kcontrol->private_value;
358 mutex_lock(&spec->pcm_lock);
359 per_pin = pcm_idx_to_pin(spec, pcm_idx);
361 /* no pin is bound to the pcm */
362 memset(ucontrol->value.bytes.data, 0,
363 ARRAY_SIZE(ucontrol->value.bytes.data));
367 eld = &per_pin->sink_eld;
368 if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
369 eld->eld_size > ELD_MAX_SIZE) {
375 memset(ucontrol->value.bytes.data, 0,
376 ARRAY_SIZE(ucontrol->value.bytes.data));
378 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
382 mutex_unlock(&spec->pcm_lock);
386 static const struct snd_kcontrol_new eld_bytes_ctl = {
387 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE |
388 SNDRV_CTL_ELEM_ACCESS_SKIP_CHECK,
389 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
391 .info = hdmi_eld_ctl_info,
392 .get = hdmi_eld_ctl_get,
395 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
398 struct snd_kcontrol *kctl;
399 struct hdmi_spec *spec = codec->spec;
402 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
405 kctl->private_value = pcm_idx;
406 kctl->id.device = device;
408 /* no pin nid is associated with the kctl now
409 * tbd: associate pin nid to eld ctl later
411 err = snd_hda_ctl_add(codec, 0, kctl);
415 get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
420 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
421 int *packet_index, int *byte_index)
425 val = snd_hda_codec_read(codec, pin_nid, 0,
426 AC_VERB_GET_HDMI_DIP_INDEX, 0);
428 *packet_index = val >> 5;
429 *byte_index = val & 0x1f;
433 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
434 int packet_index, int byte_index)
438 val = (packet_index << 5) | (byte_index & 0x1f);
440 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
443 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
446 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
449 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
451 struct hdmi_spec *spec = codec->spec;
455 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
456 snd_hda_codec_write(codec, pin_nid, 0,
457 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
459 if (spec->dyn_pin_out)
460 /* Disable pin out until stream is active */
463 /* Enable pin out: some machines with GM965 gets broken output
464 * when the pin is disabled or changed while using with HDMI
468 snd_hda_codec_write(codec, pin_nid, 0,
469 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
476 #ifdef CONFIG_SND_PROC_FS
477 static void print_eld_info(struct snd_info_entry *entry,
478 struct snd_info_buffer *buffer)
480 struct hdmi_spec_per_pin *per_pin = entry->private_data;
482 mutex_lock(&per_pin->lock);
483 snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
484 mutex_unlock(&per_pin->lock);
487 static void write_eld_info(struct snd_info_entry *entry,
488 struct snd_info_buffer *buffer)
490 struct hdmi_spec_per_pin *per_pin = entry->private_data;
492 mutex_lock(&per_pin->lock);
493 snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
494 mutex_unlock(&per_pin->lock);
497 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
500 struct hda_codec *codec = per_pin->codec;
501 struct snd_info_entry *entry;
504 snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
505 err = snd_card_proc_new(codec->card, name, &entry);
509 snd_info_set_text_ops(entry, per_pin, print_eld_info);
510 entry->c.text.write = write_eld_info;
512 per_pin->proc_entry = entry;
517 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
519 if (!per_pin->codec->bus->shutdown) {
520 snd_info_free_entry(per_pin->proc_entry);
521 per_pin->proc_entry = NULL;
525 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
530 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
536 * Audio InfoFrame routines
540 * Enable Audio InfoFrame Transmission
542 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
545 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
546 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
551 * Disable Audio InfoFrame Transmission
553 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
556 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
557 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
561 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
563 #ifdef CONFIG_SND_DEBUG_VERBOSE
567 size = snd_hdmi_get_eld_size(codec, pin_nid);
568 codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
570 for (i = 0; i < 8; i++) {
571 size = snd_hda_codec_read(codec, pin_nid, 0,
572 AC_VERB_GET_HDMI_DIP_SIZE, i);
573 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
578 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
584 for (i = 0; i < 8; i++) {
585 size = snd_hda_codec_read(codec, pin_nid, 0,
586 AC_VERB_GET_HDMI_DIP_SIZE, i);
590 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
591 for (j = 1; j < 1000; j++) {
592 hdmi_write_dip_byte(codec, pin_nid, 0x0);
593 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
595 codec_dbg(codec, "dip index %d: %d != %d\n",
597 if (bi == 0) /* byte index wrapped around */
601 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
607 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
609 u8 *bytes = (u8 *)hdmi_ai;
613 hdmi_ai->checksum = 0;
615 for (i = 0; i < sizeof(*hdmi_ai); i++)
618 hdmi_ai->checksum = -sum;
621 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
627 hdmi_debug_dip_size(codec, pin_nid);
628 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
630 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
631 for (i = 0; i < size; i++)
632 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
635 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
641 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
642 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
646 for (i = 0; i < size; i++) {
647 val = snd_hda_codec_read(codec, pin_nid, 0,
648 AC_VERB_GET_HDMI_DIP_DATA, 0);
656 static int hdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
657 int dev_id, unsigned char *buf, int *eld_size)
659 snd_hda_set_dev_select(codec, nid, dev_id);
661 return snd_hdmi_get_eld(codec, nid, buf, eld_size);
664 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
665 hda_nid_t pin_nid, int dev_id,
666 int ca, int active_channels,
669 union audio_infoframe ai;
671 memset(&ai, 0, sizeof(ai));
672 if (conn_type == 0) { /* HDMI */
673 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
675 hdmi_ai->type = 0x84;
678 hdmi_ai->CC02_CT47 = active_channels - 1;
680 hdmi_checksum_audio_infoframe(hdmi_ai);
681 } else if (conn_type == 1) { /* DisplayPort */
682 struct dp_audio_infoframe *dp_ai = &ai.dp;
686 dp_ai->ver = 0x11 << 2;
687 dp_ai->CC02_CT47 = active_channels - 1;
690 codec_dbg(codec, "HDMI: unknown connection type at pin NID 0x%x\n", pin_nid);
694 snd_hda_set_dev_select(codec, pin_nid, dev_id);
697 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
698 * sizeof(*dp_ai) to avoid partial match/update problems when
699 * the user switches between HDMI/DP monitors.
701 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
703 codec_dbg(codec, "%s: pin NID=0x%x channels=%d ca=0x%02x\n",
704 __func__, pin_nid, active_channels, ca);
705 hdmi_stop_infoframe_trans(codec, pin_nid);
706 hdmi_fill_audio_infoframe(codec, pin_nid,
707 ai.bytes, sizeof(ai));
708 hdmi_start_infoframe_trans(codec, pin_nid);
712 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
713 struct hdmi_spec_per_pin *per_pin,
716 struct hdmi_spec *spec = codec->spec;
717 struct hdac_chmap *chmap = &spec->chmap;
718 hda_nid_t pin_nid = per_pin->pin_nid;
719 int dev_id = per_pin->dev_id;
720 int channels = per_pin->channels;
722 struct hdmi_eld *eld;
728 snd_hda_set_dev_select(codec, pin_nid, dev_id);
730 /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
731 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
732 snd_hda_codec_write(codec, pin_nid, 0,
733 AC_VERB_SET_AMP_GAIN_MUTE,
736 eld = &per_pin->sink_eld;
738 ca = snd_hdac_channel_allocation(&codec->core,
739 eld->info.spk_alloc, channels,
740 per_pin->chmap_set, non_pcm, per_pin->chmap);
742 active_channels = snd_hdac_get_active_channels(ca);
744 chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
748 * always configure channel mapping, it may have been changed by the
749 * user in the meantime
751 snd_hdac_setup_channel_mapping(&spec->chmap,
752 pin_nid, non_pcm, ca, channels,
753 per_pin->chmap, per_pin->chmap_set);
755 spec->ops.pin_setup_infoframe(codec, pin_nid, dev_id,
756 ca, active_channels, eld->info.conn_type);
758 per_pin->non_pcm = non_pcm;
765 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
767 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid,
770 struct hdmi_spec *spec = codec->spec;
771 int pin_idx = pin_id_to_pin_index(codec, nid, dev_id);
775 mutex_lock(&spec->pcm_lock);
776 hdmi_present_sense(get_pin(spec, pin_idx), 1);
777 mutex_unlock(&spec->pcm_lock);
780 static void jack_callback(struct hda_codec *codec,
781 struct hda_jack_callback *jack)
783 /* stop polling when notification is enabled */
784 if (codec_has_acomp(codec))
787 check_presence_and_report(codec, jack->nid, jack->dev_id);
790 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res,
791 struct hda_jack_tbl *jack)
793 jack->jack_dirty = 1;
796 "HDMI hot plug event: Codec=%d NID=0x%x Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
797 codec->addr, jack->nid, jack->dev_id, !!(res & AC_UNSOL_RES_IA),
798 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
800 check_presence_and_report(codec, jack->nid, jack->dev_id);
803 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
805 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
806 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
807 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
808 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
811 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
828 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
830 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
831 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
832 struct hda_jack_tbl *jack;
834 if (codec_has_acomp(codec))
839 (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
841 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, dev_entry);
843 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, 0);
847 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
852 hdmi_intrinsic_event(codec, res, jack);
854 hdmi_non_intrinsic_event(codec, res);
857 static void haswell_verify_D0(struct hda_codec *codec,
858 hda_nid_t cvt_nid, hda_nid_t nid)
862 /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
863 * thus pins could only choose converter 0 for use. Make sure the
864 * converters are in correct power state */
865 if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
866 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
868 if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
869 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
872 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
873 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
874 codec_dbg(codec, "Haswell HDMI audio: Power for NID 0x%x is now D%d\n", nid, pwr);
882 /* HBR should be Non-PCM, 8 channels */
883 #define is_hbr_format(format) \
884 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
886 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
887 int dev_id, bool hbr)
889 int pinctl, new_pinctl;
891 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
892 snd_hda_set_dev_select(codec, pin_nid, dev_id);
893 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
894 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
897 return hbr ? -EINVAL : 0;
899 new_pinctl = pinctl & ~AC_PINCTL_EPT;
901 new_pinctl |= AC_PINCTL_EPT_HBR;
903 new_pinctl |= AC_PINCTL_EPT_NATIVE;
906 "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
908 pinctl == new_pinctl ? "" : "new-",
911 if (pinctl != new_pinctl)
912 snd_hda_codec_write(codec, pin_nid, 0,
913 AC_VERB_SET_PIN_WIDGET_CONTROL,
921 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
922 hda_nid_t pin_nid, int dev_id,
923 u32 stream_tag, int format)
925 struct hdmi_spec *spec = codec->spec;
929 err = spec->ops.pin_hbr_setup(codec, pin_nid, dev_id,
930 is_hbr_format(format));
933 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
937 if (spec->intel_hsw_fixup) {
940 * on recent platforms IEC Coding Type is required for HBR
941 * support, read current Digital Converter settings and set
942 * ICT bitfield if needed.
944 param = snd_hda_codec_read(codec, cvt_nid, 0,
945 AC_VERB_GET_DIGI_CONVERT_1, 0);
947 param = (param >> 16) & ~(AC_DIG3_ICT);
949 /* on recent platforms ICT mode is required for HBR support */
950 if (is_hbr_format(format))
953 snd_hda_codec_write(codec, cvt_nid, 0,
954 AC_VERB_SET_DIGI_CONVERT_3, param);
957 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
961 /* Try to find an available converter
962 * If pin_idx is less then zero, just try to find an available converter.
963 * Otherwise, try to find an available converter and get the cvt mux index
966 static int hdmi_choose_cvt(struct hda_codec *codec,
967 int pin_idx, int *cvt_id)
969 struct hdmi_spec *spec = codec->spec;
970 struct hdmi_spec_per_pin *per_pin;
971 struct hdmi_spec_per_cvt *per_cvt = NULL;
972 int cvt_idx, mux_idx = 0;
974 /* pin_idx < 0 means no pin will be bound to the converter */
978 per_pin = get_pin(spec, pin_idx);
980 if (per_pin && per_pin->silent_stream) {
981 cvt_idx = cvt_nid_to_cvt_index(codec, per_pin->cvt_nid);
987 /* Dynamically assign converter to stream */
988 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
989 per_cvt = get_cvt(spec, cvt_idx);
991 /* Must not already be assigned */
992 if (per_cvt->assigned)
996 /* Must be in pin's mux's list of converters */
997 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
998 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1000 /* Not in mux list */
1001 if (mux_idx == per_pin->num_mux_nids)
1006 /* No free converters */
1007 if (cvt_idx == spec->num_cvts)
1010 if (per_pin != NULL)
1011 per_pin->mux_idx = mux_idx;
1019 /* Assure the pin select the right convetor */
1020 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1021 struct hdmi_spec_per_pin *per_pin)
1023 hda_nid_t pin_nid = per_pin->pin_nid;
1026 mux_idx = per_pin->mux_idx;
1027 curr = snd_hda_codec_read(codec, pin_nid, 0,
1028 AC_VERB_GET_CONNECT_SEL, 0);
1029 if (curr != mux_idx)
1030 snd_hda_codec_write_cache(codec, pin_nid, 0,
1031 AC_VERB_SET_CONNECT_SEL,
1035 /* get the mux index for the converter of the pins
1036 * converter's mux index is the same for all pins on Intel platform
1038 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1043 for (i = 0; i < spec->num_cvts; i++)
1044 if (spec->cvt_nids[i] == cvt_nid)
1049 /* Intel HDMI workaround to fix audio routing issue:
1050 * For some Intel display codecs, pins share the same connection list.
1051 * So a conveter can be selected by multiple pins and playback on any of these
1052 * pins will generate sound on the external display, because audio flows from
1053 * the same converter to the display pipeline. Also muting one pin may make
1054 * other pins have no sound output.
1055 * So this function assures that an assigned converter for a pin is not selected
1056 * by any other pins.
1058 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1060 int dev_id, int mux_idx)
1062 struct hdmi_spec *spec = codec->spec;
1065 struct hdmi_spec_per_cvt *per_cvt;
1066 struct hdmi_spec_per_pin *per_pin;
1069 /* configure the pins connections */
1070 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1074 per_pin = get_pin(spec, pin_idx);
1076 * pin not connected to monitor
1077 * no need to operate on it
1082 if ((per_pin->pin_nid == pin_nid) &&
1083 (per_pin->dev_id == dev_id))
1087 * if per_pin->dev_id >= dev_num,
1088 * snd_hda_get_dev_select() will fail,
1089 * and the following operation is unpredictable.
1090 * So skip this situation.
1092 dev_num = snd_hda_get_num_devices(codec, per_pin->pin_nid) + 1;
1093 if (per_pin->dev_id >= dev_num)
1096 nid = per_pin->pin_nid;
1099 * Calling this function should not impact
1100 * on the device entry selection
1101 * So let's save the dev id for each pin,
1102 * and restore it when return
1104 dev_id_saved = snd_hda_get_dev_select(codec, nid);
1105 snd_hda_set_dev_select(codec, nid, per_pin->dev_id);
1106 curr = snd_hda_codec_read(codec, nid, 0,
1107 AC_VERB_GET_CONNECT_SEL, 0);
1108 if (curr != mux_idx) {
1109 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1114 /* choose an unassigned converter. The conveters in the
1115 * connection list are in the same order as in the codec.
1117 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1118 per_cvt = get_cvt(spec, cvt_idx);
1119 if (!per_cvt->assigned) {
1121 "choose cvt %d for pin NID 0x%x\n",
1123 snd_hda_codec_write_cache(codec, nid, 0,
1124 AC_VERB_SET_CONNECT_SEL,
1129 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1133 /* A wrapper of intel_not_share_asigned_cvt() */
1134 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1135 hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid)
1138 struct hdmi_spec *spec = codec->spec;
1140 /* On Intel platform, the mapping of converter nid to
1141 * mux index of the pins are always the same.
1142 * The pin nid may be 0, this means all pins will not
1143 * share the converter.
1145 mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1147 intel_not_share_assigned_cvt(codec, pin_nid, dev_id, mux_idx);
1150 /* skeleton caller of pin_cvt_fixup ops */
1151 static void pin_cvt_fixup(struct hda_codec *codec,
1152 struct hdmi_spec_per_pin *per_pin,
1155 struct hdmi_spec *spec = codec->spec;
1157 if (spec->ops.pin_cvt_fixup)
1158 spec->ops.pin_cvt_fixup(codec, per_pin, cvt_nid);
1161 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1162 * in dyn_pcm_assign mode.
1164 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1165 struct hda_codec *codec,
1166 struct snd_pcm_substream *substream)
1168 struct hdmi_spec *spec = codec->spec;
1169 struct snd_pcm_runtime *runtime = substream->runtime;
1170 int cvt_idx, pcm_idx;
1171 struct hdmi_spec_per_cvt *per_cvt = NULL;
1174 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1178 err = hdmi_choose_cvt(codec, -1, &cvt_idx);
1182 per_cvt = get_cvt(spec, cvt_idx);
1183 per_cvt->assigned = 1;
1184 hinfo->nid = per_cvt->cvt_nid;
1186 pin_cvt_fixup(codec, NULL, per_cvt->cvt_nid);
1188 set_bit(pcm_idx, &spec->pcm_in_use);
1189 /* todo: setup spdif ctls assign */
1191 /* Initially set the converter's capabilities */
1192 hinfo->channels_min = per_cvt->channels_min;
1193 hinfo->channels_max = per_cvt->channels_max;
1194 hinfo->rates = per_cvt->rates;
1195 hinfo->formats = per_cvt->formats;
1196 hinfo->maxbps = per_cvt->maxbps;
1198 /* Store the updated parameters */
1199 runtime->hw.channels_min = hinfo->channels_min;
1200 runtime->hw.channels_max = hinfo->channels_max;
1201 runtime->hw.formats = hinfo->formats;
1202 runtime->hw.rates = hinfo->rates;
1204 snd_pcm_hw_constraint_step(substream->runtime, 0,
1205 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1212 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1213 struct hda_codec *codec,
1214 struct snd_pcm_substream *substream)
1216 struct hdmi_spec *spec = codec->spec;
1217 struct snd_pcm_runtime *runtime = substream->runtime;
1218 int pin_idx, cvt_idx, pcm_idx;
1219 struct hdmi_spec_per_pin *per_pin;
1220 struct hdmi_eld *eld;
1221 struct hdmi_spec_per_cvt *per_cvt = NULL;
1224 /* Validate hinfo */
1225 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1229 mutex_lock(&spec->pcm_lock);
1230 pin_idx = hinfo_to_pin_index(codec, hinfo);
1231 if (!spec->dyn_pcm_assign) {
1232 if (snd_BUG_ON(pin_idx < 0)) {
1237 /* no pin is assigned to the PCM
1238 * PA need pcm open successfully when probe
1241 err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1246 err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1250 per_cvt = get_cvt(spec, cvt_idx);
1251 /* Claim converter */
1252 per_cvt->assigned = 1;
1254 set_bit(pcm_idx, &spec->pcm_in_use);
1255 per_pin = get_pin(spec, pin_idx);
1256 per_pin->cvt_nid = per_cvt->cvt_nid;
1257 hinfo->nid = per_cvt->cvt_nid;
1259 /* flip stripe flag for the assigned stream if supported */
1260 if (get_wcaps(codec, per_cvt->cvt_nid) & AC_WCAP_STRIPE)
1261 azx_stream(get_azx_dev(substream))->stripe = 1;
1263 snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1264 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1265 AC_VERB_SET_CONNECT_SEL,
1268 /* configure unused pins to choose other converters */
1269 pin_cvt_fixup(codec, per_pin, 0);
1271 snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1273 /* Initially set the converter's capabilities */
1274 hinfo->channels_min = per_cvt->channels_min;
1275 hinfo->channels_max = per_cvt->channels_max;
1276 hinfo->rates = per_cvt->rates;
1277 hinfo->formats = per_cvt->formats;
1278 hinfo->maxbps = per_cvt->maxbps;
1280 eld = &per_pin->sink_eld;
1281 /* Restrict capabilities by ELD if this isn't disabled */
1282 if (!static_hdmi_pcm && eld->eld_valid) {
1283 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1284 if (hinfo->channels_min > hinfo->channels_max ||
1285 !hinfo->rates || !hinfo->formats) {
1286 per_cvt->assigned = 0;
1288 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1294 /* Store the updated parameters */
1295 runtime->hw.channels_min = hinfo->channels_min;
1296 runtime->hw.channels_max = hinfo->channels_max;
1297 runtime->hw.formats = hinfo->formats;
1298 runtime->hw.rates = hinfo->rates;
1300 snd_pcm_hw_constraint_step(substream->runtime, 0,
1301 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1303 mutex_unlock(&spec->pcm_lock);
1308 * HDA/HDMI auto parsing
1310 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1312 struct hdmi_spec *spec = codec->spec;
1313 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1314 hda_nid_t pin_nid = per_pin->pin_nid;
1315 int dev_id = per_pin->dev_id;
1318 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1320 "HDMI: pin NID 0x%x wcaps %#x does not support connection list\n",
1321 pin_nid, get_wcaps(codec, pin_nid));
1325 snd_hda_set_dev_select(codec, pin_nid, dev_id);
1327 if (spec->intel_hsw_fixup) {
1328 conns = spec->num_cvts;
1329 memcpy(per_pin->mux_nids, spec->cvt_nids,
1330 sizeof(hda_nid_t) * conns);
1332 conns = snd_hda_get_raw_connections(codec, pin_nid,
1334 HDA_MAX_CONNECTIONS);
1337 /* all the device entries on the same pin have the same conn list */
1338 per_pin->num_mux_nids = conns;
1343 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1344 struct hdmi_spec_per_pin *per_pin)
1349 * generic_hdmi_build_pcms() may allocate extra PCMs on some
1350 * platforms (with maximum of 'num_nids + dev_num - 1')
1352 * The per_pin of pin_nid_idx=n and dev_id=m prefers to get pcm-n
1353 * if m==0. This guarantees that dynamic pcm assignments are compatible
1354 * with the legacy static per_pin-pcm assignment that existed in the
1355 * days before DP-MST.
1357 * Intel DP-MST prefers this legacy behavior for compatibility, too.
1359 * per_pin of m!=0 prefers to get pcm=(num_nids + (m - 1)).
1362 if (per_pin->dev_id == 0 || spec->intel_hsw_fixup) {
1363 if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1364 return per_pin->pin_nid_idx;
1366 i = spec->num_nids + (per_pin->dev_id - 1);
1367 if (i < spec->pcm_used && !(test_bit(i, &spec->pcm_bitmap)))
1371 /* have a second try; check the area over num_nids */
1372 for (i = spec->num_nids; i < spec->pcm_used; i++) {
1373 if (!test_bit(i, &spec->pcm_bitmap))
1377 /* the last try; check the empty slots in pins */
1378 for (i = 0; i < spec->num_nids; i++) {
1379 if (!test_bit(i, &spec->pcm_bitmap))
1385 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1386 struct hdmi_spec_per_pin *per_pin)
1390 /* pcm already be attached to the pin */
1393 idx = hdmi_find_pcm_slot(spec, per_pin);
1396 per_pin->pcm_idx = idx;
1397 per_pin->pcm = get_hdmi_pcm(spec, idx);
1398 set_bit(idx, &spec->pcm_bitmap);
1401 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1402 struct hdmi_spec_per_pin *per_pin)
1406 /* pcm already be detached from the pin */
1409 idx = per_pin->pcm_idx;
1410 per_pin->pcm_idx = -1;
1411 per_pin->pcm = NULL;
1412 if (idx >= 0 && idx < spec->pcm_used)
1413 clear_bit(idx, &spec->pcm_bitmap);
1416 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1417 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1421 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1422 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1427 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1429 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1430 struct hdmi_spec_per_pin *per_pin)
1432 struct hda_codec *codec = per_pin->codec;
1433 struct hda_pcm *pcm;
1434 struct hda_pcm_stream *hinfo;
1435 struct snd_pcm_substream *substream;
1439 if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1440 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1445 if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1448 /* hdmi audio only uses playback and one substream */
1449 hinfo = pcm->stream;
1450 substream = pcm->pcm->streams[0].substream;
1452 per_pin->cvt_nid = hinfo->nid;
1454 mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1455 if (mux_idx < per_pin->num_mux_nids) {
1456 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1458 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1459 AC_VERB_SET_CONNECT_SEL,
1462 snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1464 non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1465 if (substream->runtime)
1466 per_pin->channels = substream->runtime->channels;
1467 per_pin->setup = true;
1468 per_pin->mux_idx = mux_idx;
1470 hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1473 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1474 struct hdmi_spec_per_pin *per_pin)
1476 if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1477 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1479 per_pin->chmap_set = false;
1480 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1482 per_pin->setup = false;
1483 per_pin->channels = 0;
1486 static struct snd_jack *pin_idx_to_pcm_jack(struct hda_codec *codec,
1487 struct hdmi_spec_per_pin *per_pin)
1489 struct hdmi_spec *spec = codec->spec;
1491 if (per_pin->pcm_idx >= 0)
1492 return spec->pcm_rec[per_pin->pcm_idx].jack;
1497 /* update per_pin ELD from the given new ELD;
1498 * setup info frame and notification accordingly
1499 * also notify ELD kctl and report jack status changes
1501 static void update_eld(struct hda_codec *codec,
1502 struct hdmi_spec_per_pin *per_pin,
1503 struct hdmi_eld *eld,
1506 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1507 struct hdmi_spec *spec = codec->spec;
1508 struct snd_jack *pcm_jack;
1509 bool old_eld_valid = pin_eld->eld_valid;
1513 if (eld->eld_valid) {
1514 if (eld->eld_size <= 0 ||
1515 snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1516 eld->eld_size) < 0) {
1517 eld->eld_valid = false;
1519 schedule_delayed_work(&per_pin->work,
1520 msecs_to_jiffies(300));
1526 if (!eld->eld_valid || eld->eld_size <= 0) {
1527 eld->eld_valid = false;
1531 /* for monitor disconnection, save pcm_idx firstly */
1532 pcm_idx = per_pin->pcm_idx;
1535 * pcm_idx >=0 before update_eld() means it is in monitor
1536 * disconnected event. Jack must be fetched before update_eld().
1538 pcm_jack = pin_idx_to_pcm_jack(codec, per_pin);
1540 if (spec->dyn_pcm_assign) {
1541 if (eld->eld_valid) {
1542 hdmi_attach_hda_pcm(spec, per_pin);
1543 hdmi_pcm_setup_pin(spec, per_pin);
1545 hdmi_pcm_reset_pin(spec, per_pin);
1546 hdmi_detach_hda_pcm(spec, per_pin);
1549 /* if pcm_idx == -1, it means this is in monitor connection event
1550 * we can get the correct pcm_idx now.
1553 pcm_idx = per_pin->pcm_idx;
1555 pcm_jack = pin_idx_to_pcm_jack(codec, per_pin);
1558 snd_hdmi_show_eld(codec, &eld->info);
1560 eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1561 eld_changed |= (pin_eld->monitor_present != eld->monitor_present);
1562 if (!eld_changed && eld->eld_valid && pin_eld->eld_valid)
1563 if (pin_eld->eld_size != eld->eld_size ||
1564 memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1565 eld->eld_size) != 0)
1569 pin_eld->monitor_present = eld->monitor_present;
1570 pin_eld->eld_valid = eld->eld_valid;
1571 pin_eld->eld_size = eld->eld_size;
1573 memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1575 pin_eld->info = eld->info;
1579 * Re-setup pin and infoframe. This is needed e.g. when
1580 * - sink is first plugged-in
1581 * - transcoder can change during stream playback on Haswell
1582 * and this can make HW reset converter selection on a pin.
1584 if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1585 pin_cvt_fixup(codec, per_pin, 0);
1586 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1589 if (eld_changed && pcm_idx >= 0)
1590 snd_ctl_notify(codec->card,
1591 SNDRV_CTL_EVENT_MASK_VALUE |
1592 SNDRV_CTL_EVENT_MASK_INFO,
1593 &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1595 if (eld_changed && pcm_jack)
1596 snd_jack_report(pcm_jack,
1597 (eld->monitor_present && eld->eld_valid) ?
1598 SND_JACK_AVOUT : 0);
1601 /* update ELD and jack state via HD-audio verbs */
1602 static void hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1605 struct hda_codec *codec = per_pin->codec;
1606 struct hdmi_spec *spec = codec->spec;
1607 struct hdmi_eld *eld = &spec->temp_eld;
1608 hda_nid_t pin_nid = per_pin->pin_nid;
1609 int dev_id = per_pin->dev_id;
1611 * Always execute a GetPinSense verb here, even when called from
1612 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1613 * response's PD bit is not the real PD value, but indicates that
1614 * the real PD value changed. An older version of the HD-audio
1615 * specification worked this way. Hence, we just ignore the data in
1616 * the unsolicited response to avoid custom WARs.
1621 ret = snd_hda_power_up_pm(codec);
1622 if (ret < 0 && pm_runtime_suspended(hda_codec_dev(codec)))
1625 present = snd_hda_jack_pin_sense(codec, pin_nid, dev_id);
1627 mutex_lock(&per_pin->lock);
1628 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1629 if (eld->monitor_present)
1630 eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
1632 eld->eld_valid = false;
1635 "HDMI status: Codec=%d NID=0x%x Presence_Detect=%d ELD_Valid=%d\n",
1636 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
1638 if (eld->eld_valid) {
1639 if (spec->ops.pin_get_eld(codec, pin_nid, dev_id,
1640 eld->eld_buffer, &eld->eld_size) < 0)
1641 eld->eld_valid = false;
1644 update_eld(codec, per_pin, eld, repoll);
1645 mutex_unlock(&per_pin->lock);
1647 snd_hda_power_down_pm(codec);
1650 #define I915_SILENT_RATE 48000
1651 #define I915_SILENT_CHANNELS 2
1652 #define I915_SILENT_FORMAT SNDRV_PCM_FORMAT_S16_LE
1653 #define I915_SILENT_FORMAT_BITS 16
1654 #define I915_SILENT_FMT_MASK 0xf
1656 static void silent_stream_enable(struct hda_codec *codec,
1657 struct hdmi_spec_per_pin *per_pin)
1659 struct hdmi_spec *spec = codec->spec;
1660 struct hdmi_spec_per_cvt *per_cvt;
1661 int cvt_idx, pin_idx, err;
1662 unsigned int format;
1664 mutex_lock(&per_pin->lock);
1666 if (per_pin->setup) {
1667 codec_dbg(codec, "hdmi: PCM already open, no silent stream\n");
1671 pin_idx = pin_id_to_pin_index(codec, per_pin->pin_nid, per_pin->dev_id);
1672 err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1674 codec_err(codec, "hdmi: no free converter to enable silent mode\n");
1678 per_cvt = get_cvt(spec, cvt_idx);
1679 per_cvt->assigned = 1;
1680 per_pin->cvt_nid = per_cvt->cvt_nid;
1681 per_pin->silent_stream = true;
1683 codec_dbg(codec, "hdmi: enabling silent stream pin-NID=0x%x cvt-NID=0x%x\n",
1684 per_pin->pin_nid, per_cvt->cvt_nid);
1686 snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1687 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1688 AC_VERB_SET_CONNECT_SEL,
1691 /* configure unused pins to choose other converters */
1692 pin_cvt_fixup(codec, per_pin, 0);
1694 snd_hdac_sync_audio_rate(&codec->core, per_pin->pin_nid,
1695 per_pin->dev_id, I915_SILENT_RATE);
1697 /* trigger silent stream generation in hw */
1698 format = snd_hdac_calc_stream_format(I915_SILENT_RATE, I915_SILENT_CHANNELS,
1699 I915_SILENT_FORMAT, I915_SILENT_FORMAT_BITS, 0);
1700 snd_hda_codec_setup_stream(codec, per_pin->cvt_nid,
1701 I915_SILENT_FMT_MASK, I915_SILENT_FMT_MASK, format);
1702 usleep_range(100, 200);
1703 snd_hda_codec_setup_stream(codec, per_pin->cvt_nid, I915_SILENT_FMT_MASK, 0, format);
1705 per_pin->channels = I915_SILENT_CHANNELS;
1706 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1709 mutex_unlock(&per_pin->lock);
1712 static void silent_stream_disable(struct hda_codec *codec,
1713 struct hdmi_spec_per_pin *per_pin)
1715 struct hdmi_spec *spec = codec->spec;
1716 struct hdmi_spec_per_cvt *per_cvt;
1719 mutex_lock(&per_pin->lock);
1720 if (!per_pin->silent_stream)
1723 codec_dbg(codec, "HDMI: disable silent stream on pin-NID=0x%x cvt-NID=0x%x\n",
1724 per_pin->pin_nid, per_pin->cvt_nid);
1726 cvt_idx = cvt_nid_to_cvt_index(codec, per_pin->cvt_nid);
1727 if (cvt_idx >= 0 && cvt_idx < spec->num_cvts) {
1728 per_cvt = get_cvt(spec, cvt_idx);
1729 per_cvt->assigned = 0;
1732 per_pin->cvt_nid = 0;
1733 per_pin->silent_stream = false;
1736 mutex_unlock(&spec->pcm_lock);
1739 /* update ELD and jack state via audio component */
1740 static void sync_eld_via_acomp(struct hda_codec *codec,
1741 struct hdmi_spec_per_pin *per_pin)
1743 struct hdmi_spec *spec = codec->spec;
1744 struct hdmi_eld *eld = &spec->temp_eld;
1745 bool monitor_prev, monitor_next;
1747 mutex_lock(&per_pin->lock);
1748 eld->monitor_present = false;
1749 monitor_prev = per_pin->sink_eld.monitor_present;
1750 eld->eld_size = snd_hdac_acomp_get_eld(&codec->core, per_pin->pin_nid,
1751 per_pin->dev_id, &eld->monitor_present,
1752 eld->eld_buffer, ELD_MAX_SIZE);
1753 eld->eld_valid = (eld->eld_size > 0);
1754 update_eld(codec, per_pin, eld, 0);
1755 monitor_next = per_pin->sink_eld.monitor_present;
1756 mutex_unlock(&per_pin->lock);
1759 * Power-up will call hdmi_present_sense, so the PM calls
1760 * have to be done without mutex held.
1763 if (spec->send_silent_stream) {
1766 if (!monitor_prev && monitor_next) {
1767 pm_ret = snd_hda_power_up_pm(codec);
1770 "Monitor plugged-in, Failed to power up codec ret=[%d]\n",
1772 silent_stream_enable(codec, per_pin);
1773 } else if (monitor_prev && !monitor_next) {
1774 silent_stream_disable(codec, per_pin);
1775 pm_ret = snd_hda_power_down_pm(codec);
1778 "Monitor plugged-out, Failed to power down codec ret=[%d]\n",
1784 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1786 struct hda_codec *codec = per_pin->codec;
1788 if (!codec_has_acomp(codec))
1789 hdmi_present_sense_via_verbs(per_pin, repoll);
1791 sync_eld_via_acomp(codec, per_pin);
1794 static void hdmi_repoll_eld(struct work_struct *work)
1796 struct hdmi_spec_per_pin *per_pin =
1797 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1798 struct hda_codec *codec = per_pin->codec;
1799 struct hdmi_spec *spec = codec->spec;
1800 struct hda_jack_tbl *jack;
1802 jack = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid,
1805 jack->jack_dirty = 1;
1807 if (per_pin->repoll_count++ > 6)
1808 per_pin->repoll_count = 0;
1810 mutex_lock(&spec->pcm_lock);
1811 hdmi_present_sense(per_pin, per_pin->repoll_count);
1812 mutex_unlock(&spec->pcm_lock);
1815 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1817 struct hdmi_spec *spec = codec->spec;
1818 unsigned int caps, config;
1820 struct hdmi_spec_per_pin *per_pin;
1824 caps = snd_hda_query_pin_caps(codec, pin_nid);
1825 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1829 * For DP MST audio, Configuration Default is the same for
1830 * all device entries on the same pin
1832 config = snd_hda_codec_get_pincfg(codec, pin_nid);
1833 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE &&
1834 !spec->force_connect)
1838 * To simplify the implementation, malloc all
1839 * the virtual pins in the initialization statically
1841 if (spec->intel_hsw_fixup) {
1843 * On Intel platforms, device entries number is
1844 * changed dynamically. If there is a DP MST
1845 * hub connected, the device entries number is 3.
1846 * Otherwise, it is 1.
1847 * Here we manually set dev_num to 3, so that
1848 * we can initialize all the device entries when
1849 * bootup statically.
1853 } else if (spec->dyn_pcm_assign && codec->dp_mst) {
1854 dev_num = snd_hda_get_num_devices(codec, pin_nid) + 1;
1856 * spec->dev_num is the maxinum number of device entries
1857 * among all the pins
1859 spec->dev_num = (spec->dev_num > dev_num) ?
1860 spec->dev_num : dev_num;
1863 * If the platform doesn't support DP MST,
1864 * manually set dev_num to 1. This means
1865 * the pin has only one device entry.
1871 for (i = 0; i < dev_num; i++) {
1872 pin_idx = spec->num_pins;
1873 per_pin = snd_array_new(&spec->pins);
1878 if (spec->dyn_pcm_assign) {
1879 per_pin->pcm = NULL;
1880 per_pin->pcm_idx = -1;
1882 per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1883 per_pin->pcm_idx = pin_idx;
1885 per_pin->pin_nid = pin_nid;
1886 per_pin->pin_nid_idx = spec->num_nids;
1887 per_pin->dev_id = i;
1888 per_pin->non_pcm = false;
1889 snd_hda_set_dev_select(codec, pin_nid, i);
1890 err = hdmi_read_pin_conn(codec, pin_idx);
1900 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1902 struct hdmi_spec *spec = codec->spec;
1903 struct hdmi_spec_per_cvt *per_cvt;
1907 chans = get_wcaps(codec, cvt_nid);
1908 chans = get_wcaps_channels(chans);
1910 per_cvt = snd_array_new(&spec->cvts);
1914 per_cvt->cvt_nid = cvt_nid;
1915 per_cvt->channels_min = 2;
1917 per_cvt->channels_max = chans;
1918 if (chans > spec->chmap.channels_max)
1919 spec->chmap.channels_max = chans;
1922 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1929 if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1930 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1936 static const struct snd_pci_quirk force_connect_list[] = {
1937 SND_PCI_QUIRK(0x103c, 0x870f, "HP", 1),
1938 SND_PCI_QUIRK(0x103c, 0x871a, "HP", 1),
1942 static int hdmi_parse_codec(struct hda_codec *codec)
1944 struct hdmi_spec *spec = codec->spec;
1945 hda_nid_t start_nid;
1948 const struct snd_pci_quirk *q;
1950 nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &start_nid);
1951 if (!start_nid || nodes < 0) {
1952 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1956 q = snd_pci_quirk_lookup(codec->bus->pci, force_connect_list);
1959 spec->force_connect = true;
1962 * hdmi_add_pin() assumes total amount of converters to
1963 * be known, so first discover all converters
1965 for (i = 0; i < nodes; i++) {
1966 hda_nid_t nid = start_nid + i;
1968 caps = get_wcaps(codec, nid);
1970 if (!(caps & AC_WCAP_DIGITAL))
1973 if (get_wcaps_type(caps) == AC_WID_AUD_OUT)
1974 hdmi_add_cvt(codec, nid);
1977 /* discover audio pins */
1978 for (i = 0; i < nodes; i++) {
1979 hda_nid_t nid = start_nid + i;
1981 caps = get_wcaps(codec, nid);
1983 if (!(caps & AC_WCAP_DIGITAL))
1986 if (get_wcaps_type(caps) == AC_WID_PIN)
1987 hdmi_add_pin(codec, nid);
1995 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1997 struct hda_spdif_out *spdif;
2000 mutex_lock(&codec->spdif_mutex);
2001 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
2002 /* Add sanity check to pass klockwork check.
2003 * This should never happen.
2005 if (WARN_ON(spdif == NULL)) {
2006 mutex_unlock(&codec->spdif_mutex);
2009 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
2010 mutex_unlock(&codec->spdif_mutex);
2018 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2019 struct hda_codec *codec,
2020 unsigned int stream_tag,
2021 unsigned int format,
2022 struct snd_pcm_substream *substream)
2024 hda_nid_t cvt_nid = hinfo->nid;
2025 struct hdmi_spec *spec = codec->spec;
2027 struct hdmi_spec_per_pin *per_pin;
2028 struct snd_pcm_runtime *runtime = substream->runtime;
2033 mutex_lock(&spec->pcm_lock);
2034 pin_idx = hinfo_to_pin_index(codec, hinfo);
2035 if (spec->dyn_pcm_assign && pin_idx < 0) {
2036 /* when dyn_pcm_assign and pcm is not bound to a pin
2037 * skip pin setup and return 0 to make audio playback
2040 pin_cvt_fixup(codec, NULL, cvt_nid);
2041 snd_hda_codec_setup_stream(codec, cvt_nid,
2042 stream_tag, 0, format);
2046 if (snd_BUG_ON(pin_idx < 0)) {
2050 per_pin = get_pin(spec, pin_idx);
2052 /* Verify pin:cvt selections to avoid silent audio after S3.
2053 * After S3, the audio driver restores pin:cvt selections
2054 * but this can happen before gfx is ready and such selection
2055 * is overlooked by HW. Thus multiple pins can share a same
2056 * default convertor and mute control will affect each other,
2057 * which can cause a resumed audio playback become silent
2060 pin_cvt_fixup(codec, per_pin, 0);
2062 /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
2063 /* Todo: add DP1.2 MST audio support later */
2064 if (codec_has_acomp(codec))
2065 snd_hdac_sync_audio_rate(&codec->core, per_pin->pin_nid,
2066 per_pin->dev_id, runtime->rate);
2068 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
2069 mutex_lock(&per_pin->lock);
2070 per_pin->channels = substream->runtime->channels;
2071 per_pin->setup = true;
2073 if (get_wcaps(codec, cvt_nid) & AC_WCAP_STRIPE) {
2074 stripe = snd_hdac_get_stream_stripe_ctl(&codec->bus->core,
2076 snd_hda_codec_write(codec, cvt_nid, 0,
2077 AC_VERB_SET_STRIPE_CONTROL,
2081 hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
2082 mutex_unlock(&per_pin->lock);
2083 if (spec->dyn_pin_out) {
2084 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2086 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2087 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2088 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2089 AC_VERB_SET_PIN_WIDGET_CONTROL,
2093 /* snd_hda_set_dev_select() has been called before */
2094 err = spec->ops.setup_stream(codec, cvt_nid, per_pin->pin_nid,
2095 per_pin->dev_id, stream_tag, format);
2097 mutex_unlock(&spec->pcm_lock);
2101 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2102 struct hda_codec *codec,
2103 struct snd_pcm_substream *substream)
2105 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
2109 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
2110 struct hda_codec *codec,
2111 struct snd_pcm_substream *substream)
2113 struct hdmi_spec *spec = codec->spec;
2114 int cvt_idx, pin_idx, pcm_idx;
2115 struct hdmi_spec_per_cvt *per_cvt;
2116 struct hdmi_spec_per_pin *per_pin;
2120 mutex_lock(&spec->pcm_lock);
2122 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
2123 if (snd_BUG_ON(pcm_idx < 0)) {
2127 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
2128 if (snd_BUG_ON(cvt_idx < 0)) {
2132 per_cvt = get_cvt(spec, cvt_idx);
2133 snd_BUG_ON(!per_cvt->assigned);
2134 per_cvt->assigned = 0;
2137 azx_stream(get_azx_dev(substream))->stripe = 0;
2139 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2140 clear_bit(pcm_idx, &spec->pcm_in_use);
2141 pin_idx = hinfo_to_pin_index(codec, hinfo);
2142 if (spec->dyn_pcm_assign && pin_idx < 0)
2145 if (snd_BUG_ON(pin_idx < 0)) {
2149 per_pin = get_pin(spec, pin_idx);
2151 if (spec->dyn_pin_out) {
2152 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2154 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2155 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2156 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2157 AC_VERB_SET_PIN_WIDGET_CONTROL,
2161 mutex_lock(&per_pin->lock);
2162 per_pin->chmap_set = false;
2163 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
2165 per_pin->setup = false;
2166 per_pin->channels = 0;
2167 mutex_unlock(&per_pin->lock);
2171 mutex_unlock(&spec->pcm_lock);
2176 static const struct hda_pcm_ops generic_ops = {
2177 .open = hdmi_pcm_open,
2178 .close = hdmi_pcm_close,
2179 .prepare = generic_hdmi_playback_pcm_prepare,
2180 .cleanup = generic_hdmi_playback_pcm_cleanup,
2183 static int hdmi_get_spk_alloc(struct hdac_device *hdac, int pcm_idx)
2185 struct hda_codec *codec = hdac_to_hda_codec(hdac);
2186 struct hdmi_spec *spec = codec->spec;
2187 struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2192 return per_pin->sink_eld.info.spk_alloc;
2195 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
2196 unsigned char *chmap)
2198 struct hda_codec *codec = hdac_to_hda_codec(hdac);
2199 struct hdmi_spec *spec = codec->spec;
2200 struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2202 /* chmap is already set to 0 in caller */
2206 memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
2209 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
2210 unsigned char *chmap, int prepared)
2212 struct hda_codec *codec = hdac_to_hda_codec(hdac);
2213 struct hdmi_spec *spec = codec->spec;
2214 struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2218 mutex_lock(&per_pin->lock);
2219 per_pin->chmap_set = true;
2220 memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
2222 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2223 mutex_unlock(&per_pin->lock);
2226 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
2228 struct hda_codec *codec = hdac_to_hda_codec(hdac);
2229 struct hdmi_spec *spec = codec->spec;
2230 struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2232 return per_pin ? true:false;
2235 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2237 struct hdmi_spec *spec = codec->spec;
2241 * for non-mst mode, pcm number is the same as before
2242 * for DP MST mode without extra PCM, pcm number is same
2243 * for DP MST mode with extra PCMs, pcm number is
2244 * (nid number + dev_num - 1)
2245 * dev_num is the device entry number in a pin
2248 if (codec->mst_no_extra_pcms)
2249 pcm_num = spec->num_nids;
2251 pcm_num = spec->num_nids + spec->dev_num - 1;
2253 codec_dbg(codec, "hdmi: pcm_num set to %d\n", pcm_num);
2255 for (idx = 0; idx < pcm_num; idx++) {
2256 struct hda_pcm *info;
2257 struct hda_pcm_stream *pstr;
2259 info = snd_hda_codec_pcm_new(codec, "HDMI %d", idx);
2263 spec->pcm_rec[idx].pcm = info;
2265 info->pcm_type = HDA_PCM_TYPE_HDMI;
2266 info->own_chmap = true;
2268 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2269 pstr->substreams = 1;
2270 pstr->ops = generic_ops;
2271 /* pcm number is less than 16 */
2272 if (spec->pcm_used >= 16)
2274 /* other pstr fields are set in open */
2280 static void free_hdmi_jack_priv(struct snd_jack *jack)
2282 struct hdmi_pcm *pcm = jack->private_data;
2287 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2289 char hdmi_str[32] = "HDMI/DP";
2290 struct hdmi_spec *spec = codec->spec;
2291 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pcm_idx);
2292 struct snd_jack *jack;
2293 int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2297 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2298 if (!spec->dyn_pcm_assign &&
2299 !is_jack_detectable(codec, per_pin->pin_nid))
2300 strncat(hdmi_str, " Phantom",
2301 sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2303 err = snd_jack_new(codec->card, hdmi_str, SND_JACK_AVOUT, &jack,
2308 spec->pcm_rec[pcm_idx].jack = jack;
2309 jack->private_data = &spec->pcm_rec[pcm_idx];
2310 jack->private_free = free_hdmi_jack_priv;
2314 static int generic_hdmi_build_controls(struct hda_codec *codec)
2316 struct hdmi_spec *spec = codec->spec;
2318 int pin_idx, pcm_idx;
2320 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2321 if (!get_pcm_rec(spec, pcm_idx)->pcm) {
2322 /* no PCM: mark this for skipping permanently */
2323 set_bit(pcm_idx, &spec->pcm_bitmap);
2327 err = generic_hdmi_build_jack(codec, pcm_idx);
2331 /* create the spdif for each pcm
2332 * pin will be bound when monitor is connected
2334 if (spec->dyn_pcm_assign)
2335 err = snd_hda_create_dig_out_ctls(codec,
2336 0, spec->cvt_nids[0],
2339 struct hdmi_spec_per_pin *per_pin =
2340 get_pin(spec, pcm_idx);
2341 err = snd_hda_create_dig_out_ctls(codec,
2343 per_pin->mux_nids[0],
2348 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2350 dev = get_pcm_rec(spec, pcm_idx)->device;
2351 if (dev != SNDRV_PCM_INVALID_DEVICE) {
2352 /* add control for ELD Bytes */
2353 err = hdmi_create_eld_ctl(codec, pcm_idx, dev);
2359 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2360 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2361 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
2363 pin_eld->eld_valid = false;
2364 hdmi_present_sense(per_pin, 0);
2367 /* add channel maps */
2368 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2369 struct hda_pcm *pcm;
2371 pcm = get_pcm_rec(spec, pcm_idx);
2372 if (!pcm || !pcm->pcm)
2374 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2382 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2384 struct hdmi_spec *spec = codec->spec;
2387 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2388 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2390 per_pin->codec = codec;
2391 mutex_init(&per_pin->lock);
2392 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2393 eld_proc_new(per_pin, pin_idx);
2398 static int generic_hdmi_init(struct hda_codec *codec)
2400 struct hdmi_spec *spec = codec->spec;
2403 mutex_lock(&spec->bind_lock);
2404 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2405 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2406 hda_nid_t pin_nid = per_pin->pin_nid;
2407 int dev_id = per_pin->dev_id;
2409 snd_hda_set_dev_select(codec, pin_nid, dev_id);
2410 hdmi_init_pin(codec, pin_nid);
2411 if (codec_has_acomp(codec))
2413 snd_hda_jack_detect_enable_callback_mst(codec, pin_nid, dev_id,
2416 mutex_unlock(&spec->bind_lock);
2420 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2422 snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2423 snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2426 static void hdmi_array_free(struct hdmi_spec *spec)
2428 snd_array_free(&spec->pins);
2429 snd_array_free(&spec->cvts);
2432 static void generic_spec_free(struct hda_codec *codec)
2434 struct hdmi_spec *spec = codec->spec;
2437 hdmi_array_free(spec);
2441 codec->dp_mst = false;
2444 static void generic_hdmi_free(struct hda_codec *codec)
2446 struct hdmi_spec *spec = codec->spec;
2447 int pin_idx, pcm_idx;
2449 if (spec->acomp_registered) {
2450 snd_hdac_acomp_exit(&codec->bus->core);
2451 } else if (codec_has_acomp(codec)) {
2452 snd_hdac_acomp_register_notifier(&codec->bus->core, NULL);
2454 codec->relaxed_resume = 0;
2456 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2457 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2458 cancel_delayed_work_sync(&per_pin->work);
2459 eld_proc_free(per_pin);
2462 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2463 if (spec->pcm_rec[pcm_idx].jack == NULL)
2465 if (spec->dyn_pcm_assign)
2466 snd_device_free(codec->card,
2467 spec->pcm_rec[pcm_idx].jack);
2469 spec->pcm_rec[pcm_idx].jack = NULL;
2472 generic_spec_free(codec);
2476 static int generic_hdmi_resume(struct hda_codec *codec)
2478 struct hdmi_spec *spec = codec->spec;
2481 codec->patch_ops.init(codec);
2482 snd_hda_regmap_sync(codec);
2484 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2485 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2486 hdmi_present_sense(per_pin, 1);
2492 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2493 .init = generic_hdmi_init,
2494 .free = generic_hdmi_free,
2495 .build_pcms = generic_hdmi_build_pcms,
2496 .build_controls = generic_hdmi_build_controls,
2497 .unsol_event = hdmi_unsol_event,
2499 .resume = generic_hdmi_resume,
2503 static const struct hdmi_ops generic_standard_hdmi_ops = {
2504 .pin_get_eld = hdmi_pin_get_eld,
2505 .pin_setup_infoframe = hdmi_pin_setup_infoframe,
2506 .pin_hbr_setup = hdmi_pin_hbr_setup,
2507 .setup_stream = hdmi_setup_stream,
2510 /* allocate codec->spec and assign/initialize generic parser ops */
2511 static int alloc_generic_hdmi(struct hda_codec *codec)
2513 struct hdmi_spec *spec;
2515 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2519 spec->codec = codec;
2520 spec->ops = generic_standard_hdmi_ops;
2521 spec->dev_num = 1; /* initialize to 1 */
2522 mutex_init(&spec->pcm_lock);
2523 mutex_init(&spec->bind_lock);
2524 snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2526 spec->chmap.ops.get_chmap = hdmi_get_chmap;
2527 spec->chmap.ops.set_chmap = hdmi_set_chmap;
2528 spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2529 spec->chmap.ops.get_spk_alloc = hdmi_get_spk_alloc;
2532 hdmi_array_init(spec, 4);
2534 codec->patch_ops = generic_hdmi_patch_ops;
2539 /* generic HDMI parser */
2540 static int patch_generic_hdmi(struct hda_codec *codec)
2544 err = alloc_generic_hdmi(codec);
2548 err = hdmi_parse_codec(codec);
2550 generic_spec_free(codec);
2554 generic_hdmi_init_per_pins(codec);
2559 * generic audio component binding
2562 /* turn on / off the unsol event jack detection dynamically */
2563 static void reprogram_jack_detect(struct hda_codec *codec, hda_nid_t nid,
2564 int dev_id, bool use_acomp)
2566 struct hda_jack_tbl *tbl;
2568 tbl = snd_hda_jack_tbl_get_mst(codec, nid, dev_id);
2570 /* clear unsol even if component notifier is used, or re-enable
2571 * if notifier is cleared
2573 unsigned int val = use_acomp ? 0 : (AC_USRSP_EN | tbl->tag);
2574 snd_hda_codec_write_cache(codec, nid, 0,
2575 AC_VERB_SET_UNSOLICITED_ENABLE, val);
2579 /* set up / clear component notifier dynamically */
2580 static void generic_acomp_notifier_set(struct drm_audio_component *acomp,
2583 struct hdmi_spec *spec;
2586 spec = container_of(acomp->audio_ops, struct hdmi_spec, drm_audio_ops);
2587 mutex_lock(&spec->bind_lock);
2588 spec->use_acomp_notifier = use_acomp;
2589 spec->codec->relaxed_resume = use_acomp;
2590 spec->codec->bus->keep_power = 0;
2591 /* reprogram each jack detection logic depending on the notifier */
2592 for (i = 0; i < spec->num_pins; i++)
2593 reprogram_jack_detect(spec->codec,
2594 get_pin(spec, i)->pin_nid,
2595 get_pin(spec, i)->dev_id,
2597 mutex_unlock(&spec->bind_lock);
2600 /* enable / disable the notifier via master bind / unbind */
2601 static int generic_acomp_master_bind(struct device *dev,
2602 struct drm_audio_component *acomp)
2604 generic_acomp_notifier_set(acomp, true);
2608 static void generic_acomp_master_unbind(struct device *dev,
2609 struct drm_audio_component *acomp)
2611 generic_acomp_notifier_set(acomp, false);
2614 /* check whether both HD-audio and DRM PCI devices belong to the same bus */
2615 static int match_bound_vga(struct device *dev, int subtype, void *data)
2617 struct hdac_bus *bus = data;
2618 struct pci_dev *pci, *master;
2620 if (!dev_is_pci(dev) || !dev_is_pci(bus->dev))
2622 master = to_pci_dev(bus->dev);
2623 pci = to_pci_dev(dev);
2624 return master->bus == pci->bus;
2627 /* audio component notifier for AMD/Nvidia HDMI codecs */
2628 static void generic_acomp_pin_eld_notify(void *audio_ptr, int port, int dev_id)
2630 struct hda_codec *codec = audio_ptr;
2631 struct hdmi_spec *spec = codec->spec;
2632 hda_nid_t pin_nid = spec->port2pin(codec, port);
2636 if (get_wcaps_type(get_wcaps(codec, pin_nid)) != AC_WID_PIN)
2638 /* skip notification during system suspend (but not in runtime PM);
2639 * the state will be updated at resume
2641 if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2643 /* ditto during suspend/resume process itself */
2644 if (snd_hdac_is_in_pm(&codec->core))
2647 check_presence_and_report(codec, pin_nid, dev_id);
2650 /* set up the private drm_audio_ops from the template */
2651 static void setup_drm_audio_ops(struct hda_codec *codec,
2652 const struct drm_audio_component_audio_ops *ops)
2654 struct hdmi_spec *spec = codec->spec;
2656 spec->drm_audio_ops.audio_ptr = codec;
2657 /* intel_audio_codec_enable() or intel_audio_codec_disable()
2658 * will call pin_eld_notify with using audio_ptr pointer
2659 * We need make sure audio_ptr is really setup
2662 spec->drm_audio_ops.pin2port = ops->pin2port;
2663 spec->drm_audio_ops.pin_eld_notify = ops->pin_eld_notify;
2664 spec->drm_audio_ops.master_bind = ops->master_bind;
2665 spec->drm_audio_ops.master_unbind = ops->master_unbind;
2668 /* initialize the generic HDMI audio component */
2669 static void generic_acomp_init(struct hda_codec *codec,
2670 const struct drm_audio_component_audio_ops *ops,
2671 int (*port2pin)(struct hda_codec *, int))
2673 struct hdmi_spec *spec = codec->spec;
2675 if (!enable_acomp) {
2676 codec_info(codec, "audio component disabled by module option\n");
2680 spec->port2pin = port2pin;
2681 setup_drm_audio_ops(codec, ops);
2682 if (!snd_hdac_acomp_init(&codec->bus->core, &spec->drm_audio_ops,
2683 match_bound_vga, 0)) {
2684 spec->acomp_registered = true;
2689 * Intel codec parsers and helpers
2692 #define INTEL_GET_VENDOR_VERB 0xf81
2693 #define INTEL_SET_VENDOR_VERB 0x781
2694 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
2695 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
2697 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2700 unsigned int vendor_param;
2701 struct hdmi_spec *spec = codec->spec;
2703 vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2704 INTEL_GET_VENDOR_VERB, 0);
2705 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2708 vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2709 vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2710 INTEL_SET_VENDOR_VERB, vendor_param);
2711 if (vendor_param == -1)
2715 snd_hda_codec_update_widgets(codec);
2718 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2720 unsigned int vendor_param;
2721 struct hdmi_spec *spec = codec->spec;
2723 vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2724 INTEL_GET_VENDOR_VERB, 0);
2725 if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2728 /* enable DP1.2 mode */
2729 vendor_param |= INTEL_EN_DP12;
2730 snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2731 snd_hda_codec_write_cache(codec, spec->vendor_nid, 0,
2732 INTEL_SET_VENDOR_VERB, vendor_param);
2735 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2736 * Otherwise you may get severe h/w communication errors.
2738 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2739 unsigned int power_state)
2741 if (power_state == AC_PWRST_D0) {
2742 intel_haswell_enable_all_pins(codec, false);
2743 intel_haswell_fixup_enable_dp12(codec);
2746 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2747 snd_hda_codec_set_power_to_all(codec, fg, power_state);
2750 /* There is a fixed mapping between audio pin node and display port.
2751 * on SNB, IVY, HSW, BSW, SKL, BXT, KBL:
2752 * Pin Widget 5 - PORT B (port = 1 in i915 driver)
2753 * Pin Widget 6 - PORT C (port = 2 in i915 driver)
2754 * Pin Widget 7 - PORT D (port = 3 in i915 driver)
2757 * Pin Widget 4 - PORT B (port = 1 in i915 driver)
2758 * Pin Widget 5 - PORT C (port = 2 in i915 driver)
2759 * Pin Widget 6 - PORT D (port = 3 in i915 driver)
2761 static int intel_base_nid(struct hda_codec *codec)
2763 switch (codec->core.vendor_id) {
2764 case 0x80860054: /* ILK */
2765 case 0x80862804: /* ILK */
2766 case 0x80862882: /* VLV */
2773 static int intel_pin2port(void *audio_ptr, int pin_nid)
2775 struct hda_codec *codec = audio_ptr;
2776 struct hdmi_spec *spec = codec->spec;
2779 if (!spec->port_num) {
2780 base_nid = intel_base_nid(codec);
2781 if (WARN_ON(pin_nid < base_nid || pin_nid >= base_nid + 3))
2783 return pin_nid - base_nid + 1;
2787 * looking for the pin number in the mapping table and return
2788 * the index which indicate the port number
2790 for (i = 0; i < spec->port_num; i++) {
2791 if (pin_nid == spec->port_map[i])
2795 codec_info(codec, "Can't find the HDMI/DP port for pin NID 0x%x\n", pin_nid);
2799 static int intel_port2pin(struct hda_codec *codec, int port)
2801 struct hdmi_spec *spec = codec->spec;
2803 if (!spec->port_num) {
2804 /* we assume only from port-B to port-D */
2805 if (port < 1 || port > 3)
2807 return port + intel_base_nid(codec) - 1;
2810 if (port < 0 || port >= spec->port_num)
2812 return spec->port_map[port];
2815 static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe)
2817 struct hda_codec *codec = audio_ptr;
2821 pin_nid = intel_port2pin(codec, port);
2824 /* skip notification during system suspend (but not in runtime PM);
2825 * the state will be updated at resume
2827 if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2829 /* ditto during suspend/resume process itself */
2830 if (snd_hdac_is_in_pm(&codec->core))
2833 snd_hdac_i915_set_bclk(&codec->bus->core);
2834 check_presence_and_report(codec, pin_nid, dev_id);
2837 static const struct drm_audio_component_audio_ops intel_audio_ops = {
2838 .pin2port = intel_pin2port,
2839 .pin_eld_notify = intel_pin_eld_notify,
2842 /* register i915 component pin_eld_notify callback */
2843 static void register_i915_notifier(struct hda_codec *codec)
2845 struct hdmi_spec *spec = codec->spec;
2847 spec->use_acomp_notifier = true;
2848 spec->port2pin = intel_port2pin;
2849 setup_drm_audio_ops(codec, &intel_audio_ops);
2850 snd_hdac_acomp_register_notifier(&codec->bus->core,
2851 &spec->drm_audio_ops);
2852 /* no need for forcible resume for jack check thanks to notifier */
2853 codec->relaxed_resume = 1;
2856 /* setup_stream ops override for HSW+ */
2857 static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
2858 hda_nid_t pin_nid, int dev_id, u32 stream_tag,
2861 haswell_verify_D0(codec, cvt_nid, pin_nid);
2862 return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
2863 stream_tag, format);
2866 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2867 static void i915_pin_cvt_fixup(struct hda_codec *codec,
2868 struct hdmi_spec_per_pin *per_pin,
2872 haswell_verify_D0(codec, per_pin->cvt_nid, per_pin->pin_nid);
2873 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2875 intel_verify_pin_cvt_connect(codec, per_pin);
2876 intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
2877 per_pin->dev_id, per_pin->mux_idx);
2879 intel_not_share_assigned_cvt_nid(codec, 0, 0, cvt_nid);
2883 /* precondition and allocation for Intel codecs */
2884 static int alloc_intel_hdmi(struct hda_codec *codec)
2888 /* requires i915 binding */
2889 if (!codec->bus->core.audio_component) {
2890 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2891 /* set probe_id here to prevent generic fallback binding */
2892 codec->probe_id = HDA_CODEC_ID_SKIP_PROBE;
2896 err = alloc_generic_hdmi(codec);
2899 /* no need to handle unsol events */
2900 codec->patch_ops.unsol_event = NULL;
2904 /* parse and post-process for Intel codecs */
2905 static int parse_intel_hdmi(struct hda_codec *codec)
2907 int err, retries = 3;
2910 err = hdmi_parse_codec(codec);
2911 } while (err < 0 && retries--);
2914 generic_spec_free(codec);
2918 generic_hdmi_init_per_pins(codec);
2919 register_i915_notifier(codec);
2923 /* Intel Haswell and onwards; audio component with eld notifier */
2924 static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid,
2925 const int *port_map, int port_num)
2927 struct hdmi_spec *spec;
2930 err = alloc_intel_hdmi(codec);
2934 codec->dp_mst = true;
2935 spec->dyn_pcm_assign = true;
2936 spec->vendor_nid = vendor_nid;
2937 spec->port_map = port_map;
2938 spec->port_num = port_num;
2939 spec->intel_hsw_fixup = true;
2941 intel_haswell_enable_all_pins(codec, true);
2942 intel_haswell_fixup_enable_dp12(codec);
2944 codec->display_power_control = 1;
2946 codec->patch_ops.set_power_state = haswell_set_power_state;
2947 codec->depop_delay = 0;
2948 codec->auto_runtime_pm = 1;
2950 spec->ops.setup_stream = i915_hsw_setup_stream;
2951 spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2954 * Enable silent stream feature, if it is enabled via
2955 * module param or Kconfig option
2957 if (enable_silent_stream)
2958 spec->send_silent_stream = true;
2960 return parse_intel_hdmi(codec);
2963 static int patch_i915_hsw_hdmi(struct hda_codec *codec)
2965 return intel_hsw_common_init(codec, 0x08, NULL, 0);
2968 static int patch_i915_glk_hdmi(struct hda_codec *codec)
2970 return intel_hsw_common_init(codec, 0x0b, NULL, 0);
2973 static int patch_i915_icl_hdmi(struct hda_codec *codec)
2976 * pin to port mapping table where the value indicate the pin number and
2977 * the index indicate the port number.
2979 static const int map[] = {0x0, 0x4, 0x6, 0x8, 0xa, 0xb};
2981 return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2984 static int patch_i915_tgl_hdmi(struct hda_codec *codec)
2987 * pin to port mapping table where the value indicate the pin number and
2988 * the index indicate the port number.
2990 static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
2992 return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2995 /* Intel Baytrail and Braswell; with eld notifier */
2996 static int patch_i915_byt_hdmi(struct hda_codec *codec)
2998 struct hdmi_spec *spec;
3001 err = alloc_intel_hdmi(codec);
3006 /* For Valleyview/Cherryview, only the display codec is in the display
3007 * power well and can use link_power ops to request/release the power.
3009 codec->display_power_control = 1;
3011 codec->depop_delay = 0;
3012 codec->auto_runtime_pm = 1;
3014 spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
3016 return parse_intel_hdmi(codec);
3019 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
3020 static int patch_i915_cpt_hdmi(struct hda_codec *codec)
3024 err = alloc_intel_hdmi(codec);
3027 return parse_intel_hdmi(codec);
3031 * Shared non-generic implementations
3034 static int simple_playback_build_pcms(struct hda_codec *codec)
3036 struct hdmi_spec *spec = codec->spec;
3037 struct hda_pcm *info;
3039 struct hda_pcm_stream *pstr;
3040 struct hdmi_spec_per_cvt *per_cvt;
3042 per_cvt = get_cvt(spec, 0);
3043 chans = get_wcaps(codec, per_cvt->cvt_nid);
3044 chans = get_wcaps_channels(chans);
3046 info = snd_hda_codec_pcm_new(codec, "HDMI 0");
3049 spec->pcm_rec[0].pcm = info;
3050 info->pcm_type = HDA_PCM_TYPE_HDMI;
3051 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
3052 *pstr = spec->pcm_playback;
3053 pstr->nid = per_cvt->cvt_nid;
3054 if (pstr->channels_max <= 2 && chans && chans <= 16)
3055 pstr->channels_max = chans;
3060 /* unsolicited event for jack sensing */
3061 static void simple_hdmi_unsol_event(struct hda_codec *codec,
3064 snd_hda_jack_set_dirty_all(codec);
3065 snd_hda_jack_report_sync(codec);
3068 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
3069 * as long as spec->pins[] is set correctly
3071 #define simple_hdmi_build_jack generic_hdmi_build_jack
3073 static int simple_playback_build_controls(struct hda_codec *codec)
3075 struct hdmi_spec *spec = codec->spec;
3076 struct hdmi_spec_per_cvt *per_cvt;
3079 per_cvt = get_cvt(spec, 0);
3080 err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
3085 return simple_hdmi_build_jack(codec, 0);
3088 static int simple_playback_init(struct hda_codec *codec)
3090 struct hdmi_spec *spec = codec->spec;
3091 struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
3092 hda_nid_t pin = per_pin->pin_nid;
3094 snd_hda_codec_write(codec, pin, 0,
3095 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
3096 /* some codecs require to unmute the pin */
3097 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
3098 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
3100 snd_hda_jack_detect_enable(codec, pin, per_pin->dev_id);
3104 static void simple_playback_free(struct hda_codec *codec)
3106 struct hdmi_spec *spec = codec->spec;
3108 hdmi_array_free(spec);
3113 * Nvidia specific implementations
3116 #define Nv_VERB_SET_Channel_Allocation 0xF79
3117 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
3118 #define Nv_VERB_SET_Audio_Protection_On 0xF98
3119 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
3121 #define nvhdmi_master_con_nid_7x 0x04
3122 #define nvhdmi_master_pin_nid_7x 0x05
3124 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
3125 /*front, rear, clfe, rear_surr */
3129 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
3130 /* set audio protect on */
3131 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3132 /* enable digital output on pin widget */
3133 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3137 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
3138 /* set audio protect on */
3139 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3140 /* enable digital output on pin widget */
3141 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3142 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3143 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3144 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3145 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3149 #ifdef LIMITED_RATE_FMT_SUPPORT
3150 /* support only the safe format and rate */
3151 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
3152 #define SUPPORTED_MAXBPS 16
3153 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
3155 /* support all rates and formats */
3156 #define SUPPORTED_RATES \
3157 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
3158 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
3159 SNDRV_PCM_RATE_192000)
3160 #define SUPPORTED_MAXBPS 24
3161 #define SUPPORTED_FORMATS \
3162 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
3165 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
3167 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
3171 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
3173 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
3177 static const unsigned int channels_2_6_8[] = {
3181 static const unsigned int channels_2_8[] = {
3185 static const struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
3186 .count = ARRAY_SIZE(channels_2_6_8),
3187 .list = channels_2_6_8,
3191 static const struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
3192 .count = ARRAY_SIZE(channels_2_8),
3193 .list = channels_2_8,
3197 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
3198 struct hda_codec *codec,
3199 struct snd_pcm_substream *substream)
3201 struct hdmi_spec *spec = codec->spec;
3202 const struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
3204 switch (codec->preset->vendor_id) {
3209 hw_constraints_channels = &hw_constraints_2_8_channels;
3212 hw_constraints_channels = &hw_constraints_2_6_8_channels;
3218 if (hw_constraints_channels != NULL) {
3219 snd_pcm_hw_constraint_list(substream->runtime, 0,
3220 SNDRV_PCM_HW_PARAM_CHANNELS,
3221 hw_constraints_channels);
3223 snd_pcm_hw_constraint_step(substream->runtime, 0,
3224 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
3227 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3230 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
3231 struct hda_codec *codec,
3232 struct snd_pcm_substream *substream)
3234 struct hdmi_spec *spec = codec->spec;
3235 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3238 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3239 struct hda_codec *codec,
3240 unsigned int stream_tag,
3241 unsigned int format,
3242 struct snd_pcm_substream *substream)
3244 struct hdmi_spec *spec = codec->spec;
3245 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3246 stream_tag, format, substream);
3249 static const struct hda_pcm_stream simple_pcm_playback = {
3254 .open = simple_playback_pcm_open,
3255 .close = simple_playback_pcm_close,
3256 .prepare = simple_playback_pcm_prepare
3260 static const struct hda_codec_ops simple_hdmi_patch_ops = {
3261 .build_controls = simple_playback_build_controls,
3262 .build_pcms = simple_playback_build_pcms,
3263 .init = simple_playback_init,
3264 .free = simple_playback_free,
3265 .unsol_event = simple_hdmi_unsol_event,
3268 static int patch_simple_hdmi(struct hda_codec *codec,
3269 hda_nid_t cvt_nid, hda_nid_t pin_nid)
3271 struct hdmi_spec *spec;
3272 struct hdmi_spec_per_cvt *per_cvt;
3273 struct hdmi_spec_per_pin *per_pin;
3275 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3279 spec->codec = codec;
3281 hdmi_array_init(spec, 1);
3283 spec->multiout.num_dacs = 0; /* no analog */
3284 spec->multiout.max_channels = 2;
3285 spec->multiout.dig_out_nid = cvt_nid;
3288 per_pin = snd_array_new(&spec->pins);
3289 per_cvt = snd_array_new(&spec->cvts);
3290 if (!per_pin || !per_cvt) {
3291 simple_playback_free(codec);
3294 per_cvt->cvt_nid = cvt_nid;
3295 per_pin->pin_nid = pin_nid;
3296 spec->pcm_playback = simple_pcm_playback;
3298 codec->patch_ops = simple_hdmi_patch_ops;
3303 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
3306 unsigned int chanmask;
3307 int chan = channels ? (channels - 1) : 1;
3326 /* Set the audio infoframe channel allocation and checksum fields. The
3327 * channel count is computed implicitly by the hardware. */
3328 snd_hda_codec_write(codec, 0x1, 0,
3329 Nv_VERB_SET_Channel_Allocation, chanmask);
3331 snd_hda_codec_write(codec, 0x1, 0,
3332 Nv_VERB_SET_Info_Frame_Checksum,
3333 (0x71 - chan - chanmask));
3336 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3337 struct hda_codec *codec,
3338 struct snd_pcm_substream *substream)
3340 struct hdmi_spec *spec = codec->spec;
3343 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3344 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3345 for (i = 0; i < 4; i++) {
3346 /* set the stream id */
3347 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3348 AC_VERB_SET_CHANNEL_STREAMID, 0);
3349 /* set the stream format */
3350 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3351 AC_VERB_SET_STREAM_FORMAT, 0);
3354 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3355 * streams are disabled. */
3356 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3358 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3361 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3362 struct hda_codec *codec,
3363 unsigned int stream_tag,
3364 unsigned int format,
3365 struct snd_pcm_substream *substream)
3368 unsigned int dataDCC2, channel_id;
3370 struct hdmi_spec *spec = codec->spec;
3371 struct hda_spdif_out *spdif;
3372 struct hdmi_spec_per_cvt *per_cvt;
3374 mutex_lock(&codec->spdif_mutex);
3375 per_cvt = get_cvt(spec, 0);
3376 spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3378 chs = substream->runtime->channels;
3382 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3383 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3384 snd_hda_codec_write(codec,
3385 nvhdmi_master_con_nid_7x,
3387 AC_VERB_SET_DIGI_CONVERT_1,
3388 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3390 /* set the stream id */
3391 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3392 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3394 /* set the stream format */
3395 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3396 AC_VERB_SET_STREAM_FORMAT, format);
3398 /* turn on again (if needed) */
3399 /* enable and set the channel status audio/data flag */
3400 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3401 snd_hda_codec_write(codec,
3402 nvhdmi_master_con_nid_7x,
3404 AC_VERB_SET_DIGI_CONVERT_1,
3405 spdif->ctls & 0xff);
3406 snd_hda_codec_write(codec,
3407 nvhdmi_master_con_nid_7x,
3409 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3412 for (i = 0; i < 4; i++) {
3418 /* turn off SPDIF once;
3419 *otherwise the IEC958 bits won't be updated
3421 if (codec->spdif_status_reset &&
3422 (spdif->ctls & AC_DIG1_ENABLE))
3423 snd_hda_codec_write(codec,
3424 nvhdmi_con_nids_7x[i],
3426 AC_VERB_SET_DIGI_CONVERT_1,
3427 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3428 /* set the stream id */
3429 snd_hda_codec_write(codec,
3430 nvhdmi_con_nids_7x[i],
3432 AC_VERB_SET_CHANNEL_STREAMID,
3433 (stream_tag << 4) | channel_id);
3434 /* set the stream format */
3435 snd_hda_codec_write(codec,
3436 nvhdmi_con_nids_7x[i],
3438 AC_VERB_SET_STREAM_FORMAT,
3440 /* turn on again (if needed) */
3441 /* enable and set the channel status audio/data flag */
3442 if (codec->spdif_status_reset &&
3443 (spdif->ctls & AC_DIG1_ENABLE)) {
3444 snd_hda_codec_write(codec,
3445 nvhdmi_con_nids_7x[i],
3447 AC_VERB_SET_DIGI_CONVERT_1,
3448 spdif->ctls & 0xff);
3449 snd_hda_codec_write(codec,
3450 nvhdmi_con_nids_7x[i],
3452 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3456 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3458 mutex_unlock(&codec->spdif_mutex);
3462 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3466 .nid = nvhdmi_master_con_nid_7x,
3467 .rates = SUPPORTED_RATES,
3468 .maxbps = SUPPORTED_MAXBPS,
3469 .formats = SUPPORTED_FORMATS,
3471 .open = simple_playback_pcm_open,
3472 .close = nvhdmi_8ch_7x_pcm_close,
3473 .prepare = nvhdmi_8ch_7x_pcm_prepare
3477 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3479 struct hdmi_spec *spec;
3480 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3481 nvhdmi_master_pin_nid_7x);
3485 codec->patch_ops.init = nvhdmi_7x_init_2ch;
3486 /* override the PCM rates, etc, as the codec doesn't give full list */
3488 spec->pcm_playback.rates = SUPPORTED_RATES;
3489 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3490 spec->pcm_playback.formats = SUPPORTED_FORMATS;
3494 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3496 struct hdmi_spec *spec = codec->spec;
3497 int err = simple_playback_build_pcms(codec);
3499 struct hda_pcm *info = get_pcm_rec(spec, 0);
3500 info->own_chmap = true;
3505 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3507 struct hdmi_spec *spec = codec->spec;
3508 struct hda_pcm *info;
3509 struct snd_pcm_chmap *chmap;
3512 err = simple_playback_build_controls(codec);
3516 /* add channel maps */
3517 info = get_pcm_rec(spec, 0);
3518 err = snd_pcm_add_chmap_ctls(info->pcm,
3519 SNDRV_PCM_STREAM_PLAYBACK,
3520 snd_pcm_alt_chmaps, 8, 0, &chmap);
3523 switch (codec->preset->vendor_id) {
3528 chmap->channel_mask = (1U << 2) | (1U << 8);
3531 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3536 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3538 struct hdmi_spec *spec;
3539 int err = patch_nvhdmi_2ch(codec);
3543 spec->multiout.max_channels = 8;
3544 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3545 codec->patch_ops.init = nvhdmi_7x_init_8ch;
3546 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3547 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3549 /* Initialize the audio infoframe channel mask and checksum to something
3551 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3557 * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3561 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
3562 struct hdac_cea_channel_speaker_allocation *cap, int channels)
3564 if (cap->ca_index == 0x00 && channels == 2)
3565 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3567 /* If the speaker allocation matches the channel count, it is OK. */
3568 if (cap->channels != channels)
3571 /* all channels are remappable freely */
3572 return SNDRV_CTL_TLVT_CHMAP_VAR;
3575 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
3576 int ca, int chs, unsigned char *map)
3578 if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3584 /* map from pin NID to port; port is 0-based */
3585 /* for Nvidia: assume widget NID starting from 4, with step 1 (4, 5, 6, ...) */
3586 static int nvhdmi_pin2port(void *audio_ptr, int pin_nid)
3591 /* reverse-map from port to pin NID: see above */
3592 static int nvhdmi_port2pin(struct hda_codec *codec, int port)
3597 static const struct drm_audio_component_audio_ops nvhdmi_audio_ops = {
3598 .pin2port = nvhdmi_pin2port,
3599 .pin_eld_notify = generic_acomp_pin_eld_notify,
3600 .master_bind = generic_acomp_master_bind,
3601 .master_unbind = generic_acomp_master_unbind,
3604 static int patch_nvhdmi(struct hda_codec *codec)
3606 struct hdmi_spec *spec;
3609 err = alloc_generic_hdmi(codec);
3612 codec->dp_mst = true;
3615 spec->dyn_pcm_assign = true;
3617 err = hdmi_parse_codec(codec);
3619 generic_spec_free(codec);
3623 generic_hdmi_init_per_pins(codec);
3625 spec->dyn_pin_out = true;
3627 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3628 nvhdmi_chmap_cea_alloc_validate_get_type;
3629 spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3631 codec->link_down_at_suspend = 1;
3633 generic_acomp_init(codec, &nvhdmi_audio_ops, nvhdmi_port2pin);
3638 static int patch_nvhdmi_legacy(struct hda_codec *codec)
3640 struct hdmi_spec *spec;
3643 err = patch_generic_hdmi(codec);
3648 spec->dyn_pin_out = true;
3650 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3651 nvhdmi_chmap_cea_alloc_validate_get_type;
3652 spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3654 codec->link_down_at_suspend = 1;
3660 * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3661 * accessed using vendor-defined verbs. These registers can be used for
3662 * interoperability between the HDA and HDMI drivers.
3665 /* Audio Function Group node */
3666 #define NVIDIA_AFG_NID 0x01
3669 * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3670 * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3671 * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3672 * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3673 * additional bit (at position 30) to signal the validity of the format.
3675 * | 31 | 30 | 29 16 | 15 0 |
3676 * +---------+-------+--------+--------+
3677 * | TRIGGER | VALID | UNUSED | FORMAT |
3678 * +-----------------------------------|
3680 * Note that for the trigger bit to take effect it needs to change value
3681 * (i.e. it needs to be toggled).
3683 #define NVIDIA_GET_SCRATCH0 0xfa6
3684 #define NVIDIA_SET_SCRATCH0_BYTE0 0xfa7
3685 #define NVIDIA_SET_SCRATCH0_BYTE1 0xfa8
3686 #define NVIDIA_SET_SCRATCH0_BYTE2 0xfa9
3687 #define NVIDIA_SET_SCRATCH0_BYTE3 0xfaa
3688 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3689 #define NVIDIA_SCRATCH_VALID (1 << 6)
3691 #define NVIDIA_GET_SCRATCH1 0xfab
3692 #define NVIDIA_SET_SCRATCH1_BYTE0 0xfac
3693 #define NVIDIA_SET_SCRATCH1_BYTE1 0xfad
3694 #define NVIDIA_SET_SCRATCH1_BYTE2 0xfae
3695 #define NVIDIA_SET_SCRATCH1_BYTE3 0xfaf
3698 * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3699 * the format is invalidated so that the HDMI codec can be disabled.
3701 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3705 /* bits [31:30] contain the trigger and valid bits */
3706 value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3707 NVIDIA_GET_SCRATCH0, 0);
3708 value = (value >> 24) & 0xff;
3710 /* bits [15:0] are used to store the HDA format */
3711 snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3712 NVIDIA_SET_SCRATCH0_BYTE0,
3713 (format >> 0) & 0xff);
3714 snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3715 NVIDIA_SET_SCRATCH0_BYTE1,
3716 (format >> 8) & 0xff);
3718 /* bits [16:24] are unused */
3719 snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3720 NVIDIA_SET_SCRATCH0_BYTE2, 0);
3723 * Bit 30 signals that the data is valid and hence that HDMI audio can
3727 value &= ~NVIDIA_SCRATCH_VALID;
3729 value |= NVIDIA_SCRATCH_VALID;
3732 * Whenever the trigger bit is toggled, an interrupt is raised in the
3733 * HDMI codec. The HDMI driver will use that as trigger to update its
3736 value ^= NVIDIA_SCRATCH_TRIGGER;
3738 snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3739 NVIDIA_SET_SCRATCH0_BYTE3, value);
3742 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3743 struct hda_codec *codec,
3744 unsigned int stream_tag,
3745 unsigned int format,
3746 struct snd_pcm_substream *substream)
3750 err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3755 /* notify the HDMI codec of the format change */
3756 tegra_hdmi_set_format(codec, format);
3761 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3762 struct hda_codec *codec,
3763 struct snd_pcm_substream *substream)
3765 /* invalidate the format in the HDMI codec */
3766 tegra_hdmi_set_format(codec, 0);
3768 return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3771 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3773 struct hdmi_spec *spec = codec->spec;
3776 for (i = 0; i < spec->num_pins; i++) {
3777 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3779 if (pcm->pcm_type == type)
3786 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3788 struct hda_pcm_stream *stream;
3789 struct hda_pcm *pcm;
3792 err = generic_hdmi_build_pcms(codec);
3796 pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3801 * Override ->prepare() and ->cleanup() operations to notify the HDMI
3802 * codec about format changes.
3804 stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3805 stream->ops.prepare = tegra_hdmi_pcm_prepare;
3806 stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3811 static int patch_tegra_hdmi(struct hda_codec *codec)
3813 struct hdmi_spec *spec;
3816 err = patch_generic_hdmi(codec);
3820 codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3822 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3823 nvhdmi_chmap_cea_alloc_validate_get_type;
3824 spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3830 * ATI/AMD-specific implementations
3833 #define is_amdhdmi_rev3_or_later(codec) \
3834 ((codec)->core.vendor_id == 0x1002aa01 && \
3835 ((codec)->core.revision_id & 0xff00) >= 0x0300)
3836 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3838 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3839 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3840 #define ATI_VERB_SET_DOWNMIX_INFO 0x772
3841 #define ATI_VERB_SET_MULTICHANNEL_01 0x777
3842 #define ATI_VERB_SET_MULTICHANNEL_23 0x778
3843 #define ATI_VERB_SET_MULTICHANNEL_45 0x779
3844 #define ATI_VERB_SET_MULTICHANNEL_67 0x77a
3845 #define ATI_VERB_SET_HBR_CONTROL 0x77c
3846 #define ATI_VERB_SET_MULTICHANNEL_1 0x785
3847 #define ATI_VERB_SET_MULTICHANNEL_3 0x786
3848 #define ATI_VERB_SET_MULTICHANNEL_5 0x787
3849 #define ATI_VERB_SET_MULTICHANNEL_7 0x788
3850 #define ATI_VERB_SET_MULTICHANNEL_MODE 0x789
3851 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3852 #define ATI_VERB_GET_DOWNMIX_INFO 0xf72
3853 #define ATI_VERB_GET_MULTICHANNEL_01 0xf77
3854 #define ATI_VERB_GET_MULTICHANNEL_23 0xf78
3855 #define ATI_VERB_GET_MULTICHANNEL_45 0xf79
3856 #define ATI_VERB_GET_MULTICHANNEL_67 0xf7a
3857 #define ATI_VERB_GET_HBR_CONTROL 0xf7c
3858 #define ATI_VERB_GET_MULTICHANNEL_1 0xf85
3859 #define ATI_VERB_GET_MULTICHANNEL_3 0xf86
3860 #define ATI_VERB_GET_MULTICHANNEL_5 0xf87
3861 #define ATI_VERB_GET_MULTICHANNEL_7 0xf88
3862 #define ATI_VERB_GET_MULTICHANNEL_MODE 0xf89
3864 /* AMD specific HDA cvt verbs */
3865 #define ATI_VERB_SET_RAMP_RATE 0x770
3866 #define ATI_VERB_GET_RAMP_RATE 0xf70
3868 #define ATI_OUT_ENABLE 0x1
3870 #define ATI_MULTICHANNEL_MODE_PAIRED 0
3871 #define ATI_MULTICHANNEL_MODE_SINGLE 1
3873 #define ATI_HBR_CAPABLE 0x01
3874 #define ATI_HBR_ENABLE 0x10
3876 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3877 int dev_id, unsigned char *buf, int *eld_size)
3879 WARN_ON(dev_id != 0);
3880 /* call hda_eld.c ATI/AMD-specific function */
3881 return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3882 is_amdhdmi_rev3_or_later(codec));
3885 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec,
3886 hda_nid_t pin_nid, int dev_id, int ca,
3887 int active_channels, int conn_type)
3889 WARN_ON(dev_id != 0);
3890 snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3893 static int atihdmi_paired_swap_fc_lfe(int pos)
3896 * ATI/AMD have automatic FC/LFE swap built-in
3897 * when in pairwise mapping mode.
3901 /* see channel_allocations[].speakers[] */
3910 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3911 int ca, int chs, unsigned char *map)
3913 struct hdac_cea_channel_speaker_allocation *cap;
3916 /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3918 cap = snd_hdac_get_ch_alloc_from_ca(ca);
3919 for (i = 0; i < chs; ++i) {
3920 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3922 bool companion_ok = false;
3927 for (j = 0 + i % 2; j < 8; j += 2) {
3928 int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3929 if (cap->speakers[chan_idx] == mask) {
3930 /* channel is in a supported position */
3933 if (i % 2 == 0 && i + 1 < chs) {
3934 /* even channel, check the odd companion */
3935 int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3936 int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3937 int comp_mask_act = cap->speakers[comp_chan_idx];
3939 if (comp_mask_req == comp_mask_act)
3940 companion_ok = true;
3952 i++; /* companion channel already checked */
3958 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3959 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3961 struct hda_codec *codec = hdac_to_hda_codec(hdac);
3963 int ati_channel_setup = 0;
3968 if (!has_amd_full_remap_support(codec)) {
3969 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3971 /* In case this is an odd slot but without stream channel, do not
3972 * disable the slot since the corresponding even slot could have a
3973 * channel. In case neither have a channel, the slot pair will be
3974 * disabled when this function is called for the even slot. */
3975 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3978 hdmi_slot -= hdmi_slot % 2;
3980 if (stream_channel != 0xf)
3981 stream_channel -= stream_channel % 2;
3984 verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3986 /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3988 if (stream_channel != 0xf)
3989 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3991 return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3994 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
3995 hda_nid_t pin_nid, int asp_slot)
3997 struct hda_codec *codec = hdac_to_hda_codec(hdac);
3998 bool was_odd = false;
3999 int ati_asp_slot = asp_slot;
4001 int ati_channel_setup;
4006 if (!has_amd_full_remap_support(codec)) {
4007 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
4008 if (ati_asp_slot % 2 != 0) {
4014 verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
4016 ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
4018 if (!(ati_channel_setup & ATI_OUT_ENABLE))
4021 return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
4024 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
4025 struct hdac_chmap *chmap,
4026 struct hdac_cea_channel_speaker_allocation *cap,
4032 * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
4033 * we need to take that into account (a single channel may take 2
4034 * channel slots if we need to carry a silent channel next to it).
4035 * On Rev3+ AMD codecs this function is not used.
4039 /* We only produce even-numbered channel count TLVs */
4040 if ((channels % 2) != 0)
4043 for (c = 0; c < 7; c += 2) {
4044 if (cap->speakers[c] || cap->speakers[c+1])
4048 if (chanpairs * 2 != channels)
4051 return SNDRV_CTL_TLVT_CHMAP_PAIRED;
4054 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
4055 struct hdac_cea_channel_speaker_allocation *cap,
4056 unsigned int *chmap, int channels)
4058 /* produce paired maps for pre-rev3 ATI/AMD codecs */
4062 for (c = 7; c >= 0; c--) {
4063 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
4064 int spk = cap->speakers[chan];
4066 /* add N/A channel if the companion channel is occupied */
4067 if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
4068 chmap[count++] = SNDRV_CHMAP_NA;
4073 chmap[count++] = snd_hdac_spk_to_chmap(spk);
4076 WARN_ON(count != channels);
4079 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
4080 int dev_id, bool hbr)
4082 int hbr_ctl, hbr_ctl_new;
4084 WARN_ON(dev_id != 0);
4086 hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
4087 if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
4089 hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
4091 hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
4094 "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
4096 hbr_ctl == hbr_ctl_new ? "" : "new-",
4099 if (hbr_ctl != hbr_ctl_new)
4100 snd_hda_codec_write(codec, pin_nid, 0,
4101 ATI_VERB_SET_HBR_CONTROL,
4110 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
4111 hda_nid_t pin_nid, int dev_id,
4112 u32 stream_tag, int format)
4114 if (is_amdhdmi_rev3_or_later(codec)) {
4115 int ramp_rate = 180; /* default as per AMD spec */
4116 /* disable ramp-up/down for non-pcm as per AMD spec */
4117 if (format & AC_FMT_TYPE_NON_PCM)
4120 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
4123 return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
4124 stream_tag, format);
4128 static int atihdmi_init(struct hda_codec *codec)
4130 struct hdmi_spec *spec = codec->spec;
4133 err = generic_hdmi_init(codec);
4138 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
4139 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
4141 /* make sure downmix information in infoframe is zero */
4142 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
4144 /* enable channel-wise remap mode if supported */
4145 if (has_amd_full_remap_support(codec))
4146 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
4147 ATI_VERB_SET_MULTICHANNEL_MODE,
4148 ATI_MULTICHANNEL_MODE_SINGLE);
4150 codec->auto_runtime_pm = 1;
4155 /* map from pin NID to port; port is 0-based */
4156 /* for AMD: assume widget NID starting from 3, with step 2 (3, 5, 7, ...) */
4157 static int atihdmi_pin2port(void *audio_ptr, int pin_nid)
4159 return pin_nid / 2 - 1;
4162 /* reverse-map from port to pin NID: see above */
4163 static int atihdmi_port2pin(struct hda_codec *codec, int port)
4165 return port * 2 + 3;
4168 static const struct drm_audio_component_audio_ops atihdmi_audio_ops = {
4169 .pin2port = atihdmi_pin2port,
4170 .pin_eld_notify = generic_acomp_pin_eld_notify,
4171 .master_bind = generic_acomp_master_bind,
4172 .master_unbind = generic_acomp_master_unbind,
4175 static int patch_atihdmi(struct hda_codec *codec)
4177 struct hdmi_spec *spec;
4178 struct hdmi_spec_per_cvt *per_cvt;
4181 err = patch_generic_hdmi(codec);
4186 codec->patch_ops.init = atihdmi_init;
4190 spec->ops.pin_get_eld = atihdmi_pin_get_eld;
4191 spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
4192 spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
4193 spec->ops.setup_stream = atihdmi_setup_stream;
4195 spec->chmap.ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
4196 spec->chmap.ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
4198 if (!has_amd_full_remap_support(codec)) {
4199 /* override to ATI/AMD-specific versions with pairwise mapping */
4200 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
4201 atihdmi_paired_chmap_cea_alloc_validate_get_type;
4202 spec->chmap.ops.cea_alloc_to_tlv_chmap =
4203 atihdmi_paired_cea_alloc_to_tlv_chmap;
4204 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
4207 /* ATI/AMD converters do not advertise all of their capabilities */
4208 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
4209 per_cvt = get_cvt(spec, cvt_idx);
4210 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
4211 per_cvt->rates |= SUPPORTED_RATES;
4212 per_cvt->formats |= SUPPORTED_FORMATS;
4213 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
4216 spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
4218 /* AMD GPUs have neither EPSS nor CLKSTOP bits, hence preventing
4219 * the link-down as is. Tell the core to allow it.
4221 codec->link_down_at_suspend = 1;
4223 generic_acomp_init(codec, &atihdmi_audio_ops, atihdmi_port2pin);
4228 /* VIA HDMI Implementation */
4229 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
4230 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
4232 static int patch_via_hdmi(struct hda_codec *codec)
4234 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
4240 static const struct hda_device_id snd_hda_id_hdmi[] = {
4241 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI", patch_atihdmi),
4242 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI", patch_atihdmi),
4243 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI", patch_atihdmi),
4244 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI", patch_atihdmi),
4245 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI", patch_generic_hdmi),
4246 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI", patch_generic_hdmi),
4247 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI", patch_generic_hdmi),
4248 HDA_CODEC_ENTRY(0x10de0001, "MCP73 HDMI", patch_nvhdmi_2ch),
4249 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
4250 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
4251 HDA_CODEC_ENTRY(0x10de0004, "GPU 04 HDMI", patch_nvhdmi_8ch_7x),
4252 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
4253 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
4254 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI", patch_nvhdmi_8ch_7x),
4255 HDA_CODEC_ENTRY(0x10de0008, "GPU 08 HDMI/DP", patch_nvhdmi_legacy),
4256 HDA_CODEC_ENTRY(0x10de0009, "GPU 09 HDMI/DP", patch_nvhdmi_legacy),
4257 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP", patch_nvhdmi_legacy),
4258 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP", patch_nvhdmi_legacy),
4259 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI", patch_nvhdmi_legacy),
4260 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP", patch_nvhdmi_legacy),
4261 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP", patch_nvhdmi_legacy),
4262 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP", patch_nvhdmi_legacy),
4263 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP", patch_nvhdmi_legacy),
4264 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP", patch_nvhdmi_legacy),
4265 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP", patch_nvhdmi_legacy),
4266 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP", patch_nvhdmi_legacy),
4267 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP", patch_nvhdmi_legacy),
4268 /* 17 is known to be absent */
4269 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP", patch_nvhdmi_legacy),
4270 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP", patch_nvhdmi_legacy),
4271 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP", patch_nvhdmi_legacy),
4272 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP", patch_nvhdmi_legacy),
4273 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP", patch_nvhdmi_legacy),
4274 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI", patch_tegra_hdmi),
4275 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI", patch_tegra_hdmi),
4276 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI", patch_tegra_hdmi),
4277 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
4278 HDA_CODEC_ENTRY(0x10de002d, "Tegra186 HDMI/DP0", patch_tegra_hdmi),
4279 HDA_CODEC_ENTRY(0x10de002e, "Tegra186 HDMI/DP1", patch_tegra_hdmi),
4280 HDA_CODEC_ENTRY(0x10de002f, "Tegra194 HDMI/DP2", patch_tegra_hdmi),
4281 HDA_CODEC_ENTRY(0x10de0030, "Tegra194 HDMI/DP3", patch_tegra_hdmi),
4282 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP", patch_nvhdmi),
4283 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP", patch_nvhdmi),
4284 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP", patch_nvhdmi),
4285 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP", patch_nvhdmi),
4286 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP", patch_nvhdmi),
4287 HDA_CODEC_ENTRY(0x10de0045, "GPU 45 HDMI/DP", patch_nvhdmi),
4288 HDA_CODEC_ENTRY(0x10de0050, "GPU 50 HDMI/DP", patch_nvhdmi),
4289 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP", patch_nvhdmi),
4290 HDA_CODEC_ENTRY(0x10de0052, "GPU 52 HDMI/DP", patch_nvhdmi),
4291 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP", patch_nvhdmi),
4292 HDA_CODEC_ENTRY(0x10de0061, "GPU 61 HDMI/DP", patch_nvhdmi),
4293 HDA_CODEC_ENTRY(0x10de0062, "GPU 62 HDMI/DP", patch_nvhdmi),
4294 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI", patch_nvhdmi_2ch),
4295 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP", patch_nvhdmi),
4296 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP", patch_nvhdmi),
4297 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP", patch_nvhdmi),
4298 HDA_CODEC_ENTRY(0x10de0073, "GPU 73 HDMI/DP", patch_nvhdmi),
4299 HDA_CODEC_ENTRY(0x10de0074, "GPU 74 HDMI/DP", patch_nvhdmi),
4300 HDA_CODEC_ENTRY(0x10de0076, "GPU 76 HDMI/DP", patch_nvhdmi),
4301 HDA_CODEC_ENTRY(0x10de007b, "GPU 7b HDMI/DP", patch_nvhdmi),
4302 HDA_CODEC_ENTRY(0x10de007c, "GPU 7c HDMI/DP", patch_nvhdmi),
4303 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP", patch_nvhdmi),
4304 HDA_CODEC_ENTRY(0x10de007e, "GPU 7e HDMI/DP", patch_nvhdmi),
4305 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP", patch_nvhdmi),
4306 HDA_CODEC_ENTRY(0x10de0081, "GPU 81 HDMI/DP", patch_nvhdmi),
4307 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP", patch_nvhdmi),
4308 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP", patch_nvhdmi),
4309 HDA_CODEC_ENTRY(0x10de0084, "GPU 84 HDMI/DP", patch_nvhdmi),
4310 HDA_CODEC_ENTRY(0x10de0090, "GPU 90 HDMI/DP", patch_nvhdmi),
4311 HDA_CODEC_ENTRY(0x10de0091, "GPU 91 HDMI/DP", patch_nvhdmi),
4312 HDA_CODEC_ENTRY(0x10de0092, "GPU 92 HDMI/DP", patch_nvhdmi),
4313 HDA_CODEC_ENTRY(0x10de0093, "GPU 93 HDMI/DP", patch_nvhdmi),
4314 HDA_CODEC_ENTRY(0x10de0094, "GPU 94 HDMI/DP", patch_nvhdmi),
4315 HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI/DP", patch_nvhdmi),
4316 HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP", patch_nvhdmi),
4317 HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP", patch_nvhdmi),
4318 HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP", patch_nvhdmi),
4319 HDA_CODEC_ENTRY(0x10de009a, "GPU 9a HDMI/DP", patch_nvhdmi),
4320 HDA_CODEC_ENTRY(0x10de009d, "GPU 9d HDMI/DP", patch_nvhdmi),
4321 HDA_CODEC_ENTRY(0x10de009e, "GPU 9e HDMI/DP", patch_nvhdmi),
4322 HDA_CODEC_ENTRY(0x10de009f, "GPU 9f HDMI/DP", patch_nvhdmi),
4323 HDA_CODEC_ENTRY(0x10de00a0, "GPU a0 HDMI/DP", patch_nvhdmi),
4324 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI", patch_nvhdmi_2ch),
4325 HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI", patch_nvhdmi_2ch),
4326 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP", patch_via_hdmi),
4327 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP", patch_via_hdmi),
4328 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP", patch_generic_hdmi),
4329 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP", patch_generic_hdmi),
4330 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI", patch_i915_cpt_hdmi),
4331 HDA_CODEC_ENTRY(0x80862800, "Geminilake HDMI", patch_i915_glk_hdmi),
4332 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI", patch_generic_hdmi),
4333 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI", patch_generic_hdmi),
4334 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI", patch_generic_hdmi),
4335 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI", patch_i915_cpt_hdmi),
4336 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi),
4337 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi),
4338 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI", patch_i915_hsw_hdmi),
4339 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI", patch_i915_hsw_hdmi),
4340 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI", patch_i915_hsw_hdmi),
4341 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI", patch_i915_hsw_hdmi),
4342 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI", patch_i915_hsw_hdmi),
4343 HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI", patch_i915_glk_hdmi),
4344 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI", patch_i915_glk_hdmi),
4345 HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI", patch_i915_icl_hdmi),
4346 HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI", patch_i915_tgl_hdmi),
4347 HDA_CODEC_ENTRY(0x80862814, "DG1 HDMI", patch_i915_tgl_hdmi),
4348 HDA_CODEC_ENTRY(0x80862815, "Alderlake HDMI", patch_i915_tgl_hdmi),
4349 HDA_CODEC_ENTRY(0x80862816, "Rocketlake HDMI", patch_i915_tgl_hdmi),
4350 HDA_CODEC_ENTRY(0x8086281a, "Jasperlake HDMI", patch_i915_icl_hdmi),
4351 HDA_CODEC_ENTRY(0x8086281b, "Elkhartlake HDMI", patch_i915_icl_hdmi),
4352 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI", patch_generic_hdmi),
4353 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
4354 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI", patch_i915_byt_hdmi),
4355 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI", patch_generic_hdmi),
4356 /* special ID for generic HDMI */
4357 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
4360 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
4362 MODULE_LICENSE("GPL");
4363 MODULE_DESCRIPTION("HDMI HD-audio codec");
4364 MODULE_ALIAS("snd-hda-codec-intelhdmi");
4365 MODULE_ALIAS("snd-hda-codec-nvhdmi");
4366 MODULE_ALIAS("snd-hda-codec-atihdmi");
4368 static struct hda_codec_driver hdmi_driver = {
4369 .id = snd_hda_id_hdmi,
4372 module_hda_codec_driver(hdmi_driver);