1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
6 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
7 * Copyright (c) 2006 ATI Technologies Inc.
8 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
9 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
10 * Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
13 * Wu Fengguang <wfg@linux.intel.com>
16 * Wu Fengguang <wfg@linux.intel.com>
19 #include <linux/init.h>
20 #include <linux/delay.h>
21 #include <linux/pci.h>
22 #include <linux/slab.h>
23 #include <linux/module.h>
24 #include <linux/pm_runtime.h>
25 #include <sound/core.h>
26 #include <sound/jack.h>
27 #include <sound/asoundef.h>
28 #include <sound/tlv.h>
29 #include <sound/hdaudio.h>
30 #include <sound/hda_i915.h>
31 #include <sound/hda_chmap.h>
32 #include <sound/hda_codec.h>
33 #include "hda_local.h"
35 #include "hda_controller.h"
37 static bool static_hdmi_pcm;
38 module_param(static_hdmi_pcm, bool, 0644);
39 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
41 static bool enable_acomp = true;
42 module_param(enable_acomp, bool, 0444);
43 MODULE_PARM_DESC(enable_acomp, "Enable audio component binding (default=yes)");
45 static bool enable_silent_stream =
46 IS_ENABLED(CONFIG_SND_HDA_INTEL_HDMI_SILENT_STREAM);
47 module_param(enable_silent_stream, bool, 0644);
48 MODULE_PARM_DESC(enable_silent_stream, "Enable Silent Stream for HDMI devices");
50 struct hdmi_spec_per_cvt {
53 unsigned int channels_min;
54 unsigned int channels_max;
60 /* max. connections to a widget */
61 #define HDA_MAX_CONNECTIONS 32
63 struct hdmi_spec_per_pin {
66 /* pin idx, different device entries on the same pin use the same idx */
69 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
73 struct hda_codec *codec;
74 struct hdmi_eld sink_eld;
76 struct delayed_work work;
77 struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
78 int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
80 bool setup; /* the stream has been set up by prepare callback */
81 int channels; /* current number of channels */
83 bool chmap_set; /* channel-map override by ALSA API? */
84 unsigned char chmap[8]; /* ALSA API channel-map */
85 #ifdef CONFIG_SND_PROC_FS
86 struct snd_info_entry *proc_entry;
90 /* operations used by generic code that can be overridden by patches */
92 int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
93 int dev_id, unsigned char *buf, int *eld_size);
95 void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
97 int ca, int active_channels, int conn_type);
99 /* enable/disable HBR (HD passthrough) */
100 int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid,
101 int dev_id, bool hbr);
103 int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
104 hda_nid_t pin_nid, int dev_id, u32 stream_tag,
107 void (*pin_cvt_fixup)(struct hda_codec *codec,
108 struct hdmi_spec_per_pin *per_pin,
114 struct snd_jack *jack;
115 struct snd_kcontrol *eld_ctl;
119 struct hda_codec *codec;
121 struct snd_array cvts; /* struct hdmi_spec_per_cvt */
122 hda_nid_t cvt_nids[4]; /* only for haswell fix */
125 * num_pins is the number of virtual pins
126 * for example, there are 3 pins, and each pin
127 * has 4 device entries, then the num_pins is 12
131 * num_nids is the number of real pins
132 * In the above example, num_nids is 3
136 * dev_num is the number of device entries
138 * In the above example, dev_num is 4
141 struct snd_array pins; /* struct hdmi_spec_per_pin */
142 struct hdmi_pcm pcm_rec[16];
143 struct mutex pcm_lock;
144 struct mutex bind_lock; /* for audio component binding */
145 /* pcm_bitmap means which pcms have been assigned to pins*/
146 unsigned long pcm_bitmap;
147 int pcm_used; /* counter of pcm_rec[] */
148 /* bitmap shows whether the pcm is opened in user space
149 * bit 0 means the first playback PCM (PCM3);
150 * bit 1 means the second playback PCM, and so on.
152 unsigned long pcm_in_use;
154 struct hdmi_eld temp_eld;
159 bool intel_hsw_fixup; /* apply Intel platform-specific fixups */
161 * Non-generic VIA/NVIDIA specific
163 struct hda_multi_out multiout;
164 struct hda_pcm_stream pcm_playback;
166 bool use_acomp_notifier; /* use eld_notify callback for hotplug */
167 bool acomp_registered; /* audio component registered in this driver */
168 bool force_connect; /* force connectivity */
169 struct drm_audio_component_audio_ops drm_audio_ops;
170 int (*port2pin)(struct hda_codec *, int); /* reverse port/pin mapping */
172 struct hdac_chmap chmap;
173 hda_nid_t vendor_nid;
176 bool send_silent_stream; /* Flag to enable silent stream feature */
179 #ifdef CONFIG_SND_HDA_COMPONENT
180 static inline bool codec_has_acomp(struct hda_codec *codec)
182 struct hdmi_spec *spec = codec->spec;
183 return spec->use_acomp_notifier;
186 #define codec_has_acomp(codec) false
189 struct hdmi_audio_infoframe {
196 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
200 u8 LFEPBL01_LSV36_DM_INH7;
203 struct dp_audio_infoframe {
206 u8 ver; /* 0x11 << 2 */
208 u8 CC02_CT47; /* match with HDMI infoframe from this on */
212 u8 LFEPBL01_LSV36_DM_INH7;
215 union audio_infoframe {
216 struct hdmi_audio_infoframe hdmi;
217 struct dp_audio_infoframe dp;
225 #define get_pin(spec, idx) \
226 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
227 #define get_cvt(spec, idx) \
228 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
229 /* obtain hdmi_pcm object assigned to idx */
230 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
231 /* obtain hda_pcm object assigned to idx */
232 #define get_pcm_rec(spec, idx) (get_hdmi_pcm(spec, idx)->pcm)
234 static int pin_id_to_pin_index(struct hda_codec *codec,
235 hda_nid_t pin_nid, int dev_id)
237 struct hdmi_spec *spec = codec->spec;
239 struct hdmi_spec_per_pin *per_pin;
242 * (dev_id == -1) means it is NON-MST pin
243 * return the first virtual pin on this port
248 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
249 per_pin = get_pin(spec, pin_idx);
250 if ((per_pin->pin_nid == pin_nid) &&
251 (per_pin->dev_id == dev_id))
255 codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
259 static int hinfo_to_pcm_index(struct hda_codec *codec,
260 struct hda_pcm_stream *hinfo)
262 struct hdmi_spec *spec = codec->spec;
265 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
266 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
269 codec_warn(codec, "HDMI: hinfo %p not tied to a PCM\n", hinfo);
273 static int hinfo_to_pin_index(struct hda_codec *codec,
274 struct hda_pcm_stream *hinfo)
276 struct hdmi_spec *spec = codec->spec;
277 struct hdmi_spec_per_pin *per_pin;
280 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
281 per_pin = get_pin(spec, pin_idx);
283 per_pin->pcm->pcm->stream == hinfo)
287 codec_dbg(codec, "HDMI: hinfo %p (pcm %d) not registered\n", hinfo,
288 hinfo_to_pcm_index(codec, hinfo));
292 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
296 struct hdmi_spec_per_pin *per_pin;
298 for (i = 0; i < spec->num_pins; i++) {
299 per_pin = get_pin(spec, i);
300 if (per_pin->pcm_idx == pcm_idx)
306 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
308 struct hdmi_spec *spec = codec->spec;
311 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
312 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
315 codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
319 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
320 struct snd_ctl_elem_info *uinfo)
322 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
323 struct hdmi_spec *spec = codec->spec;
324 struct hdmi_spec_per_pin *per_pin;
325 struct hdmi_eld *eld;
328 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
330 pcm_idx = kcontrol->private_value;
331 mutex_lock(&spec->pcm_lock);
332 per_pin = pcm_idx_to_pin(spec, pcm_idx);
334 /* no pin is bound to the pcm */
338 eld = &per_pin->sink_eld;
339 uinfo->count = eld->eld_valid ? eld->eld_size : 0;
342 mutex_unlock(&spec->pcm_lock);
346 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
347 struct snd_ctl_elem_value *ucontrol)
349 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
350 struct hdmi_spec *spec = codec->spec;
351 struct hdmi_spec_per_pin *per_pin;
352 struct hdmi_eld *eld;
356 pcm_idx = kcontrol->private_value;
357 mutex_lock(&spec->pcm_lock);
358 per_pin = pcm_idx_to_pin(spec, pcm_idx);
360 /* no pin is bound to the pcm */
361 memset(ucontrol->value.bytes.data, 0,
362 ARRAY_SIZE(ucontrol->value.bytes.data));
366 eld = &per_pin->sink_eld;
367 if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
368 eld->eld_size > ELD_MAX_SIZE) {
374 memset(ucontrol->value.bytes.data, 0,
375 ARRAY_SIZE(ucontrol->value.bytes.data));
377 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
381 mutex_unlock(&spec->pcm_lock);
385 static const struct snd_kcontrol_new eld_bytes_ctl = {
386 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE |
387 SNDRV_CTL_ELEM_ACCESS_SKIP_CHECK,
388 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
390 .info = hdmi_eld_ctl_info,
391 .get = hdmi_eld_ctl_get,
394 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
397 struct snd_kcontrol *kctl;
398 struct hdmi_spec *spec = codec->spec;
401 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
404 kctl->private_value = pcm_idx;
405 kctl->id.device = device;
407 /* no pin nid is associated with the kctl now
408 * tbd: associate pin nid to eld ctl later
410 err = snd_hda_ctl_add(codec, 0, kctl);
414 get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
419 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
420 int *packet_index, int *byte_index)
424 val = snd_hda_codec_read(codec, pin_nid, 0,
425 AC_VERB_GET_HDMI_DIP_INDEX, 0);
427 *packet_index = val >> 5;
428 *byte_index = val & 0x1f;
432 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
433 int packet_index, int byte_index)
437 val = (packet_index << 5) | (byte_index & 0x1f);
439 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
442 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
445 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
448 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
450 struct hdmi_spec *spec = codec->spec;
454 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
455 snd_hda_codec_write(codec, pin_nid, 0,
456 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
458 if (spec->dyn_pin_out)
459 /* Disable pin out until stream is active */
462 /* Enable pin out: some machines with GM965 gets broken output
463 * when the pin is disabled or changed while using with HDMI
467 snd_hda_codec_write(codec, pin_nid, 0,
468 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
475 #ifdef CONFIG_SND_PROC_FS
476 static void print_eld_info(struct snd_info_entry *entry,
477 struct snd_info_buffer *buffer)
479 struct hdmi_spec_per_pin *per_pin = entry->private_data;
481 mutex_lock(&per_pin->lock);
482 snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
483 mutex_unlock(&per_pin->lock);
486 static void write_eld_info(struct snd_info_entry *entry,
487 struct snd_info_buffer *buffer)
489 struct hdmi_spec_per_pin *per_pin = entry->private_data;
491 mutex_lock(&per_pin->lock);
492 snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
493 mutex_unlock(&per_pin->lock);
496 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
499 struct hda_codec *codec = per_pin->codec;
500 struct snd_info_entry *entry;
503 snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
504 err = snd_card_proc_new(codec->card, name, &entry);
508 snd_info_set_text_ops(entry, per_pin, print_eld_info);
509 entry->c.text.write = write_eld_info;
511 per_pin->proc_entry = entry;
516 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
518 if (!per_pin->codec->bus->shutdown) {
519 snd_info_free_entry(per_pin->proc_entry);
520 per_pin->proc_entry = NULL;
524 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
529 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
535 * Audio InfoFrame routines
539 * Enable Audio InfoFrame Transmission
541 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
544 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
545 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
550 * Disable Audio InfoFrame Transmission
552 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
555 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
556 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
560 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
562 #ifdef CONFIG_SND_DEBUG_VERBOSE
566 size = snd_hdmi_get_eld_size(codec, pin_nid);
567 codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
569 for (i = 0; i < 8; i++) {
570 size = snd_hda_codec_read(codec, pin_nid, 0,
571 AC_VERB_GET_HDMI_DIP_SIZE, i);
572 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
577 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
583 for (i = 0; i < 8; i++) {
584 size = snd_hda_codec_read(codec, pin_nid, 0,
585 AC_VERB_GET_HDMI_DIP_SIZE, i);
589 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
590 for (j = 1; j < 1000; j++) {
591 hdmi_write_dip_byte(codec, pin_nid, 0x0);
592 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
594 codec_dbg(codec, "dip index %d: %d != %d\n",
596 if (bi == 0) /* byte index wrapped around */
600 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
606 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
608 u8 *bytes = (u8 *)hdmi_ai;
612 hdmi_ai->checksum = 0;
614 for (i = 0; i < sizeof(*hdmi_ai); i++)
617 hdmi_ai->checksum = -sum;
620 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
626 hdmi_debug_dip_size(codec, pin_nid);
627 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
629 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
630 for (i = 0; i < size; i++)
631 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
634 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
640 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
644 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
645 for (i = 0; i < size; i++) {
646 val = snd_hda_codec_read(codec, pin_nid, 0,
647 AC_VERB_GET_HDMI_DIP_DATA, 0);
655 static int hdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
656 int dev_id, unsigned char *buf, int *eld_size)
658 snd_hda_set_dev_select(codec, nid, dev_id);
660 return snd_hdmi_get_eld(codec, nid, buf, eld_size);
663 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
664 hda_nid_t pin_nid, int dev_id,
665 int ca, int active_channels,
668 union audio_infoframe ai;
670 memset(&ai, 0, sizeof(ai));
671 if (conn_type == 0) { /* HDMI */
672 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
674 hdmi_ai->type = 0x84;
677 hdmi_ai->CC02_CT47 = active_channels - 1;
679 hdmi_checksum_audio_infoframe(hdmi_ai);
680 } else if (conn_type == 1) { /* DisplayPort */
681 struct dp_audio_infoframe *dp_ai = &ai.dp;
685 dp_ai->ver = 0x11 << 2;
686 dp_ai->CC02_CT47 = active_channels - 1;
689 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
694 snd_hda_set_dev_select(codec, pin_nid, dev_id);
697 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
698 * sizeof(*dp_ai) to avoid partial match/update problems when
699 * the user switches between HDMI/DP monitors.
701 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
704 "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
706 active_channels, ca);
707 hdmi_stop_infoframe_trans(codec, pin_nid);
708 hdmi_fill_audio_infoframe(codec, pin_nid,
709 ai.bytes, sizeof(ai));
710 hdmi_start_infoframe_trans(codec, pin_nid);
714 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
715 struct hdmi_spec_per_pin *per_pin,
718 struct hdmi_spec *spec = codec->spec;
719 struct hdac_chmap *chmap = &spec->chmap;
720 hda_nid_t pin_nid = per_pin->pin_nid;
721 int dev_id = per_pin->dev_id;
722 int channels = per_pin->channels;
724 struct hdmi_eld *eld;
730 snd_hda_set_dev_select(codec, pin_nid, dev_id);
732 /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
733 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
734 snd_hda_codec_write(codec, pin_nid, 0,
735 AC_VERB_SET_AMP_GAIN_MUTE,
738 eld = &per_pin->sink_eld;
740 ca = snd_hdac_channel_allocation(&codec->core,
741 eld->info.spk_alloc, channels,
742 per_pin->chmap_set, non_pcm, per_pin->chmap);
744 active_channels = snd_hdac_get_active_channels(ca);
746 chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
750 * always configure channel mapping, it may have been changed by the
751 * user in the meantime
753 snd_hdac_setup_channel_mapping(&spec->chmap,
754 pin_nid, non_pcm, ca, channels,
755 per_pin->chmap, per_pin->chmap_set);
757 spec->ops.pin_setup_infoframe(codec, pin_nid, dev_id,
758 ca, active_channels, eld->info.conn_type);
760 per_pin->non_pcm = non_pcm;
767 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
769 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid,
772 struct hdmi_spec *spec = codec->spec;
773 int pin_idx = pin_id_to_pin_index(codec, nid, dev_id);
777 mutex_lock(&spec->pcm_lock);
778 hdmi_present_sense(get_pin(spec, pin_idx), 1);
779 mutex_unlock(&spec->pcm_lock);
782 static void jack_callback(struct hda_codec *codec,
783 struct hda_jack_callback *jack)
785 /* stop polling when notification is enabled */
786 if (codec_has_acomp(codec))
789 check_presence_and_report(codec, jack->nid, jack->dev_id);
792 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res,
793 struct hda_jack_tbl *jack)
795 jack->jack_dirty = 1;
798 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
799 codec->addr, jack->nid, jack->dev_id, !!(res & AC_UNSOL_RES_IA),
800 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
802 check_presence_and_report(codec, jack->nid, jack->dev_id);
805 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
807 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
808 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
809 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
810 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
813 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
830 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
832 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
833 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
834 struct hda_jack_tbl *jack;
836 if (codec_has_acomp(codec))
841 (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
843 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, dev_entry);
845 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, 0);
849 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
854 hdmi_intrinsic_event(codec, res, jack);
856 hdmi_non_intrinsic_event(codec, res);
859 static void haswell_verify_D0(struct hda_codec *codec,
860 hda_nid_t cvt_nid, hda_nid_t nid)
864 /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
865 * thus pins could only choose converter 0 for use. Make sure the
866 * converters are in correct power state */
867 if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
868 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
870 if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
871 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
874 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
875 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
876 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
884 /* HBR should be Non-PCM, 8 channels */
885 #define is_hbr_format(format) \
886 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
888 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
889 int dev_id, bool hbr)
891 int pinctl, new_pinctl;
893 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
894 snd_hda_set_dev_select(codec, pin_nid, dev_id);
895 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
896 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
899 return hbr ? -EINVAL : 0;
901 new_pinctl = pinctl & ~AC_PINCTL_EPT;
903 new_pinctl |= AC_PINCTL_EPT_HBR;
905 new_pinctl |= AC_PINCTL_EPT_NATIVE;
908 "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
910 pinctl == new_pinctl ? "" : "new-",
913 if (pinctl != new_pinctl)
914 snd_hda_codec_write(codec, pin_nid, 0,
915 AC_VERB_SET_PIN_WIDGET_CONTROL,
923 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
924 hda_nid_t pin_nid, int dev_id,
925 u32 stream_tag, int format)
927 struct hdmi_spec *spec = codec->spec;
931 err = spec->ops.pin_hbr_setup(codec, pin_nid, dev_id,
932 is_hbr_format(format));
935 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
939 if (spec->intel_hsw_fixup) {
942 * on recent platforms IEC Coding Type is required for HBR
943 * support, read current Digital Converter settings and set
944 * ICT bitfield if needed.
946 param = snd_hda_codec_read(codec, cvt_nid, 0,
947 AC_VERB_GET_DIGI_CONVERT_1, 0);
949 param = (param >> 16) & ~(AC_DIG3_ICT);
951 /* on recent platforms ICT mode is required for HBR support */
952 if (is_hbr_format(format))
955 snd_hda_codec_write(codec, cvt_nid, 0,
956 AC_VERB_SET_DIGI_CONVERT_3, param);
959 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
963 /* Try to find an available converter
964 * If pin_idx is less then zero, just try to find an available converter.
965 * Otherwise, try to find an available converter and get the cvt mux index
968 static int hdmi_choose_cvt(struct hda_codec *codec,
969 int pin_idx, int *cvt_id)
971 struct hdmi_spec *spec = codec->spec;
972 struct hdmi_spec_per_pin *per_pin;
973 struct hdmi_spec_per_cvt *per_cvt = NULL;
974 int cvt_idx, mux_idx = 0;
976 /* pin_idx < 0 means no pin will be bound to the converter */
980 per_pin = get_pin(spec, pin_idx);
982 /* Dynamically assign converter to stream */
983 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
984 per_cvt = get_cvt(spec, cvt_idx);
986 /* Must not already be assigned */
987 if (per_cvt->assigned)
991 /* Must be in pin's mux's list of converters */
992 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
993 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
995 /* Not in mux list */
996 if (mux_idx == per_pin->num_mux_nids)
1001 /* No free converters */
1002 if (cvt_idx == spec->num_cvts)
1005 if (per_pin != NULL)
1006 per_pin->mux_idx = mux_idx;
1014 /* Assure the pin select the right convetor */
1015 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1016 struct hdmi_spec_per_pin *per_pin)
1018 hda_nid_t pin_nid = per_pin->pin_nid;
1021 mux_idx = per_pin->mux_idx;
1022 curr = snd_hda_codec_read(codec, pin_nid, 0,
1023 AC_VERB_GET_CONNECT_SEL, 0);
1024 if (curr != mux_idx)
1025 snd_hda_codec_write_cache(codec, pin_nid, 0,
1026 AC_VERB_SET_CONNECT_SEL,
1030 /* get the mux index for the converter of the pins
1031 * converter's mux index is the same for all pins on Intel platform
1033 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1038 for (i = 0; i < spec->num_cvts; i++)
1039 if (spec->cvt_nids[i] == cvt_nid)
1044 /* Intel HDMI workaround to fix audio routing issue:
1045 * For some Intel display codecs, pins share the same connection list.
1046 * So a conveter can be selected by multiple pins and playback on any of these
1047 * pins will generate sound on the external display, because audio flows from
1048 * the same converter to the display pipeline. Also muting one pin may make
1049 * other pins have no sound output.
1050 * So this function assures that an assigned converter for a pin is not selected
1051 * by any other pins.
1053 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1055 int dev_id, int mux_idx)
1057 struct hdmi_spec *spec = codec->spec;
1060 struct hdmi_spec_per_cvt *per_cvt;
1061 struct hdmi_spec_per_pin *per_pin;
1064 /* configure the pins connections */
1065 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1069 per_pin = get_pin(spec, pin_idx);
1071 * pin not connected to monitor
1072 * no need to operate on it
1077 if ((per_pin->pin_nid == pin_nid) &&
1078 (per_pin->dev_id == dev_id))
1082 * if per_pin->dev_id >= dev_num,
1083 * snd_hda_get_dev_select() will fail,
1084 * and the following operation is unpredictable.
1085 * So skip this situation.
1087 dev_num = snd_hda_get_num_devices(codec, per_pin->pin_nid) + 1;
1088 if (per_pin->dev_id >= dev_num)
1091 nid = per_pin->pin_nid;
1094 * Calling this function should not impact
1095 * on the device entry selection
1096 * So let's save the dev id for each pin,
1097 * and restore it when return
1099 dev_id_saved = snd_hda_get_dev_select(codec, nid);
1100 snd_hda_set_dev_select(codec, nid, per_pin->dev_id);
1101 curr = snd_hda_codec_read(codec, nid, 0,
1102 AC_VERB_GET_CONNECT_SEL, 0);
1103 if (curr != mux_idx) {
1104 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1109 /* choose an unassigned converter. The conveters in the
1110 * connection list are in the same order as in the codec.
1112 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1113 per_cvt = get_cvt(spec, cvt_idx);
1114 if (!per_cvt->assigned) {
1116 "choose cvt %d for pin nid %d\n",
1118 snd_hda_codec_write_cache(codec, nid, 0,
1119 AC_VERB_SET_CONNECT_SEL,
1124 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1128 /* A wrapper of intel_not_share_asigned_cvt() */
1129 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1130 hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid)
1133 struct hdmi_spec *spec = codec->spec;
1135 /* On Intel platform, the mapping of converter nid to
1136 * mux index of the pins are always the same.
1137 * The pin nid may be 0, this means all pins will not
1138 * share the converter.
1140 mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1142 intel_not_share_assigned_cvt(codec, pin_nid, dev_id, mux_idx);
1145 /* skeleton caller of pin_cvt_fixup ops */
1146 static void pin_cvt_fixup(struct hda_codec *codec,
1147 struct hdmi_spec_per_pin *per_pin,
1150 struct hdmi_spec *spec = codec->spec;
1152 if (spec->ops.pin_cvt_fixup)
1153 spec->ops.pin_cvt_fixup(codec, per_pin, cvt_nid);
1156 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1157 * in dyn_pcm_assign mode.
1159 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1160 struct hda_codec *codec,
1161 struct snd_pcm_substream *substream)
1163 struct hdmi_spec *spec = codec->spec;
1164 struct snd_pcm_runtime *runtime = substream->runtime;
1165 int cvt_idx, pcm_idx;
1166 struct hdmi_spec_per_cvt *per_cvt = NULL;
1169 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1173 err = hdmi_choose_cvt(codec, -1, &cvt_idx);
1177 per_cvt = get_cvt(spec, cvt_idx);
1178 per_cvt->assigned = 1;
1179 hinfo->nid = per_cvt->cvt_nid;
1181 pin_cvt_fixup(codec, NULL, per_cvt->cvt_nid);
1183 set_bit(pcm_idx, &spec->pcm_in_use);
1184 /* todo: setup spdif ctls assign */
1186 /* Initially set the converter's capabilities */
1187 hinfo->channels_min = per_cvt->channels_min;
1188 hinfo->channels_max = per_cvt->channels_max;
1189 hinfo->rates = per_cvt->rates;
1190 hinfo->formats = per_cvt->formats;
1191 hinfo->maxbps = per_cvt->maxbps;
1193 /* Store the updated parameters */
1194 runtime->hw.channels_min = hinfo->channels_min;
1195 runtime->hw.channels_max = hinfo->channels_max;
1196 runtime->hw.formats = hinfo->formats;
1197 runtime->hw.rates = hinfo->rates;
1199 snd_pcm_hw_constraint_step(substream->runtime, 0,
1200 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1207 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1208 struct hda_codec *codec,
1209 struct snd_pcm_substream *substream)
1211 struct hdmi_spec *spec = codec->spec;
1212 struct snd_pcm_runtime *runtime = substream->runtime;
1213 int pin_idx, cvt_idx, pcm_idx;
1214 struct hdmi_spec_per_pin *per_pin;
1215 struct hdmi_eld *eld;
1216 struct hdmi_spec_per_cvt *per_cvt = NULL;
1219 /* Validate hinfo */
1220 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1224 mutex_lock(&spec->pcm_lock);
1225 pin_idx = hinfo_to_pin_index(codec, hinfo);
1226 if (!spec->dyn_pcm_assign) {
1227 if (snd_BUG_ON(pin_idx < 0)) {
1232 /* no pin is assigned to the PCM
1233 * PA need pcm open successfully when probe
1236 err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1241 err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1245 per_cvt = get_cvt(spec, cvt_idx);
1246 /* Claim converter */
1247 per_cvt->assigned = 1;
1249 set_bit(pcm_idx, &spec->pcm_in_use);
1250 per_pin = get_pin(spec, pin_idx);
1251 per_pin->cvt_nid = per_cvt->cvt_nid;
1252 hinfo->nid = per_cvt->cvt_nid;
1254 /* flip stripe flag for the assigned stream if supported */
1255 if (get_wcaps(codec, per_cvt->cvt_nid) & AC_WCAP_STRIPE)
1256 azx_stream(get_azx_dev(substream))->stripe = 1;
1258 snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1259 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1260 AC_VERB_SET_CONNECT_SEL,
1263 /* configure unused pins to choose other converters */
1264 pin_cvt_fixup(codec, per_pin, 0);
1266 snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1268 /* Initially set the converter's capabilities */
1269 hinfo->channels_min = per_cvt->channels_min;
1270 hinfo->channels_max = per_cvt->channels_max;
1271 hinfo->rates = per_cvt->rates;
1272 hinfo->formats = per_cvt->formats;
1273 hinfo->maxbps = per_cvt->maxbps;
1275 eld = &per_pin->sink_eld;
1276 /* Restrict capabilities by ELD if this isn't disabled */
1277 if (!static_hdmi_pcm && eld->eld_valid) {
1278 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1279 if (hinfo->channels_min > hinfo->channels_max ||
1280 !hinfo->rates || !hinfo->formats) {
1281 per_cvt->assigned = 0;
1283 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1289 /* Store the updated parameters */
1290 runtime->hw.channels_min = hinfo->channels_min;
1291 runtime->hw.channels_max = hinfo->channels_max;
1292 runtime->hw.formats = hinfo->formats;
1293 runtime->hw.rates = hinfo->rates;
1295 snd_pcm_hw_constraint_step(substream->runtime, 0,
1296 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1298 mutex_unlock(&spec->pcm_lock);
1303 * HDA/HDMI auto parsing
1305 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1307 struct hdmi_spec *spec = codec->spec;
1308 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1309 hda_nid_t pin_nid = per_pin->pin_nid;
1310 int dev_id = per_pin->dev_id;
1313 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1315 "HDMI: pin %d wcaps %#x does not support connection list\n",
1316 pin_nid, get_wcaps(codec, pin_nid));
1320 snd_hda_set_dev_select(codec, pin_nid, dev_id);
1322 if (spec->intel_hsw_fixup) {
1323 conns = spec->num_cvts;
1324 memcpy(per_pin->mux_nids, spec->cvt_nids,
1325 sizeof(hda_nid_t) * conns);
1327 conns = snd_hda_get_raw_connections(codec, pin_nid,
1329 HDA_MAX_CONNECTIONS);
1332 /* all the device entries on the same pin have the same conn list */
1333 per_pin->num_mux_nids = conns;
1338 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1339 struct hdmi_spec_per_pin *per_pin)
1344 * generic_hdmi_build_pcms() may allocate extra PCMs on some
1345 * platforms (with maximum of 'num_nids + dev_num - 1')
1347 * The per_pin of pin_nid_idx=n and dev_id=m prefers to get pcm-n
1348 * if m==0. This guarantees that dynamic pcm assignments are compatible
1349 * with the legacy static per_pin-pcm assignment that existed in the
1350 * days before DP-MST.
1352 * Intel DP-MST prefers this legacy behavior for compatibility, too.
1354 * per_pin of m!=0 prefers to get pcm=(num_nids + (m - 1)).
1357 if (per_pin->dev_id == 0 || spec->intel_hsw_fixup) {
1358 if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1359 return per_pin->pin_nid_idx;
1361 i = spec->num_nids + (per_pin->dev_id - 1);
1362 if (i < spec->pcm_used && !(test_bit(i, &spec->pcm_bitmap)))
1366 /* have a second try; check the area over num_nids */
1367 for (i = spec->num_nids; i < spec->pcm_used; i++) {
1368 if (!test_bit(i, &spec->pcm_bitmap))
1372 /* the last try; check the empty slots in pins */
1373 for (i = 0; i < spec->num_nids; i++) {
1374 if (!test_bit(i, &spec->pcm_bitmap))
1380 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1381 struct hdmi_spec_per_pin *per_pin)
1385 /* pcm already be attached to the pin */
1388 idx = hdmi_find_pcm_slot(spec, per_pin);
1391 per_pin->pcm_idx = idx;
1392 per_pin->pcm = get_hdmi_pcm(spec, idx);
1393 set_bit(idx, &spec->pcm_bitmap);
1396 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1397 struct hdmi_spec_per_pin *per_pin)
1401 /* pcm already be detached from the pin */
1404 idx = per_pin->pcm_idx;
1405 per_pin->pcm_idx = -1;
1406 per_pin->pcm = NULL;
1407 if (idx >= 0 && idx < spec->pcm_used)
1408 clear_bit(idx, &spec->pcm_bitmap);
1411 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1412 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1416 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1417 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1422 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1424 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1425 struct hdmi_spec_per_pin *per_pin)
1427 struct hda_codec *codec = per_pin->codec;
1428 struct hda_pcm *pcm;
1429 struct hda_pcm_stream *hinfo;
1430 struct snd_pcm_substream *substream;
1434 if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1435 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1440 if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1443 /* hdmi audio only uses playback and one substream */
1444 hinfo = pcm->stream;
1445 substream = pcm->pcm->streams[0].substream;
1447 per_pin->cvt_nid = hinfo->nid;
1449 mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1450 if (mux_idx < per_pin->num_mux_nids) {
1451 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1453 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1454 AC_VERB_SET_CONNECT_SEL,
1457 snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1459 non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1460 if (substream->runtime)
1461 per_pin->channels = substream->runtime->channels;
1462 per_pin->setup = true;
1463 per_pin->mux_idx = mux_idx;
1465 hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1468 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1469 struct hdmi_spec_per_pin *per_pin)
1471 if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1472 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1474 per_pin->chmap_set = false;
1475 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1477 per_pin->setup = false;
1478 per_pin->channels = 0;
1481 static struct snd_jack *pin_idx_to_pcm_jack(struct hda_codec *codec,
1482 struct hdmi_spec_per_pin *per_pin)
1484 struct hdmi_spec *spec = codec->spec;
1486 if (per_pin->pcm_idx >= 0)
1487 return spec->pcm_rec[per_pin->pcm_idx].jack;
1492 /* update per_pin ELD from the given new ELD;
1493 * setup info frame and notification accordingly
1494 * also notify ELD kctl and report jack status changes
1496 static void update_eld(struct hda_codec *codec,
1497 struct hdmi_spec_per_pin *per_pin,
1498 struct hdmi_eld *eld,
1501 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1502 struct hdmi_spec *spec = codec->spec;
1503 struct snd_jack *pcm_jack;
1504 bool old_eld_valid = pin_eld->eld_valid;
1508 if (eld->eld_valid) {
1509 if (eld->eld_size <= 0 ||
1510 snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1511 eld->eld_size) < 0) {
1512 eld->eld_valid = false;
1514 schedule_delayed_work(&per_pin->work,
1515 msecs_to_jiffies(300));
1521 if (!eld->eld_valid || eld->eld_size <= 0) {
1522 eld->eld_valid = false;
1526 /* for monitor disconnection, save pcm_idx firstly */
1527 pcm_idx = per_pin->pcm_idx;
1530 * pcm_idx >=0 before update_eld() means it is in monitor
1531 * disconnected event. Jack must be fetched before update_eld().
1533 pcm_jack = pin_idx_to_pcm_jack(codec, per_pin);
1535 if (spec->dyn_pcm_assign) {
1536 if (eld->eld_valid) {
1537 hdmi_attach_hda_pcm(spec, per_pin);
1538 hdmi_pcm_setup_pin(spec, per_pin);
1540 hdmi_pcm_reset_pin(spec, per_pin);
1541 hdmi_detach_hda_pcm(spec, per_pin);
1544 /* if pcm_idx == -1, it means this is in monitor connection event
1545 * we can get the correct pcm_idx now.
1548 pcm_idx = per_pin->pcm_idx;
1550 pcm_jack = pin_idx_to_pcm_jack(codec, per_pin);
1553 snd_hdmi_show_eld(codec, &eld->info);
1555 eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1556 eld_changed |= (pin_eld->monitor_present != eld->monitor_present);
1557 if (!eld_changed && eld->eld_valid && pin_eld->eld_valid)
1558 if (pin_eld->eld_size != eld->eld_size ||
1559 memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1560 eld->eld_size) != 0)
1564 pin_eld->monitor_present = eld->monitor_present;
1565 pin_eld->eld_valid = eld->eld_valid;
1566 pin_eld->eld_size = eld->eld_size;
1568 memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1570 pin_eld->info = eld->info;
1574 * Re-setup pin and infoframe. This is needed e.g. when
1575 * - sink is first plugged-in
1576 * - transcoder can change during stream playback on Haswell
1577 * and this can make HW reset converter selection on a pin.
1579 if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1580 pin_cvt_fixup(codec, per_pin, 0);
1581 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1584 if (eld_changed && pcm_idx >= 0)
1585 snd_ctl_notify(codec->card,
1586 SNDRV_CTL_EVENT_MASK_VALUE |
1587 SNDRV_CTL_EVENT_MASK_INFO,
1588 &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1590 if (eld_changed && pcm_jack)
1591 snd_jack_report(pcm_jack,
1592 (eld->monitor_present && eld->eld_valid) ?
1593 SND_JACK_AVOUT : 0);
1596 /* update ELD and jack state via HD-audio verbs */
1597 static void hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1600 struct hda_codec *codec = per_pin->codec;
1601 struct hdmi_spec *spec = codec->spec;
1602 struct hdmi_eld *eld = &spec->temp_eld;
1603 hda_nid_t pin_nid = per_pin->pin_nid;
1604 int dev_id = per_pin->dev_id;
1606 * Always execute a GetPinSense verb here, even when called from
1607 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1608 * response's PD bit is not the real PD value, but indicates that
1609 * the real PD value changed. An older version of the HD-audio
1610 * specification worked this way. Hence, we just ignore the data in
1611 * the unsolicited response to avoid custom WARs.
1616 ret = snd_hda_power_up_pm(codec);
1617 if (ret < 0 && pm_runtime_suspended(hda_codec_dev(codec)))
1620 present = snd_hda_jack_pin_sense(codec, pin_nid, dev_id);
1622 mutex_lock(&per_pin->lock);
1623 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1624 if (eld->monitor_present)
1625 eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
1627 eld->eld_valid = false;
1630 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1631 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
1633 if (eld->eld_valid) {
1634 if (spec->ops.pin_get_eld(codec, pin_nid, dev_id,
1635 eld->eld_buffer, &eld->eld_size) < 0)
1636 eld->eld_valid = false;
1639 update_eld(codec, per_pin, eld, repoll);
1640 mutex_unlock(&per_pin->lock);
1642 snd_hda_power_down_pm(codec);
1645 static void silent_stream_enable(struct hda_codec *codec,
1646 struct hdmi_spec_per_pin *per_pin)
1648 unsigned int newval, oldval;
1650 codec_dbg(codec, "hdmi: enabling silent stream for NID %d\n",
1653 mutex_lock(&per_pin->lock);
1655 if (!per_pin->channels)
1656 per_pin->channels = 2;
1658 oldval = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1659 AC_VERB_GET_CONV, 0);
1660 newval = (oldval & 0xF0) | 0xF;
1661 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1662 AC_VERB_SET_CHANNEL_STREAMID, newval);
1664 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1666 mutex_unlock(&per_pin->lock);
1669 /* update ELD and jack state via audio component */
1670 static void sync_eld_via_acomp(struct hda_codec *codec,
1671 struct hdmi_spec_per_pin *per_pin)
1673 struct hdmi_spec *spec = codec->spec;
1674 struct hdmi_eld *eld = &spec->temp_eld;
1675 bool monitor_prev, monitor_next;
1677 mutex_lock(&per_pin->lock);
1678 eld->monitor_present = false;
1679 monitor_prev = per_pin->sink_eld.monitor_present;
1680 eld->eld_size = snd_hdac_acomp_get_eld(&codec->core, per_pin->pin_nid,
1681 per_pin->dev_id, &eld->monitor_present,
1682 eld->eld_buffer, ELD_MAX_SIZE);
1683 eld->eld_valid = (eld->eld_size > 0);
1684 update_eld(codec, per_pin, eld, 0);
1685 monitor_next = per_pin->sink_eld.monitor_present;
1686 mutex_unlock(&per_pin->lock);
1689 * Power-up will call hdmi_present_sense, so the PM calls
1690 * have to be done without mutex held.
1693 if (spec->send_silent_stream) {
1696 if (!monitor_prev && monitor_next) {
1697 pm_ret = snd_hda_power_up_pm(codec);
1700 "Monitor plugged-in, Failed to power up codec ret=[%d]\n",
1702 silent_stream_enable(codec, per_pin);
1703 } else if (monitor_prev && !monitor_next) {
1704 pm_ret = snd_hda_power_down_pm(codec);
1707 "Monitor plugged-out, Failed to power down codec ret=[%d]\n",
1713 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1715 struct hda_codec *codec = per_pin->codec;
1717 if (!codec_has_acomp(codec))
1718 hdmi_present_sense_via_verbs(per_pin, repoll);
1720 sync_eld_via_acomp(codec, per_pin);
1723 static void hdmi_repoll_eld(struct work_struct *work)
1725 struct hdmi_spec_per_pin *per_pin =
1726 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1727 struct hda_codec *codec = per_pin->codec;
1728 struct hdmi_spec *spec = codec->spec;
1729 struct hda_jack_tbl *jack;
1731 jack = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid,
1734 jack->jack_dirty = 1;
1736 if (per_pin->repoll_count++ > 6)
1737 per_pin->repoll_count = 0;
1739 mutex_lock(&spec->pcm_lock);
1740 hdmi_present_sense(per_pin, per_pin->repoll_count);
1741 mutex_unlock(&spec->pcm_lock);
1744 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1746 struct hdmi_spec *spec = codec->spec;
1747 unsigned int caps, config;
1749 struct hdmi_spec_per_pin *per_pin;
1753 caps = snd_hda_query_pin_caps(codec, pin_nid);
1754 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1758 * For DP MST audio, Configuration Default is the same for
1759 * all device entries on the same pin
1761 config = snd_hda_codec_get_pincfg(codec, pin_nid);
1762 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE &&
1763 !spec->force_connect)
1767 * To simplify the implementation, malloc all
1768 * the virtual pins in the initialization statically
1770 if (spec->intel_hsw_fixup) {
1772 * On Intel platforms, device entries number is
1773 * changed dynamically. If there is a DP MST
1774 * hub connected, the device entries number is 3.
1775 * Otherwise, it is 1.
1776 * Here we manually set dev_num to 3, so that
1777 * we can initialize all the device entries when
1778 * bootup statically.
1782 } else if (spec->dyn_pcm_assign && codec->dp_mst) {
1783 dev_num = snd_hda_get_num_devices(codec, pin_nid) + 1;
1785 * spec->dev_num is the maxinum number of device entries
1786 * among all the pins
1788 spec->dev_num = (spec->dev_num > dev_num) ?
1789 spec->dev_num : dev_num;
1792 * If the platform doesn't support DP MST,
1793 * manually set dev_num to 1. This means
1794 * the pin has only one device entry.
1800 for (i = 0; i < dev_num; i++) {
1801 pin_idx = spec->num_pins;
1802 per_pin = snd_array_new(&spec->pins);
1807 if (spec->dyn_pcm_assign) {
1808 per_pin->pcm = NULL;
1809 per_pin->pcm_idx = -1;
1811 per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1812 per_pin->pcm_idx = pin_idx;
1814 per_pin->pin_nid = pin_nid;
1815 per_pin->pin_nid_idx = spec->num_nids;
1816 per_pin->dev_id = i;
1817 per_pin->non_pcm = false;
1818 snd_hda_set_dev_select(codec, pin_nid, i);
1819 err = hdmi_read_pin_conn(codec, pin_idx);
1829 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1831 struct hdmi_spec *spec = codec->spec;
1832 struct hdmi_spec_per_cvt *per_cvt;
1836 chans = get_wcaps(codec, cvt_nid);
1837 chans = get_wcaps_channels(chans);
1839 per_cvt = snd_array_new(&spec->cvts);
1843 per_cvt->cvt_nid = cvt_nid;
1844 per_cvt->channels_min = 2;
1846 per_cvt->channels_max = chans;
1847 if (chans > spec->chmap.channels_max)
1848 spec->chmap.channels_max = chans;
1851 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1858 if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1859 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1865 static const struct snd_pci_quirk force_connect_list[] = {
1866 SND_PCI_QUIRK(0x103c, 0x870f, "HP", 1),
1867 SND_PCI_QUIRK(0x103c, 0x871a, "HP", 1),
1871 static int hdmi_parse_codec(struct hda_codec *codec)
1873 struct hdmi_spec *spec = codec->spec;
1874 hda_nid_t start_nid;
1877 const struct snd_pci_quirk *q;
1879 nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &start_nid);
1880 if (!start_nid || nodes < 0) {
1881 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1885 q = snd_pci_quirk_lookup(codec->bus->pci, force_connect_list);
1888 spec->force_connect = true;
1891 * hdmi_add_pin() assumes total amount of converters to
1892 * be known, so first discover all converters
1894 for (i = 0; i < nodes; i++) {
1895 hda_nid_t nid = start_nid + i;
1897 caps = get_wcaps(codec, nid);
1899 if (!(caps & AC_WCAP_DIGITAL))
1902 if (get_wcaps_type(caps) == AC_WID_AUD_OUT)
1903 hdmi_add_cvt(codec, nid);
1906 /* discover audio pins */
1907 for (i = 0; i < nodes; i++) {
1908 hda_nid_t nid = start_nid + i;
1910 caps = get_wcaps(codec, nid);
1912 if (!(caps & AC_WCAP_DIGITAL))
1915 if (get_wcaps_type(caps) == AC_WID_PIN)
1916 hdmi_add_pin(codec, nid);
1924 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1926 struct hda_spdif_out *spdif;
1929 mutex_lock(&codec->spdif_mutex);
1930 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1931 /* Add sanity check to pass klockwork check.
1932 * This should never happen.
1934 if (WARN_ON(spdif == NULL)) {
1935 mutex_unlock(&codec->spdif_mutex);
1938 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1939 mutex_unlock(&codec->spdif_mutex);
1947 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1948 struct hda_codec *codec,
1949 unsigned int stream_tag,
1950 unsigned int format,
1951 struct snd_pcm_substream *substream)
1953 hda_nid_t cvt_nid = hinfo->nid;
1954 struct hdmi_spec *spec = codec->spec;
1956 struct hdmi_spec_per_pin *per_pin;
1957 struct snd_pcm_runtime *runtime = substream->runtime;
1962 mutex_lock(&spec->pcm_lock);
1963 pin_idx = hinfo_to_pin_index(codec, hinfo);
1964 if (spec->dyn_pcm_assign && pin_idx < 0) {
1965 /* when dyn_pcm_assign and pcm is not bound to a pin
1966 * skip pin setup and return 0 to make audio playback
1969 pin_cvt_fixup(codec, NULL, cvt_nid);
1970 snd_hda_codec_setup_stream(codec, cvt_nid,
1971 stream_tag, 0, format);
1975 if (snd_BUG_ON(pin_idx < 0)) {
1979 per_pin = get_pin(spec, pin_idx);
1981 /* Verify pin:cvt selections to avoid silent audio after S3.
1982 * After S3, the audio driver restores pin:cvt selections
1983 * but this can happen before gfx is ready and such selection
1984 * is overlooked by HW. Thus multiple pins can share a same
1985 * default convertor and mute control will affect each other,
1986 * which can cause a resumed audio playback become silent
1989 pin_cvt_fixup(codec, per_pin, 0);
1991 /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1992 /* Todo: add DP1.2 MST audio support later */
1993 if (codec_has_acomp(codec))
1994 snd_hdac_sync_audio_rate(&codec->core, per_pin->pin_nid,
1995 per_pin->dev_id, runtime->rate);
1997 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1998 mutex_lock(&per_pin->lock);
1999 per_pin->channels = substream->runtime->channels;
2000 per_pin->setup = true;
2002 if (get_wcaps(codec, cvt_nid) & AC_WCAP_STRIPE) {
2003 stripe = snd_hdac_get_stream_stripe_ctl(&codec->bus->core,
2005 snd_hda_codec_write(codec, cvt_nid, 0,
2006 AC_VERB_SET_STRIPE_CONTROL,
2010 hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
2011 mutex_unlock(&per_pin->lock);
2012 if (spec->dyn_pin_out) {
2013 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2015 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2016 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2017 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2018 AC_VERB_SET_PIN_WIDGET_CONTROL,
2022 /* snd_hda_set_dev_select() has been called before */
2023 err = spec->ops.setup_stream(codec, cvt_nid, per_pin->pin_nid,
2024 per_pin->dev_id, stream_tag, format);
2026 mutex_unlock(&spec->pcm_lock);
2030 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2031 struct hda_codec *codec,
2032 struct snd_pcm_substream *substream)
2034 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
2038 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
2039 struct hda_codec *codec,
2040 struct snd_pcm_substream *substream)
2042 struct hdmi_spec *spec = codec->spec;
2043 int cvt_idx, pin_idx, pcm_idx;
2044 struct hdmi_spec_per_cvt *per_cvt;
2045 struct hdmi_spec_per_pin *per_pin;
2050 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
2051 if (snd_BUG_ON(pcm_idx < 0))
2053 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
2054 if (snd_BUG_ON(cvt_idx < 0))
2056 per_cvt = get_cvt(spec, cvt_idx);
2058 snd_BUG_ON(!per_cvt->assigned);
2059 per_cvt->assigned = 0;
2062 azx_stream(get_azx_dev(substream))->stripe = 0;
2064 mutex_lock(&spec->pcm_lock);
2065 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2066 clear_bit(pcm_idx, &spec->pcm_in_use);
2067 pin_idx = hinfo_to_pin_index(codec, hinfo);
2068 if (spec->dyn_pcm_assign && pin_idx < 0)
2071 if (snd_BUG_ON(pin_idx < 0)) {
2075 per_pin = get_pin(spec, pin_idx);
2077 if (spec->dyn_pin_out) {
2078 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2080 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2081 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2082 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2083 AC_VERB_SET_PIN_WIDGET_CONTROL,
2087 mutex_lock(&per_pin->lock);
2088 per_pin->chmap_set = false;
2089 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
2091 per_pin->setup = false;
2092 per_pin->channels = 0;
2093 mutex_unlock(&per_pin->lock);
2095 mutex_unlock(&spec->pcm_lock);
2101 static const struct hda_pcm_ops generic_ops = {
2102 .open = hdmi_pcm_open,
2103 .close = hdmi_pcm_close,
2104 .prepare = generic_hdmi_playback_pcm_prepare,
2105 .cleanup = generic_hdmi_playback_pcm_cleanup,
2108 static int hdmi_get_spk_alloc(struct hdac_device *hdac, int pcm_idx)
2110 struct hda_codec *codec = hdac_to_hda_codec(hdac);
2111 struct hdmi_spec *spec = codec->spec;
2112 struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2117 return per_pin->sink_eld.info.spk_alloc;
2120 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
2121 unsigned char *chmap)
2123 struct hda_codec *codec = hdac_to_hda_codec(hdac);
2124 struct hdmi_spec *spec = codec->spec;
2125 struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2127 /* chmap is already set to 0 in caller */
2131 memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
2134 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
2135 unsigned char *chmap, int prepared)
2137 struct hda_codec *codec = hdac_to_hda_codec(hdac);
2138 struct hdmi_spec *spec = codec->spec;
2139 struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2143 mutex_lock(&per_pin->lock);
2144 per_pin->chmap_set = true;
2145 memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
2147 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2148 mutex_unlock(&per_pin->lock);
2151 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
2153 struct hda_codec *codec = hdac_to_hda_codec(hdac);
2154 struct hdmi_spec *spec = codec->spec;
2155 struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2157 return per_pin ? true:false;
2160 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2162 struct hdmi_spec *spec = codec->spec;
2166 * for non-mst mode, pcm number is the same as before
2167 * for DP MST mode without extra PCM, pcm number is same
2168 * for DP MST mode with extra PCMs, pcm number is
2169 * (nid number + dev_num - 1)
2170 * dev_num is the device entry number in a pin
2173 if (codec->mst_no_extra_pcms)
2174 pcm_num = spec->num_nids;
2176 pcm_num = spec->num_nids + spec->dev_num - 1;
2178 codec_dbg(codec, "hdmi: pcm_num set to %d\n", pcm_num);
2180 for (idx = 0; idx < pcm_num; idx++) {
2181 struct hda_pcm *info;
2182 struct hda_pcm_stream *pstr;
2184 info = snd_hda_codec_pcm_new(codec, "HDMI %d", idx);
2188 spec->pcm_rec[idx].pcm = info;
2190 info->pcm_type = HDA_PCM_TYPE_HDMI;
2191 info->own_chmap = true;
2193 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2194 pstr->substreams = 1;
2195 pstr->ops = generic_ops;
2196 /* pcm number is less than 16 */
2197 if (spec->pcm_used >= 16)
2199 /* other pstr fields are set in open */
2205 static void free_hdmi_jack_priv(struct snd_jack *jack)
2207 struct hdmi_pcm *pcm = jack->private_data;
2212 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2214 char hdmi_str[32] = "HDMI/DP";
2215 struct hdmi_spec *spec = codec->spec;
2216 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pcm_idx);
2217 struct snd_jack *jack;
2218 int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2222 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2223 if (!spec->dyn_pcm_assign &&
2224 !is_jack_detectable(codec, per_pin->pin_nid))
2225 strncat(hdmi_str, " Phantom",
2226 sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2228 err = snd_jack_new(codec->card, hdmi_str, SND_JACK_AVOUT, &jack,
2233 spec->pcm_rec[pcm_idx].jack = jack;
2234 jack->private_data = &spec->pcm_rec[pcm_idx];
2235 jack->private_free = free_hdmi_jack_priv;
2239 static int generic_hdmi_build_controls(struct hda_codec *codec)
2241 struct hdmi_spec *spec = codec->spec;
2243 int pin_idx, pcm_idx;
2245 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2246 if (!get_pcm_rec(spec, pcm_idx)->pcm) {
2247 /* no PCM: mark this for skipping permanently */
2248 set_bit(pcm_idx, &spec->pcm_bitmap);
2252 err = generic_hdmi_build_jack(codec, pcm_idx);
2256 /* create the spdif for each pcm
2257 * pin will be bound when monitor is connected
2259 if (spec->dyn_pcm_assign)
2260 err = snd_hda_create_dig_out_ctls(codec,
2261 0, spec->cvt_nids[0],
2264 struct hdmi_spec_per_pin *per_pin =
2265 get_pin(spec, pcm_idx);
2266 err = snd_hda_create_dig_out_ctls(codec,
2268 per_pin->mux_nids[0],
2273 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2275 dev = get_pcm_rec(spec, pcm_idx)->device;
2276 if (dev != SNDRV_PCM_INVALID_DEVICE) {
2277 /* add control for ELD Bytes */
2278 err = hdmi_create_eld_ctl(codec, pcm_idx, dev);
2284 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2285 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2286 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
2288 pin_eld->eld_valid = false;
2289 hdmi_present_sense(per_pin, 0);
2292 /* add channel maps */
2293 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2294 struct hda_pcm *pcm;
2296 pcm = get_pcm_rec(spec, pcm_idx);
2297 if (!pcm || !pcm->pcm)
2299 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2307 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2309 struct hdmi_spec *spec = codec->spec;
2312 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2313 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2315 per_pin->codec = codec;
2316 mutex_init(&per_pin->lock);
2317 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2318 eld_proc_new(per_pin, pin_idx);
2323 static int generic_hdmi_init(struct hda_codec *codec)
2325 struct hdmi_spec *spec = codec->spec;
2328 mutex_lock(&spec->bind_lock);
2329 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2330 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2331 hda_nid_t pin_nid = per_pin->pin_nid;
2332 int dev_id = per_pin->dev_id;
2334 snd_hda_set_dev_select(codec, pin_nid, dev_id);
2335 hdmi_init_pin(codec, pin_nid);
2336 if (codec_has_acomp(codec))
2338 snd_hda_jack_detect_enable_callback_mst(codec, pin_nid, dev_id,
2341 mutex_unlock(&spec->bind_lock);
2345 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2347 snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2348 snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2351 static void hdmi_array_free(struct hdmi_spec *spec)
2353 snd_array_free(&spec->pins);
2354 snd_array_free(&spec->cvts);
2357 static void generic_spec_free(struct hda_codec *codec)
2359 struct hdmi_spec *spec = codec->spec;
2362 hdmi_array_free(spec);
2366 codec->dp_mst = false;
2369 static void generic_hdmi_free(struct hda_codec *codec)
2371 struct hdmi_spec *spec = codec->spec;
2372 int pin_idx, pcm_idx;
2374 if (spec->acomp_registered) {
2375 snd_hdac_acomp_exit(&codec->bus->core);
2376 } else if (codec_has_acomp(codec)) {
2377 snd_hdac_acomp_register_notifier(&codec->bus->core, NULL);
2379 codec->relaxed_resume = 0;
2381 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2382 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2383 cancel_delayed_work_sync(&per_pin->work);
2384 eld_proc_free(per_pin);
2387 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2388 if (spec->pcm_rec[pcm_idx].jack == NULL)
2390 if (spec->dyn_pcm_assign)
2391 snd_device_free(codec->card,
2392 spec->pcm_rec[pcm_idx].jack);
2394 spec->pcm_rec[pcm_idx].jack = NULL;
2397 generic_spec_free(codec);
2401 static int generic_hdmi_resume(struct hda_codec *codec)
2403 struct hdmi_spec *spec = codec->spec;
2406 codec->patch_ops.init(codec);
2407 snd_hda_regmap_sync(codec);
2409 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2410 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2411 hdmi_present_sense(per_pin, 1);
2417 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2418 .init = generic_hdmi_init,
2419 .free = generic_hdmi_free,
2420 .build_pcms = generic_hdmi_build_pcms,
2421 .build_controls = generic_hdmi_build_controls,
2422 .unsol_event = hdmi_unsol_event,
2424 .resume = generic_hdmi_resume,
2428 static const struct hdmi_ops generic_standard_hdmi_ops = {
2429 .pin_get_eld = hdmi_pin_get_eld,
2430 .pin_setup_infoframe = hdmi_pin_setup_infoframe,
2431 .pin_hbr_setup = hdmi_pin_hbr_setup,
2432 .setup_stream = hdmi_setup_stream,
2435 /* allocate codec->spec and assign/initialize generic parser ops */
2436 static int alloc_generic_hdmi(struct hda_codec *codec)
2438 struct hdmi_spec *spec;
2440 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2444 spec->codec = codec;
2445 spec->ops = generic_standard_hdmi_ops;
2446 spec->dev_num = 1; /* initialize to 1 */
2447 mutex_init(&spec->pcm_lock);
2448 mutex_init(&spec->bind_lock);
2449 snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2451 spec->chmap.ops.get_chmap = hdmi_get_chmap;
2452 spec->chmap.ops.set_chmap = hdmi_set_chmap;
2453 spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2454 spec->chmap.ops.get_spk_alloc = hdmi_get_spk_alloc,
2457 hdmi_array_init(spec, 4);
2459 codec->patch_ops = generic_hdmi_patch_ops;
2464 /* generic HDMI parser */
2465 static int patch_generic_hdmi(struct hda_codec *codec)
2469 err = alloc_generic_hdmi(codec);
2473 err = hdmi_parse_codec(codec);
2475 generic_spec_free(codec);
2479 generic_hdmi_init_per_pins(codec);
2484 * generic audio component binding
2487 /* turn on / off the unsol event jack detection dynamically */
2488 static void reprogram_jack_detect(struct hda_codec *codec, hda_nid_t nid,
2489 int dev_id, bool use_acomp)
2491 struct hda_jack_tbl *tbl;
2493 tbl = snd_hda_jack_tbl_get_mst(codec, nid, dev_id);
2495 /* clear unsol even if component notifier is used, or re-enable
2496 * if notifier is cleared
2498 unsigned int val = use_acomp ? 0 : (AC_USRSP_EN | tbl->tag);
2499 snd_hda_codec_write_cache(codec, nid, 0,
2500 AC_VERB_SET_UNSOLICITED_ENABLE, val);
2504 /* set up / clear component notifier dynamically */
2505 static void generic_acomp_notifier_set(struct drm_audio_component *acomp,
2508 struct hdmi_spec *spec;
2511 spec = container_of(acomp->audio_ops, struct hdmi_spec, drm_audio_ops);
2512 mutex_lock(&spec->bind_lock);
2513 spec->use_acomp_notifier = use_acomp;
2514 spec->codec->relaxed_resume = use_acomp;
2515 spec->codec->bus->keep_power = 0;
2516 /* reprogram each jack detection logic depending on the notifier */
2517 for (i = 0; i < spec->num_pins; i++)
2518 reprogram_jack_detect(spec->codec,
2519 get_pin(spec, i)->pin_nid,
2520 get_pin(spec, i)->dev_id,
2522 mutex_unlock(&spec->bind_lock);
2525 /* enable / disable the notifier via master bind / unbind */
2526 static int generic_acomp_master_bind(struct device *dev,
2527 struct drm_audio_component *acomp)
2529 generic_acomp_notifier_set(acomp, true);
2533 static void generic_acomp_master_unbind(struct device *dev,
2534 struct drm_audio_component *acomp)
2536 generic_acomp_notifier_set(acomp, false);
2539 /* check whether both HD-audio and DRM PCI devices belong to the same bus */
2540 static int match_bound_vga(struct device *dev, int subtype, void *data)
2542 struct hdac_bus *bus = data;
2543 struct pci_dev *pci, *master;
2545 if (!dev_is_pci(dev) || !dev_is_pci(bus->dev))
2547 master = to_pci_dev(bus->dev);
2548 pci = to_pci_dev(dev);
2549 return master->bus == pci->bus;
2552 /* audio component notifier for AMD/Nvidia HDMI codecs */
2553 static void generic_acomp_pin_eld_notify(void *audio_ptr, int port, int dev_id)
2555 struct hda_codec *codec = audio_ptr;
2556 struct hdmi_spec *spec = codec->spec;
2557 hda_nid_t pin_nid = spec->port2pin(codec, port);
2561 if (get_wcaps_type(get_wcaps(codec, pin_nid)) != AC_WID_PIN)
2563 /* skip notification during system suspend (but not in runtime PM);
2564 * the state will be updated at resume
2566 if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2568 /* ditto during suspend/resume process itself */
2569 if (snd_hdac_is_in_pm(&codec->core))
2572 check_presence_and_report(codec, pin_nid, dev_id);
2575 /* set up the private drm_audio_ops from the template */
2576 static void setup_drm_audio_ops(struct hda_codec *codec,
2577 const struct drm_audio_component_audio_ops *ops)
2579 struct hdmi_spec *spec = codec->spec;
2581 spec->drm_audio_ops.audio_ptr = codec;
2582 /* intel_audio_codec_enable() or intel_audio_codec_disable()
2583 * will call pin_eld_notify with using audio_ptr pointer
2584 * We need make sure audio_ptr is really setup
2587 spec->drm_audio_ops.pin2port = ops->pin2port;
2588 spec->drm_audio_ops.pin_eld_notify = ops->pin_eld_notify;
2589 spec->drm_audio_ops.master_bind = ops->master_bind;
2590 spec->drm_audio_ops.master_unbind = ops->master_unbind;
2593 /* initialize the generic HDMI audio component */
2594 static void generic_acomp_init(struct hda_codec *codec,
2595 const struct drm_audio_component_audio_ops *ops,
2596 int (*port2pin)(struct hda_codec *, int))
2598 struct hdmi_spec *spec = codec->spec;
2600 if (!enable_acomp) {
2601 codec_info(codec, "audio component disabled by module option\n");
2605 spec->port2pin = port2pin;
2606 setup_drm_audio_ops(codec, ops);
2607 if (!snd_hdac_acomp_init(&codec->bus->core, &spec->drm_audio_ops,
2608 match_bound_vga, 0)) {
2609 spec->acomp_registered = true;
2614 * Intel codec parsers and helpers
2617 #define INTEL_GET_VENDOR_VERB 0xf81
2618 #define INTEL_SET_VENDOR_VERB 0x781
2619 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
2620 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
2622 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2625 unsigned int vendor_param;
2626 struct hdmi_spec *spec = codec->spec;
2628 vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2629 INTEL_GET_VENDOR_VERB, 0);
2630 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2633 vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2634 vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2635 INTEL_SET_VENDOR_VERB, vendor_param);
2636 if (vendor_param == -1)
2640 snd_hda_codec_update_widgets(codec);
2643 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2645 unsigned int vendor_param;
2646 struct hdmi_spec *spec = codec->spec;
2648 vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2649 INTEL_GET_VENDOR_VERB, 0);
2650 if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2653 /* enable DP1.2 mode */
2654 vendor_param |= INTEL_EN_DP12;
2655 snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2656 snd_hda_codec_write_cache(codec, spec->vendor_nid, 0,
2657 INTEL_SET_VENDOR_VERB, vendor_param);
2660 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2661 * Otherwise you may get severe h/w communication errors.
2663 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2664 unsigned int power_state)
2666 if (power_state == AC_PWRST_D0) {
2667 intel_haswell_enable_all_pins(codec, false);
2668 intel_haswell_fixup_enable_dp12(codec);
2671 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2672 snd_hda_codec_set_power_to_all(codec, fg, power_state);
2675 /* There is a fixed mapping between audio pin node and display port.
2676 * on SNB, IVY, HSW, BSW, SKL, BXT, KBL:
2677 * Pin Widget 5 - PORT B (port = 1 in i915 driver)
2678 * Pin Widget 6 - PORT C (port = 2 in i915 driver)
2679 * Pin Widget 7 - PORT D (port = 3 in i915 driver)
2682 * Pin Widget 4 - PORT B (port = 1 in i915 driver)
2683 * Pin Widget 5 - PORT C (port = 2 in i915 driver)
2684 * Pin Widget 6 - PORT D (port = 3 in i915 driver)
2686 static int intel_base_nid(struct hda_codec *codec)
2688 switch (codec->core.vendor_id) {
2689 case 0x80860054: /* ILK */
2690 case 0x80862804: /* ILK */
2691 case 0x80862882: /* VLV */
2698 static int intel_pin2port(void *audio_ptr, int pin_nid)
2700 struct hda_codec *codec = audio_ptr;
2701 struct hdmi_spec *spec = codec->spec;
2704 if (!spec->port_num) {
2705 base_nid = intel_base_nid(codec);
2706 if (WARN_ON(pin_nid < base_nid || pin_nid >= base_nid + 3))
2708 return pin_nid - base_nid + 1;
2712 * looking for the pin number in the mapping table and return
2713 * the index which indicate the port number
2715 for (i = 0; i < spec->port_num; i++) {
2716 if (pin_nid == spec->port_map[i])
2720 codec_info(codec, "Can't find the HDMI/DP port for pin %d\n", pin_nid);
2724 static int intel_port2pin(struct hda_codec *codec, int port)
2726 struct hdmi_spec *spec = codec->spec;
2728 if (!spec->port_num) {
2729 /* we assume only from port-B to port-D */
2730 if (port < 1 || port > 3)
2732 return port + intel_base_nid(codec) - 1;
2735 if (port < 0 || port >= spec->port_num)
2737 return spec->port_map[port];
2740 static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe)
2742 struct hda_codec *codec = audio_ptr;
2746 pin_nid = intel_port2pin(codec, port);
2749 /* skip notification during system suspend (but not in runtime PM);
2750 * the state will be updated at resume
2752 if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2754 /* ditto during suspend/resume process itself */
2755 if (snd_hdac_is_in_pm(&codec->core))
2758 snd_hdac_i915_set_bclk(&codec->bus->core);
2759 check_presence_and_report(codec, pin_nid, dev_id);
2762 static const struct drm_audio_component_audio_ops intel_audio_ops = {
2763 .pin2port = intel_pin2port,
2764 .pin_eld_notify = intel_pin_eld_notify,
2767 /* register i915 component pin_eld_notify callback */
2768 static void register_i915_notifier(struct hda_codec *codec)
2770 struct hdmi_spec *spec = codec->spec;
2772 spec->use_acomp_notifier = true;
2773 spec->port2pin = intel_port2pin;
2774 setup_drm_audio_ops(codec, &intel_audio_ops);
2775 snd_hdac_acomp_register_notifier(&codec->bus->core,
2776 &spec->drm_audio_ops);
2777 /* no need for forcible resume for jack check thanks to notifier */
2778 codec->relaxed_resume = 1;
2781 /* setup_stream ops override for HSW+ */
2782 static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
2783 hda_nid_t pin_nid, int dev_id, u32 stream_tag,
2786 haswell_verify_D0(codec, cvt_nid, pin_nid);
2787 return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
2788 stream_tag, format);
2791 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2792 static void i915_pin_cvt_fixup(struct hda_codec *codec,
2793 struct hdmi_spec_per_pin *per_pin,
2797 haswell_verify_D0(codec, per_pin->cvt_nid, per_pin->pin_nid);
2798 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2800 intel_verify_pin_cvt_connect(codec, per_pin);
2801 intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
2802 per_pin->dev_id, per_pin->mux_idx);
2804 intel_not_share_assigned_cvt_nid(codec, 0, 0, cvt_nid);
2808 /* precondition and allocation for Intel codecs */
2809 static int alloc_intel_hdmi(struct hda_codec *codec)
2813 /* requires i915 binding */
2814 if (!codec->bus->core.audio_component) {
2815 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2816 /* set probe_id here to prevent generic fallback binding */
2817 codec->probe_id = HDA_CODEC_ID_SKIP_PROBE;
2821 err = alloc_generic_hdmi(codec);
2824 /* no need to handle unsol events */
2825 codec->patch_ops.unsol_event = NULL;
2829 /* parse and post-process for Intel codecs */
2830 static int parse_intel_hdmi(struct hda_codec *codec)
2832 int err, retries = 3;
2835 err = hdmi_parse_codec(codec);
2836 } while (err < 0 && retries--);
2839 generic_spec_free(codec);
2843 generic_hdmi_init_per_pins(codec);
2844 register_i915_notifier(codec);
2848 /* Intel Haswell and onwards; audio component with eld notifier */
2849 static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid,
2850 const int *port_map, int port_num)
2852 struct hdmi_spec *spec;
2855 err = alloc_intel_hdmi(codec);
2859 codec->dp_mst = true;
2860 spec->dyn_pcm_assign = true;
2861 spec->vendor_nid = vendor_nid;
2862 spec->port_map = port_map;
2863 spec->port_num = port_num;
2864 spec->intel_hsw_fixup = true;
2866 intel_haswell_enable_all_pins(codec, true);
2867 intel_haswell_fixup_enable_dp12(codec);
2869 codec->display_power_control = 1;
2871 codec->patch_ops.set_power_state = haswell_set_power_state;
2872 codec->depop_delay = 0;
2873 codec->auto_runtime_pm = 1;
2875 spec->ops.setup_stream = i915_hsw_setup_stream;
2876 spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2879 * Enable silent stream feature, if it is enabled via
2880 * module param or Kconfig option
2882 if (enable_silent_stream)
2883 spec->send_silent_stream = true;
2885 return parse_intel_hdmi(codec);
2888 static int patch_i915_hsw_hdmi(struct hda_codec *codec)
2890 return intel_hsw_common_init(codec, 0x08, NULL, 0);
2893 static int patch_i915_glk_hdmi(struct hda_codec *codec)
2895 return intel_hsw_common_init(codec, 0x0b, NULL, 0);
2898 static int patch_i915_icl_hdmi(struct hda_codec *codec)
2901 * pin to port mapping table where the value indicate the pin number and
2902 * the index indicate the port number.
2904 static const int map[] = {0x0, 0x4, 0x6, 0x8, 0xa, 0xb};
2906 return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2909 static int patch_i915_tgl_hdmi(struct hda_codec *codec)
2912 * pin to port mapping table where the value indicate the pin number and
2913 * the index indicate the port number.
2915 static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
2917 return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2920 /* Intel Baytrail and Braswell; with eld notifier */
2921 static int patch_i915_byt_hdmi(struct hda_codec *codec)
2923 struct hdmi_spec *spec;
2926 err = alloc_intel_hdmi(codec);
2931 /* For Valleyview/Cherryview, only the display codec is in the display
2932 * power well and can use link_power ops to request/release the power.
2934 codec->display_power_control = 1;
2936 codec->depop_delay = 0;
2937 codec->auto_runtime_pm = 1;
2939 spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2941 return parse_intel_hdmi(codec);
2944 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
2945 static int patch_i915_cpt_hdmi(struct hda_codec *codec)
2949 err = alloc_intel_hdmi(codec);
2952 return parse_intel_hdmi(codec);
2956 * Shared non-generic implementations
2959 static int simple_playback_build_pcms(struct hda_codec *codec)
2961 struct hdmi_spec *spec = codec->spec;
2962 struct hda_pcm *info;
2964 struct hda_pcm_stream *pstr;
2965 struct hdmi_spec_per_cvt *per_cvt;
2967 per_cvt = get_cvt(spec, 0);
2968 chans = get_wcaps(codec, per_cvt->cvt_nid);
2969 chans = get_wcaps_channels(chans);
2971 info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2974 spec->pcm_rec[0].pcm = info;
2975 info->pcm_type = HDA_PCM_TYPE_HDMI;
2976 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2977 *pstr = spec->pcm_playback;
2978 pstr->nid = per_cvt->cvt_nid;
2979 if (pstr->channels_max <= 2 && chans && chans <= 16)
2980 pstr->channels_max = chans;
2985 /* unsolicited event for jack sensing */
2986 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2989 snd_hda_jack_set_dirty_all(codec);
2990 snd_hda_jack_report_sync(codec);
2993 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2994 * as long as spec->pins[] is set correctly
2996 #define simple_hdmi_build_jack generic_hdmi_build_jack
2998 static int simple_playback_build_controls(struct hda_codec *codec)
3000 struct hdmi_spec *spec = codec->spec;
3001 struct hdmi_spec_per_cvt *per_cvt;
3004 per_cvt = get_cvt(spec, 0);
3005 err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
3010 return simple_hdmi_build_jack(codec, 0);
3013 static int simple_playback_init(struct hda_codec *codec)
3015 struct hdmi_spec *spec = codec->spec;
3016 struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
3017 hda_nid_t pin = per_pin->pin_nid;
3019 snd_hda_codec_write(codec, pin, 0,
3020 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
3021 /* some codecs require to unmute the pin */
3022 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
3023 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
3025 snd_hda_jack_detect_enable(codec, pin, per_pin->dev_id);
3029 static void simple_playback_free(struct hda_codec *codec)
3031 struct hdmi_spec *spec = codec->spec;
3033 hdmi_array_free(spec);
3038 * Nvidia specific implementations
3041 #define Nv_VERB_SET_Channel_Allocation 0xF79
3042 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
3043 #define Nv_VERB_SET_Audio_Protection_On 0xF98
3044 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
3046 #define nvhdmi_master_con_nid_7x 0x04
3047 #define nvhdmi_master_pin_nid_7x 0x05
3049 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
3050 /*front, rear, clfe, rear_surr */
3054 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
3055 /* set audio protect on */
3056 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3057 /* enable digital output on pin widget */
3058 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3062 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
3063 /* set audio protect on */
3064 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3065 /* enable digital output on pin widget */
3066 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3067 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3068 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3069 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3070 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3074 #ifdef LIMITED_RATE_FMT_SUPPORT
3075 /* support only the safe format and rate */
3076 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
3077 #define SUPPORTED_MAXBPS 16
3078 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
3080 /* support all rates and formats */
3081 #define SUPPORTED_RATES \
3082 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
3083 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
3084 SNDRV_PCM_RATE_192000)
3085 #define SUPPORTED_MAXBPS 24
3086 #define SUPPORTED_FORMATS \
3087 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
3090 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
3092 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
3096 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
3098 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
3102 static const unsigned int channels_2_6_8[] = {
3106 static const unsigned int channels_2_8[] = {
3110 static const struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
3111 .count = ARRAY_SIZE(channels_2_6_8),
3112 .list = channels_2_6_8,
3116 static const struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
3117 .count = ARRAY_SIZE(channels_2_8),
3118 .list = channels_2_8,
3122 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
3123 struct hda_codec *codec,
3124 struct snd_pcm_substream *substream)
3126 struct hdmi_spec *spec = codec->spec;
3127 const struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
3129 switch (codec->preset->vendor_id) {
3134 hw_constraints_channels = &hw_constraints_2_8_channels;
3137 hw_constraints_channels = &hw_constraints_2_6_8_channels;
3143 if (hw_constraints_channels != NULL) {
3144 snd_pcm_hw_constraint_list(substream->runtime, 0,
3145 SNDRV_PCM_HW_PARAM_CHANNELS,
3146 hw_constraints_channels);
3148 snd_pcm_hw_constraint_step(substream->runtime, 0,
3149 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
3152 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3155 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
3156 struct hda_codec *codec,
3157 struct snd_pcm_substream *substream)
3159 struct hdmi_spec *spec = codec->spec;
3160 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3163 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3164 struct hda_codec *codec,
3165 unsigned int stream_tag,
3166 unsigned int format,
3167 struct snd_pcm_substream *substream)
3169 struct hdmi_spec *spec = codec->spec;
3170 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3171 stream_tag, format, substream);
3174 static const struct hda_pcm_stream simple_pcm_playback = {
3179 .open = simple_playback_pcm_open,
3180 .close = simple_playback_pcm_close,
3181 .prepare = simple_playback_pcm_prepare
3185 static const struct hda_codec_ops simple_hdmi_patch_ops = {
3186 .build_controls = simple_playback_build_controls,
3187 .build_pcms = simple_playback_build_pcms,
3188 .init = simple_playback_init,
3189 .free = simple_playback_free,
3190 .unsol_event = simple_hdmi_unsol_event,
3193 static int patch_simple_hdmi(struct hda_codec *codec,
3194 hda_nid_t cvt_nid, hda_nid_t pin_nid)
3196 struct hdmi_spec *spec;
3197 struct hdmi_spec_per_cvt *per_cvt;
3198 struct hdmi_spec_per_pin *per_pin;
3200 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3204 spec->codec = codec;
3206 hdmi_array_init(spec, 1);
3208 spec->multiout.num_dacs = 0; /* no analog */
3209 spec->multiout.max_channels = 2;
3210 spec->multiout.dig_out_nid = cvt_nid;
3213 per_pin = snd_array_new(&spec->pins);
3214 per_cvt = snd_array_new(&spec->cvts);
3215 if (!per_pin || !per_cvt) {
3216 simple_playback_free(codec);
3219 per_cvt->cvt_nid = cvt_nid;
3220 per_pin->pin_nid = pin_nid;
3221 spec->pcm_playback = simple_pcm_playback;
3223 codec->patch_ops = simple_hdmi_patch_ops;
3228 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
3231 unsigned int chanmask;
3232 int chan = channels ? (channels - 1) : 1;
3251 /* Set the audio infoframe channel allocation and checksum fields. The
3252 * channel count is computed implicitly by the hardware. */
3253 snd_hda_codec_write(codec, 0x1, 0,
3254 Nv_VERB_SET_Channel_Allocation, chanmask);
3256 snd_hda_codec_write(codec, 0x1, 0,
3257 Nv_VERB_SET_Info_Frame_Checksum,
3258 (0x71 - chan - chanmask));
3261 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3262 struct hda_codec *codec,
3263 struct snd_pcm_substream *substream)
3265 struct hdmi_spec *spec = codec->spec;
3268 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3269 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3270 for (i = 0; i < 4; i++) {
3271 /* set the stream id */
3272 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3273 AC_VERB_SET_CHANNEL_STREAMID, 0);
3274 /* set the stream format */
3275 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3276 AC_VERB_SET_STREAM_FORMAT, 0);
3279 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3280 * streams are disabled. */
3281 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3283 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3286 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3287 struct hda_codec *codec,
3288 unsigned int stream_tag,
3289 unsigned int format,
3290 struct snd_pcm_substream *substream)
3293 unsigned int dataDCC2, channel_id;
3295 struct hdmi_spec *spec = codec->spec;
3296 struct hda_spdif_out *spdif;
3297 struct hdmi_spec_per_cvt *per_cvt;
3299 mutex_lock(&codec->spdif_mutex);
3300 per_cvt = get_cvt(spec, 0);
3301 spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3303 chs = substream->runtime->channels;
3307 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3308 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3309 snd_hda_codec_write(codec,
3310 nvhdmi_master_con_nid_7x,
3312 AC_VERB_SET_DIGI_CONVERT_1,
3313 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3315 /* set the stream id */
3316 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3317 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3319 /* set the stream format */
3320 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3321 AC_VERB_SET_STREAM_FORMAT, format);
3323 /* turn on again (if needed) */
3324 /* enable and set the channel status audio/data flag */
3325 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3326 snd_hda_codec_write(codec,
3327 nvhdmi_master_con_nid_7x,
3329 AC_VERB_SET_DIGI_CONVERT_1,
3330 spdif->ctls & 0xff);
3331 snd_hda_codec_write(codec,
3332 nvhdmi_master_con_nid_7x,
3334 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3337 for (i = 0; i < 4; i++) {
3343 /* turn off SPDIF once;
3344 *otherwise the IEC958 bits won't be updated
3346 if (codec->spdif_status_reset &&
3347 (spdif->ctls & AC_DIG1_ENABLE))
3348 snd_hda_codec_write(codec,
3349 nvhdmi_con_nids_7x[i],
3351 AC_VERB_SET_DIGI_CONVERT_1,
3352 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3353 /* set the stream id */
3354 snd_hda_codec_write(codec,
3355 nvhdmi_con_nids_7x[i],
3357 AC_VERB_SET_CHANNEL_STREAMID,
3358 (stream_tag << 4) | channel_id);
3359 /* set the stream format */
3360 snd_hda_codec_write(codec,
3361 nvhdmi_con_nids_7x[i],
3363 AC_VERB_SET_STREAM_FORMAT,
3365 /* turn on again (if needed) */
3366 /* enable and set the channel status audio/data flag */
3367 if (codec->spdif_status_reset &&
3368 (spdif->ctls & AC_DIG1_ENABLE)) {
3369 snd_hda_codec_write(codec,
3370 nvhdmi_con_nids_7x[i],
3372 AC_VERB_SET_DIGI_CONVERT_1,
3373 spdif->ctls & 0xff);
3374 snd_hda_codec_write(codec,
3375 nvhdmi_con_nids_7x[i],
3377 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3381 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3383 mutex_unlock(&codec->spdif_mutex);
3387 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3391 .nid = nvhdmi_master_con_nid_7x,
3392 .rates = SUPPORTED_RATES,
3393 .maxbps = SUPPORTED_MAXBPS,
3394 .formats = SUPPORTED_FORMATS,
3396 .open = simple_playback_pcm_open,
3397 .close = nvhdmi_8ch_7x_pcm_close,
3398 .prepare = nvhdmi_8ch_7x_pcm_prepare
3402 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3404 struct hdmi_spec *spec;
3405 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3406 nvhdmi_master_pin_nid_7x);
3410 codec->patch_ops.init = nvhdmi_7x_init_2ch;
3411 /* override the PCM rates, etc, as the codec doesn't give full list */
3413 spec->pcm_playback.rates = SUPPORTED_RATES;
3414 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3415 spec->pcm_playback.formats = SUPPORTED_FORMATS;
3419 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3421 struct hdmi_spec *spec = codec->spec;
3422 int err = simple_playback_build_pcms(codec);
3424 struct hda_pcm *info = get_pcm_rec(spec, 0);
3425 info->own_chmap = true;
3430 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3432 struct hdmi_spec *spec = codec->spec;
3433 struct hda_pcm *info;
3434 struct snd_pcm_chmap *chmap;
3437 err = simple_playback_build_controls(codec);
3441 /* add channel maps */
3442 info = get_pcm_rec(spec, 0);
3443 err = snd_pcm_add_chmap_ctls(info->pcm,
3444 SNDRV_PCM_STREAM_PLAYBACK,
3445 snd_pcm_alt_chmaps, 8, 0, &chmap);
3448 switch (codec->preset->vendor_id) {
3453 chmap->channel_mask = (1U << 2) | (1U << 8);
3456 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3461 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3463 struct hdmi_spec *spec;
3464 int err = patch_nvhdmi_2ch(codec);
3468 spec->multiout.max_channels = 8;
3469 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3470 codec->patch_ops.init = nvhdmi_7x_init_8ch;
3471 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3472 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3474 /* Initialize the audio infoframe channel mask and checksum to something
3476 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3482 * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3486 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
3487 struct hdac_cea_channel_speaker_allocation *cap, int channels)
3489 if (cap->ca_index == 0x00 && channels == 2)
3490 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3492 /* If the speaker allocation matches the channel count, it is OK. */
3493 if (cap->channels != channels)
3496 /* all channels are remappable freely */
3497 return SNDRV_CTL_TLVT_CHMAP_VAR;
3500 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
3501 int ca, int chs, unsigned char *map)
3503 if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3509 /* map from pin NID to port; port is 0-based */
3510 /* for Nvidia: assume widget NID starting from 4, with step 1 (4, 5, 6, ...) */
3511 static int nvhdmi_pin2port(void *audio_ptr, int pin_nid)
3516 /* reverse-map from port to pin NID: see above */
3517 static int nvhdmi_port2pin(struct hda_codec *codec, int port)
3522 static const struct drm_audio_component_audio_ops nvhdmi_audio_ops = {
3523 .pin2port = nvhdmi_pin2port,
3524 .pin_eld_notify = generic_acomp_pin_eld_notify,
3525 .master_bind = generic_acomp_master_bind,
3526 .master_unbind = generic_acomp_master_unbind,
3529 static int patch_nvhdmi(struct hda_codec *codec)
3531 struct hdmi_spec *spec;
3534 err = alloc_generic_hdmi(codec);
3537 codec->dp_mst = true;
3540 spec->dyn_pcm_assign = true;
3542 err = hdmi_parse_codec(codec);
3544 generic_spec_free(codec);
3548 generic_hdmi_init_per_pins(codec);
3550 spec->dyn_pin_out = true;
3552 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3553 nvhdmi_chmap_cea_alloc_validate_get_type;
3554 spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3556 codec->link_down_at_suspend = 1;
3558 generic_acomp_init(codec, &nvhdmi_audio_ops, nvhdmi_port2pin);
3563 static int patch_nvhdmi_legacy(struct hda_codec *codec)
3565 struct hdmi_spec *spec;
3568 err = patch_generic_hdmi(codec);
3573 spec->dyn_pin_out = true;
3575 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3576 nvhdmi_chmap_cea_alloc_validate_get_type;
3577 spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3579 codec->link_down_at_suspend = 1;
3585 * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3586 * accessed using vendor-defined verbs. These registers can be used for
3587 * interoperability between the HDA and HDMI drivers.
3590 /* Audio Function Group node */
3591 #define NVIDIA_AFG_NID 0x01
3594 * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3595 * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3596 * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3597 * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3598 * additional bit (at position 30) to signal the validity of the format.
3600 * | 31 | 30 | 29 16 | 15 0 |
3601 * +---------+-------+--------+--------+
3602 * | TRIGGER | VALID | UNUSED | FORMAT |
3603 * +-----------------------------------|
3605 * Note that for the trigger bit to take effect it needs to change value
3606 * (i.e. it needs to be toggled).
3608 #define NVIDIA_GET_SCRATCH0 0xfa6
3609 #define NVIDIA_SET_SCRATCH0_BYTE0 0xfa7
3610 #define NVIDIA_SET_SCRATCH0_BYTE1 0xfa8
3611 #define NVIDIA_SET_SCRATCH0_BYTE2 0xfa9
3612 #define NVIDIA_SET_SCRATCH0_BYTE3 0xfaa
3613 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3614 #define NVIDIA_SCRATCH_VALID (1 << 6)
3616 #define NVIDIA_GET_SCRATCH1 0xfab
3617 #define NVIDIA_SET_SCRATCH1_BYTE0 0xfac
3618 #define NVIDIA_SET_SCRATCH1_BYTE1 0xfad
3619 #define NVIDIA_SET_SCRATCH1_BYTE2 0xfae
3620 #define NVIDIA_SET_SCRATCH1_BYTE3 0xfaf
3623 * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3624 * the format is invalidated so that the HDMI codec can be disabled.
3626 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3630 /* bits [31:30] contain the trigger and valid bits */
3631 value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3632 NVIDIA_GET_SCRATCH0, 0);
3633 value = (value >> 24) & 0xff;
3635 /* bits [15:0] are used to store the HDA format */
3636 snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3637 NVIDIA_SET_SCRATCH0_BYTE0,
3638 (format >> 0) & 0xff);
3639 snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3640 NVIDIA_SET_SCRATCH0_BYTE1,
3641 (format >> 8) & 0xff);
3643 /* bits [16:24] are unused */
3644 snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3645 NVIDIA_SET_SCRATCH0_BYTE2, 0);
3648 * Bit 30 signals that the data is valid and hence that HDMI audio can
3652 value &= ~NVIDIA_SCRATCH_VALID;
3654 value |= NVIDIA_SCRATCH_VALID;
3657 * Whenever the trigger bit is toggled, an interrupt is raised in the
3658 * HDMI codec. The HDMI driver will use that as trigger to update its
3661 value ^= NVIDIA_SCRATCH_TRIGGER;
3663 snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3664 NVIDIA_SET_SCRATCH0_BYTE3, value);
3667 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3668 struct hda_codec *codec,
3669 unsigned int stream_tag,
3670 unsigned int format,
3671 struct snd_pcm_substream *substream)
3675 err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3680 /* notify the HDMI codec of the format change */
3681 tegra_hdmi_set_format(codec, format);
3686 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3687 struct hda_codec *codec,
3688 struct snd_pcm_substream *substream)
3690 /* invalidate the format in the HDMI codec */
3691 tegra_hdmi_set_format(codec, 0);
3693 return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3696 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3698 struct hdmi_spec *spec = codec->spec;
3701 for (i = 0; i < spec->num_pins; i++) {
3702 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3704 if (pcm->pcm_type == type)
3711 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3713 struct hda_pcm_stream *stream;
3714 struct hda_pcm *pcm;
3717 err = generic_hdmi_build_pcms(codec);
3721 pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3726 * Override ->prepare() and ->cleanup() operations to notify the HDMI
3727 * codec about format changes.
3729 stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3730 stream->ops.prepare = tegra_hdmi_pcm_prepare;
3731 stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3736 static int patch_tegra_hdmi(struct hda_codec *codec)
3738 struct hdmi_spec *spec;
3741 err = patch_generic_hdmi(codec);
3745 codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3747 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3748 nvhdmi_chmap_cea_alloc_validate_get_type;
3749 spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3755 * ATI/AMD-specific implementations
3758 #define is_amdhdmi_rev3_or_later(codec) \
3759 ((codec)->core.vendor_id == 0x1002aa01 && \
3760 ((codec)->core.revision_id & 0xff00) >= 0x0300)
3761 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3763 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3764 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3765 #define ATI_VERB_SET_DOWNMIX_INFO 0x772
3766 #define ATI_VERB_SET_MULTICHANNEL_01 0x777
3767 #define ATI_VERB_SET_MULTICHANNEL_23 0x778
3768 #define ATI_VERB_SET_MULTICHANNEL_45 0x779
3769 #define ATI_VERB_SET_MULTICHANNEL_67 0x77a
3770 #define ATI_VERB_SET_HBR_CONTROL 0x77c
3771 #define ATI_VERB_SET_MULTICHANNEL_1 0x785
3772 #define ATI_VERB_SET_MULTICHANNEL_3 0x786
3773 #define ATI_VERB_SET_MULTICHANNEL_5 0x787
3774 #define ATI_VERB_SET_MULTICHANNEL_7 0x788
3775 #define ATI_VERB_SET_MULTICHANNEL_MODE 0x789
3776 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3777 #define ATI_VERB_GET_DOWNMIX_INFO 0xf72
3778 #define ATI_VERB_GET_MULTICHANNEL_01 0xf77
3779 #define ATI_VERB_GET_MULTICHANNEL_23 0xf78
3780 #define ATI_VERB_GET_MULTICHANNEL_45 0xf79
3781 #define ATI_VERB_GET_MULTICHANNEL_67 0xf7a
3782 #define ATI_VERB_GET_HBR_CONTROL 0xf7c
3783 #define ATI_VERB_GET_MULTICHANNEL_1 0xf85
3784 #define ATI_VERB_GET_MULTICHANNEL_3 0xf86
3785 #define ATI_VERB_GET_MULTICHANNEL_5 0xf87
3786 #define ATI_VERB_GET_MULTICHANNEL_7 0xf88
3787 #define ATI_VERB_GET_MULTICHANNEL_MODE 0xf89
3789 /* AMD specific HDA cvt verbs */
3790 #define ATI_VERB_SET_RAMP_RATE 0x770
3791 #define ATI_VERB_GET_RAMP_RATE 0xf70
3793 #define ATI_OUT_ENABLE 0x1
3795 #define ATI_MULTICHANNEL_MODE_PAIRED 0
3796 #define ATI_MULTICHANNEL_MODE_SINGLE 1
3798 #define ATI_HBR_CAPABLE 0x01
3799 #define ATI_HBR_ENABLE 0x10
3801 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3802 int dev_id, unsigned char *buf, int *eld_size)
3804 WARN_ON(dev_id != 0);
3805 /* call hda_eld.c ATI/AMD-specific function */
3806 return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3807 is_amdhdmi_rev3_or_later(codec));
3810 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec,
3811 hda_nid_t pin_nid, int dev_id, int ca,
3812 int active_channels, int conn_type)
3814 WARN_ON(dev_id != 0);
3815 snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3818 static int atihdmi_paired_swap_fc_lfe(int pos)
3821 * ATI/AMD have automatic FC/LFE swap built-in
3822 * when in pairwise mapping mode.
3826 /* see channel_allocations[].speakers[] */
3835 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3836 int ca, int chs, unsigned char *map)
3838 struct hdac_cea_channel_speaker_allocation *cap;
3841 /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3843 cap = snd_hdac_get_ch_alloc_from_ca(ca);
3844 for (i = 0; i < chs; ++i) {
3845 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3847 bool companion_ok = false;
3852 for (j = 0 + i % 2; j < 8; j += 2) {
3853 int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3854 if (cap->speakers[chan_idx] == mask) {
3855 /* channel is in a supported position */
3858 if (i % 2 == 0 && i + 1 < chs) {
3859 /* even channel, check the odd companion */
3860 int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3861 int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3862 int comp_mask_act = cap->speakers[comp_chan_idx];
3864 if (comp_mask_req == comp_mask_act)
3865 companion_ok = true;
3877 i++; /* companion channel already checked */
3883 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3884 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3886 struct hda_codec *codec = hdac_to_hda_codec(hdac);
3888 int ati_channel_setup = 0;
3893 if (!has_amd_full_remap_support(codec)) {
3894 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3896 /* In case this is an odd slot but without stream channel, do not
3897 * disable the slot since the corresponding even slot could have a
3898 * channel. In case neither have a channel, the slot pair will be
3899 * disabled when this function is called for the even slot. */
3900 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3903 hdmi_slot -= hdmi_slot % 2;
3905 if (stream_channel != 0xf)
3906 stream_channel -= stream_channel % 2;
3909 verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3911 /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3913 if (stream_channel != 0xf)
3914 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3916 return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3919 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
3920 hda_nid_t pin_nid, int asp_slot)
3922 struct hda_codec *codec = hdac_to_hda_codec(hdac);
3923 bool was_odd = false;
3924 int ati_asp_slot = asp_slot;
3926 int ati_channel_setup;
3931 if (!has_amd_full_remap_support(codec)) {
3932 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3933 if (ati_asp_slot % 2 != 0) {
3939 verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3941 ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3943 if (!(ati_channel_setup & ATI_OUT_ENABLE))
3946 return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3949 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
3950 struct hdac_chmap *chmap,
3951 struct hdac_cea_channel_speaker_allocation *cap,
3957 * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3958 * we need to take that into account (a single channel may take 2
3959 * channel slots if we need to carry a silent channel next to it).
3960 * On Rev3+ AMD codecs this function is not used.
3964 /* We only produce even-numbered channel count TLVs */
3965 if ((channels % 2) != 0)
3968 for (c = 0; c < 7; c += 2) {
3969 if (cap->speakers[c] || cap->speakers[c+1])
3973 if (chanpairs * 2 != channels)
3976 return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3979 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
3980 struct hdac_cea_channel_speaker_allocation *cap,
3981 unsigned int *chmap, int channels)
3983 /* produce paired maps for pre-rev3 ATI/AMD codecs */
3987 for (c = 7; c >= 0; c--) {
3988 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3989 int spk = cap->speakers[chan];
3991 /* add N/A channel if the companion channel is occupied */
3992 if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3993 chmap[count++] = SNDRV_CHMAP_NA;
3998 chmap[count++] = snd_hdac_spk_to_chmap(spk);
4001 WARN_ON(count != channels);
4004 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
4005 int dev_id, bool hbr)
4007 int hbr_ctl, hbr_ctl_new;
4009 WARN_ON(dev_id != 0);
4011 hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
4012 if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
4014 hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
4016 hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
4019 "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
4021 hbr_ctl == hbr_ctl_new ? "" : "new-",
4024 if (hbr_ctl != hbr_ctl_new)
4025 snd_hda_codec_write(codec, pin_nid, 0,
4026 ATI_VERB_SET_HBR_CONTROL,
4035 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
4036 hda_nid_t pin_nid, int dev_id,
4037 u32 stream_tag, int format)
4039 if (is_amdhdmi_rev3_or_later(codec)) {
4040 int ramp_rate = 180; /* default as per AMD spec */
4041 /* disable ramp-up/down for non-pcm as per AMD spec */
4042 if (format & AC_FMT_TYPE_NON_PCM)
4045 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
4048 return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
4049 stream_tag, format);
4053 static int atihdmi_init(struct hda_codec *codec)
4055 struct hdmi_spec *spec = codec->spec;
4058 err = generic_hdmi_init(codec);
4063 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
4064 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
4066 /* make sure downmix information in infoframe is zero */
4067 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
4069 /* enable channel-wise remap mode if supported */
4070 if (has_amd_full_remap_support(codec))
4071 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
4072 ATI_VERB_SET_MULTICHANNEL_MODE,
4073 ATI_MULTICHANNEL_MODE_SINGLE);
4075 codec->auto_runtime_pm = 1;
4080 /* map from pin NID to port; port is 0-based */
4081 /* for AMD: assume widget NID starting from 3, with step 2 (3, 5, 7, ...) */
4082 static int atihdmi_pin2port(void *audio_ptr, int pin_nid)
4084 return pin_nid / 2 - 1;
4087 /* reverse-map from port to pin NID: see above */
4088 static int atihdmi_port2pin(struct hda_codec *codec, int port)
4090 return port * 2 + 3;
4093 static const struct drm_audio_component_audio_ops atihdmi_audio_ops = {
4094 .pin2port = atihdmi_pin2port,
4095 .pin_eld_notify = generic_acomp_pin_eld_notify,
4096 .master_bind = generic_acomp_master_bind,
4097 .master_unbind = generic_acomp_master_unbind,
4100 static int patch_atihdmi(struct hda_codec *codec)
4102 struct hdmi_spec *spec;
4103 struct hdmi_spec_per_cvt *per_cvt;
4106 err = patch_generic_hdmi(codec);
4111 codec->patch_ops.init = atihdmi_init;
4115 spec->ops.pin_get_eld = atihdmi_pin_get_eld;
4116 spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
4117 spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
4118 spec->ops.setup_stream = atihdmi_setup_stream;
4120 spec->chmap.ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
4121 spec->chmap.ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
4123 if (!has_amd_full_remap_support(codec)) {
4124 /* override to ATI/AMD-specific versions with pairwise mapping */
4125 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
4126 atihdmi_paired_chmap_cea_alloc_validate_get_type;
4127 spec->chmap.ops.cea_alloc_to_tlv_chmap =
4128 atihdmi_paired_cea_alloc_to_tlv_chmap;
4129 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
4132 /* ATI/AMD converters do not advertise all of their capabilities */
4133 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
4134 per_cvt = get_cvt(spec, cvt_idx);
4135 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
4136 per_cvt->rates |= SUPPORTED_RATES;
4137 per_cvt->formats |= SUPPORTED_FORMATS;
4138 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
4141 spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
4143 /* AMD GPUs have neither EPSS nor CLKSTOP bits, hence preventing
4144 * the link-down as is. Tell the core to allow it.
4146 codec->link_down_at_suspend = 1;
4148 generic_acomp_init(codec, &atihdmi_audio_ops, atihdmi_port2pin);
4153 /* VIA HDMI Implementation */
4154 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
4155 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
4157 static int patch_via_hdmi(struct hda_codec *codec)
4159 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
4165 static const struct hda_device_id snd_hda_id_hdmi[] = {
4166 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI", patch_atihdmi),
4167 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI", patch_atihdmi),
4168 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI", patch_atihdmi),
4169 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI", patch_atihdmi),
4170 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI", patch_generic_hdmi),
4171 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI", patch_generic_hdmi),
4172 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI", patch_generic_hdmi),
4173 HDA_CODEC_ENTRY(0x10de0001, "MCP73 HDMI", patch_nvhdmi_2ch),
4174 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
4175 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
4176 HDA_CODEC_ENTRY(0x10de0004, "GPU 04 HDMI", patch_nvhdmi_8ch_7x),
4177 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
4178 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
4179 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI", patch_nvhdmi_8ch_7x),
4180 HDA_CODEC_ENTRY(0x10de0008, "GPU 08 HDMI/DP", patch_nvhdmi_legacy),
4181 HDA_CODEC_ENTRY(0x10de0009, "GPU 09 HDMI/DP", patch_nvhdmi_legacy),
4182 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP", patch_nvhdmi_legacy),
4183 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP", patch_nvhdmi_legacy),
4184 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI", patch_nvhdmi_legacy),
4185 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP", patch_nvhdmi_legacy),
4186 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP", patch_nvhdmi_legacy),
4187 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP", patch_nvhdmi_legacy),
4188 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP", patch_nvhdmi_legacy),
4189 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP", patch_nvhdmi_legacy),
4190 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP", patch_nvhdmi_legacy),
4191 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP", patch_nvhdmi_legacy),
4192 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP", patch_nvhdmi_legacy),
4193 /* 17 is known to be absent */
4194 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP", patch_nvhdmi_legacy),
4195 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP", patch_nvhdmi_legacy),
4196 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP", patch_nvhdmi_legacy),
4197 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP", patch_nvhdmi_legacy),
4198 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP", patch_nvhdmi_legacy),
4199 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI", patch_tegra_hdmi),
4200 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI", patch_tegra_hdmi),
4201 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI", patch_tegra_hdmi),
4202 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
4203 HDA_CODEC_ENTRY(0x10de002d, "Tegra186 HDMI/DP0", patch_tegra_hdmi),
4204 HDA_CODEC_ENTRY(0x10de002e, "Tegra186 HDMI/DP1", patch_tegra_hdmi),
4205 HDA_CODEC_ENTRY(0x10de002f, "Tegra194 HDMI/DP2", patch_tegra_hdmi),
4206 HDA_CODEC_ENTRY(0x10de0030, "Tegra194 HDMI/DP3", patch_tegra_hdmi),
4207 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP", patch_nvhdmi),
4208 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP", patch_nvhdmi),
4209 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP", patch_nvhdmi),
4210 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP", patch_nvhdmi),
4211 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP", patch_nvhdmi),
4212 HDA_CODEC_ENTRY(0x10de0045, "GPU 45 HDMI/DP", patch_nvhdmi),
4213 HDA_CODEC_ENTRY(0x10de0050, "GPU 50 HDMI/DP", patch_nvhdmi),
4214 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP", patch_nvhdmi),
4215 HDA_CODEC_ENTRY(0x10de0052, "GPU 52 HDMI/DP", patch_nvhdmi),
4216 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP", patch_nvhdmi),
4217 HDA_CODEC_ENTRY(0x10de0061, "GPU 61 HDMI/DP", patch_nvhdmi),
4218 HDA_CODEC_ENTRY(0x10de0062, "GPU 62 HDMI/DP", patch_nvhdmi),
4219 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI", patch_nvhdmi_2ch),
4220 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP", patch_nvhdmi),
4221 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP", patch_nvhdmi),
4222 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP", patch_nvhdmi),
4223 HDA_CODEC_ENTRY(0x10de0073, "GPU 73 HDMI/DP", patch_nvhdmi),
4224 HDA_CODEC_ENTRY(0x10de0074, "GPU 74 HDMI/DP", patch_nvhdmi),
4225 HDA_CODEC_ENTRY(0x10de0076, "GPU 76 HDMI/DP", patch_nvhdmi),
4226 HDA_CODEC_ENTRY(0x10de007b, "GPU 7b HDMI/DP", patch_nvhdmi),
4227 HDA_CODEC_ENTRY(0x10de007c, "GPU 7c HDMI/DP", patch_nvhdmi),
4228 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP", patch_nvhdmi),
4229 HDA_CODEC_ENTRY(0x10de007e, "GPU 7e HDMI/DP", patch_nvhdmi),
4230 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP", patch_nvhdmi),
4231 HDA_CODEC_ENTRY(0x10de0081, "GPU 81 HDMI/DP", patch_nvhdmi),
4232 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP", patch_nvhdmi),
4233 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP", patch_nvhdmi),
4234 HDA_CODEC_ENTRY(0x10de0084, "GPU 84 HDMI/DP", patch_nvhdmi),
4235 HDA_CODEC_ENTRY(0x10de0090, "GPU 90 HDMI/DP", patch_nvhdmi),
4236 HDA_CODEC_ENTRY(0x10de0091, "GPU 91 HDMI/DP", patch_nvhdmi),
4237 HDA_CODEC_ENTRY(0x10de0092, "GPU 92 HDMI/DP", patch_nvhdmi),
4238 HDA_CODEC_ENTRY(0x10de0093, "GPU 93 HDMI/DP", patch_nvhdmi),
4239 HDA_CODEC_ENTRY(0x10de0094, "GPU 94 HDMI/DP", patch_nvhdmi),
4240 HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI/DP", patch_nvhdmi),
4241 HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP", patch_nvhdmi),
4242 HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP", patch_nvhdmi),
4243 HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP", patch_nvhdmi),
4244 HDA_CODEC_ENTRY(0x10de009a, "GPU 9a HDMI/DP", patch_nvhdmi),
4245 HDA_CODEC_ENTRY(0x10de009d, "GPU 9d HDMI/DP", patch_nvhdmi),
4246 HDA_CODEC_ENTRY(0x10de009e, "GPU 9e HDMI/DP", patch_nvhdmi),
4247 HDA_CODEC_ENTRY(0x10de009f, "GPU 9f HDMI/DP", patch_nvhdmi),
4248 HDA_CODEC_ENTRY(0x10de00a0, "GPU a0 HDMI/DP", patch_nvhdmi),
4249 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI", patch_nvhdmi_2ch),
4250 HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI", patch_nvhdmi_2ch),
4251 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP", patch_via_hdmi),
4252 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP", patch_via_hdmi),
4253 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP", patch_generic_hdmi),
4254 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP", patch_generic_hdmi),
4255 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI", patch_i915_cpt_hdmi),
4256 HDA_CODEC_ENTRY(0x80862800, "Geminilake HDMI", patch_i915_glk_hdmi),
4257 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI", patch_generic_hdmi),
4258 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI", patch_generic_hdmi),
4259 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI", patch_generic_hdmi),
4260 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI", patch_i915_cpt_hdmi),
4261 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi),
4262 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi),
4263 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI", patch_i915_hsw_hdmi),
4264 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI", patch_i915_hsw_hdmi),
4265 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI", patch_i915_hsw_hdmi),
4266 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI", patch_i915_hsw_hdmi),
4267 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI", patch_i915_hsw_hdmi),
4268 HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI", patch_i915_glk_hdmi),
4269 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI", patch_i915_glk_hdmi),
4270 HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI", patch_i915_icl_hdmi),
4271 HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI", patch_i915_tgl_hdmi),
4272 HDA_CODEC_ENTRY(0x80862816, "Rocketlake HDMI", patch_i915_tgl_hdmi),
4273 HDA_CODEC_ENTRY(0x8086281a, "Jasperlake HDMI", patch_i915_icl_hdmi),
4274 HDA_CODEC_ENTRY(0x8086281b, "Elkhartlake HDMI", patch_i915_icl_hdmi),
4275 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI", patch_generic_hdmi),
4276 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
4277 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI", patch_i915_byt_hdmi),
4278 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI", patch_generic_hdmi),
4279 /* special ID for generic HDMI */
4280 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
4283 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
4285 MODULE_LICENSE("GPL");
4286 MODULE_DESCRIPTION("HDMI HD-audio codec");
4287 MODULE_ALIAS("snd-hda-codec-intelhdmi");
4288 MODULE_ALIAS("snd-hda-codec-nvhdmi");
4289 MODULE_ALIAS("snd-hda-codec-atihdmi");
4291 static struct hda_codec_driver hdmi_driver = {
4292 .id = snd_hda_id_hdmi,
4295 module_hda_codec_driver(hdmi_driver);