1 // SPDX-License-Identifier: GPL-2.0-only
4 * Implementation of primary ALSA driver code base for NVIDIA Tegra HDA.
8 #include <linux/clocksource.h>
9 #include <linux/completion.h>
10 #include <linux/delay.h>
11 #include <linux/dma-mapping.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <linux/mutex.h>
19 #include <linux/of_device.h>
20 #include <linux/slab.h>
21 #include <linux/time.h>
22 #include <linux/string.h>
23 #include <linux/pm_runtime.h>
25 #include <sound/core.h>
26 #include <sound/initval.h>
28 #include <sound/hda_codec.h>
29 #include "hda_controller.h"
31 /* Defines for Nvidia Tegra HDA support */
32 #define HDA_BAR0 0x8000
34 #define HDA_CFG_CMD 0x1004
35 #define HDA_CFG_BAR0 0x1010
37 #define HDA_ENABLE_IO_SPACE (1 << 0)
38 #define HDA_ENABLE_MEM_SPACE (1 << 1)
39 #define HDA_ENABLE_BUS_MASTER (1 << 2)
40 #define HDA_ENABLE_SERR (1 << 8)
41 #define HDA_DISABLE_INTR (1 << 10)
42 #define HDA_BAR0_INIT_PROGRAM 0xFFFFFFFF
43 #define HDA_BAR0_FINAL_PROGRAM (1 << 14)
46 #define HDA_IPFS_CONFIG 0x180
47 #define HDA_IPFS_EN_FPCI 0x1
49 #define HDA_IPFS_FPCI_BAR0 0x80
50 #define HDA_FPCI_BAR0_START 0x40
52 #define HDA_IPFS_INTR_MASK 0x188
53 #define HDA_IPFS_EN_INTR (1 << 16)
56 #define FPCI_DBG_CFG_2 0x10F4
57 #define FPCI_GCAP_NSDO_SHIFT 18
58 #define FPCI_GCAP_NSDO_MASK (0x3 << FPCI_GCAP_NSDO_SHIFT)
60 /* max number of SDs */
61 #define NUM_CAPTURE_SD 1
62 #define NUM_PLAYBACK_SD 1
65 * Tegra194 does not reflect correct number of SDO lines. Below macro
66 * is used to update the GCAP register to workaround the issue.
68 #define TEGRA194_NUM_SDO_LINES 4
74 struct clk *hda2codec_2x_clk;
75 struct clk *hda2hdmi_clk;
77 struct work_struct probe_work;
81 static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
82 module_param(power_save, bint, 0644);
83 MODULE_PARM_DESC(power_save,
84 "Automatic power-saving timeout (in seconds, 0 = disable).");
89 static const struct hda_controller_ops hda_tegra_ops; /* nothing special */
91 static void hda_tegra_init(struct hda_tegra *hda)
95 /* Enable PCI access */
96 v = readl(hda->regs + HDA_IPFS_CONFIG);
97 v |= HDA_IPFS_EN_FPCI;
98 writel(v, hda->regs + HDA_IPFS_CONFIG);
100 /* Enable MEM/IO space and bus master */
101 v = readl(hda->regs + HDA_CFG_CMD);
102 v &= ~HDA_DISABLE_INTR;
103 v |= HDA_ENABLE_MEM_SPACE | HDA_ENABLE_IO_SPACE |
104 HDA_ENABLE_BUS_MASTER | HDA_ENABLE_SERR;
105 writel(v, hda->regs + HDA_CFG_CMD);
107 writel(HDA_BAR0_INIT_PROGRAM, hda->regs + HDA_CFG_BAR0);
108 writel(HDA_BAR0_FINAL_PROGRAM, hda->regs + HDA_CFG_BAR0);
109 writel(HDA_FPCI_BAR0_START, hda->regs + HDA_IPFS_FPCI_BAR0);
111 v = readl(hda->regs + HDA_IPFS_INTR_MASK);
112 v |= HDA_IPFS_EN_INTR;
113 writel(v, hda->regs + HDA_IPFS_INTR_MASK);
116 static int hda_tegra_enable_clocks(struct hda_tegra *data)
120 rc = clk_prepare_enable(data->hda_clk);
123 rc = clk_prepare_enable(data->hda2codec_2x_clk);
126 rc = clk_prepare_enable(data->hda2hdmi_clk);
128 goto disable_codec_2x;
133 clk_disable_unprepare(data->hda2codec_2x_clk);
135 clk_disable_unprepare(data->hda_clk);
139 static void hda_tegra_disable_clocks(struct hda_tegra *data)
141 clk_disable_unprepare(data->hda2hdmi_clk);
142 clk_disable_unprepare(data->hda2codec_2x_clk);
143 clk_disable_unprepare(data->hda_clk);
149 static int __maybe_unused hda_tegra_suspend(struct device *dev)
151 struct snd_card *card = dev_get_drvdata(dev);
154 rc = pm_runtime_force_suspend(dev);
157 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
162 static int __maybe_unused hda_tegra_resume(struct device *dev)
164 struct snd_card *card = dev_get_drvdata(dev);
167 rc = pm_runtime_force_resume(dev);
170 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
175 static int __maybe_unused hda_tegra_runtime_suspend(struct device *dev)
177 struct snd_card *card = dev_get_drvdata(dev);
178 struct azx *chip = card->private_data;
179 struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
181 if (chip && chip->running) {
183 azx_enter_link_reset(chip);
185 hda_tegra_disable_clocks(hda);
190 static int __maybe_unused hda_tegra_runtime_resume(struct device *dev)
192 struct snd_card *card = dev_get_drvdata(dev);
193 struct azx *chip = card->private_data;
194 struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
197 rc = hda_tegra_enable_clocks(hda);
200 if (chip && chip->running) {
202 azx_init_chip(chip, 1);
208 static const struct dev_pm_ops hda_tegra_pm = {
209 SET_SYSTEM_SLEEP_PM_OPS(hda_tegra_suspend, hda_tegra_resume)
210 SET_RUNTIME_PM_OPS(hda_tegra_runtime_suspend,
211 hda_tegra_runtime_resume,
215 static int hda_tegra_dev_disconnect(struct snd_device *device)
217 struct azx *chip = device->device_data;
219 chip->bus.shutdown = 1;
226 static int hda_tegra_dev_free(struct snd_device *device)
228 struct azx *chip = device->device_data;
229 struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
231 cancel_work_sync(&hda->probe_work);
232 if (azx_bus(chip)->chip_init) {
233 azx_stop_all_streams(chip);
237 azx_free_stream_pages(chip);
238 azx_free_streams(chip);
239 snd_hdac_bus_exit(azx_bus(chip));
244 static int hda_tegra_init_chip(struct azx *chip, struct platform_device *pdev)
246 struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
247 struct hdac_bus *bus = azx_bus(chip);
248 struct device *dev = hda->dev;
249 struct resource *res;
251 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
252 hda->regs = devm_ioremap_resource(dev, res);
253 if (IS_ERR(hda->regs))
254 return PTR_ERR(hda->regs);
256 bus->remap_addr = hda->regs + HDA_BAR0;
257 bus->addr = res->start + HDA_BAR0;
264 static int hda_tegra_init_clk(struct hda_tegra *hda)
266 struct device *dev = hda->dev;
268 hda->hda_clk = devm_clk_get(dev, "hda");
269 if (IS_ERR(hda->hda_clk)) {
270 dev_err(dev, "failed to get hda clock\n");
271 return PTR_ERR(hda->hda_clk);
273 hda->hda2codec_2x_clk = devm_clk_get(dev, "hda2codec_2x");
274 if (IS_ERR(hda->hda2codec_2x_clk)) {
275 dev_err(dev, "failed to get hda2codec_2x clock\n");
276 return PTR_ERR(hda->hda2codec_2x_clk);
278 hda->hda2hdmi_clk = devm_clk_get(dev, "hda2hdmi");
279 if (IS_ERR(hda->hda2hdmi_clk)) {
280 dev_err(dev, "failed to get hda2hdmi clock\n");
281 return PTR_ERR(hda->hda2hdmi_clk);
287 static int hda_tegra_first_init(struct azx *chip, struct platform_device *pdev)
289 struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
290 struct hdac_bus *bus = azx_bus(chip);
291 struct snd_card *card = chip->card;
294 int irq_id = platform_get_irq(pdev, 0);
295 const char *sname, *drv_name = "tegra-hda";
296 struct device_node *np = pdev->dev.of_node;
298 err = hda_tegra_init_chip(chip, pdev);
302 err = devm_request_irq(chip->card->dev, irq_id, azx_interrupt,
303 IRQF_SHARED, KBUILD_MODNAME, chip);
305 dev_err(chip->card->dev,
306 "unable to request IRQ %d, disabling device\n",
311 bus->dma_stop_delay = 100;
312 card->sync_irq = bus->irq;
315 * Tegra194 has 4 SDO lines and the STRIPE can be used to
316 * indicate how many of the SDO lines the stream should be
317 * striped. But GCAP register does not reflect the true
318 * capability of HW. Below workaround helps to fix this.
320 * GCAP_NSDO is bits 19:18 in T_AZA_DBG_CFG_2,
321 * 0 for 1 SDO, 1 for 2 SDO, 2 for 4 SDO lines.
323 if (of_device_is_compatible(np, "nvidia,tegra194-hda")) {
326 dev_info(card->dev, "Override SDO lines to %u\n",
327 TEGRA194_NUM_SDO_LINES);
329 val = readl(hda->regs + FPCI_DBG_CFG_2) & ~FPCI_GCAP_NSDO_MASK;
330 val |= (TEGRA194_NUM_SDO_LINES >> 1) << FPCI_GCAP_NSDO_SHIFT;
331 writel(val, hda->regs + FPCI_DBG_CFG_2);
334 gcap = azx_readw(chip, GCAP);
335 dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
337 chip->align_buffer_size = 1;
339 /* read number of streams from GCAP register instead of using
342 chip->capture_streams = (gcap >> 8) & 0x0f;
343 chip->playback_streams = (gcap >> 12) & 0x0f;
344 if (!chip->playback_streams && !chip->capture_streams) {
345 /* gcap didn't give any info, switching to old method */
346 chip->playback_streams = NUM_PLAYBACK_SD;
347 chip->capture_streams = NUM_CAPTURE_SD;
349 chip->capture_index_offset = 0;
350 chip->playback_index_offset = chip->capture_streams;
351 chip->num_streams = chip->playback_streams + chip->capture_streams;
353 /* initialize streams */
354 err = azx_init_streams(chip);
356 dev_err(card->dev, "failed to initialize streams: %d\n", err);
360 err = azx_alloc_stream_pages(chip);
362 dev_err(card->dev, "failed to allocate stream pages: %d\n",
367 /* initialize chip */
368 azx_init_chip(chip, 1);
371 * Playback (for 44.1K/48K, 2-channel, 16-bps) fails with
372 * 4 SDO lines due to legacy design limitation. Following
373 * is, from HD Audio Specification (Revision 1.0a), used to
374 * control striping of the stream across multiple SDO lines
375 * for sample rates <= 48K.
377 * { ((num_channels * bits_per_sample) / number of SDOs) >= 8 }
379 * Due to legacy design issue it is recommended that above
380 * ratio must be greater than 8. Since number of SDO lines is
381 * in powers of 2, next available ratio is 16 which can be
382 * used as a limiting factor here.
384 if (of_device_is_compatible(np, "nvidia,tegra194-hda"))
385 chip->bus.core.sdo_limit = 16;
387 /* codec detection */
388 if (!bus->codec_mask) {
389 dev_err(card->dev, "no codecs found!\n");
394 strncpy(card->driver, drv_name, sizeof(card->driver));
395 /* shortname for card */
396 sname = of_get_property(np, "nvidia,model", NULL);
399 if (strlen(sname) > sizeof(card->shortname))
400 dev_info(card->dev, "truncating shortname for card\n");
401 strncpy(card->shortname, sname, sizeof(card->shortname));
403 /* longname for card */
404 snprintf(card->longname, sizeof(card->longname),
405 "%s at 0x%lx irq %i",
406 card->shortname, bus->addr, bus->irq);
415 static void hda_tegra_probe_work(struct work_struct *work);
417 static int hda_tegra_create(struct snd_card *card,
418 unsigned int driver_caps,
419 struct hda_tegra *hda)
421 static const struct snd_device_ops ops = {
422 .dev_disconnect = hda_tegra_dev_disconnect,
423 .dev_free = hda_tegra_dev_free,
430 mutex_init(&chip->open_mutex);
432 chip->ops = &hda_tegra_ops;
433 chip->driver_caps = driver_caps;
434 chip->driver_type = driver_caps & 0xff;
436 INIT_LIST_HEAD(&chip->pcm_list);
438 chip->codec_probe_mask = -1;
440 chip->single_cmd = false;
443 INIT_WORK(&hda->probe_work, hda_tegra_probe_work);
445 err = azx_bus_init(chip, NULL);
449 chip->bus.core.sync_write = 0;
450 chip->bus.core.needs_damn_long_delay = 1;
451 chip->bus.core.aligned_mmio = 1;
453 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
455 dev_err(card->dev, "Error creating device\n");
462 static const struct of_device_id hda_tegra_match[] = {
463 { .compatible = "nvidia,tegra30-hda" },
464 { .compatible = "nvidia,tegra194-hda" },
467 MODULE_DEVICE_TABLE(of, hda_tegra_match);
469 static int hda_tegra_probe(struct platform_device *pdev)
471 const unsigned int driver_flags = AZX_DCAPS_CORBRP_SELF_CLEAR |
472 AZX_DCAPS_PM_RUNTIME;
473 struct snd_card *card;
475 struct hda_tegra *hda;
478 hda = devm_kzalloc(&pdev->dev, sizeof(*hda), GFP_KERNEL);
481 hda->dev = &pdev->dev;
484 err = snd_card_new(&pdev->dev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
485 THIS_MODULE, 0, &card);
487 dev_err(&pdev->dev, "Error creating card!\n");
491 err = hda_tegra_init_clk(hda);
495 err = hda_tegra_create(card, driver_flags, hda);
498 card->private_data = chip;
500 dev_set_drvdata(&pdev->dev, card);
502 pm_runtime_enable(hda->dev);
503 if (!azx_has_pm_runtime(chip))
504 pm_runtime_forbid(hda->dev);
506 schedule_work(&hda->probe_work);
515 static void hda_tegra_probe_work(struct work_struct *work)
517 struct hda_tegra *hda = container_of(work, struct hda_tegra, probe_work);
518 struct azx *chip = &hda->chip;
519 struct platform_device *pdev = to_platform_device(hda->dev);
522 pm_runtime_get_sync(hda->dev);
523 err = hda_tegra_first_init(chip, pdev);
527 /* create codec instances */
528 err = azx_probe_codecs(chip, 8);
532 err = azx_codec_configure(chip);
536 err = snd_card_register(chip->card);
541 snd_hda_set_power_save(&chip->bus, power_save * 1000);
544 pm_runtime_put(hda->dev);
545 return; /* no error return from async probe */
548 static int hda_tegra_remove(struct platform_device *pdev)
552 ret = snd_card_free(dev_get_drvdata(&pdev->dev));
553 pm_runtime_disable(&pdev->dev);
558 static void hda_tegra_shutdown(struct platform_device *pdev)
560 struct snd_card *card = dev_get_drvdata(&pdev->dev);
565 chip = card->private_data;
566 if (chip && chip->running)
570 static struct platform_driver tegra_platform_hda = {
574 .of_match_table = hda_tegra_match,
576 .probe = hda_tegra_probe,
577 .remove = hda_tegra_remove,
578 .shutdown = hda_tegra_shutdown,
580 module_platform_driver(tegra_platform_hda);
582 MODULE_DESCRIPTION("Tegra HDA bus driver");
583 MODULE_LICENSE("GPL v2");