sound/pci/hda/cs35l41_hda.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 //
   3 // CS35l41 ALSA HDA audio driver
   4 //
   5 // Copyright 2021 Cirrus Logic, Inc.
   6 //
   7 // Author: Lucas Tanure <tanureal@opensource.cirrus.com>
   8
   9 #include <linux/acpi.h>
  10 #include <linux/module.h>
  11 #include <sound/hda_codec.h>
  12 #include "hda_local.h"
  13 #include "hda_auto_parser.h"
  14 #include "hda_jack.h"
  15 #include "hda_generic.h"
  16 #include "hda_component.h"
  17 #include "cs35l41_hda.h"
  18
  19 static const struct reg_sequence cs35l41_hda_config[] = {
  20         { CS35L41_PLL_CLK_CTRL,         0x00000430 }, // 3200000Hz, BCLK Input, PLL_REFCLK_EN = 1
  21         { CS35L41_GLOBAL_CLK_CTRL,      0x00000003 }, // GLOBAL_FS = 48 kHz
  22         { CS35L41_SP_ENABLES,           0x00010000 }, // ASP_RX1_EN = 1
  23         { CS35L41_SP_RATE_CTRL,         0x00000021 }, // ASP_BCLK_FREQ = 3.072 MHz
  24         { CS35L41_SP_FORMAT,            0x20200200 }, // 24 bits, I2S, BCLK Slave, FSYNC Slave
  25         { CS35L41_DAC_PCM1_SRC,         0x00000008 }, // DACPCM1_SRC = ASPRX1
  26         { CS35L41_AMP_DIG_VOL_CTRL,     0x00000000 }, // AMP_VOL_PCM  0.0 dB
  27         { CS35L41_AMP_GAIN_CTRL,        0x00000084 }, // AMP_GAIN_PCM 4.5 dB
  28         { CS35L41_PWR_CTRL2,            0x00000001 }, // AMP_EN = 1
  29 };
  30
  31 static const struct reg_sequence cs35l41_hda_start_bst[] = {
  32         { CS35L41_PWR_CTRL2,            0x00000021 }, // BST_EN = 10, AMP_EN = 1
  33         { CS35L41_PWR_CTRL1,            0x00000001, 3000}, // set GLOBAL_EN = 1
  34 };
  35
  36 static const struct reg_sequence cs35l41_hda_stop_bst[] = {
  37         { CS35L41_PWR_CTRL1,            0x00000000, 3000}, // set GLOBAL_EN = 0
  38 };
  39
  40 // only on amps where GPIO1 is used to control ext. VSPK switch
  41 static const struct reg_sequence cs35l41_start_ext_vspk[] = {
  42         { 0x00000040,                   0x00000055 },
  43         { 0x00000040,                   0x000000AA },
  44         { 0x00007438,                   0x00585941 },
  45         { 0x00007414,                   0x08C82222 },
  46         { 0x0000742C,                   0x00000009 },
  47         { 0x00011008,                   0x00008001 },
  48         { 0x0000742C,                   0x0000000F },
  49         { 0x0000742C,                   0x00000079 },
  50         { 0x00007438,                   0x00585941 },
  51         { CS35L41_PWR_CTRL1,            0x00000001, 3000}, // set GLOBAL_EN = 1
  52         { 0x0000742C,                   0x000000F9 },
  53         { 0x00007438,                   0x00580941 },
  54         { 0x00000040,                   0x000000CC },
  55         { 0x00000040,                   0x00000033 },
  56 };
  57
  58 //only on amps where GPIO1 is used to control ext. VSPK switch
  59 static const struct reg_sequence cs35l41_stop_ext_vspk[] = {
  60         { 0x00000040,                   0x00000055 },
  61         { 0x00000040,                   0x000000AA },
  62         { 0x00007438,                   0x00585941 },
  63         { 0x00002014,                   0x00000000, 3000}, // set GLOBAL_EN = 0
  64         { 0x0000742C,                   0x00000009 },
  65         { 0x00007438,                   0x00580941 },
  66         { 0x00011008,                   0x00000001 },
  67         { 0x0000393C,                   0x000000C0, 6000},
  68         { 0x0000393C,                   0x00000000 },
  69         { 0x00007414,                   0x00C82222 },
  70         { 0x0000742C,                   0x00000000 },
  71         { 0x00000040,                   0x000000CC },
  72         { 0x00000040,                   0x00000033 },
  73 };
  74
  75 static const struct reg_sequence cs35l41_safe_to_active[] = {
  76         { 0x00000040,                   0x00000055 },
  77         { 0x00000040,                   0x000000AA },
  78         { 0x0000742C,                   0x0000000F },
  79         { 0x0000742C,                   0x00000079 },
  80         { 0x00007438,                   0x00585941 },
  81         { CS35L41_PWR_CTRL1,            0x00000001, 2000 }, // GLOBAL_EN = 1
  82         { 0x0000742C,                   0x000000F9 },
  83         { 0x00007438,                   0x00580941 },
  84         { 0x00000040,                   0x000000CC },
  85         { 0x00000040,                   0x00000033 },
  86 };
  87
  88 static const struct reg_sequence cs35l41_active_to_safe[] = {
  89         { 0x00000040,                   0x00000055 },
  90         { 0x00000040,                   0x000000AA },
  91         { 0x00007438,                   0x00585941 },
  92         { CS35L41_AMP_DIG_VOL_CTRL,     0x0000A678 }, // AMP_VOL_PCM Mute
  93         { CS35L41_PWR_CTRL2,            0x00000000 }, // AMP_EN = 0
  94         { CS35L41_PWR_CTRL1,            0x00000000 },
  95         { 0x0000742C,                   0x00000009, 2000 },
  96         { 0x00007438,                   0x00580941 },
  97         { 0x00000040,                   0x000000CC },
  98         { 0x00000040,                   0x00000033 },
  99 };
 100
 101 static const struct reg_sequence cs35l41_reset_to_safe[] = {
 102         { 0x00000040,                   0x00000055 },
 103         { 0x00000040,                   0x000000AA },
 104         { 0x00007438,                   0x00585941 },
 105         { 0x00007414,                   0x08C82222 },
 106         { 0x0000742C,                   0x00000009 },
 107         { 0x00000040,                   0x000000CC },
 108         { 0x00000040,                   0x00000033 },
 109 };
 110
 111 static const struct cs35l41_hda_reg_sequence cs35l41_hda_reg_seq_no_bst = {
 112         .probe          = cs35l41_reset_to_safe,
 113         .num_probe      = ARRAY_SIZE(cs35l41_reset_to_safe),
 114         .open           = cs35l41_hda_config,
 115         .num_open       = ARRAY_SIZE(cs35l41_hda_config),
 116         .prepare        = cs35l41_safe_to_active,
 117         .num_prepare    = ARRAY_SIZE(cs35l41_safe_to_active),
 118         .cleanup        = cs35l41_active_to_safe,
 119         .num_cleanup    = ARRAY_SIZE(cs35l41_active_to_safe),
 120 };
 121
 122 static const struct cs35l41_hda_reg_sequence cs35l41_hda_reg_seq_ext_bst = {
 123         .open           = cs35l41_hda_config,
 124         .num_open       = ARRAY_SIZE(cs35l41_hda_config),
 125         .prepare        = cs35l41_start_ext_vspk,
 126         .num_prepare    = ARRAY_SIZE(cs35l41_start_ext_vspk),
 127         .cleanup        = cs35l41_stop_ext_vspk,
 128         .num_cleanup    = ARRAY_SIZE(cs35l41_stop_ext_vspk),
 129 };
 130
 131 static const struct cs35l41_hda_reg_sequence cs35l41_hda_reg_seq_int_bst = {
 132         .open           = cs35l41_hda_config,
 133         .num_open       = ARRAY_SIZE(cs35l41_hda_config),
 134         .prepare        = cs35l41_hda_start_bst,
 135         .num_prepare    = ARRAY_SIZE(cs35l41_hda_start_bst),
 136         .cleanup        = cs35l41_hda_stop_bst,
 137         .num_cleanup    = ARRAY_SIZE(cs35l41_hda_stop_bst),
 138 };
 139
 140 static void cs35l41_hda_playback_hook(struct device *dev, int action)
 141 {
 142         struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
 143         const struct cs35l41_hda_reg_sequence *reg_seq = cs35l41->reg_seq;
 144         struct regmap *reg = cs35l41->regmap;
 145         int ret = 0;
 146
 147         switch (action) {
 148         case HDA_GEN_PCM_ACT_OPEN:
 149                 if (reg_seq->open)
 150                         ret = regmap_multi_reg_write(reg, reg_seq->open, reg_seq->num_open);
 151                 break;
 152         case HDA_GEN_PCM_ACT_PREPARE:
 153                 if (reg_seq->prepare)
 154                         ret = regmap_multi_reg_write(reg, reg_seq->prepare, reg_seq->num_prepare);
 155                 break;
 156         case HDA_GEN_PCM_ACT_CLEANUP:
 157                 if (reg_seq->cleanup)
 158                         ret = regmap_multi_reg_write(reg, reg_seq->cleanup, reg_seq->num_cleanup);
 159                 break;
 160         case HDA_GEN_PCM_ACT_CLOSE:
 161                 if (reg_seq->close)
 162                         ret = regmap_multi_reg_write(reg, reg_seq->close, reg_seq->num_close);
 163                 break;
 164         default:
 165                 ret = -EINVAL;
 166                 break;
 167         }
 168
 169         if (ret)
 170                 dev_warn(cs35l41->dev, "Failed to apply multi reg write: %d\n", ret);
 171 }
 172
 173 static int cs35l41_hda_channel_map(struct device *dev, unsigned int tx_num, unsigned int *tx_slot,
 174                                     unsigned int rx_num, unsigned int *rx_slot)
 175 {
 176         struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
 177
 178         return cs35l41_set_channels(cs35l41->dev, cs35l41->regmap, tx_num, tx_slot, rx_num,
 179                                     rx_slot);
 180 }
 181
 182 static int cs35l41_hda_bind(struct device *dev, struct device *master, void *master_data)
 183 {
 184         struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
 185         struct hda_component *comps = master_data;
 186
 187         if (!comps || cs35l41->index < 0 || cs35l41->index >= HDA_MAX_COMPONENTS)
 188                 return -EINVAL;
 189
 190         comps = &comps[cs35l41->index];
 191         if (comps->dev)
 192                 return -EBUSY;
 193
 194         comps->dev = dev;
 195         strscpy(comps->name, dev_name(dev), sizeof(comps->name));
 196         comps->playback_hook = cs35l41_hda_playback_hook;
 197         comps->set_channel_map = cs35l41_hda_channel_map;
 198
 199         return 0;
 200 }
 201
 202 static void cs35l41_hda_unbind(struct device *dev, struct device *master, void *master_data)
 203 {
 204         struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
 205         struct hda_component *comps = master_data;
 206
 207         if (comps[cs35l41->index].dev == dev)
 208                 memset(&comps[cs35l41->index], 0, sizeof(*comps));
 209 }
 210
 211 static const struct component_ops cs35l41_hda_comp_ops = {
 212         .bind = cs35l41_hda_bind,
 213         .unbind = cs35l41_hda_unbind,
 214 };
 215
 216 static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41,
 217                                         const struct cs35l41_hda_hw_config *hw_cfg)
 218 {
 219         bool internal_boost = false;
 220         int ret;
 221
 222         if (!hw_cfg) {
 223                 cs35l41->reg_seq = &cs35l41_hda_reg_seq_no_bst;
 224                 return 0;
 225         }
 226
 227         if (hw_cfg->bst_ind || hw_cfg->bst_cap || hw_cfg->bst_ipk)
 228                 internal_boost = true;
 229
 230         switch (hw_cfg->gpio1_func) {
 231         case CS35L41_NOT_USED:
 232                 break;
 233         case CS35l41_VSPK_SWITCH:
 234                 regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL,
 235                                    CS35L41_GPIO1_CTRL_MASK, 1 << CS35L41_GPIO1_CTRL_SHIFT);
 236                 break;
 237         case CS35l41_SYNC:
 238                 regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL,
 239                                    CS35L41_GPIO1_CTRL_MASK, 2 << CS35L41_GPIO1_CTRL_SHIFT);
 240                 break;
 241         default:
 242                 dev_err(cs35l41->dev, "Invalid function %d for GPIO1\n", hw_cfg->gpio1_func);
 243                 return -EINVAL;
 244         }
 245
 246         switch (hw_cfg->gpio2_func) {
 247         case CS35L41_NOT_USED:
 248                 break;
 249         case CS35L41_INTERRUPT:
 250                 regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL,
 251                                    CS35L41_GPIO2_CTRL_MASK, 2 << CS35L41_GPIO2_CTRL_SHIFT);
 252                 break;
 253         default:
 254                 dev_err(cs35l41->dev, "Invalid function %d for GPIO2\n", hw_cfg->gpio2_func);
 255                 return -EINVAL;
 256         }
 257
 258         if (internal_boost) {
 259                 cs35l41->reg_seq = &cs35l41_hda_reg_seq_int_bst;
 260                 if (!(hw_cfg->bst_ind && hw_cfg->bst_cap && hw_cfg->bst_ipk))
 261                         return -EINVAL;
 262                 ret = cs35l41_boost_config(cs35l41->dev, cs35l41->regmap,
 263                                            hw_cfg->bst_ind, hw_cfg->bst_cap, hw_cfg->bst_ipk);
 264                 if (ret)
 265                         return ret;
 266         } else {
 267                 cs35l41->reg_seq = &cs35l41_hda_reg_seq_ext_bst;
 268         }
 269
 270         return cs35l41_hda_channel_map(cs35l41->dev, 0, NULL, 1, (unsigned int *)&hw_cfg->spk_pos);
 271 }
 272
 273 static struct cs35l41_hda_hw_config *cs35l41_hda_read_acpi(struct cs35l41_hda *cs35l41,
 274                                                            const char *hid, int id)
 275 {
 276         struct cs35l41_hda_hw_config *hw_cfg;
 277         u32 values[HDA_MAX_COMPONENTS];
 278         struct acpi_device *adev;
 279         struct device *physdev;
 280         char *property;
 281         size_t nval;
 282         int i, ret;
 283
 284         adev = acpi_dev_get_first_match_dev(hid, NULL, -1);
 285         if (!adev) {
 286                 dev_err(cs35l41->dev, "Failed to find an ACPI device for %s\n", hid);
 287                 return ERR_PTR(-ENODEV);
 288         }
 289
 290         physdev = get_device(acpi_get_first_physical_node(adev));
 291         acpi_dev_put(adev);
 292
 293         property = "cirrus,dev-index";
 294         ret = device_property_count_u32(physdev, property);
 295         if (ret <= 0)
 296                 goto no_acpi_dsd;
 297
 298         if (ret > ARRAY_SIZE(values)) {
 299                 ret = -EINVAL;
 300                 goto err;
 301         }
 302         nval = ret;
 303
 304         ret = device_property_read_u32_array(physdev, property, values, nval);
 305         if (ret)
 306                 goto err;
 307
 308         cs35l41->index = -1;
 309         for (i = 0; i < nval; i++) {
 310                 if (values[i] == id) {
 311                         cs35l41->index = i;
 312                         break;
 313                 }
 314         }
 315         if (cs35l41->index == -1) {
 316                 dev_err(cs35l41->dev, "No index found in %s\n", property);
 317                 ret = -ENODEV;
 318                 goto err;
 319         }
 320
 321         /* To use the same release code for all laptop variants we can't use devm_ version of
 322          * gpiod_get here, as CLSA010* don't have a fully functional bios with an _DSD node
 323          */
 324         cs35l41->reset_gpio = fwnode_gpiod_get_index(&adev->fwnode, "reset", cs35l41->index,
 325                                                      GPIOD_OUT_LOW, "cs35l41-reset");
 326
 327         hw_cfg = kzalloc(sizeof(*hw_cfg), GFP_KERNEL);
 328         if (!hw_cfg) {
 329                 ret = -ENOMEM;
 330                 goto err;
 331         }
 332
 333         property = "cirrus,speaker-position";
 334         ret = device_property_read_u32_array(physdev, property, values, nval);
 335         if (ret)
 336                 goto err_free;
 337         hw_cfg->spk_pos = values[cs35l41->index];
 338
 339         property = "cirrus,gpio1-func";
 340         ret = device_property_read_u32_array(physdev, property, values, nval);
 341         if (ret)
 342                 goto err_free;
 343         hw_cfg->gpio1_func = values[cs35l41->index];
 344
 345         property = "cirrus,gpio2-func";
 346         ret = device_property_read_u32_array(physdev, property, values, nval);
 347         if (ret)
 348                 goto err_free;
 349         hw_cfg->gpio2_func = values[cs35l41->index];
 350
 351         property = "cirrus,boost-peak-milliamp";
 352         ret = device_property_read_u32_array(physdev, property, values, nval);
 353         if (ret == 0)
 354                 hw_cfg->bst_ipk = values[cs35l41->index];
 355
 356         property = "cirrus,boost-ind-nanohenry";
 357         ret = device_property_read_u32_array(physdev, property, values, nval);
 358         if (ret == 0)
 359                 hw_cfg->bst_ind = values[cs35l41->index];
 360
 361         property = "cirrus,boost-cap-microfarad";
 362         ret = device_property_read_u32_array(physdev, property, values, nval);
 363         if (ret == 0)
 364                 hw_cfg->bst_cap = values[cs35l41->index];
 365
 366         put_device(physdev);
 367
 368         return hw_cfg;
 369
 370 err_free:
 371         kfree(hw_cfg);
 372 err:
 373         put_device(physdev);
 374         dev_err(cs35l41->dev, "Failed property %s: %d\n", property, ret);
 375
 376         return ERR_PTR(ret);
 377
 378 no_acpi_dsd:
 379         /*
 380          * Device CLSA0100 doesn't have _DSD so a gpiod_get by the label reset won't work.
 381          * And devices created by i2c-multi-instantiate don't have their device struct pointing to
 382          * the correct fwnode, so acpi_dev must be used here.
 383          * And devm functions expect that the device requesting the resource has the correct
 384          * fwnode.
 385          */
 386         if (strncmp(hid, "CLSA0100", 8) != 0)
 387                 return ERR_PTR(-EINVAL);
 388
 389         /* check I2C address to assign the index */
 390         cs35l41->index = id == 0x40 ? 0 : 1;
 391         cs35l41->reset_gpio = gpiod_get_index(physdev, NULL, 0, GPIOD_OUT_HIGH);
 392         cs35l41->vspk_always_on = true;
 393         put_device(physdev);
 394
 395         return NULL;
 396 }
 397
 398 int cs35l41_hda_probe(struct device *dev, const char *device_name, int id, int irq,
 399                       struct regmap *regmap)
 400 {
 401         unsigned int int_sts, regid, reg_revid, mtl_revid, chipid, int_status;
 402         struct cs35l41_hda_hw_config *acpi_hw_cfg;
 403         struct cs35l41_hda *cs35l41;
 404         int ret;
 405
 406         if (IS_ERR(regmap))
 407                 return PTR_ERR(regmap);
 408
 409         cs35l41 = devm_kzalloc(dev, sizeof(*cs35l41), GFP_KERNEL);
 410         if (!cs35l41)
 411                 return -ENOMEM;
 412
 413         cs35l41->dev = dev;
 414         cs35l41->irq = irq;
 415         cs35l41->regmap = regmap;
 416         dev_set_drvdata(dev, cs35l41);
 417
 418         acpi_hw_cfg = cs35l41_hda_read_acpi(cs35l41, device_name, id);
 419         if (IS_ERR(acpi_hw_cfg))
 420                 return PTR_ERR(acpi_hw_cfg);
 421
 422         if (IS_ERR(cs35l41->reset_gpio)) {
 423                 ret = PTR_ERR(cs35l41->reset_gpio);
 424                 cs35l41->reset_gpio = NULL;
 425                 if (ret == -EBUSY) {
 426                         dev_info(cs35l41->dev, "Reset line busy, assuming shared reset\n");
 427                 } else {
 428                         dev_err_probe(cs35l41->dev, ret, "Failed to get reset GPIO: %d\n", ret);
 429                         goto err;
 430                 }
 431         }
 432         if (cs35l41->reset_gpio) {
 433                 usleep_range(2000, 2100);
 434                 gpiod_set_value_cansleep(cs35l41->reset_gpio, 1);
 435         }
 436
 437         usleep_range(2000, 2100);
 438
 439         ret = regmap_read_poll_timeout(cs35l41->regmap, CS35L41_IRQ1_STATUS4, int_status,
 440                                        int_status & CS35L41_OTP_BOOT_DONE, 1000, 100000);
 441         if (ret) {
 442                 dev_err(cs35l41->dev, "Failed waiting for OTP_BOOT_DONE: %d\n", ret);
 443                 goto err;
 444         }
 445
 446         ret = regmap_read(cs35l41->regmap, CS35L41_IRQ1_STATUS3, &int_sts);
 447         if (ret || (int_sts & CS35L41_OTP_BOOT_ERR)) {
 448                 dev_err(cs35l41->dev, "OTP Boot status %x error: %d\n",
 449                         int_sts & CS35L41_OTP_BOOT_ERR, ret);
 450                 ret = -EIO;
 451                 goto err;
 452         }
 453
 454         ret = regmap_read(cs35l41->regmap, CS35L41_DEVID, &regid);
 455         if (ret) {
 456                 dev_err(cs35l41->dev, "Get Device ID failed: %d\n", ret);
 457                 goto err;
 458         }
 459
 460         ret = regmap_read(cs35l41->regmap, CS35L41_REVID, &reg_revid);
 461         if (ret) {
 462                 dev_err(cs35l41->dev, "Get Revision ID failed: %d\n", ret);
 463                 goto err;
 464         }
 465
 466         mtl_revid = reg_revid & CS35L41_MTLREVID_MASK;
 467
 468         chipid = (mtl_revid % 2) ? CS35L41R_CHIP_ID : CS35L41_CHIP_ID;
 469         if (regid != chipid) {
 470                 dev_err(cs35l41->dev, "CS35L41 Device ID (%X). Expected ID %X\n", regid, chipid);
 471                 ret = -ENODEV;
 472                 goto err;
 473         }
 474
 475         ret = cs35l41_test_key_unlock(cs35l41->dev, cs35l41->regmap);
 476         if (ret)
 477                 goto err;
 478
 479         ret = cs35l41_register_errata_patch(cs35l41->dev, cs35l41->regmap, reg_revid);
 480         if (ret)
 481                 goto err;
 482
 483         ret = cs35l41_otp_unpack(cs35l41->dev, cs35l41->regmap);
 484         if (ret) {
 485                 dev_err(cs35l41->dev, "OTP Unpack failed: %d\n", ret);
 486                 goto err;
 487         }
 488
 489         ret = cs35l41_test_key_lock(cs35l41->dev, cs35l41->regmap);
 490         if (ret)
 491                 goto err;
 492
 493         ret = cs35l41_hda_apply_properties(cs35l41, acpi_hw_cfg);
 494         if (ret)
 495                 goto err;
 496         kfree(acpi_hw_cfg);
 497         acpi_hw_cfg = NULL;
 498
 499         if (cs35l41->reg_seq->probe) {
 500                 ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41->reg_seq->probe,
 501                                              cs35l41->reg_seq->num_probe);
 502                 if (ret) {
 503                         dev_err(cs35l41->dev, "Fail to apply probe reg patch: %d\n", ret);
 504                         goto err;
 505                 }
 506         }
 507
 508         ret = component_add(cs35l41->dev, &cs35l41_hda_comp_ops);
 509         if (ret) {
 510                 dev_err(cs35l41->dev, "Register component failed: %d\n", ret);
 511                 goto err;
 512         }
 513
 514         dev_info(cs35l41->dev, "Cirrus Logic CS35L41 (%x), Revision: %02X\n", regid, reg_revid);
 515
 516         return 0;
 517
 518 err:
 519         kfree(acpi_hw_cfg);
 520         if (!cs35l41->vspk_always_on)
 521                 gpiod_set_value_cansleep(cs35l41->reset_gpio, 0);
 522         gpiod_put(cs35l41->reset_gpio);
 523
 524         return ret;
 525 }
 526 EXPORT_SYMBOL_NS_GPL(cs35l41_hda_probe, SND_HDA_SCODEC_CS35L41);
 527
 528 void cs35l41_hda_remove(struct device *dev)
 529 {
 530         struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
 531
 532         component_del(cs35l41->dev, &cs35l41_hda_comp_ops);
 533
 534         if (!cs35l41->vspk_always_on)
 535                 gpiod_set_value_cansleep(cs35l41->reset_gpio, 0);
 536         gpiod_put(cs35l41->reset_gpio);
 537 }
 538 EXPORT_SYMBOL_NS_GPL(cs35l41_hda_remove, SND_HDA_SCODEC_CS35L41);
 539
 540 MODULE_DESCRIPTION("CS35L41 HDA Driver");
 541 MODULE_AUTHOR("Lucas Tanure, Cirrus Logic Inc, <tanureal@opensource.cirrus.com>");
 542 MODULE_LICENSE("GPL");