1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4 * James Courtier-Dutton <James@superbug.co.uk>
5 * Oswald Buddenhagen <oswald.buddenhagen@gmx.de>
8 * Routines for control of EMU10K1 chips
11 #include <linux/sched.h>
12 #include <linux/delay.h>
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/interrupt.h>
16 #include <linux/iommu.h>
17 #include <linux/pci.h>
18 #include <linux/slab.h>
19 #include <linux/vmalloc.h>
20 #include <linux/mutex.h>
23 #include <sound/core.h>
24 #include <sound/emu10k1.h>
25 #include <linux/firmware.h>
31 #define HANA_FILENAME "emu/hana.fw"
32 #define DOCK_FILENAME "emu/audio_dock.fw"
33 #define EMU1010B_FILENAME "emu/emu1010b.fw"
34 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
35 #define EMU0404_FILENAME "emu/emu0404.fw"
36 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
38 MODULE_FIRMWARE(HANA_FILENAME);
39 MODULE_FIRMWARE(DOCK_FILENAME);
40 MODULE_FIRMWARE(EMU1010B_FILENAME);
41 MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
42 MODULE_FIRMWARE(EMU0404_FILENAME);
43 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
46 /*************************************************************************
48 *************************************************************************/
50 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
52 snd_emu10k1_ptr_write_multiple(emu, ch,
54 VTFT, VTFT_FILTERTARGET_MASK,
55 CVCF, CVCF_CURRENTFILTER_MASK,
67 // The rest is meaningless as long as DCYSUSV_CHANNELENABLE_MASK is zero
72 IFATN, IFATN_FILTERCUTOFF_MASK | IFATN_ATTENUATION_MASK,
75 TREMFRQ, 24, /* 1 Hz */
76 FM2FRQ2, 24, /* 1 Hz */
84 /* Audigy extra stuffs */
86 snd_emu10k1_ptr_write_multiple(emu, ch,
98 static const unsigned int spi_dac_init[] = {
122 static const unsigned int i2c_adc_init[][2] = {
123 { 0x17, 0x00 }, /* Reset */
124 { 0x07, 0x00 }, /* Timeout */
125 { 0x0b, 0x22 }, /* Interface control */
126 { 0x0c, 0x22 }, /* Master mode control */
127 { 0x0d, 0x08 }, /* Powerdown control */
128 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
129 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
130 { 0x10, 0x7b }, /* ALC Control 1 */
131 { 0x11, 0x00 }, /* ALC Control 2 */
132 { 0x12, 0x32 }, /* ALC Control 3 */
133 { 0x13, 0x00 }, /* Noise gate control */
134 { 0x14, 0xa6 }, /* Limiter control */
135 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */
138 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir)
140 unsigned int silent_page;
144 /* disable audio and lock cache */
145 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
146 HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
148 outl(0, emu->port + INTE);
150 snd_emu10k1_ptr_write_multiple(emu, 0,
151 /* reset recording buffers */
152 MICBS, ADCBS_BUFSIZE_NONE,
154 FXBS, ADCBS_BUFSIZE_NONE,
156 ADCBS, ADCBS_BUFSIZE_NONE,
159 /* disable channel interrupt */
163 /* disable stop on loop end */
170 /* set SPDIF bypass mode */
171 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
172 /* enable rear left + rear right AC97 slots */
173 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
177 /* init envelope engine */
178 for (ch = 0; ch < NUM_G; ch++)
179 snd_emu10k1_voice_init(emu, ch);
181 snd_emu10k1_ptr_write_multiple(emu, 0,
182 SPCS0, emu->spdif_bits[0],
183 SPCS1, emu->spdif_bits[1],
184 SPCS2, emu->spdif_bits[2],
187 if (emu->card_capabilities->emu_model) {
188 } else if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
189 /* Hacks for Alice3 to work independent of haP16V driver */
190 /* Setup SRCMulti_I2S SamplingRate */
191 snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000);
193 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
194 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
195 /* Setup SRCMulti Input Audio Enable */
196 /* Use 0xFFFFFFFF to enable P16V sounds. */
197 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
199 /* Enabled Phased (8-channel) P16V playback */
200 outl(0x0201, emu->port + HCFG2);
201 /* Set playback routing. */
202 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
203 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
204 /* Hacks for Alice3 to work independent of haP16V driver */
205 dev_info(emu->card->dev, "Audigy2 value: Special config.\n");
206 /* Setup SRCMulti_I2S SamplingRate */
207 snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000);
209 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
210 snd_emu10k1_ptr20_write(emu, P17V_SRCSel, 0, 0x14);
212 /* Setup SRCMulti Input Audio Enable */
213 snd_emu10k1_ptr20_write(emu, P17V_MIXER_I2S_ENABLE, 0, 0xFF000000);
215 /* Setup SPDIF Out Audio Enable */
216 /* The Audigy 2 Value has a separate SPDIF out,
217 * so no need for a mixer switch
219 snd_emu10k1_ptr20_write(emu, P17V_MIXER_SPDIF_ENABLE, 0, 0xFF000000);
221 tmp = inw(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
222 outw(tmp, emu->port + A_IOCFG);
224 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
227 size = ARRAY_SIZE(spi_dac_init);
228 for (n = 0; n < size; n++)
229 snd_emu10k1_spi_write(emu, spi_dac_init[n]);
231 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
234 * GPIO1: Speakers-enabled.
237 * GPIO4: IEC958 Output on.
242 outw(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
244 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
247 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
248 tmp = inw(emu->port + A_IOCFG);
249 outw(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */
250 tmp = inw(emu->port + A_IOCFG);
251 size = ARRAY_SIZE(i2c_adc_init);
252 for (n = 0; n < size; n++)
253 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
254 for (n = 0; n < 4; n++) {
255 emu->i2c_capture_volume[n][0] = 0xcf;
256 emu->i2c_capture_volume[n][1] = 0xcf;
261 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
262 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
263 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_256K); /* taken from original driver */
265 silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0);
266 for (ch = 0; ch < NUM_G; ch++) {
267 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
268 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
271 if (emu->card_capabilities->emu_model) {
272 outl(HCFG_AUTOMUTE_ASYNC |
274 HCFG_AUDIOENABLE, emu->port + HCFG);
277 * Mute Disable Audio = 0
278 * Lock Tank Memory = 1
279 * Lock Sound Memory = 0
282 } else if (emu->audigy) {
283 if (emu->revision == 4) /* audigy2 */
284 outl(HCFG_AUDIOENABLE |
285 HCFG_AC3ENABLE_CDSPDIF |
286 HCFG_AC3ENABLE_GPSPDIF |
287 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
289 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
290 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
291 * e.g. card_capabilities->joystick */
292 } else if (emu->model == 0x20 ||
293 emu->model == 0xc400 ||
294 (emu->model == 0x21 && emu->revision < 6))
295 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
297 /* With on-chip joystick */
298 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
300 if (enable_ir) { /* enable IR for SB Live */
301 if (emu->card_capabilities->emu_model) {
302 ; /* Disable all access to A_IOCFG for the emu1010 */
303 } else if (emu->card_capabilities->i2c_adc) {
304 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
305 } else if (emu->audigy) {
306 u16 reg = inw(emu->port + A_IOCFG);
307 outw(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
309 outw(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
311 outw(reg, emu->port + A_IOCFG);
313 unsigned int reg = inl(emu->port + HCFG);
314 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
316 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
318 outl(reg, emu->port + HCFG);
322 if (emu->card_capabilities->emu_model) {
323 ; /* Disable all access to A_IOCFG for the emu1010 */
324 } else if (emu->card_capabilities->i2c_adc) {
325 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
326 } else if (emu->audigy) { /* enable analog output */
327 u16 reg = inw(emu->port + A_IOCFG);
328 outw(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
331 if (emu->address_mode == 0) {
333 outl(inl(emu->port + HCFG) | HCFG_EXPANDED_MEM, emu->port + HCFG);
339 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
342 * Enable the audio bit
344 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
346 /* Enable analog/digital outs on audigy */
347 if (emu->card_capabilities->emu_model) {
348 ; /* Disable all access to A_IOCFG for the emu1010 */
349 } else if (emu->card_capabilities->i2c_adc) {
350 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
351 } else if (emu->audigy) {
352 outw(inw(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
354 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
355 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
356 * This has to be done after init ALice3 I2SOut beyond 48KHz.
357 * So, sequence is important. */
358 outw(inw(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
359 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
360 /* Unmute Analog now. */
361 outw(inw(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
363 /* Disable routing from AC97 line out to Front speakers */
364 outw(inw(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
371 /* FIXME: the following routine disables LiveDrive-II !! */
372 /* TOSLink detection */
374 tmp = inl(emu->port + HCFG);
375 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
376 outl(tmp|0x800, emu->port + HCFG);
378 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
380 outl(tmp, emu->port + HCFG);
386 if (emu->card_capabilities->emu_model)
387 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE | INTE_A_GPIOENABLE);
389 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
392 int snd_emu10k1_done(struct snd_emu10k1 *emu)
396 outl(0, emu->port + INTE);
399 * Shutdown the voices
401 for (ch = 0; ch < NUM_G; ch++) {
402 snd_emu10k1_ptr_write_multiple(emu, ch,
413 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
415 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
417 snd_emu10k1_ptr_write_multiple(emu, 0,
418 /* reset recording buffers */
424 ADCBS, ADCBS_BUFSIZE_NONE,
426 TCBS, TCBS_BUFFSIZE_16K,
429 /* disable channel interrupt */
439 /* disable audio and lock cache */
440 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
445 /*************************************************************************
446 * ECARD functional implementation
447 *************************************************************************/
449 /* In A1 Silicon, these bits are in the HC register */
450 #define HOOKN_BIT (1L << 12)
451 #define HANDN_BIT (1L << 11)
452 #define PULSEN_BIT (1L << 10)
454 #define EC_GDI1 (1 << 13)
455 #define EC_GDI0 (1 << 14)
457 #define EC_NUM_CONTROL_BITS 20
459 #define EC_AC3_DATA_SELN 0x0001L
460 #define EC_EE_DATA_SEL 0x0002L
461 #define EC_EE_CNTRL_SELN 0x0004L
462 #define EC_EECLK 0x0008L
463 #define EC_EECS 0x0010L
464 #define EC_EESDO 0x0020L
465 #define EC_TRIM_CSN 0x0040L
466 #define EC_TRIM_SCLK 0x0080L
467 #define EC_TRIM_SDATA 0x0100L
468 #define EC_TRIM_MUTEN 0x0200L
469 #define EC_ADCCAL 0x0400L
470 #define EC_ADCRSTN 0x0800L
471 #define EC_DACCAL 0x1000L
472 #define EC_DACMUTEN 0x2000L
473 #define EC_LEDN 0x4000L
475 #define EC_SPDIF0_SEL_SHIFT 15
476 #define EC_SPDIF1_SEL_SHIFT 17
477 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
478 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
479 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
480 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
481 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
482 * be incremented any time the EEPROM's
483 * format is changed. */
485 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
487 /* Addresses for special values stored in to EEPROM */
488 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
489 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
490 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
492 #define EC_LAST_PROMFILE_ADDR 0x2f
494 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
495 * can be up to 30 characters in length
496 * and is stored as a NULL-terminated
497 * ASCII string. Any unused bytes must be
498 * filled with zeros */
499 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
502 /* Most of this stuff is pretty self-evident. According to the hardware
503 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
504 * offset problem. Weird.
506 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
510 #define EC_DEFAULT_ADC_GAIN 0xC4C4
511 #define EC_DEFAULT_SPDIF0_SEL 0x0
512 #define EC_DEFAULT_SPDIF1_SEL 0x4
514 /**************************************************************************
515 * @func Clock bits into the Ecard's control latch. The Ecard uses a
516 * control latch will is loaded bit-serially by toggling the Modem control
517 * lines from function 2 on the E8010. This function hides these details
518 * and presents the illusion that we are actually writing to a distinct
522 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
524 unsigned short count;
526 unsigned long hc_port;
527 unsigned int hc_value;
529 hc_port = emu->port + HCFG;
530 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
531 outl(hc_value, hc_port);
533 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
535 /* Set up the value */
536 data = ((value & 0x1) ? PULSEN_BIT : 0);
539 outl(hc_value | data, hc_port);
541 /* Clock the shift register */
542 outl(hc_value | data | HANDN_BIT, hc_port);
543 outl(hc_value | data, hc_port);
547 outl(hc_value | HOOKN_BIT, hc_port);
548 outl(hc_value, hc_port);
551 /**************************************************************************
552 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
553 * trim value consists of a 16bit value which is composed of two
554 * 8 bit gain/trim values, one for the left channel and one for the
555 * right channel. The following table maps from the Gain/Attenuation
556 * value in decibels into the corresponding bit pattern for a single
560 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
565 /* Enable writing to the TRIM registers */
566 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
568 /* Do it again to insure that we meet hold time requirements */
569 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
571 for (bit = (1 << 15); bit; bit >>= 1) {
574 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
577 value |= EC_TRIM_SDATA;
580 snd_emu10k1_ecard_write(emu, value);
581 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
582 snd_emu10k1_ecard_write(emu, value);
585 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
588 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
590 unsigned int hc_value;
592 /* Set up the initial settings */
593 emu->ecard_ctrl = EC_RAW_RUN_MODE |
594 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
595 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
597 /* Step 0: Set the codec type in the hardware control register
598 * and enable audio output */
599 hc_value = inl(emu->port + HCFG);
600 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
601 inl(emu->port + HCFG);
603 /* Step 1: Turn off the led and deassert TRIM_CS */
604 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
606 /* Step 2: Calibrate the ADC and DAC */
607 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
609 /* Step 3: Wait for awhile; XXX We can't get away with this
610 * under a real operating system; we'll need to block and wait that
612 snd_emu10k1_wait(emu, 48000);
614 /* Step 4: Switch off the DAC and ADC calibration. Note
615 * That ADC_CAL is actually an inverted signal, so we assert
616 * it here to stop calibration. */
617 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
619 /* Step 4: Switch into run mode */
620 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
622 /* Step 5: Set the analog input gain */
623 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
628 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
630 unsigned long special_port;
631 __always_unused unsigned int value;
633 /* Special initialisation routine
634 * before the rest of the IO-Ports become active.
636 special_port = emu->port + 0x38;
637 value = inl(special_port);
638 outl(0x00d00000, special_port);
639 value = inl(special_port);
640 outl(0x00d00001, special_port);
641 value = inl(special_port);
642 outl(0x00d0005f, special_port);
643 value = inl(special_port);
644 outl(0x00d0007f, special_port);
645 value = inl(special_port);
646 outl(0x0090007f, special_port);
647 value = inl(special_port);
649 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
650 /* Delay to give time for ADC chip to switch on. It needs 113ms */
655 static int snd_emu1010_load_firmware_entry(struct snd_emu10k1 *emu,
656 const struct firmware *fw_entry)
661 __always_unused u16 write_post;
666 /* The FPGA is a Xilinx Spartan IIE XC2S50E */
667 /* On E-MU 0404b it is a Xilinx Spartan III XC3S50 */
668 /* GPIO7 -> FPGA PGMN
671 * FPGA CONFIG OFF -> FPGA PGMN
673 spin_lock_irq(&emu->emu_lock);
674 outw(0x00, emu->port + A_GPIO); /* Set PGMN low for 100uS. */
675 write_post = inw(emu->port + A_GPIO);
677 outw(0x80, emu->port + A_GPIO); /* Leave bit 7 set during netlist setup. */
678 write_post = inw(emu->port + A_GPIO);
679 udelay(100); /* Allow FPGA memory to clean */
680 for (n = 0; n < fw_entry->size; n++) {
681 value = fw_entry->data[n];
682 for (i = 0; i < 8; i++) {
687 outw(reg, emu->port + A_GPIO);
688 write_post = inw(emu->port + A_GPIO);
689 outw(reg | 0x40, emu->port + A_GPIO);
690 write_post = inw(emu->port + A_GPIO);
693 /* After programming, set GPIO bit 4 high again. */
694 outw(0x10, emu->port + A_GPIO);
695 write_post = inw(emu->port + A_GPIO);
696 spin_unlock_irq(&emu->emu_lock);
701 /* firmware file names, per model, init-fw and dock-fw (optional) */
702 static const char * const firmware_names[5][2] = {
703 [EMU_MODEL_EMU1010] = {
704 HANA_FILENAME, DOCK_FILENAME
706 [EMU_MODEL_EMU1010B] = {
707 EMU1010B_FILENAME, MICRO_DOCK_FILENAME
709 [EMU_MODEL_EMU1616] = {
710 EMU1010_NOTEBOOK_FILENAME, MICRO_DOCK_FILENAME
712 [EMU_MODEL_EMU0404] = {
713 EMU0404_FILENAME, NULL
717 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, int dock,
718 const struct firmware **fw)
720 const char *filename;
724 filename = firmware_names[emu->card_capabilities->emu_model][dock];
727 err = request_firmware(fw, filename, &emu->pci->dev);
732 return snd_emu1010_load_firmware_entry(emu, *fw);
735 static void emu1010_firmware_work(struct work_struct *work)
737 struct snd_emu10k1 *emu;
741 emu = container_of(work, struct snd_emu10k1,
742 emu1010.firmware_work);
743 if (emu->card->shutdown)
745 #ifdef CONFIG_PM_SLEEP
749 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); /* OPTIONS: Which cards are attached to the EMU */
750 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
751 /* Audio Dock attached */
752 /* Return to Audio Dock programming mode */
753 dev_info(emu->card->dev,
754 "emu1010: Loading Audio Dock Firmware\n");
755 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG,
756 EMU_HANA_FPGA_CONFIG_AUDIODOCK);
757 err = snd_emu1010_load_firmware(emu, 1, &emu->dock_fw);
760 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
761 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &tmp);
762 dev_info(emu->card->dev,
763 "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", tmp);
764 if ((tmp & 0x1f) != 0x15) {
765 /* FPGA failed to be programmed */
766 dev_info(emu->card->dev,
767 "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n",
771 dev_info(emu->card->dev,
772 "emu1010: Audio Dock Firmware loaded\n");
773 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
774 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
775 dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n", tmp, tmp2);
776 /* Sync clocking between 1010 and Dock */
777 /* Allow DLL to settle */
779 /* Unmute all. Default is muted after a firmware load */
780 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
784 static void emu1010_clock_work(struct work_struct *work)
786 struct snd_emu10k1 *emu;
787 struct snd_ctl_elem_id id;
789 emu = container_of(work, struct snd_emu10k1,
791 if (emu->card->shutdown)
793 #ifdef CONFIG_PM_SLEEP
798 spin_lock_irq(&emu->reg_lock);
799 // This is the only thing that can actually happen.
800 emu->emu1010.clock_source = emu->emu1010.clock_fallback;
801 emu->emu1010.wclock = 1 - emu->emu1010.clock_source;
802 snd_emu1010_update_clock(emu);
803 spin_unlock_irq(&emu->reg_lock);
804 snd_ctl_build_ioff(&id, emu->ctl_clock_source, 0);
805 snd_ctl_notify(emu->card, SNDRV_CTL_EVENT_MASK_VALUE, &id);
808 static void emu1010_interrupt(struct snd_emu10k1 *emu)
812 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &sts);
813 if (sts & EMU_HANA_IRQ_DOCK_LOST) {
814 /* Audio Dock removed */
815 dev_info(emu->card->dev, "emu1010: Audio Dock detached\n");
816 /* The hardware auto-mutes all, so we unmute again */
817 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
818 } else if (sts & EMU_HANA_IRQ_DOCK) {
819 schedule_work(&emu->emu1010.firmware_work);
821 if (sts & EMU_HANA_IRQ_WCLK_CHANGED)
822 schedule_work(&emu->emu1010.clock_work);
826 * Current status of the driver:
827 * ----------------------------
828 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
829 * * PCM device nb. 2:
830 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
831 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
833 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
838 dev_info(emu->card->dev, "emu1010: Special config.\n");
840 /* Mute, and disable audio and lock cache, just in case.
841 * Proper init follows in snd_emu10k1_init(). */
842 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
844 /* Disable 48Volt power to Audio Dock */
845 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
847 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
848 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
849 dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg);
850 if ((reg & 0x3f) == 0x15) {
851 /* FPGA netlist already present so clear it */
852 /* Return to programming mode */
854 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_HANA);
856 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
857 dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg);
858 if ((reg & 0x3f) == 0x15) {
859 /* FPGA failed to return to programming mode */
860 dev_info(emu->card->dev,
861 "emu1010: FPGA failed to return to programming mode\n");
864 dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg);
866 err = snd_emu1010_load_firmware(emu, 0, &emu->firmware);
868 dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n");
872 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
873 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
874 if ((reg & 0x3f) != 0x15) {
875 /* FPGA failed to be programmed */
876 dev_info(emu->card->dev,
877 "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n",
882 dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n");
883 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
884 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
885 dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2);
886 /* Enable 48Volt power to Audio Dock */
887 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
889 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®);
890 dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
891 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE)
892 schedule_work(&emu->emu1010.firmware_work);
893 if (emu->card_capabilities->no_adat) {
894 emu->emu1010.optical_in = 0; /* IN_SPDIF */
895 emu->emu1010.optical_out = 0; /* OUT_SPDIF */
897 /* Optical -> ADAT I/O */
898 emu->emu1010.optical_in = 1; /* IN_ADAT */
899 emu->emu1010.optical_out = 1; /* OUT_ADAT */
901 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) |
902 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF);
903 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
904 /* Set no attenuation on Audio Dock pads. */
905 emu->emu1010.adc_pads = 0x00;
906 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, emu->emu1010.adc_pads);
907 /* Unmute Audio dock DACs, Headphone source DAC-4. */
908 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, EMU_HANA_DOCK_PHONES_192_DAC4);
910 emu->emu1010.dac_pads = EMU_HANA_DOCK_DAC_PAD1 | EMU_HANA_DOCK_DAC_PAD2 |
911 EMU_HANA_DOCK_DAC_PAD3 | EMU_HANA_DOCK_DAC_PAD4;
912 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, emu->emu1010.dac_pads);
913 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
914 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, EMU_HANA_SPDIF_MODE_RX_INVALID);
916 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, EMU_HANA_MIDI_INA_FROM_HAMOA | EMU_HANA_MIDI_INB_FROM_DOCK2);
917 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, EMU_HANA_MIDI_OUT_DOCK2 | EMU_HANA_MIDI_OUT_SYNC2);
919 emu->gpio_interrupt = emu1010_interrupt;
920 // Note: The Audigy INTE is set later
921 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE,
922 EMU_HANA_IRQ_DOCK | EMU_HANA_IRQ_DOCK_LOST | EMU_HANA_IRQ_WCLK_CHANGED);
923 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, ®); // Clear pending IRQs
925 emu->emu1010.clock_source = 1; /* 48000 */
926 emu->emu1010.clock_fallback = 1; /* 48000 */
927 /* Default WCLK set to 48kHz. */
928 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_48K);
929 /* Word Clock source, Internal 48kHz x1 */
930 emu->emu1010.wclock = EMU_HANA_WCLOCK_INT_48K;
931 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
932 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
933 snd_emu1010_update_clock(emu);
935 // The routes are all set to EMU_SRC_SILENCE due to the reset,
936 // so it is safe to simply enable the outputs.
937 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
942 * Create the EMU10K1 instance
945 #ifdef CONFIG_PM_SLEEP
946 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
947 static void free_pm_buffer(struct snd_emu10k1 *emu);
950 static void snd_emu10k1_free(struct snd_card *card)
952 struct snd_emu10k1 *emu = card->private_data;
954 if (emu->port) { /* avoid access to already used hardware */
955 snd_emu10k1_fx8010_tram_setup(emu, 0);
956 snd_emu10k1_done(emu);
957 snd_emu10k1_free_efx(emu);
959 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
960 /* Disable 48Volt power to Audio Dock */
961 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
963 cancel_work_sync(&emu->emu1010.firmware_work);
964 cancel_work_sync(&emu->emu1010.clock_work);
965 release_firmware(emu->firmware);
966 release_firmware(emu->dock_fw);
967 snd_util_memhdr_free(emu->memhdr);
968 if (emu->silent_page.area)
969 snd_dma_free_pages(&emu->silent_page);
970 if (emu->ptb_pages.area)
971 snd_dma_free_pages(&emu->ptb_pages);
972 vfree(emu->page_ptr_table);
973 vfree(emu->page_addr_table);
974 #ifdef CONFIG_PM_SLEEP
979 static const struct snd_emu_chip_details emu_chip_details[] = {
980 /* Audigy 5/Rx SB1550 */
981 /* Tested by michael@gernoth.net 28 Mar 2015 */
982 /* DSP: CA10300-IAT LF
983 * DAC: Cirrus Logic CS4382-KQZ
985 * AC97: Sigmatel STAC9750
988 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102,
989 .driver = "Audigy2", .name = "SB Audigy 5/Rx [SB1550]",
994 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
996 /* Audigy4 (Not PRO) SB0610 */
997 /* Tested by James@superbug.co.uk 4th April 2006 */
1003 * 3: 0 - Digital Out, 1 - Line in
1011 * A: Green jack sense (Front)
1013 * C: Black jack sense (Rear/Side Right)
1014 * D: Yellow jack sense (Center/LFE/Side Left)
1018 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1022 /* Mic input not tested.
1023 * Analog CD input not tested
1024 * Digital Out not tested.
1026 * Audio output 5.1 working. Side outputs not working.
1028 /* DSP: CA10300-IAT LF
1029 * DAC: Cirrus Logic CS4382-KQZ
1030 * ADC: Philips 1361T
1031 * AC97: Sigmatel STAC9750
1034 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1035 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
1040 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1042 /* Audigy 2 Value AC3 out does not work yet.
1043 * Need to find out how to turn off interpolators.
1045 /* Tested by James@superbug.co.uk 3rd July 2005 */
1048 * ADC: Philips 1361T
1053 * A_IOCFG Input (GPIO)
1054 * 0x400 = Front analog jack plugged in. (Green socket)
1055 * 0x1000 = Rear analog jack plugged in. (Black socket)
1056 * 0x2000 = Center/LFE analog jack plugged in. (Orange socket)
1057 * A_IOCFG Output (GPIO)
1058 * 0x60 = Sound out of front Left.
1059 * Win sets it to 0xXX61
1061 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1062 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1068 /* Audigy 2 ZS Notebook Cardbus card.*/
1069 /* Tested by James@superbug.co.uk 6th November 2006 */
1070 /* Audio output 7.1/Headphones working.
1071 * Digital output working. (AC3 not checked, only PCM)
1072 * Audio Mic/Line inputs working.
1073 * Digital input not tested.
1076 * DAC: Wolfson WM8768/WM8568
1077 * ADC: Wolfson WM8775
1081 /* Tested by James@superbug.co.uk 4th April 2006 */
1085 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1086 * 2: Analog input 0 = line in, 1 = mic in
1088 * 4: Digital output 0 = off, 1 = on.
1093 * All bits 1 (0x3fxx) means nothing plugged in.
1094 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1095 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1096 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1100 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1101 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1105 .ca_cardbus_chip = 1,
1109 /* This is MAEM8950 "Mana" */
1110 /* Attach MicroDock[M] to make it an E-MU 1616[m]. */
1111 /* Does NOT support sync daughter card (obviously). */
1112 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1113 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1114 .driver = "Audigy2", .name = "E-MU 02 CardBus [MAEM8950]",
1118 .ca_cardbus_chip = 1,
1120 .emu_model = EMU_MODEL_EMU1616},
1121 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1122 /* This is MAEM8960 "Hana3", 0202 is MAEM8980 */
1123 /* Attach 0202 daughter card to make it an E-MU 1212m, OR a
1124 * MicroDock[M] to make it an E-MU 1616[m]. */
1125 /* Does NOT support sync daughter card. */
1126 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1127 .driver = "Audigy2", .name = "E-MU 1010b PCI [MAEM8960]",
1132 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
1133 /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */
1134 /* This is MAEM8986, 0202 is MAEM8980 */
1135 /* Attach 0202 daughter card to make it an E-MU 1212m, OR a
1136 * MicroDockM to make it an E-MU 1616m. The non-m
1137 * version was never sold with this card, but should
1139 /* Does NOT support sync daughter card. */
1140 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102,
1141 .driver = "Audigy2", .name = "E-MU 1010 PCIe [MAEM8986]",
1146 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */
1147 /* Tested by James@superbug.co.uk 8th July 2005. */
1148 /* This is MAEM8810 "Hana", 0202 is MAEM8820 "Hamoa" */
1149 /* Attach 0202 daughter card to make it an E-MU 1212m, OR an
1150 * AudioDock[M] to make it an E-MU 1820[m]. */
1151 /* Supports sync daughter card. */
1152 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1153 .driver = "Audigy2", .name = "E-MU 1010 [MAEM8810]",
1158 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
1159 /* This is MAEM8852 "HanaLiteLite" */
1160 /* Supports sync daughter card. */
1161 /* Tested by oswald.buddenhagen@gmx.de Mar 2023. */
1162 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1163 .driver = "Audigy2", .name = "E-MU 0404b PCI [MAEM8852]",
1169 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
1170 /* This is MAEM8850 "HanaLite" */
1171 /* Supports sync daughter card. */
1172 /* Tested by James@superbug.co.uk 20-3-2007. */
1173 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1174 .driver = "Audigy2", .name = "E-MU 0404 [MAEM8850]",
1180 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1182 /* Does NOT support sync daughter card. */
1183 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102,
1184 .driver = "Audigy2", .name = "E-MU 0404 PCIe [MAEM8984]",
1190 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */
1191 {.vendor = 0x1102, .device = 0x0008,
1192 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
1197 /* Tested by James@superbug.co.uk 3rd July 2005 */
1198 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1199 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
1207 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1208 /* The 0x20061102 does have SB0350 written on it
1209 * Just like 0x20021102
1211 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1212 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
1219 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1221 /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by
1222 Creative's Windows driver */
1223 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102,
1224 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]",
1231 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1233 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1234 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
1241 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1243 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1244 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
1251 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1254 /* Tested by James@superbug.co.uk 3rd July 2005 */
1257 * ADC: Philips 1361T
1261 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1262 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
1269 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1271 /* Audigy 2 Platinum EX */
1272 /* Win driver sets A_IOCFG output to 0x1c00 */
1273 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1274 .driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]",
1281 /* Dell OEM/Creative Labs Audigy 2 ZS */
1282 /* See ALSA bug#1365 */
1283 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1284 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
1291 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1293 /* Audigy 2 Platinum */
1294 /* Win driver sets A_IOCFG output to 0xa00 */
1295 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1296 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
1303 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1304 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1306 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1307 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
1314 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1315 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
1320 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1321 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
1327 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1328 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
1333 {.vendor = 0x1102, .device = 0x0004,
1334 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1339 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1340 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1345 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1346 .driver = "EMU10K1", .name = "SB Live! [SB0105]",
1351 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1352 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
1357 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1358 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
1363 /* Tested by ALSA bug#1680 26th December 2005 */
1364 /* note: It really has SB0220 written on the card, */
1365 /* but it's SB0228 according to kx.inf */
1366 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1367 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
1372 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1373 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1374 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1379 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1380 .driver = "EMU10K1", .name = "SB Live! 5.1",
1385 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1386 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1387 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
1390 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1391 * share the same IDs!
1394 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1395 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
1400 /* SB Live! Platinum */
1401 /* Win driver sets A_IOCFG output to 0 */
1402 /* Tested by Jonathan Dowland <jon@dow.land> Apr 2023. */
1403 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1404 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
1408 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1409 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
1414 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1415 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
1420 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1421 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
1426 /* Tested by James@superbug.co.uk 3rd July 2005 */
1427 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1428 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
1433 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1434 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
1439 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1440 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1445 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1446 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
1451 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1452 .driver = "EMU10K1", .name = "E-MU APS [PC545]",
1456 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1457 .driver = "EMU10K1", .name = "SB Live! [CT4620]",
1462 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1463 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
1468 {.vendor = 0x1102, .device = 0x0002,
1469 .driver = "EMU10K1", .name = "SB Live! [Unknown]",
1474 { } /* terminator */
1478 * The chip (at least the Audigy 2 CA0102 chip, but most likely others, too)
1479 * has a problem that from time to time it likes to do few DMA reads a bit
1480 * beyond its normal allocation and gets very confused if these reads get
1481 * blocked by a IOMMU.
1483 * This behaviour has been observed for the first (reserved) page
1484 * (for which it happens multiple times at every playback), often for various
1485 * synth pages and sometimes for PCM playback buffers and the page table
1488 * As a workaround let's widen these DMA allocations by an extra page if we
1489 * detect that the device is behind a non-passthrough IOMMU.
1491 static void snd_emu10k1_detect_iommu(struct snd_emu10k1 *emu)
1493 struct iommu_domain *domain;
1495 emu->iommu_workaround = false;
1497 domain = iommu_get_domain_for_dev(emu->card->dev);
1498 if (!domain || domain->type == IOMMU_DOMAIN_IDENTITY)
1501 dev_notice(emu->card->dev,
1502 "non-passthrough IOMMU detected, widening DMA allocations");
1503 emu->iommu_workaround = true;
1506 int snd_emu10k1_create(struct snd_card *card,
1507 struct pci_dev *pci,
1508 unsigned short extin_mask,
1509 unsigned short extout_mask,
1510 long max_cache_bytes,
1514 struct snd_emu10k1 *emu = card->private_data;
1517 size_t page_table_size;
1519 unsigned int silent_page;
1520 const struct snd_emu_chip_details *c;
1522 /* enable PCI device */
1523 err = pcim_enable_device(pci);
1527 card->private_free = snd_emu10k1_free;
1529 spin_lock_init(&emu->reg_lock);
1530 spin_lock_init(&emu->emu_lock);
1531 spin_lock_init(&emu->spi_lock);
1532 spin_lock_init(&emu->i2c_lock);
1533 spin_lock_init(&emu->voice_lock);
1534 spin_lock_init(&emu->synth_lock);
1535 spin_lock_init(&emu->memblk_lock);
1536 mutex_init(&emu->fx8010.lock);
1537 INIT_LIST_HEAD(&emu->mapped_link_head);
1538 INIT_LIST_HEAD(&emu->mapped_order_link_head);
1542 emu->get_synth_voice = NULL;
1543 INIT_WORK(&emu->emu1010.firmware_work, emu1010_firmware_work);
1544 INIT_WORK(&emu->emu1010.clock_work, emu1010_clock_work);
1545 /* read revision & serial */
1546 emu->revision = pci->revision;
1547 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1548 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1550 "vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n",
1551 pci->vendor, pci->device, emu->serial, emu->model);
1553 for (c = emu_chip_details; c->vendor; c++) {
1554 if (c->vendor == pci->vendor && c->device == pci->device) {
1556 if (c->subsystem && (c->subsystem == subsystem))
1561 if (c->subsystem && (c->subsystem != emu->serial))
1563 if (c->revision && c->revision != emu->revision)
1569 if (c->vendor == 0) {
1570 dev_err(card->dev, "emu10k1: Card not recognised\n");
1573 emu->card_capabilities = c;
1574 if (c->subsystem && !subsystem)
1575 dev_dbg(card->dev, "Sound card name = %s\n", c->name);
1577 dev_dbg(card->dev, "Sound card name = %s, "
1578 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1579 "Forced to subsystem = 0x%x\n", c->name,
1580 pci->vendor, pci->device, emu->serial, c->subsystem);
1582 dev_dbg(card->dev, "Sound card name = %s, "
1583 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1584 c->name, pci->vendor, pci->device,
1587 if (!*card->id && c->id)
1588 strscpy(card->id, c->id, sizeof(card->id));
1590 is_audigy = emu->audigy = c->emu10k2_chip;
1592 snd_emu10k1_detect_iommu(emu);
1594 /* set addressing mode */
1595 emu->address_mode = is_audigy ? 0 : 1;
1596 /* set the DMA transfer mask */
1597 emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK;
1598 if (dma_set_mask_and_coherent(&pci->dev, emu->dma_mask) < 0) {
1600 "architecture does not support PCI busmaster DMA with mask 0x%lx\n",
1605 emu->gpr_base = A_FXGPREGBASE;
1607 emu->gpr_base = FXGPREGBASE;
1609 err = pci_request_regions(pci, "EMU10K1");
1612 emu->port = pci_resource_start(pci, 0);
1614 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1616 page_table_size = sizeof(u32) * (emu->address_mode ? MAXPAGES1 :
1618 if (snd_emu10k1_alloc_pages_maybe_wider(emu, page_table_size,
1619 &emu->ptb_pages) < 0)
1621 dev_dbg(card->dev, "page table address range is %.8lx:%.8lx\n",
1622 (unsigned long)emu->ptb_pages.addr,
1623 (unsigned long)(emu->ptb_pages.addr + emu->ptb_pages.bytes));
1625 emu->page_ptr_table = vmalloc(array_size(sizeof(void *),
1626 emu->max_cache_pages));
1627 emu->page_addr_table = vmalloc(array_size(sizeof(unsigned long),
1628 emu->max_cache_pages));
1629 if (!emu->page_ptr_table || !emu->page_addr_table)
1632 if (snd_emu10k1_alloc_pages_maybe_wider(emu, EMUPAGESIZE,
1633 &emu->silent_page) < 0)
1635 dev_dbg(card->dev, "silent page range is %.8lx:%.8lx\n",
1636 (unsigned long)emu->silent_page.addr,
1637 (unsigned long)(emu->silent_page.addr +
1638 emu->silent_page.bytes));
1640 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1643 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1644 sizeof(struct snd_util_memblk);
1646 pci_set_master(pci);
1648 // The masks are not used for Audigy.
1649 // FIXME: these should come from the card_capabilites table.
1650 if (extin_mask == 0)
1651 extin_mask = 0x3fcf; // EXTIN_*
1652 if (extout_mask == 0)
1653 extout_mask = 0x7fff; // EXTOUT_*
1654 emu->fx8010.extin_mask = extin_mask;
1655 emu->fx8010.extout_mask = extout_mask;
1656 emu->enable_ir = enable_ir;
1658 if (emu->card_capabilities->ca_cardbus_chip) {
1659 err = snd_emu10k1_cardbus_init(emu);
1663 if (emu->card_capabilities->ecard) {
1664 err = snd_emu10k1_ecard_init(emu);
1667 } else if (emu->card_capabilities->emu_model) {
1668 err = snd_emu10k1_emu1010_init(emu);
1672 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1673 does not support this, it shouldn't do any harm */
1674 snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1675 AC97SLOT_CNTR|AC97SLOT_LFE);
1678 /* initialize TRAM setup */
1679 emu->fx8010.itram_size = (16 * 1024)/2;
1680 emu->fx8010.etram_pages.area = NULL;
1681 emu->fx8010.etram_pages.bytes = 0;
1683 /* irq handler must be registered after I/O ports are activated */
1684 if (devm_request_irq(&pci->dev, pci->irq, snd_emu10k1_interrupt,
1685 IRQF_SHARED, KBUILD_MODNAME, emu))
1687 emu->irq = pci->irq;
1688 card->sync_irq = emu->irq;
1691 * Init to 0x02109204 :
1692 * Clock accuracy = 0 (1000ppm)
1693 * Sample Rate = 2 (48kHz)
1694 * Audio Channel = 1 (Left of 2)
1695 * Source Number = 0 (Unspecified)
1696 * Generation Status = 1 (Original for Cat Code 12)
1697 * Cat Code = 12 (Digital Signal Mixer)
1699 * Emphasis = 0 (None)
1700 * CP = 1 (Copyright unasserted)
1701 * AN = 0 (Audio data)
1704 emu->spdif_bits[0] = emu->spdif_bits[1] =
1705 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1706 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1707 SPCS_GENERATIONSTATUS | 0x00001200 |
1708 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1710 /* Clear silent pages and set up pointers */
1711 memset(emu->silent_page.area, 0, emu->silent_page.bytes);
1712 silent_page = emu->silent_page.addr << emu->address_mode;
1713 pgtbl = (__le32 *)emu->ptb_pages.area;
1714 for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++)
1715 pgtbl[idx] = cpu_to_le32(silent_page | idx);
1717 /* set up voice indices */
1718 for (idx = 0; idx < NUM_G; idx++)
1719 emu->voices[idx].number = idx;
1721 err = snd_emu10k1_init(emu, enable_ir);
1724 #ifdef CONFIG_PM_SLEEP
1725 err = alloc_pm_buffer(emu);
1730 /* Initialize the effect engine */
1731 err = snd_emu10k1_init_efx(emu);
1734 snd_emu10k1_audio_enable(emu);
1736 #ifdef CONFIG_SND_PROC_FS
1737 snd_emu10k1_proc_init(emu);
1742 #ifdef CONFIG_PM_SLEEP
1743 static const unsigned char saved_regs[] = {
1744 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1745 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1746 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1747 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1748 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1749 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1752 static const unsigned char saved_regs_audigy[] = {
1753 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_EHC,
1754 A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1758 static int alloc_pm_buffer(struct snd_emu10k1 *emu)
1762 size = ARRAY_SIZE(saved_regs);
1764 size += ARRAY_SIZE(saved_regs_audigy);
1765 emu->saved_ptr = vmalloc(array3_size(4, NUM_G, size));
1766 if (!emu->saved_ptr)
1768 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
1770 if (emu->card_capabilities->ca0151_chip &&
1771 snd_p16v_alloc_pm_buffer(emu) < 0)
1776 static void free_pm_buffer(struct snd_emu10k1 *emu)
1778 vfree(emu->saved_ptr);
1779 snd_emu10k1_efx_free_pm_buffer(emu);
1780 if (emu->card_capabilities->ca0151_chip)
1781 snd_p16v_free_pm_buffer(emu);
1784 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
1787 const unsigned char *reg;
1790 val = emu->saved_ptr;
1791 for (reg = saved_regs; *reg != 0xff; reg++)
1792 for (i = 0; i < NUM_G; i++, val++)
1793 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1795 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1796 for (i = 0; i < NUM_G; i++, val++)
1797 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1800 emu->saved_a_iocfg = inw(emu->port + A_IOCFG);
1801 emu->saved_hcfg = inl(emu->port + HCFG);
1804 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
1806 if (emu->card_capabilities->ca_cardbus_chip)
1807 snd_emu10k1_cardbus_init(emu);
1808 if (emu->card_capabilities->ecard)
1809 snd_emu10k1_ecard_init(emu);
1810 else if (emu->card_capabilities->emu_model)
1811 snd_emu10k1_emu1010_init(emu);
1813 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1814 snd_emu10k1_init(emu, emu->enable_ir);
1817 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
1820 const unsigned char *reg;
1823 snd_emu10k1_audio_enable(emu);
1825 /* resore for spdif */
1827 outw(emu->saved_a_iocfg, emu->port + A_IOCFG);
1828 outl(emu->saved_hcfg, emu->port + HCFG);
1830 val = emu->saved_ptr;
1831 for (reg = saved_regs; *reg != 0xff; reg++)
1832 for (i = 0; i < NUM_G; i++, val++)
1833 snd_emu10k1_ptr_write(emu, *reg, i, *val);
1835 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1836 for (i = 0; i < NUM_G; i++, val++)
1837 snd_emu10k1_ptr_write(emu, *reg, i, *val);