sound/pci/emu10k1/emu10k1_main.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
   4  *                   Creative Labs, Inc.
   5  *  Routines for control of EMU10K1 chips
   6  *
   7  *  Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
   8  *      Added support for Audigy 2 Value.
   9  *      Added EMU 1010 support.
  10  *      General bug fixes and enhancements.
  11  *
  12  *  BUGS:
  13  *    --
  14  *
  15  *  TODO:
  16  *    --
  17  */
  18
  19 #include <linux/sched.h>
  20 #include <linux/delay.h>
  21 #include <linux/init.h>
  22 #include <linux/module.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/iommu.h>
  25 #include <linux/pci.h>
  26 #include <linux/slab.h>
  27 #include <linux/vmalloc.h>
  28 #include <linux/mutex.h>
  29
  30
  31 #include <sound/core.h>
  32 #include <sound/emu10k1.h>
  33 #include <linux/firmware.h>
  34 #include "p16v.h"
  35 #include "tina2.h"
  36 #include "p17v.h"
  37
  38
  39 #define HANA_FILENAME "emu/hana.fw"
  40 #define DOCK_FILENAME "emu/audio_dock.fw"
  41 #define EMU1010B_FILENAME "emu/emu1010b.fw"
  42 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
  43 #define EMU0404_FILENAME "emu/emu0404.fw"
  44 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
  45
  46 MODULE_FIRMWARE(HANA_FILENAME);
  47 MODULE_FIRMWARE(DOCK_FILENAME);
  48 MODULE_FIRMWARE(EMU1010B_FILENAME);
  49 MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
  50 MODULE_FIRMWARE(EMU0404_FILENAME);
  51 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
  52
  53
  54 /*************************************************************************
  55  * EMU10K1 init / done
  56  *************************************************************************/
  57
  58 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
  59 {
  60         snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
  61         snd_emu10k1_ptr_write(emu, IP, ch, 0);
  62         snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
  63         snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
  64         snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
  65         snd_emu10k1_ptr_write(emu, CPF, ch, 0);
  66         snd_emu10k1_ptr_write(emu, CCR, ch, 0);
  67
  68         snd_emu10k1_ptr_write(emu, PSST, ch, 0);
  69         snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
  70         snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
  71         snd_emu10k1_ptr_write(emu, Z1, ch, 0);
  72         snd_emu10k1_ptr_write(emu, Z2, ch, 0);
  73         snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
  74
  75         snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
  76         snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
  77         snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
  78         snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
  79         snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
  80         snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24);    /* 1 Hz */
  81         snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24);    /* 1 Hz */
  82         snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
  83
  84         /*** these are last so OFF prevents writing ***/
  85         snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
  86         snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
  87         snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
  88         snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
  89         snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
  90
  91         /* Audigy extra stuffs */
  92         if (emu->audigy) {
  93                 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
  94                 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
  95                 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
  96                 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
  97                 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
  98                 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
  99                 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
 100         }
 101 }
 102
 103 static const unsigned int spi_dac_init[] = {
 104                 0x00ff,
 105                 0x02ff,
 106                 0x0400,
 107                 0x0520,
 108                 0x0600,
 109                 0x08ff,
 110                 0x0aff,
 111                 0x0cff,
 112                 0x0eff,
 113                 0x10ff,
 114                 0x1200,
 115                 0x1400,
 116                 0x1480,
 117                 0x1800,
 118                 0x1aff,
 119                 0x1cff,
 120                 0x1e00,
 121                 0x0530,
 122                 0x0602,
 123                 0x0622,
 124                 0x1400,
 125 };
 126
 127 static const unsigned int i2c_adc_init[][2] = {
 128         { 0x17, 0x00 }, /* Reset */
 129         { 0x07, 0x00 }, /* Timeout */
 130         { 0x0b, 0x22 },  /* Interface control */
 131         { 0x0c, 0x22 },  /* Master mode control */
 132         { 0x0d, 0x08 },  /* Powerdown control */
 133         { 0x0e, 0xcf },  /* Attenuation Left  0x01 = -103dB, 0xff = 24dB */
 134         { 0x0f, 0xcf },  /* Attenuation Right 0.5dB steps */
 135         { 0x10, 0x7b },  /* ALC Control 1 */
 136         { 0x11, 0x00 },  /* ALC Control 2 */
 137         { 0x12, 0x32 },  /* ALC Control 3 */
 138         { 0x13, 0x00 },  /* Noise gate control */
 139         { 0x14, 0xa6 },  /* Limiter control */
 140         { 0x15, ADC_MUX_2 },  /* ADC Mixer control. Mic for A2ZS Notebook */
 141 };
 142
 143 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
 144 {
 145         unsigned int silent_page;
 146         int ch;
 147         u32 tmp;
 148
 149         /* disable audio and lock cache */
 150         outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
 151                 HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
 152
 153         /* reset recording buffers */
 154         snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
 155         snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
 156         snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
 157         snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
 158         snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
 159         snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
 160
 161         /* disable channel interrupt */
 162         outl(0, emu->port + INTE);
 163         snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
 164         snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
 165         snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
 166         snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
 167
 168         if (emu->audigy) {
 169                 /* set SPDIF bypass mode */
 170                 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
 171                 /* enable rear left + rear right AC97 slots */
 172                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
 173                                       AC97SLOT_REAR_LEFT);
 174         }
 175
 176         /* init envelope engine */
 177         for (ch = 0; ch < NUM_G; ch++)
 178                 snd_emu10k1_voice_init(emu, ch);
 179
 180         snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
 181         snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
 182         snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
 183
 184         if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
 185                 /* Hacks for Alice3 to work independent of haP16V driver */
 186                 /* Setup SRCMulti_I2S SamplingRate */
 187                 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
 188                 tmp &= 0xfffff1ff;
 189                 tmp |= (0x2<<9);
 190                 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
 191
 192                 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
 193                 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
 194                 /* Setup SRCMulti Input Audio Enable */
 195                 /* Use 0xFFFFFFFF to enable P16V sounds. */
 196                 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
 197
 198                 /* Enabled Phased (8-channel) P16V playback */
 199                 outl(0x0201, emu->port + HCFG2);
 200                 /* Set playback routing. */
 201                 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
 202         }
 203         if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
 204                 /* Hacks for Alice3 to work independent of haP16V driver */
 205                 dev_info(emu->card->dev, "Audigy2 value: Special config.\n");
 206                 /* Setup SRCMulti_I2S SamplingRate */
 207                 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
 208                 tmp &= 0xfffff1ff;
 209                 tmp |= (0x2<<9);
 210                 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
 211
 212                 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
 213                 outl(0x600000, emu->port + 0x20);
 214                 outl(0x14, emu->port + 0x24);
 215
 216                 /* Setup SRCMulti Input Audio Enable */
 217                 outl(0x7b0000, emu->port + 0x20);
 218                 outl(0xFF000000, emu->port + 0x24);
 219
 220                 /* Setup SPDIF Out Audio Enable */
 221                 /* The Audigy 2 Value has a separate SPDIF out,
 222                  * so no need for a mixer switch
 223                  */
 224                 outl(0x7a0000, emu->port + 0x20);
 225                 outl(0xFF000000, emu->port + 0x24);
 226                 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
 227                 outl(tmp, emu->port + A_IOCFG);
 228         }
 229         if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
 230                 int size, n;
 231
 232                 size = ARRAY_SIZE(spi_dac_init);
 233                 for (n = 0; n < size; n++)
 234                         snd_emu10k1_spi_write(emu, spi_dac_init[n]);
 235
 236                 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
 237                 /* Enable GPIOs
 238                  * GPIO0: Unknown
 239                  * GPIO1: Speakers-enabled.
 240                  * GPIO2: Unknown
 241                  * GPIO3: Unknown
 242                  * GPIO4: IEC958 Output on.
 243                  * GPIO5: Unknown
 244                  * GPIO6: Unknown
 245                  * GPIO7: Unknown
 246                  */
 247                 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
 248         }
 249         if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
 250                 int size, n;
 251
 252                 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
 253                 tmp = inl(emu->port + A_IOCFG);
 254                 outl(tmp | 0x4, emu->port + A_IOCFG);  /* Set bit 2 for mic input */
 255                 tmp = inl(emu->port + A_IOCFG);
 256                 size = ARRAY_SIZE(i2c_adc_init);
 257                 for (n = 0; n < size; n++)
 258                         snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
 259                 for (n = 0; n < 4; n++) {
 260                         emu->i2c_capture_volume[n][0] = 0xcf;
 261                         emu->i2c_capture_volume[n][1] = 0xcf;
 262                 }
 263         }
 264
 265
 266         snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
 267         snd_emu10k1_ptr_write(emu, TCB, 0, 0);  /* taken from original driver */
 268         snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
 269
 270         silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0);
 271         for (ch = 0; ch < NUM_G; ch++) {
 272                 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
 273                 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
 274         }
 275
 276         if (emu->card_capabilities->emu_model) {
 277                 outl(HCFG_AUTOMUTE_ASYNC |
 278                         HCFG_EMU32_SLAVE |
 279                         HCFG_AUDIOENABLE, emu->port + HCFG);
 280         /*
 281          *  Hokay, setup HCFG
 282          *   Mute Disable Audio = 0
 283          *   Lock Tank Memory = 1
 284          *   Lock Sound Memory = 0
 285          *   Auto Mute = 1
 286          */
 287         } else if (emu->audigy) {
 288                 if (emu->revision == 4) /* audigy2 */
 289                         outl(HCFG_AUDIOENABLE |
 290                              HCFG_AC3ENABLE_CDSPDIF |
 291                              HCFG_AC3ENABLE_GPSPDIF |
 292                              HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 293                 else
 294                         outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 295         /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
 296          * e.g. card_capabilities->joystick */
 297         } else if (emu->model == 0x20 ||
 298             emu->model == 0xc400 ||
 299             (emu->model == 0x21 && emu->revision < 6))
 300                 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
 301         else
 302                 /* With on-chip joystick */
 303                 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 304
 305         if (enable_ir) {        /* enable IR for SB Live */
 306                 if (emu->card_capabilities->emu_model) {
 307                         ;  /* Disable all access to A_IOCFG for the emu1010 */
 308                 } else if (emu->card_capabilities->i2c_adc) {
 309                         ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 310                 } else if (emu->audigy) {
 311                         unsigned int reg = inl(emu->port + A_IOCFG);
 312                         outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
 313                         udelay(500);
 314                         outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
 315                         udelay(100);
 316                         outl(reg, emu->port + A_IOCFG);
 317                 } else {
 318                         unsigned int reg = inl(emu->port + HCFG);
 319                         outl(reg | HCFG_GPOUT2, emu->port + HCFG);
 320                         udelay(500);
 321                         outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
 322                         udelay(100);
 323                         outl(reg, emu->port + HCFG);
 324                 }
 325         }
 326
 327         if (emu->card_capabilities->emu_model) {
 328                 ;  /* Disable all access to A_IOCFG for the emu1010 */
 329         } else if (emu->card_capabilities->i2c_adc) {
 330                 ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 331         } else if (emu->audigy) {       /* enable analog output */
 332                 unsigned int reg = inl(emu->port + A_IOCFG);
 333                 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
 334         }
 335
 336         if (emu->address_mode == 0) {
 337                 /* use 16M in 4G */
 338                 outl(inl(emu->port + HCFG) | HCFG_EXPANDED_MEM, emu->port + HCFG);
 339         }
 340
 341         return 0;
 342 }
 343
 344 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
 345 {
 346         /*
 347          *  Enable the audio bit
 348          */
 349         outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
 350
 351         /* Enable analog/digital outs on audigy */
 352         if (emu->card_capabilities->emu_model) {
 353                 ;  /* Disable all access to A_IOCFG for the emu1010 */
 354         } else if (emu->card_capabilities->i2c_adc) {
 355                 ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 356         } else if (emu->audigy) {
 357                 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
 358
 359                 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
 360                         /* Unmute Analog now.  Set GPO6 to 1 for Apollo.
 361                          * This has to be done after init ALice3 I2SOut beyond 48KHz.
 362                          * So, sequence is important. */
 363                         outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
 364                 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
 365                         /* Unmute Analog now. */
 366                         outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
 367                 } else {
 368                         /* Disable routing from AC97 line out to Front speakers */
 369                         outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
 370                 }
 371         }
 372
 373 #if 0
 374         {
 375         unsigned int tmp;
 376         /* FIXME: the following routine disables LiveDrive-II !! */
 377         /* TOSLink detection */
 378         emu->tos_link = 0;
 379         tmp = inl(emu->port + HCFG);
 380         if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
 381                 outl(tmp|0x800, emu->port + HCFG);
 382                 udelay(50);
 383                 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
 384                         emu->tos_link = 1;
 385                         outl(tmp, emu->port + HCFG);
 386                 }
 387         }
 388         }
 389 #endif
 390
 391         snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
 392 }
 393
 394 int snd_emu10k1_done(struct snd_emu10k1 *emu)
 395 {
 396         int ch;
 397
 398         outl(0, emu->port + INTE);
 399
 400         /*
 401          *  Shutdown the chip
 402          */
 403         for (ch = 0; ch < NUM_G; ch++)
 404                 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
 405         for (ch = 0; ch < NUM_G; ch++) {
 406                 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
 407                 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
 408                 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
 409                 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
 410         }
 411
 412         /* reset recording buffers */
 413         snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
 414         snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
 415         snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
 416         snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
 417         snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
 418         snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
 419         snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
 420         snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
 421         snd_emu10k1_ptr_write(emu, TCB, 0, 0);
 422         if (emu->audigy)
 423                 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
 424         else
 425                 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
 426
 427         /* disable channel interrupt */
 428         snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
 429         snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
 430         snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
 431         snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
 432
 433         /* disable audio and lock cache */
 434         outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
 435         snd_emu10k1_ptr_write(emu, PTB, 0, 0);
 436
 437         return 0;
 438 }
 439
 440 /*************************************************************************
 441  * ECARD functional implementation
 442  *************************************************************************/
 443
 444 /* In A1 Silicon, these bits are in the HC register */
 445 #define HOOKN_BIT               (1L << 12)
 446 #define HANDN_BIT               (1L << 11)
 447 #define PULSEN_BIT              (1L << 10)
 448
 449 #define EC_GDI1                 (1 << 13)
 450 #define EC_GDI0                 (1 << 14)
 451
 452 #define EC_NUM_CONTROL_BITS     20
 453
 454 #define EC_AC3_DATA_SELN        0x0001L
 455 #define EC_EE_DATA_SEL          0x0002L
 456 #define EC_EE_CNTRL_SELN        0x0004L
 457 #define EC_EECLK                0x0008L
 458 #define EC_EECS                 0x0010L
 459 #define EC_EESDO                0x0020L
 460 #define EC_TRIM_CSN             0x0040L
 461 #define EC_TRIM_SCLK            0x0080L
 462 #define EC_TRIM_SDATA           0x0100L
 463 #define EC_TRIM_MUTEN           0x0200L
 464 #define EC_ADCCAL               0x0400L
 465 #define EC_ADCRSTN              0x0800L
 466 #define EC_DACCAL               0x1000L
 467 #define EC_DACMUTEN             0x2000L
 468 #define EC_LEDN                 0x4000L
 469
 470 #define EC_SPDIF0_SEL_SHIFT     15
 471 #define EC_SPDIF1_SEL_SHIFT     17
 472 #define EC_SPDIF0_SEL_MASK      (0x3L << EC_SPDIF0_SEL_SHIFT)
 473 #define EC_SPDIF1_SEL_MASK      (0x7L << EC_SPDIF1_SEL_SHIFT)
 474 #define EC_SPDIF0_SELECT(_x)    (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
 475 #define EC_SPDIF1_SELECT(_x)    (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
 476 #define EC_CURRENT_PROM_VERSION 0x01    /* Self-explanatory.  This should
 477                                          * be incremented any time the EEPROM's
 478                                          * format is changed.  */
 479
 480 #define EC_EEPROM_SIZE          0x40    /* ECARD EEPROM has 64 16-bit words */
 481
 482 /* Addresses for special values stored in to EEPROM */
 483 #define EC_PROM_VERSION_ADDR    0x20    /* Address of the current prom version */
 484 #define EC_BOARDREV0_ADDR       0x21    /* LSW of board rev */
 485 #define EC_BOARDREV1_ADDR       0x22    /* MSW of board rev */
 486
 487 #define EC_LAST_PROMFILE_ADDR   0x2f
 488
 489 #define EC_SERIALNUM_ADDR       0x30    /* First word of serial number.  The
 490                                          * can be up to 30 characters in length
 491                                          * and is stored as a NULL-terminated
 492                                          * ASCII string.  Any unused bytes must be
 493                                          * filled with zeros */
 494 #define EC_CHECKSUM_ADDR        0x3f    /* Location at which checksum is stored */
 495
 496
 497 /* Most of this stuff is pretty self-evident.  According to the hardware
 498  * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
 499  * offset problem.  Weird.
 500  */
 501 #define EC_RAW_RUN_MODE         (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
 502                                  EC_TRIM_CSN)
 503
 504
 505 #define EC_DEFAULT_ADC_GAIN     0xC4C4
 506 #define EC_DEFAULT_SPDIF0_SEL   0x0
 507 #define EC_DEFAULT_SPDIF1_SEL   0x4
 508
 509 /**************************************************************************
 510  * @func Clock bits into the Ecard's control latch.  The Ecard uses a
 511  *  control latch will is loaded bit-serially by toggling the Modem control
 512  *  lines from function 2 on the E8010.  This function hides these details
 513  *  and presents the illusion that we are actually writing to a distinct
 514  *  register.
 515  */
 516
 517 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
 518 {
 519         unsigned short count;
 520         unsigned int data;
 521         unsigned long hc_port;
 522         unsigned int hc_value;
 523
 524         hc_port = emu->port + HCFG;
 525         hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
 526         outl(hc_value, hc_port);
 527
 528         for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
 529
 530                 /* Set up the value */
 531                 data = ((value & 0x1) ? PULSEN_BIT : 0);
 532                 value >>= 1;
 533
 534                 outl(hc_value | data, hc_port);
 535
 536                 /* Clock the shift register */
 537                 outl(hc_value | data | HANDN_BIT, hc_port);
 538                 outl(hc_value | data, hc_port);
 539         }
 540
 541         /* Latch the bits */
 542         outl(hc_value | HOOKN_BIT, hc_port);
 543         outl(hc_value, hc_port);
 544 }
 545
 546 /**************************************************************************
 547  * @func Set the gain of the ECARD's CS3310 Trim/gain controller.  The
 548  * trim value consists of a 16bit value which is composed of two
 549  * 8 bit gain/trim values, one for the left channel and one for the
 550  * right channel.  The following table maps from the Gain/Attenuation
 551  * value in decibels into the corresponding bit pattern for a single
 552  * channel.
 553  */
 554
 555 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
 556                                          unsigned short gain)
 557 {
 558         unsigned int bit;
 559
 560         /* Enable writing to the TRIM registers */
 561         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
 562
 563         /* Do it again to insure that we meet hold time requirements */
 564         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
 565
 566         for (bit = (1 << 15); bit; bit >>= 1) {
 567                 unsigned int value;
 568
 569                 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
 570
 571                 if (gain & bit)
 572                         value |= EC_TRIM_SDATA;
 573
 574                 /* Clock the bit */
 575                 snd_emu10k1_ecard_write(emu, value);
 576                 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
 577                 snd_emu10k1_ecard_write(emu, value);
 578         }
 579
 580         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
 581 }
 582
 583 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
 584 {
 585         unsigned int hc_value;
 586
 587         /* Set up the initial settings */
 588         emu->ecard_ctrl = EC_RAW_RUN_MODE |
 589                           EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
 590                           EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
 591
 592         /* Step 0: Set the codec type in the hardware control register
 593          * and enable audio output */
 594         hc_value = inl(emu->port + HCFG);
 595         outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
 596         inl(emu->port + HCFG);
 597
 598         /* Step 1: Turn off the led and deassert TRIM_CS */
 599         snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
 600
 601         /* Step 2: Calibrate the ADC and DAC */
 602         snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
 603
 604         /* Step 3: Wait for awhile;   XXX We can't get away with this
 605          * under a real operating system; we'll need to block and wait that
 606          * way. */
 607         snd_emu10k1_wait(emu, 48000);
 608
 609         /* Step 4: Switch off the DAC and ADC calibration.  Note
 610          * That ADC_CAL is actually an inverted signal, so we assert
 611          * it here to stop calibration.  */
 612         snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
 613
 614         /* Step 4: Switch into run mode */
 615         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
 616
 617         /* Step 5: Set the analog input gain */
 618         snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
 619
 620         return 0;
 621 }
 622
 623 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
 624 {
 625         unsigned long special_port;
 626         __always_unused unsigned int value;
 627
 628         /* Special initialisation routine
 629          * before the rest of the IO-Ports become active.
 630          */
 631         special_port = emu->port + 0x38;
 632         value = inl(special_port);
 633         outl(0x00d00000, special_port);
 634         value = inl(special_port);
 635         outl(0x00d00001, special_port);
 636         value = inl(special_port);
 637         outl(0x00d0005f, special_port);
 638         value = inl(special_port);
 639         outl(0x00d0007f, special_port);
 640         value = inl(special_port);
 641         outl(0x0090007f, special_port);
 642         value = inl(special_port);
 643
 644         snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
 645         /* Delay to give time for ADC chip to switch on. It needs 113ms */
 646         msleep(200);
 647         return 0;
 648 }
 649
 650 static int snd_emu1010_load_firmware_entry(struct snd_emu10k1 *emu,
 651                                      const struct firmware *fw_entry)
 652 {
 653         int n, i;
 654         int reg;
 655         int value;
 656         __always_unused unsigned int write_post;
 657         unsigned long flags;
 658
 659         if (!fw_entry)
 660                 return -EIO;
 661
 662         /* The FPGA is a Xilinx Spartan IIE XC2S50E */
 663         /* GPIO7 -> FPGA PGMN
 664          * GPIO6 -> FPGA CCLK
 665          * GPIO5 -> FPGA DIN
 666          * FPGA CONFIG OFF -> FPGA PGMN
 667          */
 668         spin_lock_irqsave(&emu->emu_lock, flags);
 669         outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
 670         write_post = inl(emu->port + A_IOCFG);
 671         udelay(100);
 672         outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
 673         write_post = inl(emu->port + A_IOCFG);
 674         udelay(100); /* Allow FPGA memory to clean */
 675         for (n = 0; n < fw_entry->size; n++) {
 676                 value = fw_entry->data[n];
 677                 for (i = 0; i < 8; i++) {
 678                         reg = 0x80;
 679                         if (value & 0x1)
 680                                 reg = reg | 0x20;
 681                         value = value >> 1;
 682                         outl(reg, emu->port + A_IOCFG);
 683                         write_post = inl(emu->port + A_IOCFG);
 684                         outl(reg | 0x40, emu->port + A_IOCFG);
 685                         write_post = inl(emu->port + A_IOCFG);
 686                 }
 687         }
 688         /* After programming, set GPIO bit 4 high again. */
 689         outl(0x10, emu->port + A_IOCFG);
 690         write_post = inl(emu->port + A_IOCFG);
 691         spin_unlock_irqrestore(&emu->emu_lock, flags);
 692
 693         return 0;
 694 }
 695
 696 /* firmware file names, per model, init-fw and dock-fw (optional) */
 697 static const char * const firmware_names[5][2] = {
 698         [EMU_MODEL_EMU1010] = {
 699                 HANA_FILENAME, DOCK_FILENAME
 700         },
 701         [EMU_MODEL_EMU1010B] = {
 702                 EMU1010B_FILENAME, MICRO_DOCK_FILENAME
 703         },
 704         [EMU_MODEL_EMU1616] = {
 705                 EMU1010_NOTEBOOK_FILENAME, MICRO_DOCK_FILENAME
 706         },
 707         [EMU_MODEL_EMU0404] = {
 708                 EMU0404_FILENAME, NULL
 709         },
 710 };
 711
 712 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, int dock,
 713                                      const struct firmware **fw)
 714 {
 715         const char *filename;
 716         int err;
 717
 718         if (!*fw) {
 719                 filename = firmware_names[emu->card_capabilities->emu_model][dock];
 720                 if (!filename)
 721                         return 0;
 722                 err = request_firmware(fw, filename, &emu->pci->dev);
 723                 if (err)
 724                         return err;
 725         }
 726
 727         return snd_emu1010_load_firmware_entry(emu, *fw);
 728 }
 729
 730 static void emu1010_firmware_work(struct work_struct *work)
 731 {
 732         struct snd_emu10k1 *emu;
 733         u32 tmp, tmp2, reg;
 734         int err;
 735
 736         emu = container_of(work, struct snd_emu10k1,
 737                            emu1010.firmware_work.work);
 738         if (emu->card->shutdown)
 739                 return;
 740 #ifdef CONFIG_PM_SLEEP
 741         if (emu->suspend)
 742                 return;
 743 #endif
 744         snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */
 745         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg); /* OPTIONS: Which cards are attached to the EMU */
 746         if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
 747                 /* Audio Dock attached */
 748                 /* Return to Audio Dock programming mode */
 749                 dev_info(emu->card->dev,
 750                          "emu1010: Loading Audio Dock Firmware\n");
 751                 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG,
 752                                        EMU_HANA_FPGA_CONFIG_AUDIODOCK);
 753                 err = snd_emu1010_load_firmware(emu, 1, &emu->dock_fw);
 754                 if (err < 0)
 755                         goto next;
 756
 757                 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
 758                 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp);
 759                 dev_info(emu->card->dev,
 760                          "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n", tmp);
 761                 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
 762                 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &tmp);
 763                 dev_info(emu->card->dev,
 764                          "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", tmp);
 765                 if ((tmp & 0x1f) != 0x15) {
 766                         /* FPGA failed to be programmed */
 767                         dev_info(emu->card->dev,
 768                                  "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n",
 769                                  tmp);
 770                         goto next;
 771                 }
 772                 dev_info(emu->card->dev,
 773                          "emu1010: Audio Dock Firmware loaded\n");
 774                 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
 775                 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
 776                 dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n", tmp, tmp2);
 777                 /* Sync clocking between 1010 and Dock */
 778                 /* Allow DLL to settle */
 779                 msleep(10);
 780                 /* Unmute all. Default is muted after a firmware load */
 781                 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
 782         } else if (!reg && emu->emu1010.last_reg) {
 783                 /* Audio Dock removed */
 784                 dev_info(emu->card->dev, "emu1010: Audio Dock detached\n");
 785                 /* Unmute all */
 786                 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
 787         }
 788
 789  next:
 790         emu->emu1010.last_reg = reg;
 791         if (!emu->card->shutdown)
 792                 schedule_delayed_work(&emu->emu1010.firmware_work,
 793                                       msecs_to_jiffies(1000));
 794 }
 795
 796 /*
 797  * EMU-1010 - details found out from this driver, official MS Win drivers,
 798  * testing the card:
 799  *
 800  * Audigy2 (aka Alice2):
 801  * ---------------------
 802  *      * communication over PCI
 803  *      * conversion of 32-bit data coming over EMU32 links from HANA FPGA
 804  *        to 2 x 16-bit, using internal DSP instructions
 805  *      * slave mode, clock supplied by HANA
 806  *      * linked to HANA using:
 807  *              32 x 32-bit serial EMU32 output channels
 808  *              16 x EMU32 input channels
 809  *              (?) x I2S I/O channels (?)
 810  *
 811  * FPGA (aka HANA):
 812  * ---------------
 813  *      * provides all (?) physical inputs and outputs of the card
 814  *              (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
 815  *      * provides clock signal for the card and Alice2
 816  *      * two crystals - for 44.1kHz and 48kHz multiples
 817  *      * provides internal routing of signal sources to signal destinations
 818  *      * inputs/outputs to Alice2 - see above
 819  *
 820  * Current status of the driver:
 821  * ----------------------------
 822  *      * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
 823  *      * PCM device nb. 2:
 824  *              16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
 825  *              16 x 32-bit capture - snd_emu10k1_capture_efx_ops
 826  */
 827 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
 828 {
 829         unsigned int i;
 830         u32 tmp, tmp2, reg;
 831         int err;
 832
 833         dev_info(emu->card->dev, "emu1010: Special config.\n");
 834         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 835          * Lock Sound Memory Cache, Lock Tank Memory Cache,
 836          * Mute all codecs.
 837          */
 838         outl(0x0005a00c, emu->port + HCFG);
 839         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 840          * Lock Tank Memory Cache,
 841          * Mute all codecs.
 842          */
 843         outl(0x0005a004, emu->port + HCFG);
 844         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 845          * Mute all codecs.
 846          */
 847         outl(0x0005a000, emu->port + HCFG);
 848         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 849          * Mute all codecs.
 850          */
 851         outl(0x0005a000, emu->port + HCFG);
 852
 853         /* Disable 48Volt power to Audio Dock */
 854         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
 855
 856         /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
 857         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
 858         dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg);
 859         if ((reg & 0x3f) == 0x15) {
 860                 /* FPGA netlist already present so clear it */
 861                 /* Return to programming mode */
 862
 863                 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02);
 864         }
 865         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
 866         dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg);
 867         if ((reg & 0x3f) == 0x15) {
 868                 /* FPGA failed to return to programming mode */
 869                 dev_info(emu->card->dev,
 870                          "emu1010: FPGA failed to return to programming mode\n");
 871                 return -ENODEV;
 872         }
 873         dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg);
 874
 875         err = snd_emu1010_load_firmware(emu, 0, &emu->firmware);
 876         if (err < 0) {
 877                 dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n");
 878                 return err;
 879         }
 880
 881         /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
 882         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
 883         if ((reg & 0x3f) != 0x15) {
 884                 /* FPGA failed to be programmed */
 885                 dev_info(emu->card->dev,
 886                          "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n",
 887                          reg);
 888                 return -ENODEV;
 889         }
 890
 891         dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n");
 892         snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
 893         snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
 894         dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2);
 895         /* Enable 48Volt power to Audio Dock */
 896         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
 897
 898         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
 899         dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
 900         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
 901         dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
 902         snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp);
 903         /* Optical -> ADAT I/O  */
 904         /* 0 : SPDIF
 905          * 1 : ADAT
 906          */
 907         emu->emu1010.optical_in = 1; /* IN_ADAT */
 908         emu->emu1010.optical_out = 1; /* IN_ADAT */
 909         tmp = 0;
 910         tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
 911                 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
 912         snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
 913         snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp);
 914         /* Set no attenuation on Audio Dock pads. */
 915         snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00);
 916         emu->emu1010.adc_pads = 0x00;
 917         snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
 918         /* Unmute Audio dock DACs, Headphone source DAC-4. */
 919         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
 920         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
 921         snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp);
 922         /* DAC PADs. */
 923         snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f);
 924         emu->emu1010.dac_pads = 0x0f;
 925         snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
 926         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
 927         snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
 928         /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
 929         snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10);
 930         /* MIDI routing */
 931         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19);
 932         /* Unknown. */
 933         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c);
 934         /* IRQ Enable: All on */
 935         /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */
 936         /* IRQ Enable: All off */
 937         snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00);
 938
 939         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
 940         dev_info(emu->card->dev, "emu1010: Card options3 = 0x%x\n", reg);
 941         /* Default WCLK set to 48kHz. */
 942         snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00);
 943         /* Word Clock source, Internal 48kHz x1 */
 944         snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
 945         /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
 946         /* Audio Dock LEDs. */
 947         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
 948
 949 #if 0
 950         /* For 96kHz */
 951         snd_emu1010_fpga_link_dst_src_write(emu,
 952                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
 953         snd_emu1010_fpga_link_dst_src_write(emu,
 954                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
 955         snd_emu1010_fpga_link_dst_src_write(emu,
 956                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
 957         snd_emu1010_fpga_link_dst_src_write(emu,
 958                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
 959 #endif
 960 #if 0
 961         /* For 192kHz */
 962         snd_emu1010_fpga_link_dst_src_write(emu,
 963                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
 964         snd_emu1010_fpga_link_dst_src_write(emu,
 965                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
 966         snd_emu1010_fpga_link_dst_src_write(emu,
 967                 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
 968         snd_emu1010_fpga_link_dst_src_write(emu,
 969                 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
 970         snd_emu1010_fpga_link_dst_src_write(emu,
 971                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
 972         snd_emu1010_fpga_link_dst_src_write(emu,
 973                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
 974         snd_emu1010_fpga_link_dst_src_write(emu,
 975                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
 976         snd_emu1010_fpga_link_dst_src_write(emu,
 977                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
 978 #endif
 979 #if 1
 980         /* For 48kHz */
 981         snd_emu1010_fpga_link_dst_src_write(emu,
 982                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
 983         snd_emu1010_fpga_link_dst_src_write(emu,
 984                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
 985         snd_emu1010_fpga_link_dst_src_write(emu,
 986                 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
 987         snd_emu1010_fpga_link_dst_src_write(emu,
 988                 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
 989         snd_emu1010_fpga_link_dst_src_write(emu,
 990                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
 991         snd_emu1010_fpga_link_dst_src_write(emu,
 992                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
 993         snd_emu1010_fpga_link_dst_src_write(emu,
 994                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
 995         snd_emu1010_fpga_link_dst_src_write(emu,
 996                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
 997         /* Pavel Hofman - setting defaults for 8 more capture channels
 998          * Defaults only, users will set their own values anyways, let's
 999          * just copy/paste.
1000          */
1001
1002         snd_emu1010_fpga_link_dst_src_write(emu,
1003                 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
1004         snd_emu1010_fpga_link_dst_src_write(emu,
1005                 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
1006         snd_emu1010_fpga_link_dst_src_write(emu,
1007                 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
1008         snd_emu1010_fpga_link_dst_src_write(emu,
1009                 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1010         snd_emu1010_fpga_link_dst_src_write(emu,
1011                 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1012         snd_emu1010_fpga_link_dst_src_write(emu,
1013                 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1014         snd_emu1010_fpga_link_dst_src_write(emu,
1015                 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1016         snd_emu1010_fpga_link_dst_src_write(emu,
1017                 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
1018 #endif
1019 #if 0
1020         /* Original */
1021         snd_emu1010_fpga_link_dst_src_write(emu,
1022                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1023         snd_emu1010_fpga_link_dst_src_write(emu,
1024                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1025         snd_emu1010_fpga_link_dst_src_write(emu,
1026                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1027         snd_emu1010_fpga_link_dst_src_write(emu,
1028                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1029         snd_emu1010_fpga_link_dst_src_write(emu,
1030                 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1031         snd_emu1010_fpga_link_dst_src_write(emu,
1032                 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1033         snd_emu1010_fpga_link_dst_src_write(emu,
1034                 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1035         snd_emu1010_fpga_link_dst_src_write(emu,
1036                 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1037         snd_emu1010_fpga_link_dst_src_write(emu,
1038                 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1039         snd_emu1010_fpga_link_dst_src_write(emu,
1040                 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1041         snd_emu1010_fpga_link_dst_src_write(emu,
1042                 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1043         snd_emu1010_fpga_link_dst_src_write(emu,
1044                 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1045 #endif
1046         for (i = 0; i < 0x20; i++) {
1047                 /* AudioDock Elink <- Silence */
1048                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100 + i, EMU_SRC_SILENCE);
1049         }
1050         for (i = 0; i < 4; i++) {
1051                 /* Hana SPDIF Out <- Silence */
1052                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200 + i, EMU_SRC_SILENCE);
1053         }
1054         for (i = 0; i < 7; i++) {
1055                 /* Hamoa DAC <- Silence */
1056                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300 + i, EMU_SRC_SILENCE);
1057         }
1058         for (i = 0; i < 7; i++) {
1059                 /* Hana ADAT Out <- Silence */
1060                 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1061         }
1062         snd_emu1010_fpga_link_dst_src_write(emu,
1063                 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1064         snd_emu1010_fpga_link_dst_src_write(emu,
1065                 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1066         snd_emu1010_fpga_link_dst_src_write(emu,
1067                 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1068         snd_emu1010_fpga_link_dst_src_write(emu,
1069                 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1070         snd_emu1010_fpga_link_dst_src_write(emu,
1071                 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1072         snd_emu1010_fpga_link_dst_src_write(emu,
1073                 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1074         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */
1075
1076         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1077
1078         /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1079          * Lock Sound Memory Cache, Lock Tank Memory Cache,
1080          * Mute all codecs.
1081          */
1082         outl(0x0000a000, emu->port + HCFG);
1083         /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1084          * Lock Sound Memory Cache, Lock Tank Memory Cache,
1085          * Un-Mute all codecs.
1086          */
1087         outl(0x0000a001, emu->port + HCFG);
1088
1089         /* Initial boot complete. Now patches */
1090
1091         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1092         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1093         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1094         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1095         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1096         snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
1097         snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); /* SPDIF Format spdif  (or 0x11 for aes/ebu) */
1098
1099 #if 0
1100         snd_emu1010_fpga_link_dst_src_write(emu,
1101                 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1102         snd_emu1010_fpga_link_dst_src_write(emu,
1103                 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1104         snd_emu1010_fpga_link_dst_src_write(emu,
1105                 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1106         snd_emu1010_fpga_link_dst_src_write(emu,
1107                 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1108 #endif
1109         /* Default outputs */
1110         if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1111                 /* 1616(M) cardbus default outputs */
1112                 /* ALICE2 bus 0xa0 */
1113                 snd_emu1010_fpga_link_dst_src_write(emu,
1114                         EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1115                 emu->emu1010.output_source[0] = 17;
1116                 snd_emu1010_fpga_link_dst_src_write(emu,
1117                         EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1118                 emu->emu1010.output_source[1] = 18;
1119                 snd_emu1010_fpga_link_dst_src_write(emu,
1120                         EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1121                 emu->emu1010.output_source[2] = 19;
1122                 snd_emu1010_fpga_link_dst_src_write(emu,
1123                         EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1124                 emu->emu1010.output_source[3] = 20;
1125                 snd_emu1010_fpga_link_dst_src_write(emu,
1126                         EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1127                 emu->emu1010.output_source[4] = 21;
1128                 snd_emu1010_fpga_link_dst_src_write(emu,
1129                         EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1130                 emu->emu1010.output_source[5] = 22;
1131                 /* ALICE2 bus 0xa0 */
1132                 snd_emu1010_fpga_link_dst_src_write(emu,
1133                         EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1134                 emu->emu1010.output_source[16] = 17;
1135                 snd_emu1010_fpga_link_dst_src_write(emu,
1136                         EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1137                 emu->emu1010.output_source[17] = 18;
1138         } else {
1139                 /* ALICE2 bus 0xa0 */
1140                 snd_emu1010_fpga_link_dst_src_write(emu,
1141                         EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1142                 emu->emu1010.output_source[0] = 21;
1143                 snd_emu1010_fpga_link_dst_src_write(emu,
1144                         EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1145                 emu->emu1010.output_source[1] = 22;
1146                 snd_emu1010_fpga_link_dst_src_write(emu,
1147                         EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1148                 emu->emu1010.output_source[2] = 23;
1149                 snd_emu1010_fpga_link_dst_src_write(emu,
1150                         EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1151                 emu->emu1010.output_source[3] = 24;
1152                 snd_emu1010_fpga_link_dst_src_write(emu,
1153                         EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1154                 emu->emu1010.output_source[4] = 25;
1155                 snd_emu1010_fpga_link_dst_src_write(emu,
1156                         EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1157                 emu->emu1010.output_source[5] = 26;
1158                 snd_emu1010_fpga_link_dst_src_write(emu,
1159                         EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1160                 emu->emu1010.output_source[6] = 27;
1161                 snd_emu1010_fpga_link_dst_src_write(emu,
1162                         EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1163                 emu->emu1010.output_source[7] = 28;
1164                 /* ALICE2 bus 0xa0 */
1165                 snd_emu1010_fpga_link_dst_src_write(emu,
1166                         EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1167                 emu->emu1010.output_source[8] = 21;
1168                 snd_emu1010_fpga_link_dst_src_write(emu,
1169                         EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1170                 emu->emu1010.output_source[9] = 22;
1171                 /* ALICE2 bus 0xa0 */
1172                 snd_emu1010_fpga_link_dst_src_write(emu,
1173                         EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1174                 emu->emu1010.output_source[10] = 21;
1175                 snd_emu1010_fpga_link_dst_src_write(emu,
1176                         EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1177                 emu->emu1010.output_source[11] = 22;
1178                 /* ALICE2 bus 0xa0 */
1179                 snd_emu1010_fpga_link_dst_src_write(emu,
1180                         EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1181                 emu->emu1010.output_source[12] = 21;
1182                 snd_emu1010_fpga_link_dst_src_write(emu,
1183                         EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1184                 emu->emu1010.output_source[13] = 22;
1185                 /* ALICE2 bus 0xa0 */
1186                 snd_emu1010_fpga_link_dst_src_write(emu,
1187                         EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1188                 emu->emu1010.output_source[14] = 21;
1189                 snd_emu1010_fpga_link_dst_src_write(emu,
1190                         EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1191                 emu->emu1010.output_source[15] = 22;
1192                 /* ALICE2 bus 0xa0 */
1193                 snd_emu1010_fpga_link_dst_src_write(emu,
1194                         EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1195                 emu->emu1010.output_source[16] = 21;
1196                 snd_emu1010_fpga_link_dst_src_write(emu,
1197                         EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1198                 emu->emu1010.output_source[17] = 22;
1199                 snd_emu1010_fpga_link_dst_src_write(emu,
1200                         EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1201                 emu->emu1010.output_source[18] = 23;
1202                 snd_emu1010_fpga_link_dst_src_write(emu,
1203                         EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1204                 emu->emu1010.output_source[19] = 24;
1205                 snd_emu1010_fpga_link_dst_src_write(emu,
1206                         EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1207                 emu->emu1010.output_source[20] = 25;
1208                 snd_emu1010_fpga_link_dst_src_write(emu,
1209                         EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1210                 emu->emu1010.output_source[21] = 26;
1211                 snd_emu1010_fpga_link_dst_src_write(emu,
1212                         EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1213                 emu->emu1010.output_source[22] = 27;
1214                 snd_emu1010_fpga_link_dst_src_write(emu,
1215                         EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1216                 emu->emu1010.output_source[23] = 28;
1217         }
1218         /* TEMP: Select SPDIF in/out */
1219         /* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */
1220
1221         /* TEMP: Select 48kHz SPDIF out */
1222         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1223         snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1224         /* Word Clock source, Internal 48kHz x1 */
1225         snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
1226         /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
1227         emu->emu1010.internal_clock = 1; /* 48000 */
1228         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); /* Set LEDs on Audio Dock */
1229         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1230         /* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */
1231         /* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */
1232         /* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */
1233
1234         return 0;
1235 }
1236 /*
1237  *  Create the EMU10K1 instance
1238  */
1239
1240 #ifdef CONFIG_PM_SLEEP
1241 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1242 static void free_pm_buffer(struct snd_emu10k1 *emu);
1243 #endif
1244
1245 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1246 {
1247         if (emu->port) {        /* avoid access to already used hardware */
1248                 snd_emu10k1_fx8010_tram_setup(emu, 0);
1249                 snd_emu10k1_done(emu);
1250                 snd_emu10k1_free_efx(emu);
1251         }
1252         if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
1253                 /* Disable 48Volt power to Audio Dock */
1254                 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
1255         }
1256         cancel_delayed_work_sync(&emu->emu1010.firmware_work);
1257         release_firmware(emu->firmware);
1258         release_firmware(emu->dock_fw);
1259         if (emu->irq >= 0)
1260                 free_irq(emu->irq, emu);
1261         snd_util_memhdr_free(emu->memhdr);
1262         if (emu->silent_page.area)
1263                 snd_dma_free_pages(&emu->silent_page);
1264         if (emu->ptb_pages.area)
1265                 snd_dma_free_pages(&emu->ptb_pages);
1266         vfree(emu->page_ptr_table);
1267         vfree(emu->page_addr_table);
1268 #ifdef CONFIG_PM_SLEEP
1269         free_pm_buffer(emu);
1270 #endif
1271         if (emu->port)
1272                 pci_release_regions(emu->pci);
1273         if (emu->card_capabilities->ca0151_chip) /* P16V */
1274                 snd_p16v_free(emu);
1275         pci_disable_device(emu->pci);
1276         kfree(emu);
1277         return 0;
1278 }
1279
1280 static int snd_emu10k1_dev_free(struct snd_device *device)
1281 {
1282         struct snd_emu10k1 *emu = device->device_data;
1283         return snd_emu10k1_free(emu);
1284 }
1285
1286 static const struct snd_emu_chip_details emu_chip_details[] = {
1287         /* Audigy 5/Rx SB1550 */
1288         /* Tested by michael@gernoth.net 28 Mar 2015 */
1289         /* DSP: CA10300-IAT LF
1290          * DAC: Cirrus Logic CS4382-KQZ
1291          * ADC: Philips 1361T
1292          * AC97: Sigmatel STAC9750
1293          * CA0151: None
1294          */
1295         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102,
1296          .driver = "Audigy2", .name = "SB Audigy 5/Rx [SB1550]",
1297          .id = "Audigy2",
1298          .emu10k2_chip = 1,
1299          .ca0108_chip = 1,
1300          .spk71 = 1,
1301          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1302          .ac97_chip = 1},
1303         /* Audigy4 (Not PRO) SB0610 */
1304         /* Tested by James@superbug.co.uk 4th April 2006 */
1305         /* A_IOCFG bits
1306          * Output
1307          * 0: ?
1308          * 1: ?
1309          * 2: ?
1310          * 3: 0 - Digital Out, 1 - Line in
1311          * 4: ?
1312          * 5: ?
1313          * 6: ?
1314          * 7: ?
1315          * Input
1316          * 8: ?
1317          * 9: ?
1318          * A: Green jack sense (Front)
1319          * B: ?
1320          * C: Black jack sense (Rear/Side Right)
1321          * D: Yellow jack sense (Center/LFE/Side Left)
1322          * E: ?
1323          * F: ?
1324          *
1325          * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1326          * 0 - Digital Out
1327          * 1 - Line in
1328          */
1329         /* Mic input not tested.
1330          * Analog CD input not tested
1331          * Digital Out not tested.
1332          * Line in working.
1333          * Audio output 5.1 working. Side outputs not working.
1334          */
1335         /* DSP: CA10300-IAT LF
1336          * DAC: Cirrus Logic CS4382-KQZ
1337          * ADC: Philips 1361T
1338          * AC97: Sigmatel STAC9750
1339          * CA0151: None
1340          */
1341         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1342          .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
1343          .id = "Audigy2",
1344          .emu10k2_chip = 1,
1345          .ca0108_chip = 1,
1346          .spk71 = 1,
1347          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1348          .ac97_chip = 1} ,
1349         /* Audigy 2 Value AC3 out does not work yet.
1350          * Need to find out how to turn off interpolators.
1351          */
1352         /* Tested by James@superbug.co.uk 3rd July 2005 */
1353         /* DSP: CA0108-IAT
1354          * DAC: CS4382-KQ
1355          * ADC: Philips 1361T
1356          * AC97: STAC9750
1357          * CA0151: None
1358          */
1359         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1360          .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1361          .id = "Audigy2",
1362          .emu10k2_chip = 1,
1363          .ca0108_chip = 1,
1364          .spk71 = 1,
1365          .ac97_chip = 1} ,
1366         /* Audigy 2 ZS Notebook Cardbus card.*/
1367         /* Tested by James@superbug.co.uk 6th November 2006 */
1368         /* Audio output 7.1/Headphones working.
1369          * Digital output working. (AC3 not checked, only PCM)
1370          * Audio Mic/Line inputs working.
1371          * Digital input not tested.
1372          */
1373         /* DSP: Tina2
1374          * DAC: Wolfson WM8768/WM8568
1375          * ADC: Wolfson WM8775
1376          * AC97: None
1377          * CA0151: None
1378          */
1379         /* Tested by James@superbug.co.uk 4th April 2006 */
1380         /* A_IOCFG bits
1381          * Output
1382          * 0: Not Used
1383          * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1384          * 2: Analog input 0 = line in, 1 = mic in
1385          * 3: Not Used
1386          * 4: Digital output 0 = off, 1 = on.
1387          * 5: Not Used
1388          * 6: Not Used
1389          * 7: Not Used
1390          * Input
1391          *      All bits 1 (0x3fxx) means nothing plugged in.
1392          * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1393          * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1394          * C-D: 2 = Front/Rear/etc, 3 = nothing.
1395          * E-F: Always 0
1396          *
1397          */
1398         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1399          .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1400          .id = "Audigy2",
1401          .emu10k2_chip = 1,
1402          .ca0108_chip = 1,
1403          .ca_cardbus_chip = 1,
1404          .spi_dac = 1,
1405          .i2c_adc = 1,
1406          .spk71 = 1} ,
1407         /* Tested by James@superbug.co.uk 4th Nov 2007. */
1408         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1409          .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1410          .id = "EMU1010",
1411          .emu10k2_chip = 1,
1412          .ca0108_chip = 1,
1413          .ca_cardbus_chip = 1,
1414          .spk71 = 1 ,
1415          .emu_model = EMU_MODEL_EMU1616},
1416         /* Tested by James@superbug.co.uk 4th Nov 2007. */
1417         /* This is MAEM8960, 0202 is MAEM 8980 */
1418         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1419          .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]",
1420          .id = "EMU1010",
1421          .emu10k2_chip = 1,
1422          .ca0108_chip = 1,
1423          .spk71 = 1,
1424          .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
1425         /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */
1426         /* This is MAEM8986, 0202 is MAEM8980 */
1427         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102,
1428          .driver = "Audigy2", .name = "E-mu 1010 PCIe [MAEM8986]",
1429          .id = "EMU1010",
1430          .emu10k2_chip = 1,
1431          .ca0108_chip = 1,
1432          .spk71 = 1,
1433          .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */
1434         /* Tested by James@superbug.co.uk 8th July 2005. */
1435         /* This is MAEM8810, 0202 is MAEM8820 */
1436         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1437          .driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]",
1438          .id = "EMU1010",
1439          .emu10k2_chip = 1,
1440          .ca0102_chip = 1,
1441          .spk71 = 1,
1442          .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
1443         /* EMU0404b */
1444         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1445          .driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]",
1446          .id = "EMU0404",
1447          .emu10k2_chip = 1,
1448          .ca0108_chip = 1,
1449          .spk71 = 1,
1450          .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
1451         /* Tested by James@superbug.co.uk 20-3-2007. */
1452         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1453          .driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]",
1454          .id = "EMU0404",
1455          .emu10k2_chip = 1,
1456          .ca0102_chip = 1,
1457          .spk71 = 1,
1458          .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1459         /* EMU0404 PCIe */
1460         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102,
1461          .driver = "Audigy2", .name = "E-mu 0404 PCIe [MAEM8984]",
1462          .id = "EMU0404",
1463          .emu10k2_chip = 1,
1464          .ca0108_chip = 1,
1465          .spk71 = 1,
1466          .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */
1467         /* Note that all E-mu cards require kernel 2.6 or newer. */
1468         {.vendor = 0x1102, .device = 0x0008,
1469          .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
1470          .id = "Audigy2",
1471          .emu10k2_chip = 1,
1472          .ca0108_chip = 1,
1473          .ac97_chip = 1} ,
1474         /* Tested by James@superbug.co.uk 3rd July 2005 */
1475         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1476          .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
1477          .id = "Audigy2",
1478          .emu10k2_chip = 1,
1479          .ca0102_chip = 1,
1480          .ca0151_chip = 1,
1481          .spk71 = 1,
1482          .spdif_bug = 1,
1483          .ac97_chip = 1} ,
1484         /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1485         /* The 0x20061102 does have SB0350 written on it
1486          * Just like 0x20021102
1487          */
1488         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1489          .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
1490          .id = "Audigy2",
1491          .emu10k2_chip = 1,
1492          .ca0102_chip = 1,
1493          .ca0151_chip = 1,
1494          .spk71 = 1,
1495          .spdif_bug = 1,
1496          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1497          .ac97_chip = 1} ,
1498         /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by
1499            Creative's Windows driver */
1500         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102,
1501          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]",
1502          .id = "Audigy2",
1503          .emu10k2_chip = 1,
1504          .ca0102_chip = 1,
1505          .ca0151_chip = 1,
1506          .spk71 = 1,
1507          .spdif_bug = 1,
1508          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1509          .ac97_chip = 1} ,
1510         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1511          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
1512          .id = "Audigy2",
1513          .emu10k2_chip = 1,
1514          .ca0102_chip = 1,
1515          .ca0151_chip = 1,
1516          .spk71 = 1,
1517          .spdif_bug = 1,
1518          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1519          .ac97_chip = 1} ,
1520         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1521          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
1522          .id = "Audigy2",
1523          .emu10k2_chip = 1,
1524          .ca0102_chip = 1,
1525          .ca0151_chip = 1,
1526          .spk71 = 1,
1527          .spdif_bug = 1,
1528          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1529          .ac97_chip = 1} ,
1530         /* Audigy 2 */
1531         /* Tested by James@superbug.co.uk 3rd July 2005 */
1532         /* DSP: CA0102-IAT
1533          * DAC: CS4382-KQ
1534          * ADC: Philips 1361T
1535          * AC97: STAC9721
1536          * CA0151: Yes
1537          */
1538         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1539          .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
1540          .id = "Audigy2",
1541          .emu10k2_chip = 1,
1542          .ca0102_chip = 1,
1543          .ca0151_chip = 1,
1544          .spk71 = 1,
1545          .spdif_bug = 1,
1546          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1547          .ac97_chip = 1} ,
1548         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1549          .driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]",
1550          .id = "Audigy2",
1551          .emu10k2_chip = 1,
1552          .ca0102_chip = 1,
1553          .ca0151_chip = 1,
1554          .spk71 = 1,
1555          .spdif_bug = 1} ,
1556         /* Dell OEM/Creative Labs Audigy 2 ZS */
1557         /* See ALSA bug#1365 */
1558         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1559          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
1560          .id = "Audigy2",
1561          .emu10k2_chip = 1,
1562          .ca0102_chip = 1,
1563          .ca0151_chip = 1,
1564          .spk71 = 1,
1565          .spdif_bug = 1,
1566          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1567          .ac97_chip = 1} ,
1568         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1569          .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
1570          .id = "Audigy2",
1571          .emu10k2_chip = 1,
1572          .ca0102_chip = 1,
1573          .ca0151_chip = 1,
1574          .spk71 = 1,
1575          .spdif_bug = 1,
1576          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1577          .adc_1361t = 1,  /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1578          .ac97_chip = 1} ,
1579         {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1580          .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
1581          .id = "Audigy2",
1582          .emu10k2_chip = 1,
1583          .ca0102_chip = 1,
1584          .ca0151_chip = 1,
1585          .spdif_bug = 1,
1586          .ac97_chip = 1} ,
1587         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1588          .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
1589          .id = "Audigy",
1590          .emu10k2_chip = 1,
1591          .ca0102_chip = 1,
1592          .ac97_chip = 1} ,
1593         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1594          .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
1595          .id = "Audigy",
1596          .emu10k2_chip = 1,
1597          .ca0102_chip = 1,
1598          .spdif_bug = 1,
1599          .ac97_chip = 1} ,
1600         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1601          .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
1602          .id = "Audigy",
1603          .emu10k2_chip = 1,
1604          .ca0102_chip = 1,
1605          .ac97_chip = 1} ,
1606         {.vendor = 0x1102, .device = 0x0004,
1607          .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1608          .id = "Audigy",
1609          .emu10k2_chip = 1,
1610          .ca0102_chip = 1,
1611          .ac97_chip = 1} ,
1612         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1613          .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1614          .id = "Live",
1615          .emu10k1_chip = 1,
1616          .ac97_chip = 1,
1617          .sblive51 = 1} ,
1618         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1619          .driver = "EMU10K1", .name = "SB Live! [SB0105]",
1620          .id = "Live",
1621          .emu10k1_chip = 1,
1622          .ac97_chip = 1,
1623          .sblive51 = 1} ,
1624         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1625          .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
1626          .id = "Live",
1627          .emu10k1_chip = 1,
1628          .ac97_chip = 1,
1629          .sblive51 = 1} ,
1630         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1631          .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
1632          .id = "Live",
1633          .emu10k1_chip = 1,
1634          .ac97_chip = 1,
1635          .sblive51 = 1} ,
1636         /* Tested by ALSA bug#1680 26th December 2005 */
1637         /* note: It really has SB0220 written on the card, */
1638         /* but it's SB0228 according to kx.inf */
1639         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1640          .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
1641          .id = "Live",
1642          .emu10k1_chip = 1,
1643          .ac97_chip = 1,
1644          .sblive51 = 1} ,
1645         /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1646         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1647          .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1648          .id = "Live",
1649          .emu10k1_chip = 1,
1650          .ac97_chip = 1,
1651          .sblive51 = 1} ,
1652         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1653          .driver = "EMU10K1", .name = "SB Live! 5.1",
1654          .id = "Live",
1655          .emu10k1_chip = 1,
1656          .ac97_chip = 1,
1657          .sblive51 = 1} ,
1658         /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1659         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1660          .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
1661          .id = "Live",
1662          .emu10k1_chip = 1,
1663          .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1664                           * share the same IDs!
1665                           */
1666          .sblive51 = 1} ,
1667         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1668          .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
1669          .id = "Live",
1670          .emu10k1_chip = 1,
1671          .ac97_chip = 1,
1672          .sblive51 = 1} ,
1673         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1674          .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
1675          .id = "Live",
1676          .emu10k1_chip = 1,
1677          .ac97_chip = 1} ,
1678         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1679          .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
1680          .id = "Live",
1681          .emu10k1_chip = 1,
1682          .ac97_chip = 1,
1683          .sblive51 = 1} ,
1684         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1685          .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
1686          .id = "Live",
1687          .emu10k1_chip = 1,
1688          .ac97_chip = 1,
1689          .sblive51 = 1} ,
1690         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1691          .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
1692          .id = "Live",
1693          .emu10k1_chip = 1,
1694          .ac97_chip = 1,
1695          .sblive51 = 1} ,
1696         /* Tested by James@superbug.co.uk 3rd July 2005 */
1697         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1698          .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
1699          .id = "Live",
1700          .emu10k1_chip = 1,
1701          .ac97_chip = 1,
1702          .sblive51 = 1} ,
1703         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1704          .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
1705          .id = "Live",
1706          .emu10k1_chip = 1,
1707          .ac97_chip = 1,
1708          .sblive51 = 1} ,
1709         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1710          .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1711          .id = "Live",
1712          .emu10k1_chip = 1,
1713          .ac97_chip = 1,
1714          .sblive51 = 1} ,
1715         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1716          .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
1717          .id = "Live",
1718          .emu10k1_chip = 1,
1719          .ac97_chip = 1,
1720          .sblive51 = 1} ,
1721         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1722          .driver = "EMU10K1", .name = "E-mu APS [PC545]",
1723          .id = "APS",
1724          .emu10k1_chip = 1,
1725          .ecard = 1} ,
1726         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1727          .driver = "EMU10K1", .name = "SB Live! [CT4620]",
1728          .id = "Live",
1729          .emu10k1_chip = 1,
1730          .ac97_chip = 1,
1731          .sblive51 = 1} ,
1732         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1733          .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
1734          .id = "Live",
1735          .emu10k1_chip = 1,
1736          .ac97_chip = 1,
1737          .sblive51 = 1} ,
1738         {.vendor = 0x1102, .device = 0x0002,
1739          .driver = "EMU10K1", .name = "SB Live! [Unknown]",
1740          .id = "Live",
1741          .emu10k1_chip = 1,
1742          .ac97_chip = 1,
1743          .sblive51 = 1} ,
1744         { } /* terminator */
1745 };
1746
1747 /*
1748  * The chip (at least the Audigy 2 CA0102 chip, but most likely others, too)
1749  * has a problem that from time to time it likes to do few DMA reads a bit
1750  * beyond its normal allocation and gets very confused if these reads get
1751  * blocked by a IOMMU.
1752  *
1753  * This behaviour has been observed for the first (reserved) page
1754  * (for which it happens multiple times at every playback), often for various
1755  * synth pages and sometimes for PCM playback buffers and the page table
1756  * memory itself.
1757  *
1758  * As a workaround let's widen these DMA allocations by an extra page if we
1759  * detect that the device is behind a non-passthrough IOMMU.
1760  */
1761 static void snd_emu10k1_detect_iommu(struct snd_emu10k1 *emu)
1762 {
1763         struct iommu_domain *domain;
1764
1765         emu->iommu_workaround = false;
1766
1767         if (!iommu_present(emu->card->dev->bus))
1768                 return;
1769
1770         domain = iommu_get_domain_for_dev(emu->card->dev);
1771         if (domain && domain->type == IOMMU_DOMAIN_IDENTITY)
1772                 return;
1773
1774         dev_notice(emu->card->dev,
1775                    "non-passthrough IOMMU detected, widening DMA allocations");
1776         emu->iommu_workaround = true;
1777 }
1778
1779 int snd_emu10k1_create(struct snd_card *card,
1780                        struct pci_dev *pci,
1781                        unsigned short extin_mask,
1782                        unsigned short extout_mask,
1783                        long max_cache_bytes,
1784                        int enable_ir,
1785                        uint subsystem,
1786                        struct snd_emu10k1 **remu)
1787 {
1788         struct snd_emu10k1 *emu;
1789         int idx, err;
1790         int is_audigy;
1791         size_t page_table_size;
1792         __le32 *pgtbl;
1793         unsigned int silent_page;
1794         const struct snd_emu_chip_details *c;
1795         static const struct snd_device_ops ops = {
1796                 .dev_free =     snd_emu10k1_dev_free,
1797         };
1798
1799         *remu = NULL;
1800
1801         /* enable PCI device */
1802         err = pci_enable_device(pci);
1803         if (err < 0)
1804                 return err;
1805
1806         emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1807         if (emu == NULL) {
1808                 pci_disable_device(pci);
1809                 return -ENOMEM;
1810         }
1811         emu->card = card;
1812         spin_lock_init(&emu->reg_lock);
1813         spin_lock_init(&emu->emu_lock);
1814         spin_lock_init(&emu->spi_lock);
1815         spin_lock_init(&emu->i2c_lock);
1816         spin_lock_init(&emu->voice_lock);
1817         spin_lock_init(&emu->synth_lock);
1818         spin_lock_init(&emu->memblk_lock);
1819         mutex_init(&emu->fx8010.lock);
1820         INIT_LIST_HEAD(&emu->mapped_link_head);
1821         INIT_LIST_HEAD(&emu->mapped_order_link_head);
1822         emu->pci = pci;
1823         emu->irq = -1;
1824         emu->synth = NULL;
1825         emu->get_synth_voice = NULL;
1826         INIT_DELAYED_WORK(&emu->emu1010.firmware_work, emu1010_firmware_work);
1827         /* read revision & serial */
1828         emu->revision = pci->revision;
1829         pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1830         pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1831         dev_dbg(card->dev,
1832                 "vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n",
1833                 pci->vendor, pci->device, emu->serial, emu->model);
1834
1835         for (c = emu_chip_details; c->vendor; c++) {
1836                 if (c->vendor == pci->vendor && c->device == pci->device) {
1837                         if (subsystem) {
1838                                 if (c->subsystem && (c->subsystem == subsystem))
1839                                         break;
1840                                 else
1841                                         continue;
1842                         } else {
1843                                 if (c->subsystem && (c->subsystem != emu->serial))
1844                                         continue;
1845                                 if (c->revision && c->revision != emu->revision)
1846                                         continue;
1847                         }
1848                         break;
1849                 }
1850         }
1851         if (c->vendor == 0) {
1852                 dev_err(card->dev, "emu10k1: Card not recognised\n");
1853                 kfree(emu);
1854                 pci_disable_device(pci);
1855                 return -ENOENT;
1856         }
1857         emu->card_capabilities = c;
1858         if (c->subsystem && !subsystem)
1859                 dev_dbg(card->dev, "Sound card name = %s\n", c->name);
1860         else if (subsystem)
1861                 dev_dbg(card->dev, "Sound card name = %s, "
1862                         "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1863                         "Forced to subsystem = 0x%x\n", c->name,
1864                         pci->vendor, pci->device, emu->serial, c->subsystem);
1865         else
1866                 dev_dbg(card->dev, "Sound card name = %s, "
1867                         "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1868                         c->name, pci->vendor, pci->device,
1869                         emu->serial);
1870
1871         if (!*card->id && c->id)
1872                 strscpy(card->id, c->id, sizeof(card->id));
1873
1874         is_audigy = emu->audigy = c->emu10k2_chip;
1875
1876         snd_emu10k1_detect_iommu(emu);
1877
1878         /* set addressing mode */
1879         emu->address_mode = is_audigy ? 0 : 1;
1880         /* set the DMA transfer mask */
1881         emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK;
1882         if (dma_set_mask_and_coherent(&pci->dev, emu->dma_mask) < 0) {
1883                 dev_err(card->dev,
1884                         "architecture does not support PCI busmaster DMA with mask 0x%lx\n",
1885                         emu->dma_mask);
1886                 kfree(emu);
1887                 pci_disable_device(pci);
1888                 return -ENXIO;
1889         }
1890         if (is_audigy)
1891                 emu->gpr_base = A_FXGPREGBASE;
1892         else
1893                 emu->gpr_base = FXGPREGBASE;
1894
1895         err = pci_request_regions(pci, "EMU10K1");
1896         if (err < 0) {
1897                 kfree(emu);
1898                 pci_disable_device(pci);
1899                 return err;
1900         }
1901         emu->port = pci_resource_start(pci, 0);
1902
1903         emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1904
1905         page_table_size = sizeof(u32) * (emu->address_mode ? MAXPAGES1 :
1906                                          MAXPAGES0);
1907         if (snd_emu10k1_alloc_pages_maybe_wider(emu, page_table_size,
1908                                                 &emu->ptb_pages) < 0) {
1909                 err = -ENOMEM;
1910                 goto error;
1911         }
1912         dev_dbg(card->dev, "page table address range is %.8lx:%.8lx\n",
1913                 (unsigned long)emu->ptb_pages.addr,
1914                 (unsigned long)(emu->ptb_pages.addr + emu->ptb_pages.bytes));
1915
1916         emu->page_ptr_table = vmalloc(array_size(sizeof(void *),
1917                                                  emu->max_cache_pages));
1918         emu->page_addr_table = vmalloc(array_size(sizeof(unsigned long),
1919                                                   emu->max_cache_pages));
1920         if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1921                 err = -ENOMEM;
1922                 goto error;
1923         }
1924
1925         if (snd_emu10k1_alloc_pages_maybe_wider(emu, EMUPAGESIZE,
1926                                                 &emu->silent_page) < 0) {
1927                 err = -ENOMEM;
1928                 goto error;
1929         }
1930         dev_dbg(card->dev, "silent page range is %.8lx:%.8lx\n",
1931                 (unsigned long)emu->silent_page.addr,
1932                 (unsigned long)(emu->silent_page.addr +
1933                                 emu->silent_page.bytes));
1934
1935         emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1936         if (emu->memhdr == NULL) {
1937                 err = -ENOMEM;
1938                 goto error;
1939         }
1940         emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1941                 sizeof(struct snd_util_memblk);
1942
1943         pci_set_master(pci);
1944
1945         emu->fx8010.fxbus_mask = 0x303f;
1946         if (extin_mask == 0)
1947                 extin_mask = 0x3fcf;
1948         if (extout_mask == 0)
1949                 extout_mask = 0x7fff;
1950         emu->fx8010.extin_mask = extin_mask;
1951         emu->fx8010.extout_mask = extout_mask;
1952         emu->enable_ir = enable_ir;
1953
1954         if (emu->card_capabilities->ca_cardbus_chip) {
1955                 err = snd_emu10k1_cardbus_init(emu);
1956                 if (err < 0)
1957                         goto error;
1958         }
1959         if (emu->card_capabilities->ecard) {
1960                 err = snd_emu10k1_ecard_init(emu);
1961                 if (err < 0)
1962                         goto error;
1963         } else if (emu->card_capabilities->emu_model) {
1964                 err = snd_emu10k1_emu1010_init(emu);
1965                 if (err < 0) {
1966                         snd_emu10k1_free(emu);
1967                         return err;
1968                 }
1969         } else {
1970                 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1971                         does not support this, it shouldn't do any harm */
1972                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1973                                         AC97SLOT_CNTR|AC97SLOT_LFE);
1974         }
1975
1976         /* initialize TRAM setup */
1977         emu->fx8010.itram_size = (16 * 1024)/2;
1978         emu->fx8010.etram_pages.area = NULL;
1979         emu->fx8010.etram_pages.bytes = 0;
1980
1981         /* irq handler must be registered after I/O ports are activated */
1982         if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
1983                         KBUILD_MODNAME, emu)) {
1984                 err = -EBUSY;
1985                 goto error;
1986         }
1987         emu->irq = pci->irq;
1988         card->sync_irq = emu->irq;
1989
1990         /*
1991          *  Init to 0x02109204 :
1992          *  Clock accuracy    = 0     (1000ppm)
1993          *  Sample Rate       = 2     (48kHz)
1994          *  Audio Channel     = 1     (Left of 2)
1995          *  Source Number     = 0     (Unspecified)
1996          *  Generation Status = 1     (Original for Cat Code 12)
1997          *  Cat Code          = 12    (Digital Signal Mixer)
1998          *  Mode              = 0     (Mode 0)
1999          *  Emphasis          = 0     (None)
2000          *  CP                = 1     (Copyright unasserted)
2001          *  AN                = 0     (Audio data)
2002          *  P                 = 0     (Consumer)
2003          */
2004         emu->spdif_bits[0] = emu->spdif_bits[1] =
2005                 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
2006                 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
2007                 SPCS_GENERATIONSTATUS | 0x00001200 |
2008                 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
2009
2010         /* Clear silent pages and set up pointers */
2011         memset(emu->silent_page.area, 0, emu->silent_page.bytes);
2012         silent_page = emu->silent_page.addr << emu->address_mode;
2013         pgtbl = (__le32 *)emu->ptb_pages.area;
2014         for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++)
2015                 pgtbl[idx] = cpu_to_le32(silent_page | idx);
2016
2017         /* set up voice indices */
2018         for (idx = 0; idx < NUM_G; idx++) {
2019                 emu->voices[idx].emu = emu;
2020                 emu->voices[idx].number = idx;
2021         }
2022
2023         err = snd_emu10k1_init(emu, enable_ir, 0);
2024         if (err < 0)
2025                 goto error;
2026 #ifdef CONFIG_PM_SLEEP
2027         err = alloc_pm_buffer(emu);
2028         if (err < 0)
2029                 goto error;
2030 #endif
2031
2032         /*  Initialize the effect engine */
2033         err = snd_emu10k1_init_efx(emu);
2034         if (err < 0)
2035                 goto error;
2036         snd_emu10k1_audio_enable(emu);
2037
2038         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops);
2039         if (err < 0)
2040                 goto error;
2041
2042 #ifdef CONFIG_SND_PROC_FS
2043         snd_emu10k1_proc_init(emu);
2044 #endif
2045
2046         *remu = emu;
2047         return 0;
2048
2049  error:
2050         snd_emu10k1_free(emu);
2051         return err;
2052 }
2053
2054 #ifdef CONFIG_PM_SLEEP
2055 static const unsigned char saved_regs[] = {
2056         CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
2057         FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
2058         ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
2059         TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
2060         MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
2061         SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
2062         0xff /* end */
2063 };
2064 static const unsigned char saved_regs_audigy[] = {
2065         A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
2066         A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
2067         0xff /* end */
2068 };
2069
2070 static int alloc_pm_buffer(struct snd_emu10k1 *emu)
2071 {
2072         int size;
2073
2074         size = ARRAY_SIZE(saved_regs);
2075         if (emu->audigy)
2076                 size += ARRAY_SIZE(saved_regs_audigy);
2077         emu->saved_ptr = vmalloc(array3_size(4, NUM_G, size));
2078         if (!emu->saved_ptr)
2079                 return -ENOMEM;
2080         if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
2081                 return -ENOMEM;
2082         if (emu->card_capabilities->ca0151_chip &&
2083             snd_p16v_alloc_pm_buffer(emu) < 0)
2084                 return -ENOMEM;
2085         return 0;
2086 }
2087
2088 static void free_pm_buffer(struct snd_emu10k1 *emu)
2089 {
2090         vfree(emu->saved_ptr);
2091         snd_emu10k1_efx_free_pm_buffer(emu);
2092         if (emu->card_capabilities->ca0151_chip)
2093                 snd_p16v_free_pm_buffer(emu);
2094 }
2095
2096 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
2097 {
2098         int i;
2099         const unsigned char *reg;
2100         unsigned int *val;
2101
2102         val = emu->saved_ptr;
2103         for (reg = saved_regs; *reg != 0xff; reg++)
2104                 for (i = 0; i < NUM_G; i++, val++)
2105                         *val = snd_emu10k1_ptr_read(emu, *reg, i);
2106         if (emu->audigy) {
2107                 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2108                         for (i = 0; i < NUM_G; i++, val++)
2109                                 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2110         }
2111         if (emu->audigy)
2112                 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2113         emu->saved_hcfg = inl(emu->port + HCFG);
2114 }
2115
2116 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2117 {
2118         if (emu->card_capabilities->ca_cardbus_chip)
2119                 snd_emu10k1_cardbus_init(emu);
2120         if (emu->card_capabilities->ecard)
2121                 snd_emu10k1_ecard_init(emu);
2122         else if (emu->card_capabilities->emu_model)
2123                 snd_emu10k1_emu1010_init(emu);
2124         else
2125                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2126         snd_emu10k1_init(emu, emu->enable_ir, 1);
2127 }
2128
2129 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2130 {
2131         int i;
2132         const unsigned char *reg;
2133         unsigned int *val;
2134
2135         snd_emu10k1_audio_enable(emu);
2136
2137         /* resore for spdif */
2138         if (emu->audigy)
2139                 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2140         outl(emu->saved_hcfg, emu->port + HCFG);
2141
2142         val = emu->saved_ptr;
2143         for (reg = saved_regs; *reg != 0xff; reg++)
2144                 for (i = 0; i < NUM_G; i++, val++)
2145                         snd_emu10k1_ptr_write(emu, *reg, i, *val);
2146         if (emu->audigy) {
2147                 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2148                         for (i = 0; i < NUM_G; i++, val++)
2149                                 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2150         }
2151 }
2152 #endif