1 // SPDX-License-Identifier: GPL-2.0-only
3 * Dynamic DMA mapping support.
5 * This implementation is a fallback for platforms that do not support
6 * I/O TLBs (aka DMA address translation hardware).
7 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
8 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
9 * Copyright (C) 2000, 2003 Hewlett-Packard Co
10 * David Mosberger-Tang <davidm@hpl.hp.com>
12 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
13 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
14 * unnecessary i-cache flushing.
15 * 04/07/.. ak Better overflow handling. Assorted fixes.
16 * 05/09/10 linville Add support for syncing ranges, support syncing for
17 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
18 * 08/12/11 beckyb Add highmem support
21 #define pr_fmt(fmt) "software IO TLB: " fmt
23 #include <linux/cache.h>
24 #include <linux/dma-direct.h>
25 #include <linux/dma-map-ops.h>
27 #include <linux/export.h>
28 #include <linux/spinlock.h>
29 #include <linux/string.h>
30 #include <linux/swiotlb.h>
31 #include <linux/pfn.h>
32 #include <linux/types.h>
33 #include <linux/ctype.h>
34 #include <linux/highmem.h>
35 #include <linux/gfp.h>
36 #include <linux/scatterlist.h>
37 #include <linux/mem_encrypt.h>
38 #include <linux/set_memory.h>
39 #ifdef CONFIG_DEBUG_FS
40 #include <linux/debugfs.h>
46 #include <linux/init.h>
47 #include <linux/memblock.h>
48 #include <linux/iommu-helper.h>
50 #define CREATE_TRACE_POINTS
51 #include <trace/events/swiotlb.h>
53 #define OFFSET(val,align) ((unsigned long) \
54 ( (val) & ( (align) - 1)))
56 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
59 * Minimum IO TLB size to bother booting with. Systems with mainly
60 * 64bit capable cards will only lightly use the swiotlb. If we can't
61 * allocate a contiguous 1MB, we're probably in trouble anyway.
63 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
65 enum swiotlb_force swiotlb_force;
68 * Used to do a quick range check in swiotlb_tbl_unmap_single and
69 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
72 phys_addr_t io_tlb_start, io_tlb_end;
75 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
76 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
78 static unsigned long io_tlb_nslabs;
81 * The number of used IO TLB block
83 static unsigned long io_tlb_used;
86 * This is a free list describing the number of free entries available from
89 static unsigned int *io_tlb_list;
90 static unsigned int io_tlb_index;
93 * Max segment that we can provide which (if pages are contingous) will
94 * not be bounced (unless SWIOTLB_FORCE is set).
96 static unsigned int max_segment;
99 * We need to save away the original address corresponding to a mapped entry
100 * for the sync operations.
102 #define INVALID_PHYS_ADDR (~(phys_addr_t)0)
103 static phys_addr_t *io_tlb_orig_addr;
106 * Protect the above data structures in the map and unmap calls
108 static DEFINE_SPINLOCK(io_tlb_lock);
110 static int late_alloc;
113 setup_io_tlb_npages(char *str)
116 io_tlb_nslabs = simple_strtoul(str, &str, 0);
117 /* avoid tail segment of size < IO_TLB_SEGSIZE */
118 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
122 if (!strcmp(str, "force")) {
123 swiotlb_force = SWIOTLB_FORCE;
124 } else if (!strcmp(str, "noforce")) {
125 swiotlb_force = SWIOTLB_NO_FORCE;
131 early_param("swiotlb", setup_io_tlb_npages);
133 static bool no_iotlb_memory;
135 unsigned long swiotlb_nr_tbl(void)
137 return unlikely(no_iotlb_memory) ? 0 : io_tlb_nslabs;
139 EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
141 unsigned int swiotlb_max_segment(void)
143 return unlikely(no_iotlb_memory) ? 0 : max_segment;
145 EXPORT_SYMBOL_GPL(swiotlb_max_segment);
147 void swiotlb_set_max_segment(unsigned int val)
149 if (swiotlb_force == SWIOTLB_FORCE)
152 max_segment = rounddown(val, PAGE_SIZE);
155 /* default to 64MB */
156 #define IO_TLB_DEFAULT_SIZE (64UL<<20)
157 unsigned long swiotlb_size_or_default(void)
161 size = io_tlb_nslabs << IO_TLB_SHIFT;
163 return size ? size : (IO_TLB_DEFAULT_SIZE);
166 void swiotlb_print_info(void)
168 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
170 if (no_iotlb_memory) {
171 pr_warn("No low mem\n");
175 pr_info("mapped [mem %pa-%pa] (%luMB)\n", &io_tlb_start, &io_tlb_end,
180 * Early SWIOTLB allocation may be too early to allow an architecture to
181 * perform the desired operations. This function allows the architecture to
182 * call SWIOTLB when the operations are possible. It needs to be called
183 * before the SWIOTLB memory is used.
185 void __init swiotlb_update_mem_attributes(void)
190 if (no_iotlb_memory || late_alloc)
193 vaddr = phys_to_virt(io_tlb_start);
194 bytes = PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT);
195 set_memory_decrypted((unsigned long)vaddr, bytes >> PAGE_SHIFT);
196 memset(vaddr, 0, bytes);
199 int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
201 unsigned long i, bytes;
204 bytes = nslabs << IO_TLB_SHIFT;
206 io_tlb_nslabs = nslabs;
207 io_tlb_start = __pa(tlb);
208 io_tlb_end = io_tlb_start + bytes;
211 * Allocate and initialize the free list array. This array is used
212 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
213 * between io_tlb_start and io_tlb_end.
215 alloc_size = PAGE_ALIGN(io_tlb_nslabs * sizeof(int));
216 io_tlb_list = memblock_alloc(alloc_size, PAGE_SIZE);
218 panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
219 __func__, alloc_size, PAGE_SIZE);
221 alloc_size = PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t));
222 io_tlb_orig_addr = memblock_alloc(alloc_size, PAGE_SIZE);
223 if (!io_tlb_orig_addr)
224 panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
225 __func__, alloc_size, PAGE_SIZE);
227 for (i = 0; i < io_tlb_nslabs; i++) {
228 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
229 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
234 swiotlb_print_info();
236 swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
241 * Statically reserve bounce buffer space and initialize bounce buffer data
242 * structures for the software IO TLB used to implement the DMA API.
245 swiotlb_init(int verbose)
247 size_t default_size = IO_TLB_DEFAULT_SIZE;
248 unsigned char *vstart;
251 if (!io_tlb_nslabs) {
252 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
253 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
256 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
258 /* Get IO TLB memory from the low pages */
259 vstart = memblock_alloc_low(PAGE_ALIGN(bytes), PAGE_SIZE);
260 if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
264 memblock_free_early(io_tlb_start,
265 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
266 pr_warn("Cannot allocate buffer");
267 no_iotlb_memory = true;
271 * Systems with larger DMA zones (those that don't support ISA) can
272 * initialize the swiotlb later using the slab allocator if needed.
273 * This should be just like above, but with some error catching.
276 swiotlb_late_init_with_default_size(size_t default_size)
278 unsigned long bytes, req_nslabs = io_tlb_nslabs;
279 unsigned char *vstart = NULL;
283 if (!io_tlb_nslabs) {
284 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
285 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
289 * Get IO TLB memory from the low pages
291 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
292 io_tlb_nslabs = SLABS_PER_PAGE << order;
293 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
295 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
296 vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
304 io_tlb_nslabs = req_nslabs;
307 if (order != get_order(bytes)) {
308 pr_warn("only able to allocate %ld MB\n",
309 (PAGE_SIZE << order) >> 20);
310 io_tlb_nslabs = SLABS_PER_PAGE << order;
312 rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
314 free_pages((unsigned long)vstart, order);
319 static void swiotlb_cleanup(void)
328 swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
330 unsigned long i, bytes;
332 bytes = nslabs << IO_TLB_SHIFT;
334 io_tlb_nslabs = nslabs;
335 io_tlb_start = virt_to_phys(tlb);
336 io_tlb_end = io_tlb_start + bytes;
338 set_memory_decrypted((unsigned long)tlb, bytes >> PAGE_SHIFT);
339 memset(tlb, 0, bytes);
342 * Allocate and initialize the free list array. This array is used
343 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
344 * between io_tlb_start and io_tlb_end.
346 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
347 get_order(io_tlb_nslabs * sizeof(int)));
351 io_tlb_orig_addr = (phys_addr_t *)
352 __get_free_pages(GFP_KERNEL,
353 get_order(io_tlb_nslabs *
354 sizeof(phys_addr_t)));
355 if (!io_tlb_orig_addr)
358 for (i = 0; i < io_tlb_nslabs; i++) {
359 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
360 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
364 swiotlb_print_info();
368 swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
373 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
381 void __init swiotlb_exit(void)
383 if (!io_tlb_orig_addr)
387 free_pages((unsigned long)io_tlb_orig_addr,
388 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
389 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
391 free_pages((unsigned long)phys_to_virt(io_tlb_start),
392 get_order(io_tlb_nslabs << IO_TLB_SHIFT));
394 memblock_free_late(__pa(io_tlb_orig_addr),
395 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
396 memblock_free_late(__pa(io_tlb_list),
397 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
398 memblock_free_late(io_tlb_start,
399 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
405 * Bounce: copy the swiotlb buffer from or back to the original dma location
407 static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
408 size_t size, enum dma_data_direction dir)
410 unsigned long pfn = PFN_DOWN(orig_addr);
411 unsigned char *vaddr = phys_to_virt(tlb_addr);
413 if (PageHighMem(pfn_to_page(pfn))) {
414 /* The buffer does not have a mapping. Map it in and copy */
415 unsigned int offset = orig_addr & ~PAGE_MASK;
421 sz = min_t(size_t, PAGE_SIZE - offset, size);
423 local_irq_save(flags);
424 buffer = kmap_atomic(pfn_to_page(pfn));
425 if (dir == DMA_TO_DEVICE)
426 memcpy(vaddr, buffer + offset, sz);
428 memcpy(buffer + offset, vaddr, sz);
429 kunmap_atomic(buffer);
430 local_irq_restore(flags);
437 } else if (dir == DMA_TO_DEVICE) {
438 memcpy(vaddr, phys_to_virt(orig_addr), size);
440 memcpy(phys_to_virt(orig_addr), vaddr, size);
444 phys_addr_t swiotlb_tbl_map_single(struct device *hwdev,
445 dma_addr_t tbl_dma_addr,
446 phys_addr_t orig_addr,
449 enum dma_data_direction dir,
453 phys_addr_t tlb_addr;
454 unsigned int nslots, stride, index, wrap;
457 unsigned long offset_slots;
458 unsigned long max_slots;
459 unsigned long tmp_io_tlb_used;
462 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
464 if (mem_encrypt_active())
465 pr_warn_once("Memory encryption is active and system is using DMA bounce buffers\n");
467 if (mapping_size > alloc_size) {
468 dev_warn_once(hwdev, "Invalid sizes (mapping: %zd bytes, alloc: %zd bytes)",
469 mapping_size, alloc_size);
470 return (phys_addr_t)DMA_MAPPING_ERROR;
473 mask = dma_get_seg_boundary(hwdev);
475 tbl_dma_addr &= mask;
477 offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
480 * Carefully handle integer overflow which can occur when mask == ~0UL.
483 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
484 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
487 * For mappings greater than or equal to a page, we limit the stride
488 * (and hence alignment) to a page size.
490 nslots = ALIGN(alloc_size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
491 if (alloc_size >= PAGE_SIZE)
492 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
499 * Find suitable number of IO TLB entries size that will fit this
500 * request and allocate a buffer from that IO TLB pool.
502 spin_lock_irqsave(&io_tlb_lock, flags);
504 if (unlikely(nslots > io_tlb_nslabs - io_tlb_used))
507 index = ALIGN(io_tlb_index, stride);
508 if (index >= io_tlb_nslabs)
513 while (iommu_is_span_boundary(index, nslots, offset_slots,
516 if (index >= io_tlb_nslabs)
523 * If we find a slot that indicates we have 'nslots' number of
524 * contiguous buffers, we allocate the buffers from that slot
525 * and mark the entries as '0' indicating unavailable.
527 if (io_tlb_list[index] >= nslots) {
530 for (i = index; i < (int) (index + nslots); i++)
532 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
533 io_tlb_list[i] = ++count;
534 tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
537 * Update the indices to avoid searching in the next
540 io_tlb_index = ((index + nslots) < io_tlb_nslabs
541 ? (index + nslots) : 0);
546 if (index >= io_tlb_nslabs)
548 } while (index != wrap);
551 tmp_io_tlb_used = io_tlb_used;
553 spin_unlock_irqrestore(&io_tlb_lock, flags);
554 if (!(attrs & DMA_ATTR_NO_WARN) && printk_ratelimit())
555 dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes), total %lu (slots), used %lu (slots)\n",
556 alloc_size, io_tlb_nslabs, tmp_io_tlb_used);
557 return (phys_addr_t)DMA_MAPPING_ERROR;
559 io_tlb_used += nslots;
560 spin_unlock_irqrestore(&io_tlb_lock, flags);
563 * Save away the mapping from the original address to the DMA address.
564 * This is needed when we sync the memory. Then we sync the buffer if
567 for (i = 0; i < nslots; i++)
568 io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
569 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
570 (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
571 swiotlb_bounce(orig_addr, tlb_addr, mapping_size, DMA_TO_DEVICE);
577 * tlb_addr is the physical address of the bounce buffer to unmap.
579 void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
580 size_t mapping_size, size_t alloc_size,
581 enum dma_data_direction dir, unsigned long attrs)
584 int i, count, nslots = ALIGN(alloc_size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
585 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
586 phys_addr_t orig_addr = io_tlb_orig_addr[index];
589 * First, sync the memory before unmapping the entry
591 if (orig_addr != INVALID_PHYS_ADDR &&
592 !(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
593 ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
594 swiotlb_bounce(orig_addr, tlb_addr, mapping_size, DMA_FROM_DEVICE);
597 * Return the buffer to the free list by setting the corresponding
598 * entries to indicate the number of contiguous entries available.
599 * While returning the entries to the free list, we merge the entries
600 * with slots below and above the pool being returned.
602 spin_lock_irqsave(&io_tlb_lock, flags);
604 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
605 io_tlb_list[index + nslots] : 0);
607 * Step 1: return the slots to the free list, merging the
608 * slots with superceeding slots
610 for (i = index + nslots - 1; i >= index; i--) {
611 io_tlb_list[i] = ++count;
612 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
615 * Step 2: merge the returned slots with the preceding slots,
616 * if available (non zero)
618 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
619 io_tlb_list[i] = ++count;
621 io_tlb_used -= nslots;
623 spin_unlock_irqrestore(&io_tlb_lock, flags);
626 void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
627 size_t size, enum dma_data_direction dir,
628 enum dma_sync_target target)
630 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
631 phys_addr_t orig_addr = io_tlb_orig_addr[index];
633 if (orig_addr == INVALID_PHYS_ADDR)
635 orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
639 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
640 swiotlb_bounce(orig_addr, tlb_addr,
641 size, DMA_FROM_DEVICE);
643 BUG_ON(dir != DMA_TO_DEVICE);
645 case SYNC_FOR_DEVICE:
646 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
647 swiotlb_bounce(orig_addr, tlb_addr,
648 size, DMA_TO_DEVICE);
650 BUG_ON(dir != DMA_FROM_DEVICE);
658 * Create a swiotlb mapping for the buffer at @paddr, and in case of DMAing
659 * to the device copy the data into it as well.
661 dma_addr_t swiotlb_map(struct device *dev, phys_addr_t paddr, size_t size,
662 enum dma_data_direction dir, unsigned long attrs)
664 phys_addr_t swiotlb_addr;
667 trace_swiotlb_bounced(dev, phys_to_dma(dev, paddr), size,
670 swiotlb_addr = swiotlb_tbl_map_single(dev,
671 phys_to_dma_unencrypted(dev, io_tlb_start),
672 paddr, size, size, dir, attrs);
673 if (swiotlb_addr == (phys_addr_t)DMA_MAPPING_ERROR)
674 return DMA_MAPPING_ERROR;
676 /* Ensure that the address returned is DMA'ble */
677 dma_addr = phys_to_dma_unencrypted(dev, swiotlb_addr);
678 if (unlikely(!dma_capable(dev, dma_addr, size, true))) {
679 swiotlb_tbl_unmap_single(dev, swiotlb_addr, size, size, dir,
680 attrs | DMA_ATTR_SKIP_CPU_SYNC);
681 dev_WARN_ONCE(dev, 1,
682 "swiotlb addr %pad+%zu overflow (mask %llx, bus limit %llx).\n",
683 &dma_addr, size, *dev->dma_mask, dev->bus_dma_limit);
684 return DMA_MAPPING_ERROR;
687 if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
688 arch_sync_dma_for_device(swiotlb_addr, size, dir);
692 size_t swiotlb_max_mapping_size(struct device *dev)
694 return ((size_t)1 << IO_TLB_SHIFT) * IO_TLB_SEGSIZE;
697 bool is_swiotlb_active(void)
700 * When SWIOTLB is initialized, even if io_tlb_start points to physical
701 * address zero, io_tlb_end surely doesn't.
703 return io_tlb_end != 0;
706 #ifdef CONFIG_DEBUG_FS
708 static int __init swiotlb_create_debugfs(void)
712 root = debugfs_create_dir("swiotlb", NULL);
713 debugfs_create_ulong("io_tlb_nslabs", 0400, root, &io_tlb_nslabs);
714 debugfs_create_ulong("io_tlb_used", 0400, root, &io_tlb_used);
718 late_initcall(swiotlb_create_debugfs);