1 // SPDX-License-Identifier: GPL-2.0
3 * arch-independent dma-mapping routines
5 * Copyright (c) 2006 SUSE Linux Products GmbH
6 * Copyright (c) 2006 Tejun Heo <teheo@suse.de>
8 #include <linux/memblock.h> /* for max_pfn */
9 #include <linux/acpi.h>
10 #include <linux/dma-direct.h>
11 #include <linux/dma-noncoherent.h>
12 #include <linux/export.h>
13 #include <linux/gfp.h>
14 #include <linux/of_device.h>
15 #include <linux/slab.h>
16 #include <linux/vmalloc.h>
24 dma_addr_t dma_handle;
28 static void dmam_release(struct device *dev, void *res)
30 struct dma_devres *this = res;
32 dma_free_attrs(dev, this->size, this->vaddr, this->dma_handle,
36 static int dmam_match(struct device *dev, void *res, void *match_data)
38 struct dma_devres *this = res, *match = match_data;
40 if (this->vaddr == match->vaddr) {
41 WARN_ON(this->size != match->size ||
42 this->dma_handle != match->dma_handle);
49 * dmam_free_coherent - Managed dma_free_coherent()
50 * @dev: Device to free coherent memory for
51 * @size: Size of allocation
52 * @vaddr: Virtual address of the memory to free
53 * @dma_handle: DMA handle of the memory to free
55 * Managed dma_free_coherent().
57 void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
58 dma_addr_t dma_handle)
60 struct dma_devres match_data = { size, vaddr, dma_handle };
62 dma_free_coherent(dev, size, vaddr, dma_handle);
63 WARN_ON(devres_destroy(dev, dmam_release, dmam_match, &match_data));
65 EXPORT_SYMBOL(dmam_free_coherent);
68 * dmam_alloc_attrs - Managed dma_alloc_attrs()
69 * @dev: Device to allocate non_coherent memory for
70 * @size: Size of allocation
71 * @dma_handle: Out argument for allocated DMA handle
72 * @gfp: Allocation flags
73 * @attrs: Flags in the DMA_ATTR_* namespace.
75 * Managed dma_alloc_attrs(). Memory allocated using this function will be
76 * automatically released on driver detach.
79 * Pointer to allocated memory on success, NULL on failure.
81 void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
82 gfp_t gfp, unsigned long attrs)
84 struct dma_devres *dr;
87 dr = devres_alloc(dmam_release, sizeof(*dr), gfp);
91 vaddr = dma_alloc_attrs(dev, size, dma_handle, gfp, attrs);
98 dr->dma_handle = *dma_handle;
106 EXPORT_SYMBOL(dmam_alloc_attrs);
109 * Create scatter-list for the already allocated DMA buffer.
111 int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
112 void *cpu_addr, dma_addr_t dma_addr, size_t size,
118 if (!dev_is_dma_coherent(dev)) {
121 if (!IS_ENABLED(CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN))
124 /* If the PFN is not valid, we do not have a struct page */
125 pfn = arch_dma_coherent_to_pfn(dev, cpu_addr, dma_addr);
128 page = pfn_to_page(pfn);
130 page = virt_to_page(cpu_addr);
133 ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
135 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
140 * The whole dma_get_sgtable() idea is fundamentally unsafe - it seems
141 * that the intention is to allow exporting memory allocated via the
142 * coherent DMA APIs through the dma_buf API, which only accepts a
143 * scattertable. This presents a couple of problems:
144 * 1. Not all memory allocated via the coherent DMA APIs is backed by
146 * 2. Passing coherent DMA memory into the streaming APIs is not allowed
147 * as we will try to flush the memory through a different alias to that
148 * actually being used (and the flushes are redundant.)
150 int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt,
151 void *cpu_addr, dma_addr_t dma_addr, size_t size,
154 const struct dma_map_ops *ops = get_dma_ops(dev);
156 if (dma_is_direct(ops))
157 return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr,
159 if (!ops->get_sgtable)
161 return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size, attrs);
163 EXPORT_SYMBOL(dma_get_sgtable_attrs);
167 * Return the page attributes used for mapping dma_alloc_* memory, either in
168 * kernel space if remapping is needed, or to userspace through dma_mmap_*.
170 pgprot_t dma_pgprot(struct device *dev, pgprot_t prot, unsigned long attrs)
172 if (dev_is_dma_coherent(dev) ||
173 (IS_ENABLED(CONFIG_DMA_NONCOHERENT_CACHE_SYNC) &&
174 (attrs & DMA_ATTR_NON_CONSISTENT)))
176 #ifdef CONFIG_ARCH_HAS_DMA_WRITE_COMBINE
177 if (attrs & DMA_ATTR_WRITE_COMBINE)
178 return pgprot_writecombine(prot);
180 return pgprot_dmacoherent(prot);
182 #endif /* CONFIG_MMU */
185 * Create userspace mapping for the DMA-coherent memory.
187 int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
188 void *cpu_addr, dma_addr_t dma_addr, size_t size,
192 unsigned long user_count = vma_pages(vma);
193 unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
194 unsigned long off = vma->vm_pgoff;
198 vma->vm_page_prot = dma_pgprot(dev, vma->vm_page_prot, attrs);
200 if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret))
203 if (off >= count || user_count > count - off)
206 if (!dev_is_dma_coherent(dev)) {
207 if (!IS_ENABLED(CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN))
210 /* If the PFN is not valid, we do not have a struct page */
211 pfn = arch_dma_coherent_to_pfn(dev, cpu_addr, dma_addr);
215 pfn = page_to_pfn(virt_to_page(cpu_addr));
218 return remap_pfn_range(vma, vma->vm_start, pfn + vma->vm_pgoff,
219 user_count << PAGE_SHIFT, vma->vm_page_prot);
222 #endif /* CONFIG_MMU */
226 * dma_can_mmap - check if a given device supports dma_mmap_*
227 * @dev: device to check
229 * Returns %true if @dev supports dma_mmap_coherent() and dma_mmap_attrs() to
230 * map DMA allocations to userspace.
232 bool dma_can_mmap(struct device *dev)
234 const struct dma_map_ops *ops = get_dma_ops(dev);
236 if (dma_is_direct(ops)) {
237 return IS_ENABLED(CONFIG_MMU) &&
238 (dev_is_dma_coherent(dev) ||
239 IS_ENABLED(CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN));
242 return ops->mmap != NULL;
244 EXPORT_SYMBOL_GPL(dma_can_mmap);
247 * dma_mmap_attrs - map a coherent DMA allocation into user space
248 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
249 * @vma: vm_area_struct describing requested user mapping
250 * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs
251 * @dma_addr: device-view address returned from dma_alloc_attrs
252 * @size: size of memory originally requested in dma_alloc_attrs
253 * @attrs: attributes of mapping properties requested in dma_alloc_attrs
255 * Map a coherent DMA buffer previously allocated by dma_alloc_attrs into user
256 * space. The coherent DMA buffer must not be freed by the driver until the
257 * user space mapping has been released.
259 int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
260 void *cpu_addr, dma_addr_t dma_addr, size_t size,
263 const struct dma_map_ops *ops = get_dma_ops(dev);
265 if (dma_is_direct(ops))
266 return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size,
270 return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
272 EXPORT_SYMBOL(dma_mmap_attrs);
274 static u64 dma_default_get_required_mask(struct device *dev)
276 u32 low_totalram = ((max_pfn - 1) << PAGE_SHIFT);
277 u32 high_totalram = ((max_pfn - 1) >> (32 - PAGE_SHIFT));
280 if (!high_totalram) {
281 /* convert to mask just covering totalram */
282 low_totalram = (1 << (fls(low_totalram) - 1));
283 low_totalram += low_totalram - 1;
286 high_totalram = (1 << (fls(high_totalram) - 1));
287 high_totalram += high_totalram - 1;
288 mask = (((u64)high_totalram) << 32) + 0xffffffff;
293 u64 dma_get_required_mask(struct device *dev)
295 const struct dma_map_ops *ops = get_dma_ops(dev);
297 if (dma_is_direct(ops))
298 return dma_direct_get_required_mask(dev);
299 if (ops->get_required_mask)
300 return ops->get_required_mask(dev);
301 return dma_default_get_required_mask(dev);
303 EXPORT_SYMBOL_GPL(dma_get_required_mask);
305 void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
306 gfp_t flag, unsigned long attrs)
308 const struct dma_map_ops *ops = get_dma_ops(dev);
311 WARN_ON_ONCE(!dev->coherent_dma_mask);
313 if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr))
316 /* let the implementation decide on the zone to allocate from: */
317 flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
319 if (dma_is_direct(ops))
320 cpu_addr = dma_direct_alloc(dev, size, dma_handle, flag, attrs);
322 cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
326 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
329 EXPORT_SYMBOL(dma_alloc_attrs);
331 void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
332 dma_addr_t dma_handle, unsigned long attrs)
334 const struct dma_map_ops *ops = get_dma_ops(dev);
336 if (dma_release_from_dev_coherent(dev, get_order(size), cpu_addr))
339 * On non-coherent platforms which implement DMA-coherent buffers via
340 * non-cacheable remaps, ops->free() may call vunmap(). Thus getting
341 * this far in IRQ context is a) at risk of a BUG_ON() or trying to
342 * sleep on some machines, and b) an indication that the driver is
343 * probably misusing the coherent API anyway.
345 WARN_ON(irqs_disabled());
350 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
351 if (dma_is_direct(ops))
352 dma_direct_free(dev, size, cpu_addr, dma_handle, attrs);
354 ops->free(dev, size, cpu_addr, dma_handle, attrs);
356 EXPORT_SYMBOL(dma_free_attrs);
358 static inline void dma_check_mask(struct device *dev, u64 mask)
360 if (sme_active() && (mask < (((u64)sme_get_me_mask() << 1) - 1)))
361 dev_warn(dev, "SME is active, device will require DMA bounce buffers\n");
364 int dma_supported(struct device *dev, u64 mask)
366 const struct dma_map_ops *ops = get_dma_ops(dev);
368 if (dma_is_direct(ops))
369 return dma_direct_supported(dev, mask);
370 if (!ops->dma_supported)
372 return ops->dma_supported(dev, mask);
374 EXPORT_SYMBOL(dma_supported);
376 #ifdef CONFIG_ARCH_HAS_DMA_SET_MASK
377 void arch_dma_set_mask(struct device *dev, u64 mask);
379 #define arch_dma_set_mask(dev, mask) do { } while (0)
382 int dma_set_mask(struct device *dev, u64 mask)
385 * Truncate the mask to the actually supported dma_addr_t width to
386 * avoid generating unsupportable addresses.
388 mask = (dma_addr_t)mask;
390 if (!dev->dma_mask || !dma_supported(dev, mask))
393 arch_dma_set_mask(dev, mask);
394 dma_check_mask(dev, mask);
395 *dev->dma_mask = mask;
398 EXPORT_SYMBOL(dma_set_mask);
400 #ifndef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK
401 int dma_set_coherent_mask(struct device *dev, u64 mask)
404 * Truncate the mask to the actually supported dma_addr_t width to
405 * avoid generating unsupportable addresses.
407 mask = (dma_addr_t)mask;
409 if (!dma_supported(dev, mask))
412 dma_check_mask(dev, mask);
413 dev->coherent_dma_mask = mask;
416 EXPORT_SYMBOL(dma_set_coherent_mask);
419 void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
420 enum dma_data_direction dir)
422 const struct dma_map_ops *ops = get_dma_ops(dev);
424 BUG_ON(!valid_dma_direction(dir));
426 if (dma_is_direct(ops))
427 arch_dma_cache_sync(dev, vaddr, size, dir);
428 else if (ops->cache_sync)
429 ops->cache_sync(dev, vaddr, size, dir);
431 EXPORT_SYMBOL(dma_cache_sync);
433 size_t dma_max_mapping_size(struct device *dev)
435 const struct dma_map_ops *ops = get_dma_ops(dev);
436 size_t size = SIZE_MAX;
438 if (dma_is_direct(ops))
439 size = dma_direct_max_mapping_size(dev);
440 else if (ops && ops->max_mapping_size)
441 size = ops->max_mapping_size(dev);
445 EXPORT_SYMBOL_GPL(dma_max_mapping_size);
447 unsigned long dma_get_merge_boundary(struct device *dev)
449 const struct dma_map_ops *ops = get_dma_ops(dev);
451 if (!ops || !ops->get_merge_boundary)
452 return 0; /* can't merge */
454 return ops->get_merge_boundary(dev);
456 EXPORT_SYMBOL_GPL(dma_get_merge_boundary);