kernel/dma/direct.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2018 Christoph Hellwig.
   4  *
   5  * DMA operations that map physical memory directly without using an IOMMU.
   6  */
   7 #include <linux/memblock.h> /* for max_pfn */
   8 #include <linux/export.h>
   9 #include <linux/mm.h>
  10 #include <linux/dma-direct.h>
  11 #include <linux/scatterlist.h>
  12 #include <linux/dma-contiguous.h>
  13 #include <linux/dma-noncoherent.h>
  14 #include <linux/pfn.h>
  15 #include <linux/set_memory.h>
  16 #include <linux/swiotlb.h>
  17
  18 /*
  19  * Most architectures use ZONE_DMA for the first 16 Megabytes, but
  20  * some use it for entirely different regions:
  21  */
  22 #ifndef ARCH_ZONE_DMA_BITS
  23 #define ARCH_ZONE_DMA_BITS 24
  24 #endif
  25
  26 static void report_addr(struct device *dev, dma_addr_t dma_addr, size_t size)
  27 {
  28         if (!dev->dma_mask) {
  29                 dev_err_once(dev, "DMA map on device without dma_mask\n");
  30         } else if (*dev->dma_mask >= DMA_BIT_MASK(32) || dev->bus_dma_mask) {
  31                 dev_err_once(dev,
  32                         "overflow %pad+%zu of DMA mask %llx bus mask %llx\n",
  33                         &dma_addr, size, *dev->dma_mask, dev->bus_dma_mask);
  34         }
  35         WARN_ON_ONCE(1);
  36 }
  37
  38 static inline dma_addr_t phys_to_dma_direct(struct device *dev,
  39                 phys_addr_t phys)
  40 {
  41         if (force_dma_unencrypted(dev))
  42                 return __phys_to_dma(dev, phys);
  43         return phys_to_dma(dev, phys);
  44 }
  45
  46 static inline struct page *dma_direct_to_page(struct device *dev,
  47                 dma_addr_t dma_addr)
  48 {
  49         return pfn_to_page(PHYS_PFN(dma_to_phys(dev, dma_addr)));
  50 }
  51
  52 u64 dma_direct_get_required_mask(struct device *dev)
  53 {
  54         u64 max_dma = phys_to_dma_direct(dev, (max_pfn - 1) << PAGE_SHIFT);
  55
  56         return (1ULL << (fls64(max_dma) - 1)) * 2 - 1;
  57 }
  58
  59 static gfp_t __dma_direct_optimal_gfp_mask(struct device *dev, u64 dma_mask,
  60                 u64 *phys_mask)
  61 {
  62         if (dev->bus_dma_mask && dev->bus_dma_mask < dma_mask)
  63                 dma_mask = dev->bus_dma_mask;
  64
  65         if (force_dma_unencrypted(dev))
  66                 *phys_mask = __dma_to_phys(dev, dma_mask);
  67         else
  68                 *phys_mask = dma_to_phys(dev, dma_mask);
  69
  70         /*
  71          * Optimistically try the zone that the physical address mask falls
  72          * into first.  If that returns memory that isn't actually addressable
  73          * we will fallback to the next lower zone and try again.
  74          *
  75          * Note that GFP_DMA32 and GFP_DMA are no ops without the corresponding
  76          * zones.
  77          */
  78         if (*phys_mask <= DMA_BIT_MASK(ARCH_ZONE_DMA_BITS))
  79                 return GFP_DMA;
  80         if (*phys_mask <= DMA_BIT_MASK(32))
  81                 return GFP_DMA32;
  82         return 0;
  83 }
  84
  85 static bool dma_coherent_ok(struct device *dev, phys_addr_t phys, size_t size)
  86 {
  87         return phys_to_dma_direct(dev, phys) + size - 1 <=
  88                         min_not_zero(dev->coherent_dma_mask, dev->bus_dma_mask);
  89 }
  90
  91 struct page *__dma_direct_alloc_pages(struct device *dev, size_t size,
  92                 gfp_t gfp, unsigned long attrs)
  93 {
  94         size_t alloc_size = PAGE_ALIGN(size);
  95         int node = dev_to_node(dev);
  96         struct page *page = NULL;
  97         u64 phys_mask;
  98
  99         if (attrs & DMA_ATTR_NO_WARN)
 100                 gfp |= __GFP_NOWARN;
 101
 102         /* we always manually zero the memory once we are done: */
 103         gfp &= ~__GFP_ZERO;
 104         gfp |= __dma_direct_optimal_gfp_mask(dev, dev->coherent_dma_mask,
 105                         &phys_mask);
 106         page = dma_alloc_contiguous(dev, alloc_size, gfp);
 107         if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
 108                 dma_free_contiguous(dev, page, alloc_size);
 109                 page = NULL;
 110         }
 111 again:
 112         if (!page)
 113                 page = alloc_pages_node(node, gfp, get_order(alloc_size));
 114         if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
 115                 dma_free_contiguous(dev, page, size);
 116                 page = NULL;
 117
 118                 if (IS_ENABLED(CONFIG_ZONE_DMA32) &&
 119                     phys_mask < DMA_BIT_MASK(64) &&
 120                     !(gfp & (GFP_DMA32 | GFP_DMA))) {
 121                         gfp |= GFP_DMA32;
 122                         goto again;
 123                 }
 124
 125                 if (IS_ENABLED(CONFIG_ZONE_DMA) && !(gfp & GFP_DMA)) {
 126                         gfp = (gfp & ~GFP_DMA32) | GFP_DMA;
 127                         goto again;
 128                 }
 129         }
 130
 131         return page;
 132 }
 133
 134 void *dma_direct_alloc_pages(struct device *dev, size_t size,
 135                 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
 136 {
 137         struct page *page;
 138         void *ret;
 139
 140         page = __dma_direct_alloc_pages(dev, size, gfp, attrs);
 141         if (!page)
 142                 return NULL;
 143
 144         if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) &&
 145             !force_dma_unencrypted(dev)) {
 146                 /* remove any dirty cache lines on the kernel alias */
 147                 if (!PageHighMem(page))
 148                         arch_dma_prep_coherent(page, size);
 149                 *dma_handle = phys_to_dma(dev, page_to_phys(page));
 150                 /* return the page pointer as the opaque cookie */
 151                 return page;
 152         }
 153
 154         if (PageHighMem(page)) {
 155                 /*
 156                  * Depending on the cma= arguments and per-arch setup
 157                  * dma_alloc_contiguous could return highmem pages.
 158                  * Without remapping there is no way to return them here,
 159                  * so log an error and fail.
 160                  */
 161                 dev_info(dev, "Rejecting highmem page from CMA.\n");
 162                 dma_free_contiguous(dev, page, size);
 163                 return NULL;
 164         }
 165
 166         ret = page_address(page);
 167         if (force_dma_unencrypted(dev)) {
 168                 set_memory_decrypted((unsigned long)ret, 1 << get_order(size));
 169                 *dma_handle = __phys_to_dma(dev, page_to_phys(page));
 170         } else {
 171                 *dma_handle = phys_to_dma(dev, page_to_phys(page));
 172         }
 173         memset(ret, 0, size);
 174
 175         if (IS_ENABLED(CONFIG_ARCH_HAS_UNCACHED_SEGMENT) &&
 176             dma_alloc_need_uncached(dev, attrs)) {
 177                 arch_dma_prep_coherent(page, size);
 178                 ret = uncached_kernel_address(ret);
 179         }
 180
 181         return ret;
 182 }
 183
 184 void dma_direct_free_pages(struct device *dev, size_t size, void *cpu_addr,
 185                 dma_addr_t dma_addr, unsigned long attrs)
 186 {
 187         unsigned int page_order = get_order(size);
 188
 189         if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) &&
 190             !force_dma_unencrypted(dev)) {
 191                 /* cpu_addr is a struct page cookie, not a kernel address */
 192                 dma_free_contiguous(dev, cpu_addr, size);
 193                 return;
 194         }
 195
 196         if (force_dma_unencrypted(dev))
 197                 set_memory_encrypted((unsigned long)cpu_addr, 1 << page_order);
 198
 199         if (IS_ENABLED(CONFIG_ARCH_HAS_UNCACHED_SEGMENT) &&
 200             dma_alloc_need_uncached(dev, attrs))
 201                 cpu_addr = cached_kernel_address(cpu_addr);
 202         dma_free_contiguous(dev, virt_to_page(cpu_addr), size);
 203 }
 204
 205 void *dma_direct_alloc(struct device *dev, size_t size,
 206                 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
 207 {
 208         if (!IS_ENABLED(CONFIG_ARCH_HAS_UNCACHED_SEGMENT) &&
 209             dma_alloc_need_uncached(dev, attrs))
 210                 return arch_dma_alloc(dev, size, dma_handle, gfp, attrs);
 211         return dma_direct_alloc_pages(dev, size, dma_handle, gfp, attrs);
 212 }
 213
 214 void dma_direct_free(struct device *dev, size_t size,
 215                 void *cpu_addr, dma_addr_t dma_addr, unsigned long attrs)
 216 {
 217         if (!IS_ENABLED(CONFIG_ARCH_HAS_UNCACHED_SEGMENT) &&
 218             dma_alloc_need_uncached(dev, attrs))
 219                 arch_dma_free(dev, size, cpu_addr, dma_addr, attrs);
 220         else
 221                 dma_direct_free_pages(dev, size, cpu_addr, dma_addr, attrs);
 222 }
 223
 224 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
 225     defined(CONFIG_SWIOTLB)
 226 void dma_direct_sync_single_for_device(struct device *dev,
 227                 dma_addr_t addr, size_t size, enum dma_data_direction dir)
 228 {
 229         phys_addr_t paddr = dma_to_phys(dev, addr);
 230
 231         if (unlikely(is_swiotlb_buffer(paddr)))
 232                 swiotlb_tbl_sync_single(dev, paddr, size, dir, SYNC_FOR_DEVICE);
 233
 234         if (!dev_is_dma_coherent(dev))
 235                 arch_sync_dma_for_device(dev, paddr, size, dir);
 236 }
 237 EXPORT_SYMBOL(dma_direct_sync_single_for_device);
 238
 239 void dma_direct_sync_sg_for_device(struct device *dev,
 240                 struct scatterlist *sgl, int nents, enum dma_data_direction dir)
 241 {
 242         struct scatterlist *sg;
 243         int i;
 244
 245         for_each_sg(sgl, sg, nents, i) {
 246                 phys_addr_t paddr = dma_to_phys(dev, sg_dma_address(sg));
 247
 248                 if (unlikely(is_swiotlb_buffer(paddr)))
 249                         swiotlb_tbl_sync_single(dev, paddr, sg->length,
 250                                         dir, SYNC_FOR_DEVICE);
 251
 252                 if (!dev_is_dma_coherent(dev))
 253                         arch_sync_dma_for_device(dev, paddr, sg->length,
 254                                         dir);
 255         }
 256 }
 257 EXPORT_SYMBOL(dma_direct_sync_sg_for_device);
 258 #endif
 259
 260 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
 261     defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \
 262     defined(CONFIG_SWIOTLB)
 263 void dma_direct_sync_single_for_cpu(struct device *dev,
 264                 dma_addr_t addr, size_t size, enum dma_data_direction dir)
 265 {
 266         phys_addr_t paddr = dma_to_phys(dev, addr);
 267
 268         if (!dev_is_dma_coherent(dev)) {
 269                 arch_sync_dma_for_cpu(dev, paddr, size, dir);
 270                 arch_sync_dma_for_cpu_all(dev);
 271         }
 272
 273         if (unlikely(is_swiotlb_buffer(paddr)))
 274                 swiotlb_tbl_sync_single(dev, paddr, size, dir, SYNC_FOR_CPU);
 275 }
 276 EXPORT_SYMBOL(dma_direct_sync_single_for_cpu);
 277
 278 void dma_direct_sync_sg_for_cpu(struct device *dev,
 279                 struct scatterlist *sgl, int nents, enum dma_data_direction dir)
 280 {
 281         struct scatterlist *sg;
 282         int i;
 283
 284         for_each_sg(sgl, sg, nents, i) {
 285                 phys_addr_t paddr = dma_to_phys(dev, sg_dma_address(sg));
 286
 287                 if (!dev_is_dma_coherent(dev))
 288                         arch_sync_dma_for_cpu(dev, paddr, sg->length, dir);
 289
 290                 if (unlikely(is_swiotlb_buffer(paddr)))
 291                         swiotlb_tbl_sync_single(dev, paddr, sg->length, dir,
 292                                         SYNC_FOR_CPU);
 293         }
 294
 295         if (!dev_is_dma_coherent(dev))
 296                 arch_sync_dma_for_cpu_all(dev);
 297 }
 298 EXPORT_SYMBOL(dma_direct_sync_sg_for_cpu);
 299
 300 void dma_direct_unmap_page(struct device *dev, dma_addr_t addr,
 301                 size_t size, enum dma_data_direction dir, unsigned long attrs)
 302 {
 303         phys_addr_t phys = dma_to_phys(dev, addr);
 304
 305         if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
 306                 dma_direct_sync_single_for_cpu(dev, addr, size, dir);
 307
 308         if (unlikely(is_swiotlb_buffer(phys)))
 309                 swiotlb_tbl_unmap_single(dev, phys, size, size, dir, attrs);
 310 }
 311 EXPORT_SYMBOL(dma_direct_unmap_page);
 312
 313 void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl,
 314                 int nents, enum dma_data_direction dir, unsigned long attrs)
 315 {
 316         struct scatterlist *sg;
 317         int i;
 318
 319         for_each_sg(sgl, sg, nents, i)
 320                 dma_direct_unmap_page(dev, sg->dma_address, sg_dma_len(sg), dir,
 321                              attrs);
 322 }
 323 EXPORT_SYMBOL(dma_direct_unmap_sg);
 324 #endif
 325
 326 static inline bool dma_direct_possible(struct device *dev, dma_addr_t dma_addr,
 327                 size_t size)
 328 {
 329         return swiotlb_force != SWIOTLB_FORCE &&
 330                 dma_capable(dev, dma_addr, size);
 331 }
 332
 333 dma_addr_t dma_direct_map_page(struct device *dev, struct page *page,
 334                 unsigned long offset, size_t size, enum dma_data_direction dir,
 335                 unsigned long attrs)
 336 {
 337         phys_addr_t phys = page_to_phys(page) + offset;
 338         dma_addr_t dma_addr = phys_to_dma(dev, phys);
 339
 340         if (unlikely(!dma_direct_possible(dev, dma_addr, size)) &&
 341             !swiotlb_map(dev, &phys, &dma_addr, size, dir, attrs)) {
 342                 report_addr(dev, dma_addr, size);
 343                 return DMA_MAPPING_ERROR;
 344         }
 345
 346         if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
 347                 arch_sync_dma_for_device(dev, phys, size, dir);
 348         return dma_addr;
 349 }
 350 EXPORT_SYMBOL(dma_direct_map_page);
 351
 352 int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
 353                 enum dma_data_direction dir, unsigned long attrs)
 354 {
 355         int i;
 356         struct scatterlist *sg;
 357
 358         for_each_sg(sgl, sg, nents, i) {
 359                 sg->dma_address = dma_direct_map_page(dev, sg_page(sg),
 360                                 sg->offset, sg->length, dir, attrs);
 361                 if (sg->dma_address == DMA_MAPPING_ERROR)
 362                         goto out_unmap;
 363                 sg_dma_len(sg) = sg->length;
 364         }
 365
 366         return nents;
 367
 368 out_unmap:
 369         dma_direct_unmap_sg(dev, sgl, i, dir, attrs | DMA_ATTR_SKIP_CPU_SYNC);
 370         return 0;
 371 }
 372 EXPORT_SYMBOL(dma_direct_map_sg);
 373
 374 dma_addr_t dma_direct_map_resource(struct device *dev, phys_addr_t paddr,
 375                 size_t size, enum dma_data_direction dir, unsigned long attrs)
 376 {
 377         dma_addr_t dma_addr = paddr;
 378
 379         if (unlikely(!dma_direct_possible(dev, dma_addr, size))) {
 380                 report_addr(dev, dma_addr, size);
 381                 return DMA_MAPPING_ERROR;
 382         }
 383
 384         return dma_addr;
 385 }
 386 EXPORT_SYMBOL(dma_direct_map_resource);
 387
 388 int dma_direct_get_sgtable(struct device *dev, struct sg_table *sgt,
 389                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 390                 unsigned long attrs)
 391 {
 392         struct page *page = dma_direct_to_page(dev, dma_addr);
 393         int ret;
 394
 395         ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
 396         if (!ret)
 397                 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
 398         return ret;
 399 }
 400
 401 #ifdef CONFIG_MMU
 402 bool dma_direct_can_mmap(struct device *dev)
 403 {
 404         return dev_is_dma_coherent(dev) ||
 405                 IS_ENABLED(CONFIG_DMA_NONCOHERENT_MMAP);
 406 }
 407
 408 int dma_direct_mmap(struct device *dev, struct vm_area_struct *vma,
 409                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 410                 unsigned long attrs)
 411 {
 412         unsigned long user_count = vma_pages(vma);
 413         unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
 414         unsigned long pfn = PHYS_PFN(dma_to_phys(dev, dma_addr));
 415         int ret = -ENXIO;
 416
 417         vma->vm_page_prot = dma_pgprot(dev, vma->vm_page_prot, attrs);
 418
 419         if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret))
 420                 return ret;
 421
 422         if (vma->vm_pgoff >= count || user_count > count - vma->vm_pgoff)
 423                 return -ENXIO;
 424         return remap_pfn_range(vma, vma->vm_start, pfn + vma->vm_pgoff,
 425                         user_count << PAGE_SHIFT, vma->vm_page_prot);
 426 }
 427 #else /* CONFIG_MMU */
 428 bool dma_direct_can_mmap(struct device *dev)
 429 {
 430         return false;
 431 }
 432
 433 int dma_direct_mmap(struct device *dev, struct vm_area_struct *vma,
 434                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 435                 unsigned long attrs)
 436 {
 437         return -ENXIO;
 438 }
 439 #endif /* CONFIG_MMU */
 440
 441 /*
 442  * Because 32-bit DMA masks are so common we expect every architecture to be
 443  * able to satisfy them - either by not supporting more physical memory, or by
 444  * providing a ZONE_DMA32.  If neither is the case, the architecture needs to
 445  * use an IOMMU instead of the direct mapping.
 446  */
 447 int dma_direct_supported(struct device *dev, u64 mask)
 448 {
 449         u64 min_mask;
 450
 451         if (IS_ENABLED(CONFIG_ZONE_DMA))
 452                 min_mask = DMA_BIT_MASK(ARCH_ZONE_DMA_BITS);
 453         else
 454                 min_mask = DMA_BIT_MASK(32);
 455
 456         min_mask = min_t(u64, min_mask, (max_pfn - 1) << PAGE_SHIFT);
 457
 458         /*
 459          * This check needs to be against the actual bit mask value, so
 460          * use __phys_to_dma() here so that the SME encryption mask isn't
 461          * part of the check.
 462          */
 463         return mask >= __phys_to_dma(dev, min_mask);
 464 }
 465
 466 size_t dma_direct_max_mapping_size(struct device *dev)
 467 {
 468         /* If SWIOTLB is active, use its maximum mapping size */
 469         if (is_swiotlb_active() &&
 470             (dma_addressing_limited(dev) || swiotlb_force == SWIOTLB_FORCE))
 471                 return swiotlb_max_mapping_size(dev);
 472         return SIZE_MAX;
 473 }