1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Universal Flash Storage Host controller driver
4 * Copyright (C) 2011-2013 Samsung India Software Operations
5 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
8 * Santosh Yaraganavi <santosh.sy@samsung.com>
9 * Vinayak Holikatti <h.vinayak@samsung.com>
15 #include <linux/bitfield.h>
16 #include <linux/blk-crypto-profile.h>
17 #include <linux/blk-mq.h>
18 #include <linux/devfreq.h>
19 #include <linux/msi.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/dma-direction.h>
22 #include <scsi/scsi_device.h>
23 #include <ufs/unipro.h>
25 #include <ufs/ufs_quirks.h>
26 #include <ufs/ufshci.h>
28 #define UFSHCD "ufshcd"
33 DEV_CMD_TYPE_NOP = 0x0,
34 DEV_CMD_TYPE_QUERY = 0x1,
35 DEV_CMD_TYPE_RPMB = 0x2,
39 /* uic specific errors */
47 UFS_EVT_AUTO_HIBERN8_ERR,
49 UFS_EVT_LINK_STARTUP_FAIL,
64 * struct uic_command - UIC command structure
65 * @command: UIC command
66 * @argument1: UIC command argument 1
67 * @argument2: UIC command argument 2
68 * @argument3: UIC command argument 3
69 * @cmd_active: Indicate if UIC command is outstanding
70 * @done: UIC command completion
78 struct completion done;
81 /* Used to differentiate the power management options */
88 /* Host <-> Device UniPro Link state */
90 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
91 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
92 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
93 UIC_LINK_BROKEN_STATE = 3, /* Link is in broken state */
96 #define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
97 #define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
98 UIC_LINK_ACTIVE_STATE)
99 #define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
100 UIC_LINK_HIBERN8_STATE)
101 #define ufshcd_is_link_broken(hba) ((hba)->uic_link_state == \
102 UIC_LINK_BROKEN_STATE)
103 #define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
104 #define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
105 UIC_LINK_ACTIVE_STATE)
106 #define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
107 UIC_LINK_HIBERN8_STATE)
108 #define ufshcd_set_link_broken(hba) ((hba)->uic_link_state = \
109 UIC_LINK_BROKEN_STATE)
111 #define ufshcd_set_ufs_dev_active(h) \
112 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
113 #define ufshcd_set_ufs_dev_sleep(h) \
114 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
115 #define ufshcd_set_ufs_dev_poweroff(h) \
116 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
117 #define ufshcd_set_ufs_dev_deepsleep(h) \
118 ((h)->curr_dev_pwr_mode = UFS_DEEPSLEEP_PWR_MODE)
119 #define ufshcd_is_ufs_dev_active(h) \
120 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
121 #define ufshcd_is_ufs_dev_sleep(h) \
122 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
123 #define ufshcd_is_ufs_dev_poweroff(h) \
124 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
125 #define ufshcd_is_ufs_dev_deepsleep(h) \
126 ((h)->curr_dev_pwr_mode == UFS_DEEPSLEEP_PWR_MODE)
129 * UFS Power management levels.
130 * Each level is in increasing order of power savings, except DeepSleep
131 * which is lower than PowerDown with power on but not PowerDown with
145 struct ufs_pm_lvl_states {
146 enum ufs_dev_pwr_mode dev_state;
147 enum uic_link_state link_state;
151 * struct ufshcd_lrb - local reference block
152 * @utr_descriptor_ptr: UTRD address of the command
153 * @ucd_req_ptr: UCD address of the command
154 * @ucd_rsp_ptr: Response UPIU address for this command
155 * @ucd_prdt_ptr: PRDT address of the command
156 * @utrd_dma_addr: UTRD dma address for debug
157 * @ucd_prdt_dma_addr: PRDT dma address for debug
158 * @ucd_rsp_dma_addr: UPIU response dma address for debug
159 * @ucd_req_dma_addr: UPIU request dma address for debug
160 * @cmd: pointer to SCSI command
161 * @scsi_status: SCSI status of the command
162 * @command_type: SCSI, UFS, Query.
163 * @task_tag: Task tag of the command
164 * @lun: LUN of the command
165 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
166 * @issue_time_stamp: time stamp for debug purposes (CLOCK_MONOTONIC)
167 * @issue_time_stamp_local_clock: time stamp for debug purposes (local_clock)
168 * @compl_time_stamp: time stamp for statistics (CLOCK_MONOTONIC)
169 * @compl_time_stamp_local_clock: time stamp for debug purposes (local_clock)
170 * @crypto_key_slot: the key slot to use for inline crypto (-1 if none)
171 * @data_unit_num: the data unit number for the first block for inline crypto
172 * @req_abort_skip: skip request abort task flag
175 struct utp_transfer_req_desc *utr_descriptor_ptr;
176 struct utp_upiu_req *ucd_req_ptr;
177 struct utp_upiu_rsp *ucd_rsp_ptr;
178 struct ufshcd_sg_entry *ucd_prdt_ptr;
180 dma_addr_t utrd_dma_addr;
181 dma_addr_t ucd_req_dma_addr;
182 dma_addr_t ucd_rsp_dma_addr;
183 dma_addr_t ucd_prdt_dma_addr;
185 struct scsi_cmnd *cmd;
190 u8 lun; /* UPIU LUN id field is only 8-bit wide */
192 ktime_t issue_time_stamp;
193 u64 issue_time_stamp_local_clock;
194 ktime_t compl_time_stamp;
195 u64 compl_time_stamp_local_clock;
196 #ifdef CONFIG_SCSI_UFS_CRYPTO
205 * struct ufs_query - holds relevant data structures for query request
206 * @request: request upiu and function
207 * @descriptor: buffer for sending/receiving descriptor
208 * @response: response upiu and response
211 struct ufs_query_req request;
213 struct ufs_query_res response;
217 * struct ufs_dev_cmd - all assosiated fields with device management commands
218 * @type: device management command type - Query, NOP OUT
219 * @lock: lock to allow one command at a time
220 * @complete: internal commands completion
221 * @query: Device management query information
224 enum dev_cmd_type type;
226 struct completion *complete;
227 struct ufs_query query;
228 struct cq_entry *cqe;
232 * struct ufs_clk_info - UFS clock related info
233 * @list: list headed by hba->clk_list_head
236 * @max_freq: maximum frequency supported by the clock
237 * @min_freq: min frequency that can be used for clock scaling
238 * @curr_freq: indicates the current frequency that it is set to
239 * @keep_link_active: indicates that the clk should not be disabled if
241 * @enabled: variable to check against multiple enable/disable
243 struct ufs_clk_info {
244 struct list_head list;
250 bool keep_link_active;
254 enum ufs_notify_change_status {
259 struct ufs_pa_layer_attr {
269 struct ufs_pwr_mode_info {
271 struct ufs_pa_layer_attr info;
275 * struct ufs_hba_variant_ops - variant specific callbacks
276 * @name: variant name
277 * @init: called when the driver is initialized
278 * @exit: called to cleanup everything done in init
279 * @get_ufs_hci_version: called to get UFS HCI version
280 * @clk_scale_notify: notifies that clks are scaled up/down
281 * @setup_clocks: called before touching any of the controller registers
282 * @hce_enable_notify: called before and after HCE enable bit is set to allow
283 * variant specific Uni-Pro initialization.
284 * @link_startup_notify: called before and after Link startup is carried out
285 * to allow variant specific Uni-Pro initialization.
286 * @pwr_change_notify: called before and after a power mode change
287 * is carried out to allow vendor spesific capabilities
289 * @setup_xfer_req: called before any transfer request is issued
291 * @setup_task_mgmt: called before any task management request is issued
293 * @hibern8_notify: called around hibern8 enter/exit
294 * @apply_dev_quirks: called to apply device specific quirks
295 * @fixup_dev_quirks: called to modify device specific quirks
296 * @suspend: called during host controller PM callback
297 * @resume: called during host controller PM callback
298 * @dbg_register_dump: used to dump controller debug information
299 * @phy_initialization: used to initialize phys
300 * @device_reset: called to issue a reset pulse on the UFS device
301 * @config_scaling_param: called to configure clock scaling parameters
302 * @program_key: program or evict an inline encryption key
303 * @event_notify: called to notify important events
304 * @reinit_notify: called to notify reinit of UFSHCD during max gear switch
305 * @mcq_config_resource: called to configure MCQ platform resources
306 * @get_hba_mac: called to get vendor specific mac value, mandatory for mcq mode
307 * @op_runtime_config: called to config Operation and runtime regs Pointers
308 * @get_outstanding_cqs: called to get outstanding completion queues
309 * @config_esi: called to config Event Specific Interrupt
311 struct ufs_hba_variant_ops {
313 int (*init)(struct ufs_hba *);
314 void (*exit)(struct ufs_hba *);
315 u32 (*get_ufs_hci_version)(struct ufs_hba *);
316 int (*clk_scale_notify)(struct ufs_hba *, bool,
317 enum ufs_notify_change_status);
318 int (*setup_clocks)(struct ufs_hba *, bool,
319 enum ufs_notify_change_status);
320 int (*hce_enable_notify)(struct ufs_hba *,
321 enum ufs_notify_change_status);
322 int (*link_startup_notify)(struct ufs_hba *,
323 enum ufs_notify_change_status);
324 int (*pwr_change_notify)(struct ufs_hba *,
325 enum ufs_notify_change_status status,
326 struct ufs_pa_layer_attr *,
327 struct ufs_pa_layer_attr *);
328 void (*setup_xfer_req)(struct ufs_hba *hba, int tag,
330 void (*setup_task_mgmt)(struct ufs_hba *, int, u8);
331 void (*hibern8_notify)(struct ufs_hba *, enum uic_cmd_dme,
332 enum ufs_notify_change_status);
333 int (*apply_dev_quirks)(struct ufs_hba *hba);
334 void (*fixup_dev_quirks)(struct ufs_hba *hba);
335 int (*suspend)(struct ufs_hba *, enum ufs_pm_op,
336 enum ufs_notify_change_status);
337 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
338 void (*dbg_register_dump)(struct ufs_hba *hba);
339 int (*phy_initialization)(struct ufs_hba *);
340 int (*device_reset)(struct ufs_hba *hba);
341 void (*config_scaling_param)(struct ufs_hba *hba,
342 struct devfreq_dev_profile *profile,
343 struct devfreq_simple_ondemand_data *data);
344 int (*program_key)(struct ufs_hba *hba,
345 const union ufs_crypto_cfg_entry *cfg, int slot);
346 void (*event_notify)(struct ufs_hba *hba,
347 enum ufs_event_type evt, void *data);
348 void (*reinit_notify)(struct ufs_hba *);
349 int (*mcq_config_resource)(struct ufs_hba *hba);
350 int (*get_hba_mac)(struct ufs_hba *hba);
351 int (*op_runtime_config)(struct ufs_hba *hba);
352 int (*get_outstanding_cqs)(struct ufs_hba *hba,
353 unsigned long *ocqs);
354 int (*config_esi)(struct ufs_hba *hba);
357 /* clock gating state */
358 enum clk_gating_state {
366 * struct ufs_clk_gating - UFS clock gating related info
367 * @gate_work: worker to turn off clocks after some delay as specified in
369 * @ungate_work: worker to turn on clocks that will be used in case of
371 * @state: the current clocks state
372 * @delay_ms: gating delay in ms
373 * @is_suspended: clk gating is suspended when set to 1 which can be used
374 * during suspend/resume
375 * @delay_attr: sysfs attribute to control delay_attr
376 * @enable_attr: sysfs attribute to enable/disable clock gating
377 * @is_enabled: Indicates the current status of clock gating
378 * @is_initialized: Indicates whether clock gating is initialized or not
379 * @active_reqs: number of requests that are pending and should be waited for
380 * completion before gating clocks.
381 * @clk_gating_workq: workqueue for clock gating work.
383 struct ufs_clk_gating {
384 struct delayed_work gate_work;
385 struct work_struct ungate_work;
386 enum clk_gating_state state;
387 unsigned long delay_ms;
389 struct device_attribute delay_attr;
390 struct device_attribute enable_attr;
394 struct workqueue_struct *clk_gating_workq;
398 * struct ufs_clk_scaling - UFS clock scaling related data
399 * @active_reqs: number of requests that are pending. If this is zero when
400 * devfreq ->target() function is called then schedule "suspend_work" to
402 * @tot_busy_t: Total busy time in current polling window
403 * @window_start_t: Start time (in jiffies) of the current polling window
404 * @busy_start_t: Start time of current busy period
405 * @enable_attr: sysfs attribute to enable/disable clock scaling
406 * @saved_pwr_info: UFS power mode may also be changed during scaling and this
407 * one keeps track of previous power mode.
408 * @workq: workqueue to schedule devfreq suspend/resume work
409 * @suspend_work: worker to suspend devfreq
410 * @resume_work: worker to resume devfreq
411 * @min_gear: lowest HS gear to scale down to
412 * @is_enabled: tracks if scaling is currently enabled or not, controlled by
413 * clkscale_enable sysfs node
414 * @is_allowed: tracks if scaling is currently allowed or not, used to block
415 * clock scaling which is not invoked from devfreq governor
416 * @is_initialized: Indicates whether clock scaling is initialized or not
417 * @is_busy_started: tracks if busy period has started or not
418 * @is_suspended: tracks if devfreq is suspended or not
420 struct ufs_clk_scaling {
422 unsigned long tot_busy_t;
423 ktime_t window_start_t;
424 ktime_t busy_start_t;
425 struct device_attribute enable_attr;
426 struct ufs_pa_layer_attr saved_pwr_info;
427 struct workqueue_struct *workq;
428 struct work_struct suspend_work;
429 struct work_struct resume_work;
434 bool is_busy_started;
438 #define UFS_EVENT_HIST_LENGTH 8
440 * struct ufs_event_hist - keeps history of errors
441 * @pos: index to indicate cyclic buffer position
442 * @val: cyclic buffer for registers value
443 * @tstamp: cyclic buffer for time stamp
444 * @cnt: error counter
446 struct ufs_event_hist {
448 u32 val[UFS_EVENT_HIST_LENGTH];
449 u64 tstamp[UFS_EVENT_HIST_LENGTH];
450 unsigned long long cnt;
454 * struct ufs_stats - keeps usage/err statistics
455 * @last_intr_status: record the last interrupt status.
456 * @last_intr_ts: record the last interrupt timestamp.
457 * @hibern8_exit_cnt: Counter to keep track of number of exits,
458 * reset this after link-startup.
459 * @last_hibern8_exit_tstamp: Set time after the hibern8 exit.
460 * Clear after the first successful command completion.
461 * @event: array with event history.
464 u32 last_intr_status;
467 u32 hibern8_exit_cnt;
468 u64 last_hibern8_exit_tstamp;
469 struct ufs_event_hist event[UFS_EVT_CNT];
473 * enum ufshcd_state - UFS host controller state
474 * @UFSHCD_STATE_RESET: Link is not operational. Postpone SCSI command
476 * @UFSHCD_STATE_OPERATIONAL: The host controller is operational and can process
478 * @UFSHCD_STATE_EH_SCHEDULED_NON_FATAL: The error handler has been scheduled.
479 * SCSI commands may be submitted to the controller.
480 * @UFSHCD_STATE_EH_SCHEDULED_FATAL: The error handler has been scheduled. Fail
481 * newly submitted SCSI commands with error code DID_BAD_TARGET.
482 * @UFSHCD_STATE_ERROR: An unrecoverable error occurred, e.g. link recovery
483 * failed. Fail all SCSI commands with error code DID_ERROR.
487 UFSHCD_STATE_OPERATIONAL,
488 UFSHCD_STATE_EH_SCHEDULED_NON_FATAL,
489 UFSHCD_STATE_EH_SCHEDULED_FATAL,
494 /* Interrupt aggregation support is broken */
495 UFSHCD_QUIRK_BROKEN_INTR_AGGR = 1 << 0,
498 * delay before each dme command is required as the unipro
499 * layer has shown instabilities
501 UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS = 1 << 1,
504 * If UFS host controller is having issue in processing LCC (Line
505 * Control Command) coming from device then enable this quirk.
506 * When this quirk is enabled, host controller driver should disable
507 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
508 * attribute of device to 0).
510 UFSHCD_QUIRK_BROKEN_LCC = 1 << 2,
513 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
514 * inbound Link supports unterminated line in HS mode. Setting this
515 * attribute to 1 fixes moving to HS gear.
517 UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP = 1 << 3,
520 * This quirk needs to be enabled if the host controller only allows
521 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
524 UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE = 1 << 4,
527 * This quirk needs to be enabled if the host controller doesn't
528 * advertise the correct version in UFS_VER register. If this quirk
529 * is enabled, standard UFS host driver will call the vendor specific
530 * ops (get_ufs_hci_version) to get the correct version.
532 UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION = 1 << 5,
535 * Clear handling for transfer/task request list is just opposite.
537 UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR = 1 << 6,
540 * This quirk needs to be enabled if host controller doesn't allow
541 * that the interrupt aggregation timer and counter are reset by s/w.
543 UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR = 1 << 7,
546 * This quirks needs to be enabled if host controller cannot be
547 * enabled via HCE register.
549 UFSHCI_QUIRK_BROKEN_HCE = 1 << 8,
552 * This quirk needs to be enabled if the host controller regards
553 * resolution of the values of PRDTO and PRDTL in UTRD as byte.
555 UFSHCD_QUIRK_PRDT_BYTE_GRAN = 1 << 9,
558 * This quirk needs to be enabled if the host controller reports
559 * OCS FATAL ERROR with device error through sense data
561 UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR = 1 << 10,
564 * This quirk needs to be enabled if the host controller has
565 * auto-hibernate capability but it doesn't work.
567 UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8 = 1 << 11,
570 * This quirk needs to disable manual flush for write booster
572 UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL = 1 << 12,
575 * This quirk needs to disable unipro timeout values
576 * before power mode change
578 UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING = 1 << 13,
581 * Align DMA SG entries on a 4 KiB boundary.
583 UFSHCD_QUIRK_4KB_DMA_ALIGNMENT = 1 << 14,
586 * This quirk needs to be enabled if the host controller does not
587 * support UIC command
589 UFSHCD_QUIRK_BROKEN_UIC_CMD = 1 << 15,
592 * This quirk needs to be enabled if the host controller cannot
593 * support physical host configuration.
595 UFSHCD_QUIRK_SKIP_PH_CONFIGURATION = 1 << 16,
598 * This quirk needs to be enabled if the host controller has
599 * 64-bit addressing supported capability but it doesn't work.
601 UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS = 1 << 17,
604 * This quirk needs to be enabled if the host controller has
605 * auto-hibernate capability but it's FASTAUTO only.
607 UFSHCD_QUIRK_HIBERN_FASTAUTO = 1 << 18,
610 * This quirk needs to be enabled if the host controller needs
611 * to reinit the device after switching to maximum gear.
613 UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH = 1 << 19,
617 /* Allow dynamic clk gating */
618 UFSHCD_CAP_CLK_GATING = 1 << 0,
620 /* Allow hiberb8 with clk gating */
621 UFSHCD_CAP_HIBERN8_WITH_CLK_GATING = 1 << 1,
623 /* Allow dynamic clk scaling */
624 UFSHCD_CAP_CLK_SCALING = 1 << 2,
626 /* Allow auto bkops to enabled during runtime suspend */
627 UFSHCD_CAP_AUTO_BKOPS_SUSPEND = 1 << 3,
630 * This capability allows host controller driver to use the UFS HCI's
631 * interrupt aggregation capability.
632 * CAUTION: Enabling this might reduce overall UFS throughput.
634 UFSHCD_CAP_INTR_AGGR = 1 << 4,
637 * This capability allows the device auto-bkops to be always enabled
638 * except during suspend (both runtime and suspend).
639 * Enabling this capability means that device will always be allowed
640 * to do background operation when it's active but it might degrade
641 * the performance of ongoing read/write operations.
643 UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND = 1 << 5,
646 * This capability allows host controller driver to automatically
647 * enable runtime power management by itself instead of waiting
648 * for userspace to control the power management.
650 UFSHCD_CAP_RPM_AUTOSUSPEND = 1 << 6,
653 * This capability allows the host controller driver to turn-on
654 * WriteBooster, if the underlying device supports it and is
655 * provisioned to be used. This would increase the write performance.
657 UFSHCD_CAP_WB_EN = 1 << 7,
660 * This capability allows the host controller driver to use the
661 * inline crypto engine, if it is present
663 UFSHCD_CAP_CRYPTO = 1 << 8,
666 * This capability allows the controller regulators to be put into
667 * lpm mode aggressively during clock gating.
668 * This would increase power savings.
670 UFSHCD_CAP_AGGR_POWER_COLLAPSE = 1 << 9,
673 * This capability allows the host controller driver to use DeepSleep,
674 * if it is supported by the UFS device. The host controller driver must
675 * support device hardware reset via the hba->device_reset() callback,
676 * in order to exit DeepSleep state.
678 UFSHCD_CAP_DEEPSLEEP = 1 << 10,
681 * This capability allows the host controller driver to use temperature
682 * notification if it is supported by the UFS device.
684 UFSHCD_CAP_TEMP_NOTIF = 1 << 11,
687 * Enable WriteBooster when scaling up the clock and disable
688 * WriteBooster when scaling the clock down.
690 UFSHCD_CAP_WB_WITH_CLK_SCALING = 1 << 12,
693 struct ufs_hba_variant_params {
694 struct devfreq_dev_profile devfreq_profile;
695 struct devfreq_simple_ondemand_data ondemand_data;
696 u16 hba_enable_delay_us;
697 u32 wb_flush_threshold;
700 #ifdef CONFIG_SCSI_UFS_HPB
702 * struct ufshpb_dev_info - UFSHPB device related info
703 * @num_lu: the number of user logical unit to check whether all lu finished
705 * @rgn_size: device reported HPB region size
706 * @srgn_size: device reported HPB sub-region size
707 * @slave_conf_cnt: counter to check all lu finished initialization
708 * @hpb_disabled: flag to check if HPB is disabled
709 * @max_hpb_single_cmd: device reported bMAX_DATA_SIZE_FOR_SINGLE_CMD value
710 * @is_legacy: flag to check HPB 1.0
711 * @control_mode: either host or device
713 struct ufshpb_dev_info {
717 atomic_t slave_conf_cnt;
719 u8 max_hpb_single_cmd;
725 struct ufs_hba_monitor {
726 unsigned long chunk_size;
728 unsigned long nr_sec_rw[2];
729 ktime_t total_busy[2];
731 unsigned long nr_req[2];
738 ktime_t busy_start_ts[2];
745 * struct ufshcd_res_info_t - MCQ related resource regions
747 * @name: resource name
748 * @resource: pointer to resource region
749 * @base: register base address
751 struct ufshcd_res_info {
753 struct resource *resource;
769 * struct ufshcd_mcq_opr_info_t - Operation and Runtime registers
771 * @offset: Doorbell Address Offset
772 * @stride: Steps proportional to queue [0...31]
773 * @base: base address
775 struct ufshcd_mcq_opr_info_t {
776 unsigned long offset;
777 unsigned long stride;
781 enum ufshcd_mcq_opr {
790 * struct ufs_hba - per adapter private structure
791 * @mmio_base: UFSHCI base register address
792 * @ucdl_base_addr: UFS Command Descriptor base address
793 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
794 * @utmrdl_base_addr: UTP Task Management Descriptor base address
795 * @ucdl_dma_addr: UFS Command Descriptor DMA address
796 * @utrdl_dma_addr: UTRDL DMA address
797 * @utmrdl_dma_addr: UTMRDL DMA address
798 * @host: Scsi_Host instance of the driver
799 * @dev: device handle
800 * @ufs_device_wlun: WLUN that controls the entire UFS device.
801 * @hwmon_device: device instance registered with the hwmon core.
802 * @curr_dev_pwr_mode: active UFS device power mode.
803 * @uic_link_state: active state of the link to the UFS device.
804 * @rpm_lvl: desired UFS power management level during runtime PM.
805 * @spm_lvl: desired UFS power management level during system PM.
806 * @pm_op_in_progress: whether or not a PM operation is in progress.
807 * @ahit: value of Auto-Hibernate Idle Timer register.
808 * @lrb: local reference block
809 * @outstanding_tasks: Bits representing outstanding task requests
810 * @outstanding_lock: Protects @outstanding_reqs.
811 * @outstanding_reqs: Bits representing outstanding transfer requests
812 * @capabilities: UFS Controller Capabilities
813 * @mcq_capabilities: UFS Multi Circular Queue capabilities
814 * @nutrs: Transfer Request Queue depth supported by controller
815 * @nutmrs: Task Management Queue depth supported by controller
816 * @reserved_slot: Used to submit device commands. Protected by @dev_cmd.lock.
817 * @ufs_version: UFS Version to which controller complies
818 * @vops: pointer to variant specific operations
819 * @vps: pointer to variant specific parameters
820 * @priv: pointer to variant specific private data
821 * @sg_entry_size: size of struct ufshcd_sg_entry (may include variant fields)
822 * @irq: Irq number of the controller
823 * @is_irq_enabled: whether or not the UFS controller interrupt is enabled.
824 * @dev_ref_clk_freq: reference clock frequency
825 * @quirks: bitmask with information about deviations from the UFSHCI standard.
826 * @dev_quirks: bitmask with information about deviations from the UFS standard.
827 * @tmf_tag_set: TMF tag set.
828 * @tmf_queue: Used to allocate TMF tags.
829 * @tmf_rqs: array with pointers to TMF requests while these are in progress.
830 * @active_uic_cmd: handle of active UIC command
831 * @uic_cmd_mutex: mutex for UIC command
832 * @uic_async_done: completion used during UIC processing
833 * @ufshcd_state: UFSHCD state
834 * @eh_flags: Error handling flags
835 * @intr_mask: Interrupt Mask Bits
836 * @ee_ctrl_mask: Exception event control mask
837 * @ee_drv_mask: Exception event mask for driver
838 * @ee_usr_mask: Exception event mask for user (set via debugfs)
839 * @ee_ctrl_mutex: Used to serialize exception event information.
840 * @is_powered: flag to check if HBA is powered
841 * @shutting_down: flag to check if shutdown has been invoked
842 * @host_sem: semaphore used to serialize concurrent contexts
843 * @eh_wq: Workqueue that eh_work works on
844 * @eh_work: Worker to handle UFS errors that require s/w attention
845 * @eeh_work: Worker to handle exception events
846 * @errors: HBA errors
847 * @uic_error: UFS interconnect layer error status
848 * @saved_err: sticky error mask
849 * @saved_uic_err: sticky UIC error mask
850 * @ufs_stats: various error counters
851 * @force_reset: flag to force eh_work perform a full reset
852 * @force_pmc: flag to force a power mode change
853 * @silence_err_logs: flag to silence error logs
854 * @dev_cmd: ufs device management command information
855 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
856 * @nop_out_timeout: NOP OUT timeout value
857 * @dev_info: information about the UFS device
858 * @auto_bkops_enabled: to track whether bkops is enabled in device
859 * @vreg_info: UFS device voltage regulator information
860 * @clk_list_head: UFS host controller clocks list node head
861 * @req_abort_count: number of times ufshcd_abort() has been called
862 * @lanes_per_direction: number of lanes per data direction between the UFS
863 * controller and the UFS device.
864 * @pwr_info: holds current power mode
865 * @max_pwr_info: keeps the device max valid pwm
866 * @clk_gating: information related to clock gating
867 * @caps: bitmask with information about UFS controller capabilities
868 * @devfreq: frequency scaling information owned by the devfreq core
869 * @clk_scaling: frequency scaling information owned by the UFS driver
870 * @system_suspending: system suspend has been started and system resume has
872 * @is_sys_suspended: UFS device has been suspended because of system suspend
873 * @urgent_bkops_lvl: keeps track of urgent bkops level for device
874 * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
875 * device is known or not.
876 * @wb_mutex: used to serialize devfreq and sysfs write booster toggling
877 * @clk_scaling_lock: used to serialize device commands and clock scaling
878 * @desc_size: descriptor sizes reported by device
879 * @scsi_block_reqs_cnt: reference counting for scsi block requests
880 * @bsg_dev: struct device associated with the BSG queue
881 * @bsg_queue: BSG queue associated with the UFS controller
882 * @rpm_dev_flush_recheck_work: used to suspend from RPM (runtime power
883 * management) after the UFS device has finished a WriteBooster buffer
884 * flush or auto BKOP.
885 * @ufshpb_dev: information related to HPB (Host Performance Booster).
886 * @monitor: statistics about UFS commands
887 * @crypto_capabilities: Content of crypto capabilities register (0x100)
888 * @crypto_cap_array: Array of crypto capabilities
889 * @crypto_cfg_register: Start of the crypto cfg array
890 * @crypto_profile: the crypto profile of this hba (if applicable)
891 * @debugfs_root: UFS controller debugfs root directory
892 * @debugfs_ee_work: used to restore ee_ctrl_mask after a delay
893 * @debugfs_ee_rate_limit_ms: user configurable delay after which to restore
895 * @luns_avail: number of regular and well known LUNs supported by the UFS
897 * @nr_hw_queues: number of hardware queues configured
898 * @nr_queues: number of Queues of different queue types
899 * @complete_put: whether or not to call ufshcd_rpm_put() from inside
900 * ufshcd_resume_complete()
901 * @ext_iid_sup: is EXT_IID is supported by UFSHC
902 * @mcq_sup: is mcq supported by UFSHC
903 * @mcq_enabled: is mcq ready to accept requests
904 * @res: array of resource info of MCQ registers
905 * @mcq_base: Multi circular queue registers base address
906 * @uhq: array of supported hardware queues
907 * @dev_cmd_queue: Queue for issuing device management commands
910 void __iomem *mmio_base;
912 /* Virtual memory reference */
913 struct utp_transfer_cmd_desc *ucdl_base_addr;
914 struct utp_transfer_req_desc *utrdl_base_addr;
915 struct utp_task_req_desc *utmrdl_base_addr;
917 /* DMA memory reference */
918 dma_addr_t ucdl_dma_addr;
919 dma_addr_t utrdl_dma_addr;
920 dma_addr_t utmrdl_dma_addr;
922 struct Scsi_Host *host;
924 struct scsi_device *ufs_device_wlun;
926 #ifdef CONFIG_SCSI_UFS_HWMON
927 struct device *hwmon_device;
930 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
931 enum uic_link_state uic_link_state;
932 /* Desired UFS power management level during runtime PM */
933 enum ufs_pm_level rpm_lvl;
934 /* Desired UFS power management level during system PM */
935 enum ufs_pm_level spm_lvl;
936 int pm_op_in_progress;
938 /* Auto-Hibernate Idle Timer register value */
941 struct ufshcd_lrb *lrb;
943 unsigned long outstanding_tasks;
944 spinlock_t outstanding_lock;
945 unsigned long outstanding_reqs;
949 u32 mcq_capabilities;
953 const struct ufs_hba_variant_ops *vops;
954 struct ufs_hba_variant_params *vps;
956 #ifdef CONFIG_SCSI_UFS_VARIABLE_SG_ENTRY_SIZE
957 size_t sg_entry_size;
961 enum ufs_ref_clk_freq dev_ref_clk_freq;
963 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
965 /* Device deviations from standard UFS device spec. */
966 unsigned int dev_quirks;
968 struct blk_mq_tag_set tmf_tag_set;
969 struct request_queue *tmf_queue;
970 struct request **tmf_rqs;
972 struct uic_command *active_uic_cmd;
973 struct mutex uic_cmd_mutex;
974 struct completion *uic_async_done;
976 enum ufshcd_state ufshcd_state;
982 struct mutex ee_ctrl_mutex;
985 struct semaphore host_sem;
988 struct workqueue_struct *eh_wq;
989 struct work_struct eh_work;
990 struct work_struct eeh_work;
997 struct ufs_stats ufs_stats;
1000 bool silence_err_logs;
1002 /* Device management request data */
1003 struct ufs_dev_cmd dev_cmd;
1004 ktime_t last_dme_cmd_tstamp;
1005 int nop_out_timeout;
1007 /* Keeps information of the UFS device connected to this host */
1008 struct ufs_dev_info dev_info;
1009 bool auto_bkops_enabled;
1010 struct ufs_vreg_info vreg_info;
1011 struct list_head clk_list_head;
1013 /* Number of requests aborts */
1014 int req_abort_count;
1016 /* Number of lanes available (1 or 2) for Rx/Tx */
1017 u32 lanes_per_direction;
1018 struct ufs_pa_layer_attr pwr_info;
1019 struct ufs_pwr_mode_info max_pwr_info;
1021 struct ufs_clk_gating clk_gating;
1022 /* Control to enable/disable host capabilities */
1025 struct devfreq *devfreq;
1026 struct ufs_clk_scaling clk_scaling;
1027 bool system_suspending;
1028 bool is_sys_suspended;
1030 enum bkops_status urgent_bkops_lvl;
1031 bool is_urgent_bkops_lvl_checked;
1033 struct mutex wb_mutex;
1034 struct rw_semaphore clk_scaling_lock;
1035 atomic_t scsi_block_reqs_cnt;
1037 struct device bsg_dev;
1038 struct request_queue *bsg_queue;
1039 struct delayed_work rpm_dev_flush_recheck_work;
1041 #ifdef CONFIG_SCSI_UFS_HPB
1042 struct ufshpb_dev_info ufshpb_dev;
1045 struct ufs_hba_monitor monitor;
1047 #ifdef CONFIG_SCSI_UFS_CRYPTO
1048 union ufs_crypto_capabilities crypto_capabilities;
1049 union ufs_crypto_cap_entry *crypto_cap_array;
1050 u32 crypto_cfg_register;
1051 struct blk_crypto_profile crypto_profile;
1053 #ifdef CONFIG_DEBUG_FS
1054 struct dentry *debugfs_root;
1055 struct delayed_work debugfs_ee_work;
1056 u32 debugfs_ee_rate_limit_ms;
1059 unsigned int nr_hw_queues;
1060 unsigned int nr_queues[HCTX_MAX_TYPES];
1063 bool scsi_host_added;
1066 struct ufshcd_res_info res[RES_MAX];
1067 void __iomem *mcq_base;
1068 struct ufs_hw_queue *uhq;
1069 struct ufs_hw_queue *dev_cmd_queue;
1070 struct ufshcd_mcq_opr_info_t mcq_opr[OPR_MAX];
1074 * struct ufs_hw_queue - per hardware queue structure
1075 * @mcq_sq_head: base address of submission queue head pointer
1076 * @mcq_sq_tail: base address of submission queue tail pointer
1077 * @mcq_cq_head: base address of completion queue head pointer
1078 * @mcq_cq_tail: base address of completion queue tail pointer
1079 * @sqe_base_addr: submission queue entry base address
1080 * @sqe_dma_addr: submission queue dma address
1081 * @cqe_base_addr: completion queue base address
1082 * @cqe_dma_addr: completion queue dma address
1083 * @max_entries: max number of slots in this hardware queue
1084 * @id: hardware queue ID
1085 * @sq_tp_slot: current slot to which SQ tail pointer is pointing
1086 * @sq_lock: serialize submission queue access
1087 * @cq_tail_slot: current slot to which CQ tail pointer is pointing
1088 * @cq_head_slot: current slot to which CQ head pointer is pointing
1089 * @cq_lock: Synchronize between multiple polling instances
1091 struct ufs_hw_queue {
1092 void __iomem *mcq_sq_head;
1093 void __iomem *mcq_sq_tail;
1094 void __iomem *mcq_cq_head;
1095 void __iomem *mcq_cq_tail;
1097 struct utp_transfer_req_desc *sqe_base_addr;
1098 dma_addr_t sqe_dma_addr;
1099 struct cq_entry *cqe_base_addr;
1100 dma_addr_t cqe_dma_addr;
1110 static inline bool is_mcq_enabled(struct ufs_hba *hba)
1112 return hba->mcq_enabled;
1115 #ifdef CONFIG_SCSI_UFS_VARIABLE_SG_ENTRY_SIZE
1116 static inline size_t ufshcd_sg_entry_size(const struct ufs_hba *hba)
1118 return hba->sg_entry_size;
1121 static inline void ufshcd_set_sg_entry_size(struct ufs_hba *hba, size_t sg_entry_size)
1123 WARN_ON_ONCE(sg_entry_size < sizeof(struct ufshcd_sg_entry));
1124 hba->sg_entry_size = sg_entry_size;
1127 static inline size_t ufshcd_sg_entry_size(const struct ufs_hba *hba)
1129 return sizeof(struct ufshcd_sg_entry);
1132 #define ufshcd_set_sg_entry_size(hba, sg_entry_size) \
1133 ({ (void)(hba); BUILD_BUG_ON(sg_entry_size != sizeof(struct ufshcd_sg_entry)); })
1136 static inline size_t ufshcd_get_ucd_size(const struct ufs_hba *hba)
1138 return sizeof(struct utp_transfer_cmd_desc) + SG_ALL * ufshcd_sg_entry_size(hba);
1141 /* Returns true if clocks can be gated. Otherwise false */
1142 static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
1144 return hba->caps & UFSHCD_CAP_CLK_GATING;
1146 static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
1148 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
1150 static inline int ufshcd_is_clkscaling_supported(struct ufs_hba *hba)
1152 return hba->caps & UFSHCD_CAP_CLK_SCALING;
1154 static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
1156 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
1158 static inline bool ufshcd_is_rpm_autosuspend_allowed(struct ufs_hba *hba)
1160 return hba->caps & UFSHCD_CAP_RPM_AUTOSUSPEND;
1163 static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
1165 return (hba->caps & UFSHCD_CAP_INTR_AGGR) &&
1166 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR);
1169 static inline bool ufshcd_can_aggressive_pc(struct ufs_hba *hba)
1171 return !!(ufshcd_is_link_hibern8(hba) &&
1172 (hba->caps & UFSHCD_CAP_AGGR_POWER_COLLAPSE));
1175 static inline bool ufshcd_is_auto_hibern8_supported(struct ufs_hba *hba)
1177 return (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) &&
1178 !(hba->quirks & UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8);
1181 static inline bool ufshcd_is_auto_hibern8_enabled(struct ufs_hba *hba)
1183 return FIELD_GET(UFSHCI_AHIBERN8_TIMER_MASK, hba->ahit);
1186 static inline bool ufshcd_is_wb_allowed(struct ufs_hba *hba)
1188 return hba->caps & UFSHCD_CAP_WB_EN;
1191 static inline bool ufshcd_enable_wb_if_scaling_up(struct ufs_hba *hba)
1193 return hba->caps & UFSHCD_CAP_WB_WITH_CLK_SCALING;
1196 #define ufsmcq_writel(hba, val, reg) \
1197 writel((val), (hba)->mcq_base + (reg))
1198 #define ufsmcq_readl(hba, reg) \
1199 readl((hba)->mcq_base + (reg))
1201 #define ufsmcq_writelx(hba, val, reg) \
1202 writel_relaxed((val), (hba)->mcq_base + (reg))
1203 #define ufsmcq_readlx(hba, reg) \
1204 readl_relaxed((hba)->mcq_base + (reg))
1206 #define ufshcd_writel(hba, val, reg) \
1207 writel((val), (hba)->mmio_base + (reg))
1208 #define ufshcd_readl(hba, reg) \
1209 readl((hba)->mmio_base + (reg))
1212 * ufshcd_rmwl - perform read/modify/write for a controller register
1213 * @hba: per adapter instance
1214 * @mask: mask to apply on read value
1215 * @val: actual value to write
1216 * @reg: register address
1218 static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
1222 tmp = ufshcd_readl(hba, reg);
1224 tmp |= (val & mask);
1225 ufshcd_writel(hba, tmp, reg);
1228 int ufshcd_alloc_host(struct device *, struct ufs_hba **);
1229 void ufshcd_dealloc_host(struct ufs_hba *);
1230 int ufshcd_hba_enable(struct ufs_hba *hba);
1231 int ufshcd_init(struct ufs_hba *, void __iomem *, unsigned int);
1232 int ufshcd_link_recovery(struct ufs_hba *hba);
1233 int ufshcd_make_hba_operational(struct ufs_hba *hba);
1234 void ufshcd_remove(struct ufs_hba *);
1235 int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
1236 int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
1237 void ufshcd_delay_us(unsigned long us, unsigned long tolerance);
1238 void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk);
1239 void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val);
1240 void ufshcd_hba_stop(struct ufs_hba *hba);
1241 void ufshcd_schedule_eh_work(struct ufs_hba *hba);
1242 void ufshcd_mcq_write_cqis(struct ufs_hba *hba, u32 val, int i);
1243 unsigned long ufshcd_mcq_poll_cqe_nolock(struct ufs_hba *hba,
1244 struct ufs_hw_queue *hwq);
1245 void ufshcd_mcq_enable_esi(struct ufs_hba *hba);
1246 void ufshcd_mcq_config_esi(struct ufs_hba *hba, struct msi_msg *msg);
1249 * ufshcd_set_variant - set variant specific data to the hba
1250 * @hba: per adapter instance
1251 * @variant: pointer to variant specific data
1253 static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
1256 hba->priv = variant;
1260 * ufshcd_get_variant - get variant specific data from the hba
1261 * @hba: per adapter instance
1263 static inline void *ufshcd_get_variant(struct ufs_hba *hba)
1270 extern int ufshcd_runtime_suspend(struct device *dev);
1271 extern int ufshcd_runtime_resume(struct device *dev);
1273 #ifdef CONFIG_PM_SLEEP
1274 extern int ufshcd_system_suspend(struct device *dev);
1275 extern int ufshcd_system_resume(struct device *dev);
1276 extern int ufshcd_system_freeze(struct device *dev);
1277 extern int ufshcd_system_thaw(struct device *dev);
1278 extern int ufshcd_system_restore(struct device *dev);
1280 extern int ufshcd_shutdown(struct ufs_hba *hba);
1282 extern int ufshcd_dme_configure_adapt(struct ufs_hba *hba,
1285 extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
1286 u8 attr_set, u32 mib_val, u8 peer);
1287 extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
1288 u32 *mib_val, u8 peer);
1289 extern int ufshcd_config_pwr_mode(struct ufs_hba *hba,
1290 struct ufs_pa_layer_attr *desired_pwr_mode);
1291 extern int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode);
1293 /* UIC command interfaces for DME primitives */
1296 #define ATTR_SET_NOR 0 /* NORMAL */
1297 #define ATTR_SET_ST 1 /* STATIC */
1299 static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
1302 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
1303 mib_val, DME_LOCAL);
1306 static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
1309 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
1310 mib_val, DME_LOCAL);
1313 static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
1316 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
1320 static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
1323 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
1327 static inline int ufshcd_dme_get(struct ufs_hba *hba,
1328 u32 attr_sel, u32 *mib_val)
1330 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
1333 static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
1334 u32 attr_sel, u32 *mib_val)
1336 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
1339 static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
1341 return (pwr_info->pwr_rx == FAST_MODE ||
1342 pwr_info->pwr_rx == FASTAUTO_MODE) &&
1343 (pwr_info->pwr_tx == FAST_MODE ||
1344 pwr_info->pwr_tx == FASTAUTO_MODE);
1347 static inline int ufshcd_disable_host_tx_lcc(struct ufs_hba *hba)
1349 return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0);
1352 void ufshcd_auto_hibern8_enable(struct ufs_hba *hba);
1353 void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit);
1354 void ufshcd_fixup_dev_quirks(struct ufs_hba *hba,
1355 const struct ufs_dev_quirk *fixups);
1356 #define SD_ASCII_STD true
1357 #define SD_RAW false
1358 int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
1359 u8 **buf, bool ascii);
1361 int ufshcd_hold(struct ufs_hba *hba, bool async);
1362 void ufshcd_release(struct ufs_hba *hba);
1364 void ufshcd_clkgate_delay_set(struct device *dev, unsigned long value);
1366 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
1368 int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg);
1370 int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd);
1372 int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
1373 struct utp_upiu_req *req_upiu,
1374 struct utp_upiu_req *rsp_upiu,
1376 u8 *desc_buff, int *buff_len,
1377 enum query_opcode desc_op);
1378 int ufshcd_advanced_rpmb_req_handler(struct ufs_hba *hba, struct utp_upiu_req *req_upiu,
1379 struct utp_upiu_req *rsp_upiu, struct ufs_ehs *ehs_req,
1380 struct ufs_ehs *ehs_rsp, int sg_cnt,
1381 struct scatterlist *sg_list, enum dma_data_direction dir);
1382 int ufshcd_wb_toggle(struct ufs_hba *hba, bool enable);
1383 int ufshcd_wb_toggle_buf_flush(struct ufs_hba *hba, bool enable);
1384 int ufshcd_suspend_prepare(struct device *dev);
1385 int __ufshcd_suspend_prepare(struct device *dev, bool rpm_ok_for_spm);
1386 void ufshcd_resume_complete(struct device *dev);
1388 /* Wrapper functions for safely calling variant operations */
1389 static inline int ufshcd_vops_init(struct ufs_hba *hba)
1391 if (hba->vops && hba->vops->init)
1392 return hba->vops->init(hba);
1397 static inline int ufshcd_vops_phy_initialization(struct ufs_hba *hba)
1399 if (hba->vops && hba->vops->phy_initialization)
1400 return hba->vops->phy_initialization(hba);
1405 extern const struct ufs_pm_lvl_states ufs_pm_lvl_states[];
1407 int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
1408 const char *prefix);
1410 int __ufshcd_write_ee_control(struct ufs_hba *hba, u32 ee_ctrl_mask);
1411 int ufshcd_write_ee_control(struct ufs_hba *hba);
1412 int ufshcd_update_ee_control(struct ufs_hba *hba, u16 *mask,
1413 const u16 *other_mask, u16 set, u16 clr);
1415 #endif /* End of Header */