1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Intel IOMMU trace support
5 * Copyright (C) 2019 Intel Corporation
7 * Author: Lu Baolu <baolu.lu@linux.intel.com>
10 #define TRACE_SYSTEM intel_iommu
12 #if !defined(_TRACE_INTEL_IOMMU_H) || defined(TRACE_HEADER_MULTI_READ)
13 #define _TRACE_INTEL_IOMMU_H
15 #include <linux/tracepoint.h>
16 #include <linux/intel-iommu.h>
18 DECLARE_EVENT_CLASS(dma_map,
19 TP_PROTO(struct device *dev, dma_addr_t dev_addr, phys_addr_t phys_addr,
22 TP_ARGS(dev, dev_addr, phys_addr, size),
25 __string(dev_name, dev_name(dev))
26 __field(dma_addr_t, dev_addr)
27 __field(phys_addr_t, phys_addr)
32 __assign_str(dev_name, dev_name(dev));
33 __entry->dev_addr = dev_addr;
34 __entry->phys_addr = phys_addr;
38 TP_printk("dev=%s dev_addr=0x%llx phys_addr=0x%llx size=%zu",
40 (unsigned long long)__entry->dev_addr,
41 (unsigned long long)__entry->phys_addr,
45 DEFINE_EVENT(dma_map, map_single,
46 TP_PROTO(struct device *dev, dma_addr_t dev_addr, phys_addr_t phys_addr,
48 TP_ARGS(dev, dev_addr, phys_addr, size)
51 DEFINE_EVENT(dma_map, bounce_map_single,
52 TP_PROTO(struct device *dev, dma_addr_t dev_addr, phys_addr_t phys_addr,
54 TP_ARGS(dev, dev_addr, phys_addr, size)
57 DECLARE_EVENT_CLASS(dma_unmap,
58 TP_PROTO(struct device *dev, dma_addr_t dev_addr, size_t size),
60 TP_ARGS(dev, dev_addr, size),
63 __string(dev_name, dev_name(dev))
64 __field(dma_addr_t, dev_addr)
69 __assign_str(dev_name, dev_name(dev));
70 __entry->dev_addr = dev_addr;
74 TP_printk("dev=%s dev_addr=0x%llx size=%zu",
76 (unsigned long long)__entry->dev_addr,
80 DEFINE_EVENT(dma_unmap, unmap_single,
81 TP_PROTO(struct device *dev, dma_addr_t dev_addr, size_t size),
82 TP_ARGS(dev, dev_addr, size)
85 DEFINE_EVENT(dma_unmap, unmap_sg,
86 TP_PROTO(struct device *dev, dma_addr_t dev_addr, size_t size),
87 TP_ARGS(dev, dev_addr, size)
90 DEFINE_EVENT(dma_unmap, bounce_unmap_single,
91 TP_PROTO(struct device *dev, dma_addr_t dev_addr, size_t size),
92 TP_ARGS(dev, dev_addr, size)
95 DECLARE_EVENT_CLASS(dma_map_sg,
96 TP_PROTO(struct device *dev, int index, int total,
97 struct scatterlist *sg),
99 TP_ARGS(dev, index, total, sg),
102 __string(dev_name, dev_name(dev))
103 __field(dma_addr_t, dev_addr)
104 __field(phys_addr_t, phys_addr)
105 __field(size_t, size)
111 __assign_str(dev_name, dev_name(dev));
112 __entry->dev_addr = sg->dma_address;
113 __entry->phys_addr = sg_phys(sg);
114 __entry->size = sg->dma_length;
115 __entry->index = index;
116 __entry->total = total;
119 TP_printk("dev=%s [%d/%d] dev_addr=0x%llx phys_addr=0x%llx size=%zu",
120 __get_str(dev_name), __entry->index, __entry->total,
121 (unsigned long long)__entry->dev_addr,
122 (unsigned long long)__entry->phys_addr,
126 DEFINE_EVENT(dma_map_sg, map_sg,
127 TP_PROTO(struct device *dev, int index, int total,
128 struct scatterlist *sg),
129 TP_ARGS(dev, index, total, sg)
132 DEFINE_EVENT(dma_map_sg, bounce_map_sg,
133 TP_PROTO(struct device *dev, int index, int total,
134 struct scatterlist *sg),
135 TP_ARGS(dev, index, total, sg)
138 TRACE_EVENT(qi_submit,
139 TP_PROTO(struct intel_iommu *iommu, u64 qw0, u64 qw1, u64 qw2, u64 qw3),
141 TP_ARGS(iommu, qw0, qw1, qw2, qw3),
148 __string(iommu, iommu->name)
152 __assign_str(iommu, iommu->name);
159 TP_printk("%s %s: 0x%llx 0x%llx 0x%llx 0x%llx",
160 __print_symbolic(__entry->qw0 & 0xf,
161 { QI_CC_TYPE, "cc_inv" },
162 { QI_IOTLB_TYPE, "iotlb_inv" },
163 { QI_DIOTLB_TYPE, "dev_tlb_inv" },
164 { QI_IEC_TYPE, "iec_inv" },
165 { QI_IWD_TYPE, "inv_wait" },
166 { QI_EIOTLB_TYPE, "p_iotlb_inv" },
167 { QI_PC_TYPE, "pc_inv" },
168 { QI_DEIOTLB_TYPE, "p_dev_tlb_inv" },
169 { QI_PGRP_RESP_TYPE, "page_grp_resp" }),
171 __entry->qw0, __entry->qw1, __entry->qw2, __entry->qw3
174 #endif /* _TRACE_INTEL_IOMMU_H */
176 /* This part must be outside protection */
177 #include <trace/define_trace.h>