include/trace/events/intel_iommu.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Intel IOMMU trace support
   4  *
   5  * Copyright (C) 2019 Intel Corporation
   6  *
   7  * Author: Lu Baolu <baolu.lu@linux.intel.com>
   8  */
   9 #undef TRACE_SYSTEM
  10 #define TRACE_SYSTEM intel_iommu
  11
  12 #if !defined(_TRACE_INTEL_IOMMU_H) || defined(TRACE_HEADER_MULTI_READ)
  13 #define _TRACE_INTEL_IOMMU_H
  14
  15 #include <linux/tracepoint.h>
  16 #include <linux/intel-iommu.h>
  17
  18 #define MSG_MAX         256
  19
  20 TRACE_EVENT(qi_submit,
  21         TP_PROTO(struct intel_iommu *iommu, u64 qw0, u64 qw1, u64 qw2, u64 qw3),
  22
  23         TP_ARGS(iommu, qw0, qw1, qw2, qw3),
  24
  25         TP_STRUCT__entry(
  26                 __field(u64, qw0)
  27                 __field(u64, qw1)
  28                 __field(u64, qw2)
  29                 __field(u64, qw3)
  30                 __string(iommu, iommu->name)
  31         ),
  32
  33         TP_fast_assign(
  34                 __assign_str(iommu, iommu->name);
  35                 __entry->qw0 = qw0;
  36                 __entry->qw1 = qw1;
  37                 __entry->qw2 = qw2;
  38                 __entry->qw3 = qw3;
  39         ),
  40
  41         TP_printk("%s %s: 0x%llx 0x%llx 0x%llx 0x%llx",
  42                   __print_symbolic(__entry->qw0 & 0xf,
  43                                    { QI_CC_TYPE,        "cc_inv" },
  44                                    { QI_IOTLB_TYPE,     "iotlb_inv" },
  45                                    { QI_DIOTLB_TYPE,    "dev_tlb_inv" },
  46                                    { QI_IEC_TYPE,       "iec_inv" },
  47                                    { QI_IWD_TYPE,       "inv_wait" },
  48                                    { QI_EIOTLB_TYPE,    "p_iotlb_inv" },
  49                                    { QI_PC_TYPE,        "pc_inv" },
  50                                    { QI_DEIOTLB_TYPE,   "p_dev_tlb_inv" },
  51                                    { QI_PGRP_RESP_TYPE, "page_grp_resp" }),
  52                 __get_str(iommu),
  53                 __entry->qw0, __entry->qw1, __entry->qw2, __entry->qw3
  54         )
  55 );
  56
  57 TRACE_EVENT(prq_report,
  58         TP_PROTO(struct intel_iommu *iommu, struct device *dev,
  59                  u64 dw0, u64 dw1, u64 dw2, u64 dw3,
  60                  unsigned long seq),
  61
  62         TP_ARGS(iommu, dev, dw0, dw1, dw2, dw3, seq),
  63
  64         TP_STRUCT__entry(
  65                 __field(u64, dw0)
  66                 __field(u64, dw1)
  67                 __field(u64, dw2)
  68                 __field(u64, dw3)
  69                 __field(unsigned long, seq)
  70                 __string(iommu, iommu->name)
  71                 __string(dev, dev_name(dev))
  72                 __dynamic_array(char, buff, MSG_MAX)
  73         ),
  74
  75         TP_fast_assign(
  76                 __entry->dw0 = dw0;
  77                 __entry->dw1 = dw1;
  78                 __entry->dw2 = dw2;
  79                 __entry->dw3 = dw3;
  80                 __entry->seq = seq;
  81                 __assign_str(iommu, iommu->name);
  82                 __assign_str(dev, dev_name(dev));
  83         ),
  84
  85         TP_printk("%s/%s seq# %ld: %s",
  86                 __get_str(iommu), __get_str(dev), __entry->seq,
  87                 decode_prq_descriptor(__get_str(buff), MSG_MAX, __entry->dw0,
  88                                       __entry->dw1, __entry->dw2, __entry->dw3)
  89         )
  90 );
  91 #endif /* _TRACE_INTEL_IOMMU_H */
  92
  93 /* This part must be outside protection */
  94 #include <trace/define_trace.h>