1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
6 #ifndef __SOC_TEGRA_FUSE_H__
7 #define __SOC_TEGRA_FUSE_H__
19 #define TEGRA_FUSE_SKU_CALIB_0 0xf0
20 #define TEGRA30_FUSE_SATA_CALIB 0x124
21 #define TEGRA_FUSE_USB_CALIB_EXT_0 0x250
25 u32 tegra_read_chipid(void);
26 u8 tegra_get_chip_id(void);
27 u8 tegra_get_platform(void);
28 bool tegra_is_silicon(void);
31 TEGRA_REVISION_UNKNOWN = 0,
40 struct tegra_sku_info {
52 enum tegra_revision revision;
55 u32 tegra_read_straps(void);
56 u32 tegra_read_ram_code(void);
57 int tegra_fuse_readl(unsigned long offset, u32 *value);
59 #ifdef CONFIG_ARCH_TEGRA
60 extern struct tegra_sku_info tegra_sku_info;
62 static struct tegra_sku_info tegra_sku_info __maybe_unused;
65 struct device *tegra_soc_device_register(void);
67 #endif /* __ASSEMBLY__ */
69 #endif /* __SOC_TEGRA_FUSE_H__ */