media: uapi: h264: Update reference lists
[linux-2.6-microblaze.git] / include / media / h264-ctrls.h
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * These are the H.264 state controls for use with stateless H.264
4  * codec drivers.
5  *
6  * It turns out that these structs are not stable yet and will undergo
7  * more changes. So keep them private until they are stable and ready to
8  * become part of the official public API.
9  */
10
11 #ifndef _H264_CTRLS_H_
12 #define _H264_CTRLS_H_
13
14 #include <linux/videodev2.h>
15
16 /*
17  * Maximum DPB size, as specified by section 'A.3.1 Level limits
18  * common to the Baseline, Main, and Extended profiles'.
19  */
20 #define V4L2_H264_NUM_DPB_ENTRIES 16
21
22 #define V4L2_H264_REF_LIST_LEN (2 * V4L2_H264_NUM_DPB_ENTRIES)
23
24 /* Our pixel format isn't stable at the moment */
25 #define V4L2_PIX_FMT_H264_SLICE v4l2_fourcc('S', '2', '6', '4') /* H264 parsed slices */
26
27 /*
28  * This is put insanely high to avoid conflicting with controls that
29  * would be added during the phase where those controls are not
30  * stable. It should be fixed eventually.
31  */
32 #define V4L2_CID_MPEG_VIDEO_H264_SPS            (V4L2_CID_MPEG_BASE+1000)
33 #define V4L2_CID_MPEG_VIDEO_H264_PPS            (V4L2_CID_MPEG_BASE+1001)
34 #define V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX (V4L2_CID_MPEG_BASE+1002)
35 #define V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS   (V4L2_CID_MPEG_BASE+1003)
36 #define V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS  (V4L2_CID_MPEG_BASE+1004)
37 #define V4L2_CID_MPEG_VIDEO_H264_DECODE_MODE    (V4L2_CID_MPEG_BASE+1005)
38 #define V4L2_CID_MPEG_VIDEO_H264_START_CODE     (V4L2_CID_MPEG_BASE+1006)
39
40 /* enum v4l2_ctrl_type type values */
41 #define V4L2_CTRL_TYPE_H264_SPS                 0x0110
42 #define V4L2_CTRL_TYPE_H264_PPS                 0x0111
43 #define V4L2_CTRL_TYPE_H264_SCALING_MATRIX      0x0112
44 #define V4L2_CTRL_TYPE_H264_SLICE_PARAMS        0x0113
45 #define V4L2_CTRL_TYPE_H264_DECODE_PARAMS       0x0114
46
47 enum v4l2_mpeg_video_h264_decode_mode {
48         V4L2_MPEG_VIDEO_H264_DECODE_MODE_SLICE_BASED,
49         V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED,
50 };
51
52 enum v4l2_mpeg_video_h264_start_code {
53         V4L2_MPEG_VIDEO_H264_START_CODE_NONE,
54         V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B,
55 };
56
57 #define V4L2_H264_SPS_CONSTRAINT_SET0_FLAG                      0x01
58 #define V4L2_H264_SPS_CONSTRAINT_SET1_FLAG                      0x02
59 #define V4L2_H264_SPS_CONSTRAINT_SET2_FLAG                      0x04
60 #define V4L2_H264_SPS_CONSTRAINT_SET3_FLAG                      0x08
61 #define V4L2_H264_SPS_CONSTRAINT_SET4_FLAG                      0x10
62 #define V4L2_H264_SPS_CONSTRAINT_SET5_FLAG                      0x20
63
64 #define V4L2_H264_SPS_FLAG_SEPARATE_COLOUR_PLANE                0x01
65 #define V4L2_H264_SPS_FLAG_QPPRIME_Y_ZERO_TRANSFORM_BYPASS      0x02
66 #define V4L2_H264_SPS_FLAG_DELTA_PIC_ORDER_ALWAYS_ZERO          0x04
67 #define V4L2_H264_SPS_FLAG_GAPS_IN_FRAME_NUM_VALUE_ALLOWED      0x08
68 #define V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY                       0x10
69 #define V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD              0x20
70 #define V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE                 0x40
71
72 struct v4l2_ctrl_h264_sps {
73         __u8 profile_idc;
74         __u8 constraint_set_flags;
75         __u8 level_idc;
76         __u8 seq_parameter_set_id;
77         __u8 chroma_format_idc;
78         __u8 bit_depth_luma_minus8;
79         __u8 bit_depth_chroma_minus8;
80         __u8 log2_max_frame_num_minus4;
81         __u8 pic_order_cnt_type;
82         __u8 log2_max_pic_order_cnt_lsb_minus4;
83         __u8 max_num_ref_frames;
84         __u8 num_ref_frames_in_pic_order_cnt_cycle;
85         __s32 offset_for_ref_frame[255];
86         __s32 offset_for_non_ref_pic;
87         __s32 offset_for_top_to_bottom_field;
88         __u16 pic_width_in_mbs_minus1;
89         __u16 pic_height_in_map_units_minus1;
90         __u32 flags;
91 };
92
93 #define V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE                          0x0001
94 #define V4L2_H264_PPS_FLAG_BOTTOM_FIELD_PIC_ORDER_IN_FRAME_PRESENT      0x0002
95 #define V4L2_H264_PPS_FLAG_WEIGHTED_PRED                                0x0004
96 #define V4L2_H264_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT            0x0008
97 #define V4L2_H264_PPS_FLAG_CONSTRAINED_INTRA_PRED                       0x0010
98 #define V4L2_H264_PPS_FLAG_REDUNDANT_PIC_CNT_PRESENT                    0x0020
99 #define V4L2_H264_PPS_FLAG_TRANSFORM_8X8_MODE                           0x0040
100 #define V4L2_H264_PPS_FLAG_PIC_SCALING_MATRIX_PRESENT                   0x0080
101
102 struct v4l2_ctrl_h264_pps {
103         __u8 pic_parameter_set_id;
104         __u8 seq_parameter_set_id;
105         __u8 num_slice_groups_minus1;
106         __u8 num_ref_idx_l0_default_active_minus1;
107         __u8 num_ref_idx_l1_default_active_minus1;
108         __u8 weighted_bipred_idc;
109         __s8 pic_init_qp_minus26;
110         __s8 pic_init_qs_minus26;
111         __s8 chroma_qp_index_offset;
112         __s8 second_chroma_qp_index_offset;
113         __u16 flags;
114 };
115
116 struct v4l2_ctrl_h264_scaling_matrix {
117         __u8 scaling_list_4x4[6][16];
118         __u8 scaling_list_8x8[6][64];
119 };
120
121 struct v4l2_h264_weight_factors {
122         __s16 luma_weight[32];
123         __s16 luma_offset[32];
124         __s16 chroma_weight[32][2];
125         __s16 chroma_offset[32][2];
126 };
127
128 struct v4l2_h264_pred_weight_table {
129         __u16 luma_log2_weight_denom;
130         __u16 chroma_log2_weight_denom;
131         struct v4l2_h264_weight_factors weight_factors[2];
132 };
133
134 #define V4L2_H264_SLICE_TYPE_P                          0
135 #define V4L2_H264_SLICE_TYPE_B                          1
136 #define V4L2_H264_SLICE_TYPE_I                          2
137 #define V4L2_H264_SLICE_TYPE_SP                         3
138 #define V4L2_H264_SLICE_TYPE_SI                         4
139
140 #define V4L2_H264_SLICE_FLAG_FIELD_PIC                  0x01
141 #define V4L2_H264_SLICE_FLAG_BOTTOM_FIELD               0x02
142 #define V4L2_H264_SLICE_FLAG_DIRECT_SPATIAL_MV_PRED     0x04
143 #define V4L2_H264_SLICE_FLAG_SP_FOR_SWITCH              0x08
144
145 #define V4L2_H264_TOP_FIELD_REF                         0x1
146 #define V4L2_H264_BOTTOM_FIELD_REF                      0x2
147 #define V4L2_H264_FRAME_REF                             0x3
148
149 struct v4l2_h264_reference {
150         __u8 fields;
151
152         /* Index into v4l2_ctrl_h264_decode_params.dpb[] */
153         __u8 index;
154 };
155
156 struct v4l2_ctrl_h264_slice_params {
157         /* Size in bytes, including header */
158         __u32 size;
159
160         /* Offset in bytes to the start of slice in the OUTPUT buffer. */
161         __u32 start_byte_offset;
162
163         /* Offset in bits to slice_data() from the beginning of this slice. */
164         __u32 header_bit_size;
165
166         __u16 first_mb_in_slice;
167         __u8 slice_type;
168         __u8 pic_parameter_set_id;
169         __u8 colour_plane_id;
170         __u8 redundant_pic_cnt;
171         __u16 frame_num;
172         __u16 idr_pic_id;
173         __u16 pic_order_cnt_lsb;
174         __s32 delta_pic_order_cnt_bottom;
175         __s32 delta_pic_order_cnt0;
176         __s32 delta_pic_order_cnt1;
177
178         struct v4l2_h264_pred_weight_table pred_weight_table;
179         /* Size in bits of dec_ref_pic_marking() syntax element. */
180         __u32 dec_ref_pic_marking_bit_size;
181         /* Size in bits of pic order count syntax. */
182         __u32 pic_order_cnt_bit_size;
183
184         __u8 cabac_init_idc;
185         __s8 slice_qp_delta;
186         __s8 slice_qs_delta;
187         __u8 disable_deblocking_filter_idc;
188         __s8 slice_alpha_c0_offset_div2;
189         __s8 slice_beta_offset_div2;
190         __u8 num_ref_idx_l0_active_minus1;
191         __u8 num_ref_idx_l1_active_minus1;
192         __u32 slice_group_change_cycle;
193
194         struct v4l2_h264_reference ref_pic_list0[V4L2_H264_REF_LIST_LEN];
195         struct v4l2_h264_reference ref_pic_list1[V4L2_H264_REF_LIST_LEN];
196
197         __u32 flags;
198 };
199
200 #define V4L2_H264_DPB_ENTRY_FLAG_VALID          0x01
201 #define V4L2_H264_DPB_ENTRY_FLAG_ACTIVE         0x02
202 #define V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM      0x04
203 #define V4L2_H264_DPB_ENTRY_FLAG_FIELD          0x08
204 #define V4L2_H264_DPB_ENTRY_FLAG_BOTTOM_FIELD   0x10
205
206 struct v4l2_h264_dpb_entry {
207         __u64 reference_ts;
208         __u16 frame_num;
209         __u16 pic_num;
210         /* Note that field is indicated by v4l2_buffer.field */
211         __s32 top_field_order_cnt;
212         __s32 bottom_field_order_cnt;
213         __u32 flags; /* V4L2_H264_DPB_ENTRY_FLAG_* */
214 };
215
216 #define V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC     0x01
217
218 struct v4l2_ctrl_h264_decode_params {
219         struct v4l2_h264_dpb_entry dpb[V4L2_H264_NUM_DPB_ENTRIES];
220         __u16 num_slices;
221         __u16 nal_ref_idc;
222         __s32 top_field_order_cnt;
223         __s32 bottom_field_order_cnt;
224         __u32 flags; /* V4L2_H264_DECODE_PARAM_FLAG_* */
225 };
226
227 #endif