Merge tag 'for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux...
[linux-2.6-microblaze.git] / include / media / h264-ctrls.h
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * These are the H.264 state controls for use with stateless H.264
4  * codec drivers.
5  *
6  * It turns out that these structs are not stable yet and will undergo
7  * more changes. So keep them private until they are stable and ready to
8  * become part of the official public API.
9  */
10
11 #ifndef _H264_CTRLS_H_
12 #define _H264_CTRLS_H_
13
14 #include <linux/videodev2.h>
15
16 /*
17  * Maximum DPB size, as specified by section 'A.3.1 Level limits
18  * common to the Baseline, Main, and Extended profiles'.
19  */
20 #define V4L2_H264_NUM_DPB_ENTRIES 16
21
22 #define V4L2_H264_REF_LIST_LEN (2 * V4L2_H264_NUM_DPB_ENTRIES)
23
24 /* Our pixel format isn't stable at the moment */
25 #define V4L2_PIX_FMT_H264_SLICE v4l2_fourcc('S', '2', '6', '4') /* H264 parsed slices */
26
27 /*
28  * This is put insanely high to avoid conflicting with controls that
29  * would be added during the phase where those controls are not
30  * stable. It should be fixed eventually.
31  */
32 #define V4L2_CID_MPEG_VIDEO_H264_SPS            (V4L2_CID_MPEG_BASE+1000)
33 #define V4L2_CID_MPEG_VIDEO_H264_PPS            (V4L2_CID_MPEG_BASE+1001)
34 #define V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX (V4L2_CID_MPEG_BASE+1002)
35 #define V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS   (V4L2_CID_MPEG_BASE+1003)
36 #define V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS  (V4L2_CID_MPEG_BASE+1004)
37 #define V4L2_CID_MPEG_VIDEO_H264_DECODE_MODE    (V4L2_CID_MPEG_BASE+1005)
38 #define V4L2_CID_MPEG_VIDEO_H264_START_CODE     (V4L2_CID_MPEG_BASE+1006)
39 #define V4L2_CID_MPEG_VIDEO_H264_PRED_WEIGHTS   (V4L2_CID_MPEG_BASE+1007)
40
41 /* enum v4l2_ctrl_type type values */
42 #define V4L2_CTRL_TYPE_H264_SPS                 0x0110
43 #define V4L2_CTRL_TYPE_H264_PPS                 0x0111
44 #define V4L2_CTRL_TYPE_H264_SCALING_MATRIX      0x0112
45 #define V4L2_CTRL_TYPE_H264_SLICE_PARAMS        0x0113
46 #define V4L2_CTRL_TYPE_H264_DECODE_PARAMS       0x0114
47 #define V4L2_CTRL_TYPE_H264_PRED_WEIGHTS        0x0115
48
49 enum v4l2_mpeg_video_h264_decode_mode {
50         V4L2_MPEG_VIDEO_H264_DECODE_MODE_SLICE_BASED,
51         V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED,
52 };
53
54 enum v4l2_mpeg_video_h264_start_code {
55         V4L2_MPEG_VIDEO_H264_START_CODE_NONE,
56         V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B,
57 };
58
59 #define V4L2_H264_SPS_CONSTRAINT_SET0_FLAG                      0x01
60 #define V4L2_H264_SPS_CONSTRAINT_SET1_FLAG                      0x02
61 #define V4L2_H264_SPS_CONSTRAINT_SET2_FLAG                      0x04
62 #define V4L2_H264_SPS_CONSTRAINT_SET3_FLAG                      0x08
63 #define V4L2_H264_SPS_CONSTRAINT_SET4_FLAG                      0x10
64 #define V4L2_H264_SPS_CONSTRAINT_SET5_FLAG                      0x20
65
66 #define V4L2_H264_SPS_FLAG_SEPARATE_COLOUR_PLANE                0x01
67 #define V4L2_H264_SPS_FLAG_QPPRIME_Y_ZERO_TRANSFORM_BYPASS      0x02
68 #define V4L2_H264_SPS_FLAG_DELTA_PIC_ORDER_ALWAYS_ZERO          0x04
69 #define V4L2_H264_SPS_FLAG_GAPS_IN_FRAME_NUM_VALUE_ALLOWED      0x08
70 #define V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY                       0x10
71 #define V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD              0x20
72 #define V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE                 0x40
73
74 struct v4l2_ctrl_h264_sps {
75         __u8 profile_idc;
76         __u8 constraint_set_flags;
77         __u8 level_idc;
78         __u8 seq_parameter_set_id;
79         __u8 chroma_format_idc;
80         __u8 bit_depth_luma_minus8;
81         __u8 bit_depth_chroma_minus8;
82         __u8 log2_max_frame_num_minus4;
83         __u8 pic_order_cnt_type;
84         __u8 log2_max_pic_order_cnt_lsb_minus4;
85         __u8 max_num_ref_frames;
86         __u8 num_ref_frames_in_pic_order_cnt_cycle;
87         __s32 offset_for_ref_frame[255];
88         __s32 offset_for_non_ref_pic;
89         __s32 offset_for_top_to_bottom_field;
90         __u16 pic_width_in_mbs_minus1;
91         __u16 pic_height_in_map_units_minus1;
92         __u32 flags;
93 };
94
95 #define V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE                          0x0001
96 #define V4L2_H264_PPS_FLAG_BOTTOM_FIELD_PIC_ORDER_IN_FRAME_PRESENT      0x0002
97 #define V4L2_H264_PPS_FLAG_WEIGHTED_PRED                                0x0004
98 #define V4L2_H264_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT            0x0008
99 #define V4L2_H264_PPS_FLAG_CONSTRAINED_INTRA_PRED                       0x0010
100 #define V4L2_H264_PPS_FLAG_REDUNDANT_PIC_CNT_PRESENT                    0x0020
101 #define V4L2_H264_PPS_FLAG_TRANSFORM_8X8_MODE                           0x0040
102 #define V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT                       0x0080
103
104 struct v4l2_ctrl_h264_pps {
105         __u8 pic_parameter_set_id;
106         __u8 seq_parameter_set_id;
107         __u8 num_slice_groups_minus1;
108         __u8 num_ref_idx_l0_default_active_minus1;
109         __u8 num_ref_idx_l1_default_active_minus1;
110         __u8 weighted_bipred_idc;
111         __s8 pic_init_qp_minus26;
112         __s8 pic_init_qs_minus26;
113         __s8 chroma_qp_index_offset;
114         __s8 second_chroma_qp_index_offset;
115         __u16 flags;
116 };
117
118 struct v4l2_ctrl_h264_scaling_matrix {
119         __u8 scaling_list_4x4[6][16];
120         __u8 scaling_list_8x8[6][64];
121 };
122
123 struct v4l2_h264_weight_factors {
124         __s16 luma_weight[32];
125         __s16 luma_offset[32];
126         __s16 chroma_weight[32][2];
127         __s16 chroma_offset[32][2];
128 };
129
130 #define V4L2_H264_CTRL_PRED_WEIGHTS_REQUIRED(pps, slice) \
131         ((((pps)->flags & V4L2_H264_PPS_FLAG_WEIGHTED_PRED) && \
132          ((slice)->slice_type == V4L2_H264_SLICE_TYPE_P || \
133           (slice)->slice_type == V4L2_H264_SLICE_TYPE_SP)) || \
134          ((pps)->weighted_bipred_idc == 1 && \
135           (slice)->slice_type == V4L2_H264_SLICE_TYPE_B))
136
137 struct v4l2_ctrl_h264_pred_weights {
138         __u16 luma_log2_weight_denom;
139         __u16 chroma_log2_weight_denom;
140         struct v4l2_h264_weight_factors weight_factors[2];
141 };
142
143 #define V4L2_H264_SLICE_TYPE_P                          0
144 #define V4L2_H264_SLICE_TYPE_B                          1
145 #define V4L2_H264_SLICE_TYPE_I                          2
146 #define V4L2_H264_SLICE_TYPE_SP                         3
147 #define V4L2_H264_SLICE_TYPE_SI                         4
148
149 #define V4L2_H264_SLICE_FLAG_DIRECT_SPATIAL_MV_PRED     0x01
150 #define V4L2_H264_SLICE_FLAG_SP_FOR_SWITCH              0x02
151
152 #define V4L2_H264_TOP_FIELD_REF                         0x1
153 #define V4L2_H264_BOTTOM_FIELD_REF                      0x2
154 #define V4L2_H264_FRAME_REF                             0x3
155
156 struct v4l2_h264_reference {
157         __u8 fields;
158
159         /* Index into v4l2_ctrl_h264_decode_params.dpb[] */
160         __u8 index;
161 };
162
163 struct v4l2_ctrl_h264_slice_params {
164         /* Offset in bits to slice_data() from the beginning of this slice. */
165         __u32 header_bit_size;
166
167         __u32 first_mb_in_slice;
168
169         __u8 slice_type;
170         __u8 colour_plane_id;
171         __u8 redundant_pic_cnt;
172         __u8 cabac_init_idc;
173         __s8 slice_qp_delta;
174         __s8 slice_qs_delta;
175         __u8 disable_deblocking_filter_idc;
176         __s8 slice_alpha_c0_offset_div2;
177         __s8 slice_beta_offset_div2;
178         __u8 num_ref_idx_l0_active_minus1;
179         __u8 num_ref_idx_l1_active_minus1;
180
181         __u8 reserved;
182
183         struct v4l2_h264_reference ref_pic_list0[V4L2_H264_REF_LIST_LEN];
184         struct v4l2_h264_reference ref_pic_list1[V4L2_H264_REF_LIST_LEN];
185
186         __u32 flags;
187 };
188
189 #define V4L2_H264_DPB_ENTRY_FLAG_VALID          0x01
190 #define V4L2_H264_DPB_ENTRY_FLAG_ACTIVE         0x02
191 #define V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM      0x04
192 #define V4L2_H264_DPB_ENTRY_FLAG_FIELD          0x08
193
194 struct v4l2_h264_dpb_entry {
195         __u64 reference_ts;
196         __u32 pic_num;
197         __u16 frame_num;
198         __u8 fields;
199         __u8 reserved[5];
200         /* Note that field is indicated by v4l2_buffer.field */
201         __s32 top_field_order_cnt;
202         __s32 bottom_field_order_cnt;
203         __u32 flags; /* V4L2_H264_DPB_ENTRY_FLAG_* */
204 };
205
206 #define V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC             0x01
207 #define V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC           0x02
208 #define V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD        0x04
209
210 struct v4l2_ctrl_h264_decode_params {
211         struct v4l2_h264_dpb_entry dpb[V4L2_H264_NUM_DPB_ENTRIES];
212         __u16 nal_ref_idc;
213         __u16 frame_num;
214         __s32 top_field_order_cnt;
215         __s32 bottom_field_order_cnt;
216         __u16 idr_pic_id;
217         __u16 pic_order_cnt_lsb;
218         __s32 delta_pic_order_cnt_bottom;
219         __s32 delta_pic_order_cnt0;
220         __s32 delta_pic_order_cnt1;
221         /* Size in bits of dec_ref_pic_marking() syntax element. */
222         __u32 dec_ref_pic_marking_bit_size;
223         /* Size in bits of pic order count syntax. */
224         __u32 pic_order_cnt_bit_size;
225         __u32 slice_group_change_cycle;
226
227         __u32 reserved;
228         __u32 flags; /* V4L2_H264_DECODE_PARAM_FLAG_* */
229 };
230
231 #endif