1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2004,2007,2008 IBM Corporation
6 * Leendert van Doorn <leendert@watson.ibm.com>
7 * Dave Safford <safford@watson.ibm.com>
8 * Reiner Sailer <sailer@watson.ibm.com>
9 * Kylene Hall <kjhall@us.ibm.com>
10 * Debora Velarde <dvelarde@us.ibm.com>
12 * Maintained by: <tpmdd_devel@lists.sourceforge.net>
14 * Device driver for TCG/TCPA TPM (trusted platform module).
15 * Specifications at www.trustedcomputinggroup.org
17 #ifndef __LINUX_TPM_H__
18 #define __LINUX_TPM_H__
20 #include <linux/hw_random.h>
21 #include <linux/acpi.h>
22 #include <linux/cdev.h>
24 #include <linux/highmem.h>
25 #include <crypto/hash_info.h>
26 #include <crypto/aes.h>
28 #define TPM_DIGEST_SIZE 20 /* Max TPM v1.2 PCR size */
29 #define TPM_MAX_DIGEST_SIZE SHA512_DIGEST_SIZE
32 struct trusted_key_payload;
33 struct trusted_key_options;
34 /* opaque structure, holds auth session parameters like the session key */
37 enum tpm2_session_types {
39 TPM2_SE_POLICY = 0x01,
43 /* if you add a new hash to this, increment TPM_MAX_HASHES below */
45 TPM_ALG_ERROR = 0x0000,
46 TPM_ALG_SHA1 = 0x0004,
48 TPM_ALG_KEYEDHASH = 0x0008,
49 TPM_ALG_SHA256 = 0x000B,
50 TPM_ALG_SHA384 = 0x000C,
51 TPM_ALG_SHA512 = 0x000D,
52 TPM_ALG_NULL = 0x0010,
53 TPM_ALG_SM3_256 = 0x0012,
59 * maximum number of hashing algorithms a TPM can have. This is
60 * basically a count of every hash in tpm_algorithms above
62 #define TPM_MAX_HASHES 5
65 TPM2_ECC_NONE = 0x0000,
66 TPM2_ECC_NIST_P256 = 0x0003,
71 u8 digest[TPM_MAX_DIGEST_SIZE];
74 struct tpm_bank_info {
81 TPM_OPS_AUTO_STARTUP = BIT(0),
84 struct tpm_class_ops {
86 const u8 req_complete_mask;
87 const u8 req_complete_val;
88 bool (*req_canceled)(struct tpm_chip *chip, u8 status);
89 int (*recv) (struct tpm_chip *chip, u8 *buf, size_t len);
90 int (*send) (struct tpm_chip *chip, u8 *buf, size_t len);
91 void (*cancel) (struct tpm_chip *chip);
92 u8 (*status) (struct tpm_chip *chip);
93 void (*update_timeouts)(struct tpm_chip *chip,
94 unsigned long *timeout_cap);
95 void (*update_durations)(struct tpm_chip *chip,
96 unsigned long *duration_cap);
97 int (*go_idle)(struct tpm_chip *chip);
98 int (*cmd_ready)(struct tpm_chip *chip);
99 int (*request_locality)(struct tpm_chip *chip, int loc);
100 int (*relinquish_locality)(struct tpm_chip *chip, int loc);
101 void (*clk_enable)(struct tpm_chip *chip, bool value);
104 #define TPM_NUM_EVENT_LOG_FILES 3
106 /* Indexes the duration array */
113 TPM_NUM_DURATIONS = TPM_UNDEFINED,
116 #define TPM_PPI_VERSION_LEN 3
126 struct tpm_bios_log {
127 void *bios_event_log;
128 void *bios_event_log_end;
131 struct tpm_chip_seqops {
132 struct tpm_chip *chip;
133 const struct seq_operations *seqops;
136 /* fixed define for the curve we use which is NIST_P256 */
140 * fixed define for the size of a name. This is actually HASHALG size
141 * plus 2, so 32 for SHA256
143 #define TPM2_NAME_SIZE 34
146 * The maximum size for an object context
148 #define TPM2_MAX_CONTEXT_SIZE 4096
156 /* A driver callback under ops cannot be run unless ops_sem is held
157 * (sometimes implicitly, eg for the sysfs code). ops becomes null
158 * when the driver is unregistered, see tpm_try_get_ops.
160 struct rw_semaphore ops_sem;
161 const struct tpm_class_ops *ops;
163 struct tpm_bios_log log;
164 struct tpm_chip_seqops bin_log_seqops;
165 struct tpm_chip_seqops ascii_log_seqops;
169 int dev_num; /* /dev/tpm# */
170 unsigned long is_open; /* only one allowed */
175 struct mutex tpm_mutex; /* tpm is processing */
177 unsigned long timeout_a; /* jiffies */
178 unsigned long timeout_b; /* jiffies */
179 unsigned long timeout_c; /* jiffies */
180 unsigned long timeout_d; /* jiffies */
181 bool timeout_adjusted;
182 unsigned long duration[TPM_NUM_DURATIONS]; /* jiffies */
183 bool duration_adjusted;
185 struct dentry *bios_dir[TPM_NUM_EVENT_LOG_FILES];
187 const struct attribute_group *groups[3 + TPM_MAX_HASHES];
188 unsigned int groups_cnt;
190 u32 nr_allocated_banks;
191 struct tpm_bank_info *allocated_banks;
193 acpi_handle acpi_dev_handle;
194 char ppi_version[TPM_PPI_VERSION_LEN + 1];
195 #endif /* CONFIG_ACPI */
197 struct tpm_space work_space;
202 /* active locality */
205 #ifdef CONFIG_TCG_TPM2_HMAC
206 /* details for communication security via sessions */
208 /* saved context for NULL seed */
209 u8 null_key_context[TPM2_MAX_CONTEXT_SIZE];
210 /* name of NULL seed */
211 u8 null_key_name[TPM2_NAME_SIZE];
212 u8 null_ec_key_x[EC_PT_SZ];
213 u8 null_ec_key_y[EC_PT_SZ];
214 struct tpm2_auth *auth;
218 #define TPM_HEADER_SIZE 10
221 TPM2_PLATFORM_PCR = 24,
222 TPM2_PCR_SELECT_MIN = ((TPM2_PLATFORM_PCR + 7) / 8),
226 TPM2_TIMEOUT_A = 750,
227 TPM2_TIMEOUT_B = 2000,
228 TPM2_TIMEOUT_C = 200,
230 TPM2_DURATION_SHORT = 20,
231 TPM2_DURATION_MEDIUM = 750,
232 TPM2_DURATION_LONG = 2000,
233 TPM2_DURATION_LONG_LONG = 300000,
234 TPM2_DURATION_DEFAULT = 120000,
237 enum tpm2_structures {
238 TPM2_ST_NO_SESSIONS = 0x8001,
239 TPM2_ST_SESSIONS = 0x8002,
240 TPM2_ST_CREATION = 0x8021,
243 /* Indicates from what layer of the software stack the error comes from */
244 #define TSS2_RC_LAYER_SHIFT 16
245 #define TSS2_RESMGR_TPM_RC_LAYER (11 << TSS2_RC_LAYER_SHIFT)
247 enum tpm2_return_codes {
248 TPM2_RC_SUCCESS = 0x0000,
249 TPM2_RC_HASH = 0x0083, /* RC_FMT1 */
250 TPM2_RC_HANDLE = 0x008B,
251 TPM2_RC_INITIALIZE = 0x0100, /* RC_VER1 */
252 TPM2_RC_FAILURE = 0x0101,
253 TPM2_RC_DISABLED = 0x0120,
254 TPM2_RC_UPGRADE = 0x012D,
255 TPM2_RC_COMMAND_CODE = 0x0143,
256 TPM2_RC_TESTING = 0x090A, /* RC_WARN */
257 TPM2_RC_REFERENCE_H0 = 0x0910,
258 TPM2_RC_RETRY = 0x0922,
261 enum tpm2_command_codes {
262 TPM2_CC_FIRST = 0x011F,
263 TPM2_CC_HIERARCHY_CONTROL = 0x0121,
264 TPM2_CC_HIERARCHY_CHANGE_AUTH = 0x0129,
265 TPM2_CC_CREATE_PRIMARY = 0x0131,
266 TPM2_CC_SEQUENCE_COMPLETE = 0x013E,
267 TPM2_CC_SELF_TEST = 0x0143,
268 TPM2_CC_STARTUP = 0x0144,
269 TPM2_CC_SHUTDOWN = 0x0145,
270 TPM2_CC_NV_READ = 0x014E,
271 TPM2_CC_CREATE = 0x0153,
272 TPM2_CC_LOAD = 0x0157,
273 TPM2_CC_SEQUENCE_UPDATE = 0x015C,
274 TPM2_CC_UNSEAL = 0x015E,
275 TPM2_CC_CONTEXT_LOAD = 0x0161,
276 TPM2_CC_CONTEXT_SAVE = 0x0162,
277 TPM2_CC_FLUSH_CONTEXT = 0x0165,
278 TPM2_CC_READ_PUBLIC = 0x0173,
279 TPM2_CC_START_AUTH_SESS = 0x0176,
280 TPM2_CC_VERIFY_SIGNATURE = 0x0177,
281 TPM2_CC_GET_CAPABILITY = 0x017A,
282 TPM2_CC_GET_RANDOM = 0x017B,
283 TPM2_CC_PCR_READ = 0x017E,
284 TPM2_CC_PCR_EXTEND = 0x0182,
285 TPM2_CC_EVENT_SEQUENCE_COMPLETE = 0x0185,
286 TPM2_CC_HASH_SEQUENCE_START = 0x0186,
287 TPM2_CC_CREATE_LOADED = 0x0191,
288 TPM2_CC_LAST = 0x0193, /* Spec 1.36 */
291 enum tpm2_permanent_handles {
292 TPM2_RH_NULL = 0x40000007,
293 TPM2_RS_PW = 0x40000009,
296 /* Most Significant Octet for key types */
298 TPM2_MSO_NVRAM = 0x01,
299 TPM2_MSO_SESSION = 0x02,
300 TPM2_MSO_POLICY = 0x03,
301 TPM2_MSO_PERMANENT = 0x40,
302 TPM2_MSO_VOLATILE = 0x80,
303 TPM2_MSO_PERSISTENT = 0x81,
306 static inline enum tpm2_mso_type tpm2_handle_mso(u32 handle)
311 enum tpm2_capabilities {
312 TPM2_CAP_HANDLES = 1,
313 TPM2_CAP_COMMANDS = 2,
315 TPM2_CAP_TPM_PROPERTIES = 6,
318 enum tpm2_properties {
319 TPM_PT_TOTAL_COMMANDS = 0x0129,
322 enum tpm2_startup_types {
323 TPM2_SU_CLEAR = 0x0000,
324 TPM2_SU_STATE = 0x0001,
328 TPM2_CC_ATTR_CHANDLES = 25,
329 TPM2_CC_ATTR_RHANDLE = 28,
330 TPM2_CC_ATTR_VENDOR = 29,
333 #define TPM_VID_INTEL 0x8086
334 #define TPM_VID_WINBOND 0x1050
335 #define TPM_VID_STM 0x104A
336 #define TPM_VID_ATML 0x1114
338 enum tpm_chip_flags {
339 TPM_CHIP_FLAG_BOOTSTRAPPED = BIT(0),
340 TPM_CHIP_FLAG_TPM2 = BIT(1),
341 TPM_CHIP_FLAG_IRQ = BIT(2),
342 TPM_CHIP_FLAG_VIRTUAL = BIT(3),
343 TPM_CHIP_FLAG_HAVE_TIMEOUTS = BIT(4),
344 TPM_CHIP_FLAG_ALWAYS_POWERED = BIT(5),
345 TPM_CHIP_FLAG_FIRMWARE_POWER_MANAGED = BIT(6),
346 TPM_CHIP_FLAG_FIRMWARE_UPGRADE = BIT(7),
347 TPM_CHIP_FLAG_SUSPENDED = BIT(8),
348 TPM_CHIP_FLAG_HWRNG_DISABLED = BIT(9),
351 #define to_tpm_chip(d) container_of(d, struct tpm_chip, dev)
363 /* the capacity exceeded: */
364 TPM_BUF_OVERFLOW = BIT(0),
366 TPM_BUF_TPM2B = BIT(1),
367 /* read out of boundary: */
368 TPM_BUF_BOUNDARY_ERROR = BIT(2),
372 * A string buffer type for constructing TPM commands.
381 enum tpm2_object_attributes {
382 TPM2_OA_FIXED_TPM = BIT(1),
383 TPM2_OA_ST_CLEAR = BIT(2),
384 TPM2_OA_FIXED_PARENT = BIT(4),
385 TPM2_OA_SENSITIVE_DATA_ORIGIN = BIT(5),
386 TPM2_OA_USER_WITH_AUTH = BIT(6),
387 TPM2_OA_ADMIN_WITH_POLICY = BIT(7),
388 TPM2_OA_NO_DA = BIT(10),
389 TPM2_OA_ENCRYPTED_DUPLICATION = BIT(11),
390 TPM2_OA_RESTRICTED = BIT(16),
391 TPM2_OA_DECRYPT = BIT(17),
392 TPM2_OA_SIGN = BIT(18),
396 * definitions for the canonical template. These are mandated
397 * by the TCG key template documents
400 #define AES_KEY_BYTES AES_KEYSIZE_128
401 #define AES_KEY_BITS (AES_KEY_BYTES*8)
402 #define TPM2_OA_TMPL (TPM2_OA_NO_DA | \
403 TPM2_OA_FIXED_TPM | \
404 TPM2_OA_FIXED_PARENT | \
405 TPM2_OA_SENSITIVE_DATA_ORIGIN | \
406 TPM2_OA_USER_WITH_AUTH | \
410 enum tpm2_session_attributes {
411 TPM2_SA_CONTINUE_SESSION = BIT(0),
412 TPM2_SA_AUDIT_EXCLUSIVE = BIT(1),
413 TPM2_SA_AUDIT_RESET = BIT(3),
414 TPM2_SA_DECRYPT = BIT(5),
415 TPM2_SA_ENCRYPT = BIT(6),
416 TPM2_SA_AUDIT = BIT(7),
420 unsigned int crypto_id;
424 int tpm_buf_init(struct tpm_buf *buf, u16 tag, u32 ordinal);
425 void tpm_buf_reset(struct tpm_buf *buf, u16 tag, u32 ordinal);
426 int tpm_buf_init_sized(struct tpm_buf *buf);
427 void tpm_buf_reset_sized(struct tpm_buf *buf);
428 void tpm_buf_destroy(struct tpm_buf *buf);
429 u32 tpm_buf_length(struct tpm_buf *buf);
430 void tpm_buf_append(struct tpm_buf *buf, const u8 *new_data, u16 new_length);
431 void tpm_buf_append_u8(struct tpm_buf *buf, const u8 value);
432 void tpm_buf_append_u16(struct tpm_buf *buf, const u16 value);
433 void tpm_buf_append_u32(struct tpm_buf *buf, const u32 value);
434 u8 tpm_buf_read_u8(struct tpm_buf *buf, off_t *offset);
435 u16 tpm_buf_read_u16(struct tpm_buf *buf, off_t *offset);
436 u32 tpm_buf_read_u32(struct tpm_buf *buf, off_t *offset);
438 u8 *tpm_buf_parameters(struct tpm_buf *buf);
441 * Check if TPM device is in the firmware upgrade mode.
443 static inline bool tpm_is_firmware_upgrade(struct tpm_chip *chip)
445 return chip->flags & TPM_CHIP_FLAG_FIRMWARE_UPGRADE;
448 static inline u32 tpm2_rc_value(u32 rc)
450 return (rc & BIT(7)) ? rc & 0xff : rc;
453 #if defined(CONFIG_TCG_TPM) || defined(CONFIG_TCG_TPM_MODULE)
455 extern int tpm_is_tpm2(struct tpm_chip *chip);
456 extern __must_check int tpm_try_get_ops(struct tpm_chip *chip);
457 extern void tpm_put_ops(struct tpm_chip *chip);
458 extern ssize_t tpm_transmit_cmd(struct tpm_chip *chip, struct tpm_buf *buf,
459 size_t min_rsp_body_length, const char *desc);
460 extern int tpm_pcr_read(struct tpm_chip *chip, u32 pcr_idx,
461 struct tpm_digest *digest);
462 extern int tpm_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,
463 struct tpm_digest *digests);
464 extern int tpm_get_random(struct tpm_chip *chip, u8 *data, size_t max);
465 extern struct tpm_chip *tpm_default_chip(void);
466 void tpm2_flush_context(struct tpm_chip *chip, u32 handle);
468 static inline void tpm_buf_append_empty_auth(struct tpm_buf *buf, u32 handle)
470 /* simple authorization for empty auth */
471 tpm_buf_append_u32(buf, 9); /* total length of auth */
472 tpm_buf_append_u32(buf, handle);
473 tpm_buf_append_u16(buf, 0); /* nonce len */
474 tpm_buf_append_u8(buf, 0); /* attributes */
475 tpm_buf_append_u16(buf, 0); /* hmac len */
478 static inline int tpm_is_tpm2(struct tpm_chip *chip)
482 static inline int tpm_pcr_read(struct tpm_chip *chip, int pcr_idx,
483 struct tpm_digest *digest)
488 static inline int tpm_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,
489 struct tpm_digest *digests)
494 static inline int tpm_get_random(struct tpm_chip *chip, u8 *data, size_t max)
499 static inline struct tpm_chip *tpm_default_chip(void)
504 static inline void tpm_buf_append_empty_auth(struct tpm_buf *buf, u32 handle)
508 #ifdef CONFIG_TCG_TPM2_HMAC
510 int tpm2_start_auth_session(struct tpm_chip *chip);
511 void tpm_buf_append_name(struct tpm_chip *chip, struct tpm_buf *buf,
512 u32 handle, u8 *name);
513 void tpm_buf_append_hmac_session(struct tpm_chip *chip, struct tpm_buf *buf,
514 u8 attributes, u8 *passphrase,
516 static inline void tpm_buf_append_hmac_session_opt(struct tpm_chip *chip,
522 tpm_buf_append_hmac_session(chip, buf, attributes, passphrase,
525 void tpm_buf_fill_hmac_session(struct tpm_chip *chip, struct tpm_buf *buf);
526 int tpm_buf_check_hmac_response(struct tpm_chip *chip, struct tpm_buf *buf,
528 void tpm2_end_auth_session(struct tpm_chip *chip);
530 #include <asm/unaligned.h>
532 static inline int tpm2_start_auth_session(struct tpm_chip *chip)
536 static inline void tpm2_end_auth_session(struct tpm_chip *chip)
539 static inline void tpm_buf_append_name(struct tpm_chip *chip,
541 u32 handle, u8 *name)
543 tpm_buf_append_u32(buf, handle);
544 /* count the number of handles in the upper bits of flags */
547 static inline void tpm_buf_append_hmac_session(struct tpm_chip *chip,
549 u8 attributes, u8 *passphrase,
552 /* offset tells us where the sessions area begins */
553 int offset = buf->handles * 4 + TPM_HEADER_SIZE;
554 u32 len = 9 + passphraselen;
556 if (tpm_buf_length(buf) != offset) {
557 /* not the first session so update the existing length */
558 len += get_unaligned_be32(&buf->data[offset]);
559 put_unaligned_be32(len, &buf->data[offset]);
561 tpm_buf_append_u32(buf, len);
564 tpm_buf_append_u32(buf, TPM2_RS_PW);
566 tpm_buf_append_u16(buf, 0);
568 tpm_buf_append_u8(buf, 0);
570 tpm_buf_append_u16(buf, passphraselen);
571 tpm_buf_append(buf, passphrase, passphraselen);
573 static inline void tpm_buf_append_hmac_session_opt(struct tpm_chip *chip,
579 int offset = buf->handles * 4 + TPM_HEADER_SIZE;
580 struct tpm_header *head = (struct tpm_header *) buf->data;
583 * if the only sessions are optional, the command tag
584 * must change to TPM2_ST_NO_SESSIONS
586 if (tpm_buf_length(buf) == offset)
587 head->tag = cpu_to_be16(TPM2_ST_NO_SESSIONS);
589 static inline void tpm_buf_fill_hmac_session(struct tpm_chip *chip,
593 static inline int tpm_buf_check_hmac_response(struct tpm_chip *chip,
599 #endif /* CONFIG_TCG_TPM2_HMAC */