1 /* SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2005 David Brownell
9 #include <linux/bits.h>
10 #include <linux/device.h>
11 #include <linux/mod_devicetable.h>
12 #include <linux/slab.h>
13 #include <linux/kthread.h>
14 #include <linux/completion.h>
15 #include <linux/scatterlist.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/ptp_clock_kernel.h>
19 #include <uapi/linux/spi/spi.h>
23 struct spi_controller;
25 struct spi_controller_mem_ops;
28 * INTERFACES between SPI master-side drivers and SPI slave protocol handlers,
29 * and SPI infrastructure.
31 extern struct bus_type spi_bus_type;
34 * struct spi_statistics - statistics for spi transfers
35 * @lock: lock protecting this structure
37 * @messages: number of spi-messages handled
38 * @transfers: number of spi_transfers handled
39 * @errors: number of errors during spi_transfer
40 * @timedout: number of timeouts during spi_transfer
42 * @spi_sync: number of times spi_sync is used
43 * @spi_sync_immediate:
44 * number of times spi_sync is executed immediately
45 * in calling context without queuing and scheduling
46 * @spi_async: number of times spi_async is used
48 * @bytes: number of bytes transferred to/from device
49 * @bytes_tx: number of bytes sent to device
50 * @bytes_rx: number of bytes received from device
52 * @transfer_bytes_histo:
53 * transfer bytes histogramm
55 * @transfers_split_maxsize:
56 * number of transfers that have been split because of
59 struct spi_statistics {
60 spinlock_t lock; /* lock for the whole structure */
62 unsigned long messages;
63 unsigned long transfers;
65 unsigned long timedout;
67 unsigned long spi_sync;
68 unsigned long spi_sync_immediate;
69 unsigned long spi_async;
71 unsigned long long bytes;
72 unsigned long long bytes_rx;
73 unsigned long long bytes_tx;
75 #define SPI_STATISTICS_HISTO_SIZE 17
76 unsigned long transfer_bytes_histo[SPI_STATISTICS_HISTO_SIZE];
78 unsigned long transfers_split_maxsize;
81 void spi_statistics_add_transfer_stats(struct spi_statistics *stats,
82 struct spi_transfer *xfer,
83 struct spi_controller *ctlr);
85 #define SPI_STATISTICS_ADD_TO_FIELD(stats, field, count) \
87 unsigned long flags; \
88 spin_lock_irqsave(&(stats)->lock, flags); \
89 (stats)->field += count; \
90 spin_unlock_irqrestore(&(stats)->lock, flags); \
93 #define SPI_STATISTICS_INCREMENT_FIELD(stats, field) \
94 SPI_STATISTICS_ADD_TO_FIELD(stats, field, 1)
97 * struct spi_delay - SPI delay information
98 * @value: Value for the delay
99 * @unit: Unit for the delay
102 #define SPI_DELAY_UNIT_USECS 0
103 #define SPI_DELAY_UNIT_NSECS 1
104 #define SPI_DELAY_UNIT_SCK 2
109 extern int spi_delay_to_ns(struct spi_delay *_delay, struct spi_transfer *xfer);
110 extern int spi_delay_exec(struct spi_delay *_delay, struct spi_transfer *xfer);
113 * struct spi_device - Controller side proxy for an SPI slave device
114 * @dev: Driver model representation of the device.
115 * @controller: SPI controller used with the device.
116 * @master: Copy of controller, for backwards compatibility.
117 * @max_speed_hz: Maximum clock rate to be used with this chip
118 * (on this board); may be changed by the device's driver.
119 * The spi_transfer.speed_hz can override this for each transfer.
120 * @chip_select: Chipselect, distinguishing chips handled by @controller.
121 * @mode: The spi mode defines how data is clocked out and in.
122 * This may be changed by the device's driver.
123 * The "active low" default for chipselect mode can be overridden
124 * (by specifying SPI_CS_HIGH) as can the "MSB first" default for
125 * each word in a transfer (by specifying SPI_LSB_FIRST).
126 * @bits_per_word: Data transfers involve one or more words; word sizes
127 * like eight or 12 bits are common. In-memory wordsizes are
128 * powers of two bytes (e.g. 20 bit samples use 32 bits).
129 * This may be changed by the device's driver, or left at the
130 * default (0) indicating protocol words are eight bit bytes.
131 * The spi_transfer.bits_per_word can override this for each transfer.
132 * @rt: Make the pump thread real time priority.
133 * @irq: Negative, or the number passed to request_irq() to receive
134 * interrupts from this device.
135 * @controller_state: Controller's runtime state
136 * @controller_data: Board-specific definitions for controller, such as
137 * FIFO initialization parameters; from board_info.controller_data
138 * @modalias: Name of the driver to use with this device, or an alias
139 * for that name. This appears in the sysfs "modalias" attribute
140 * for driver coldplugging, and in uevents used for hotplugging
141 * @driver_override: If the name of a driver is written to this attribute, then
142 * the device will bind to the named driver and only the named driver.
143 * @cs_gpio: LEGACY: gpio number of the chipselect line (optional, -ENOENT when
144 * not using a GPIO line) use cs_gpiod in new drivers by opting in on
146 * @cs_gpiod: gpio descriptor of the chipselect line (optional, NULL when
147 * not using a GPIO line)
148 * @word_delay: delay to be inserted between consecutive
149 * words of a transfer
151 * @statistics: statistics for the spi_device
153 * A @spi_device is used to interchange data between an SPI slave
154 * (usually a discrete chip) and CPU memory.
156 * In @dev, the platform_data is used to hold information about this
157 * device that's meaningful to the device's protocol driver, but not
158 * to its controller. One example might be an identifier for a chip
159 * variant with slightly different functionality; another might be
160 * information about how this particular board wires the chip's pins.
164 struct spi_controller *controller;
165 struct spi_controller *master; /* compatibility layer */
170 #define SPI_NO_TX BIT(31) /* no transmit wire */
171 #define SPI_NO_RX BIT(30) /* no receive wire */
173 * All bits defined above should be covered by SPI_MODE_KERNEL_MASK.
174 * The SPI_MODE_KERNEL_MASK has the SPI_MODE_USER_MASK counterpart,
175 * which is defined in 'include/uapi/linux/spi/spi.h'.
176 * The bits defined here are from bit 31 downwards, while in
177 * SPI_MODE_USER_MASK are from 0 upwards.
178 * These bits must not overlap. A static assert check should make sure of that.
179 * If adding extra bits, make sure to decrease the bit index below as well.
181 #define SPI_MODE_KERNEL_MASK (~(BIT(30) - 1))
184 void *controller_state;
185 void *controller_data;
186 char modalias[SPI_NAME_SIZE];
187 const char *driver_override;
188 int cs_gpio; /* LEGACY: chip select gpio */
189 struct gpio_desc *cs_gpiod; /* chip select gpio desc */
190 struct spi_delay word_delay; /* inter-word delay */
193 struct spi_statistics statistics;
196 * likely need more hooks for more protocol options affecting how
197 * the controller talks to each chip, like:
198 * - memory packing (12 bit samples into low bits, others zeroed)
200 * - chipselect delays
205 /* Make sure that SPI_MODE_KERNEL_MASK & SPI_MODE_USER_MASK don't overlap */
206 static_assert((SPI_MODE_KERNEL_MASK & SPI_MODE_USER_MASK) == 0,
207 "SPI_MODE_USER_MASK & SPI_MODE_KERNEL_MASK must not overlap");
209 static inline struct spi_device *to_spi_device(struct device *dev)
211 return dev ? container_of(dev, struct spi_device, dev) : NULL;
214 /* most drivers won't need to care about device refcounting */
215 static inline struct spi_device *spi_dev_get(struct spi_device *spi)
217 return (spi && get_device(&spi->dev)) ? spi : NULL;
220 static inline void spi_dev_put(struct spi_device *spi)
223 put_device(&spi->dev);
226 /* ctldata is for the bus_controller driver's runtime state */
227 static inline void *spi_get_ctldata(struct spi_device *spi)
229 return spi->controller_state;
232 static inline void spi_set_ctldata(struct spi_device *spi, void *state)
234 spi->controller_state = state;
237 /* device driver data */
239 static inline void spi_set_drvdata(struct spi_device *spi, void *data)
241 dev_set_drvdata(&spi->dev, data);
244 static inline void *spi_get_drvdata(struct spi_device *spi)
246 return dev_get_drvdata(&spi->dev);
252 * struct spi_driver - Host side "protocol" driver
253 * @id_table: List of SPI devices supported by this driver
254 * @probe: Binds this driver to the spi device. Drivers can verify
255 * that the device is actually present, and may need to configure
256 * characteristics (such as bits_per_word) which weren't needed for
257 * the initial configuration done during system setup.
258 * @remove: Unbinds this driver from the spi device
259 * @shutdown: Standard shutdown callback used during system state
260 * transitions such as powerdown/halt and kexec
261 * @driver: SPI device drivers should initialize the name and owner
262 * field of this structure.
264 * This represents the kind of device driver that uses SPI messages to
265 * interact with the hardware at the other end of a SPI link. It's called
266 * a "protocol" driver because it works through messages rather than talking
267 * directly to SPI hardware (which is what the underlying SPI controller
268 * driver does to pass those messages). These protocols are defined in the
269 * specification for the device(s) supported by the driver.
271 * As a rule, those device protocols represent the lowest level interface
272 * supported by a driver, and it will support upper level interfaces too.
273 * Examples of such upper levels include frameworks like MTD, networking,
274 * MMC, RTC, filesystem character device nodes, and hardware monitoring.
277 const struct spi_device_id *id_table;
278 int (*probe)(struct spi_device *spi);
279 int (*remove)(struct spi_device *spi);
280 void (*shutdown)(struct spi_device *spi);
281 struct device_driver driver;
284 static inline struct spi_driver *to_spi_driver(struct device_driver *drv)
286 return drv ? container_of(drv, struct spi_driver, driver) : NULL;
289 extern int __spi_register_driver(struct module *owner, struct spi_driver *sdrv);
292 * spi_unregister_driver - reverse effect of spi_register_driver
293 * @sdrv: the driver to unregister
296 static inline void spi_unregister_driver(struct spi_driver *sdrv)
299 driver_unregister(&sdrv->driver);
302 extern struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 chip_select);
304 /* use a define to avoid include chaining to get THIS_MODULE */
305 #define spi_register_driver(driver) \
306 __spi_register_driver(THIS_MODULE, driver)
309 * module_spi_driver() - Helper macro for registering a SPI driver
310 * @__spi_driver: spi_driver struct
312 * Helper macro for SPI drivers which do not do anything special in module
313 * init/exit. This eliminates a lot of boilerplate. Each module may only
314 * use this macro once, and calling it replaces module_init() and module_exit()
316 #define module_spi_driver(__spi_driver) \
317 module_driver(__spi_driver, spi_register_driver, \
318 spi_unregister_driver)
321 * struct spi_controller - interface to SPI master or slave controller
322 * @dev: device interface to this driver
323 * @list: link with the global spi_controller list
324 * @bus_num: board-specific (and often SOC-specific) identifier for a
325 * given SPI controller.
326 * @num_chipselect: chipselects are used to distinguish individual
327 * SPI slaves, and are numbered from zero to num_chipselects.
328 * each slave has a chipselect signal, but it's common that not
329 * every chipselect is connected to a slave.
330 * @dma_alignment: SPI controller constraint on DMA buffers alignment.
331 * @mode_bits: flags understood by this controller driver
332 * @buswidth_override_bits: flags to override for this controller driver
333 * @bits_per_word_mask: A mask indicating which values of bits_per_word are
334 * supported by the driver. Bit n indicates that a bits_per_word n+1 is
335 * supported. If set, the SPI core will reject any transfer with an
336 * unsupported bits_per_word. If not set, this value is simply ignored,
337 * and it's up to the individual driver to perform any validation.
338 * @min_speed_hz: Lowest supported transfer speed
339 * @max_speed_hz: Highest supported transfer speed
340 * @flags: other constraints relevant to this driver
341 * @slave: indicates that this is an SPI slave controller
342 * @max_transfer_size: function that returns the max transfer size for
343 * a &spi_device; may be %NULL, so the default %SIZE_MAX will be used.
344 * @max_message_size: function that returns the max message size for
345 * a &spi_device; may be %NULL, so the default %SIZE_MAX will be used.
346 * @io_mutex: mutex for physical bus access
347 * @bus_lock_spinlock: spinlock for SPI bus locking
348 * @bus_lock_mutex: mutex for exclusion of multiple callers
349 * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use
350 * @setup: updates the device mode and clocking records used by a
351 * device's SPI controller; protocol code may call this. This
352 * must fail if an unrecognized or unsupported mode is requested.
353 * It's always safe to call this unless transfers are pending on
354 * the device whose settings are being modified.
355 * @set_cs_timing: optional hook for SPI devices to request SPI master
356 * controller for configuring specific CS setup time, hold time and inactive
357 * delay interms of clock counts
358 * @transfer: adds a message to the controller's transfer queue.
359 * @cleanup: frees controller-specific state
360 * @can_dma: determine whether this controller supports DMA
361 * @queued: whether this controller is providing an internal message queue
362 * @kworker: pointer to thread struct for message pump
363 * @pump_messages: work struct for scheduling work to the message pump
364 * @queue_lock: spinlock to syncronise access to message queue
365 * @queue: message queue
366 * @idling: the device is entering idle state
367 * @cur_msg: the currently in-flight message
368 * @cur_msg_prepared: spi_prepare_message was called for the currently
370 * @cur_msg_mapped: message has been mapped for DMA
371 * @last_cs_enable: was enable true on the last call to set_cs.
372 * @last_cs_mode_high: was (mode & SPI_CS_HIGH) true on the last call to set_cs.
373 * @xfer_completion: used by core transfer_one_message()
374 * @busy: message pump is busy
375 * @running: message pump is running
376 * @rt: whether this queue is set to run as a realtime task
377 * @auto_runtime_pm: the core should ensure a runtime PM reference is held
378 * while the hardware is prepared, using the parent
379 * device for the spidev
380 * @max_dma_len: Maximum length of a DMA transfer for the device.
381 * @prepare_transfer_hardware: a message will soon arrive from the queue
382 * so the subsystem requests the driver to prepare the transfer hardware
383 * by issuing this call
384 * @transfer_one_message: the subsystem calls the driver to transfer a single
385 * message while queuing transfers that arrive in the meantime. When the
386 * driver is finished with this message, it must call
387 * spi_finalize_current_message() so the subsystem can issue the next
389 * @unprepare_transfer_hardware: there are currently no more messages on the
390 * queue so the subsystem notifies the driver that it may relax the
391 * hardware by issuing this call
393 * @set_cs: set the logic level of the chip select line. May be called
394 * from interrupt context.
395 * @prepare_message: set up the controller to transfer a single message,
396 * for example doing DMA mapping. Called from threaded
398 * @transfer_one: transfer a single spi_transfer.
400 * - return 0 if the transfer is finished,
401 * - return 1 if the transfer is still in progress. When
402 * the driver is finished with this transfer it must
403 * call spi_finalize_current_transfer() so the subsystem
404 * can issue the next transfer. Note: transfer_one and
405 * transfer_one_message are mutually exclusive; when both
406 * are set, the generic subsystem does not call your
407 * transfer_one callback.
408 * @handle_err: the subsystem calls the driver to handle an error that occurs
409 * in the generic implementation of transfer_one_message().
410 * @mem_ops: optimized/dedicated operations for interactions with SPI memory.
411 * This field is optional and should only be implemented if the
412 * controller has native support for memory like operations.
413 * @unprepare_message: undo any work done by prepare_message().
414 * @slave_abort: abort the ongoing transfer request on an SPI slave controller
415 * @cs_setup: delay to be introduced by the controller after CS is asserted
416 * @cs_hold: delay to be introduced by the controller before CS is deasserted
417 * @cs_inactive: delay to be introduced by the controller after CS is
418 * deasserted. If @cs_change_delay is used from @spi_transfer, then the
419 * two delays will be added up.
420 * @cs_gpios: LEGACY: array of GPIO descs to use as chip select lines; one per
421 * CS number. Any individual value may be -ENOENT for CS lines that
422 * are not GPIOs (driven by the SPI controller itself). Use the cs_gpiods
424 * @cs_gpiods: Array of GPIO descs to use as chip select lines; one per CS
425 * number. Any individual value may be NULL for CS lines that
426 * are not GPIOs (driven by the SPI controller itself).
427 * @use_gpio_descriptors: Turns on the code in the SPI core to parse and grab
428 * GPIO descriptors rather than using global GPIO numbers grabbed by the
429 * driver. This will fill in @cs_gpiods and @cs_gpios should not be used,
430 * and SPI devices will have the cs_gpiod assigned rather than cs_gpio.
431 * @unused_native_cs: When cs_gpiods is used, spi_register_controller() will
432 * fill in this field with the first unused native CS, to be used by SPI
433 * controller drivers that need to drive a native CS when using GPIO CS.
434 * @max_native_cs: When cs_gpiods is used, and this field is filled in,
435 * spi_register_controller() will validate all native CS (including the
436 * unused native CS) against this value.
437 * @statistics: statistics for the spi_controller
438 * @dma_tx: DMA transmit channel
439 * @dma_rx: DMA receive channel
440 * @dummy_rx: dummy receive buffer for full-duplex devices
441 * @dummy_tx: dummy transmit buffer for full-duplex devices
442 * @fw_translate_cs: If the boot firmware uses different numbering scheme
443 * what Linux expects, this optional hook can be used to translate
445 * @ptp_sts_supported: If the driver sets this to true, it must provide a
446 * time snapshot in @spi_transfer->ptp_sts as close as possible to the
447 * moment in time when @spi_transfer->ptp_sts_word_pre and
448 * @spi_transfer->ptp_sts_word_post were transmitted.
449 * If the driver does not set this, the SPI core takes the snapshot as
450 * close to the driver hand-over as possible.
451 * @irq_flags: Interrupt enable state during PTP system timestamping
452 * @fallback: fallback to pio if dma transfer return failure with
453 * SPI_TRANS_FAIL_NO_START.
455 * Each SPI controller can communicate with one or more @spi_device
456 * children. These make a small bus, sharing MOSI, MISO and SCK signals
457 * but not chip select signals. Each device may be configured to use a
458 * different clock rate, since those shared signals are ignored unless
459 * the chip is selected.
461 * The driver for an SPI controller manages access to those devices through
462 * a queue of spi_message transactions, copying data between CPU memory and
463 * an SPI slave device. For each such message it queues, it calls the
464 * message's completion function when the transaction completes.
466 struct spi_controller {
469 struct list_head list;
471 /* other than negative (== assign one dynamically), bus_num is fully
472 * board-specific. usually that simplifies to being SOC-specific.
473 * example: one SOC has three SPI controllers, numbered 0..2,
474 * and one board's schematics might show it using SPI-2. software
475 * would normally use bus_num=2 for that controller.
479 /* chipselects will be integral to many controllers; some others
480 * might use board-specific GPIOs.
484 /* some SPI controllers pose alignment requirements on DMAable
485 * buffers; let protocol drivers know about these requirements.
489 /* spi_device.mode flags understood by this controller driver */
492 /* spi_device.mode flags override flags for this controller */
493 u32 buswidth_override_bits;
495 /* bitmask of supported bits_per_word for transfers */
496 u32 bits_per_word_mask;
497 #define SPI_BPW_MASK(bits) BIT((bits) - 1)
498 #define SPI_BPW_RANGE_MASK(min, max) GENMASK((max) - 1, (min) - 1)
500 /* limits on transfer speed */
504 /* other constraints relevant to this driver */
506 #define SPI_CONTROLLER_HALF_DUPLEX BIT(0) /* can't do full duplex */
507 #define SPI_CONTROLLER_NO_RX BIT(1) /* can't do buffer read */
508 #define SPI_CONTROLLER_NO_TX BIT(2) /* can't do buffer write */
509 #define SPI_CONTROLLER_MUST_RX BIT(3) /* requires rx */
510 #define SPI_CONTROLLER_MUST_TX BIT(4) /* requires tx */
512 #define SPI_MASTER_GPIO_SS BIT(5) /* GPIO CS must select slave */
514 /* flag indicating this is a non-devres managed controller */
517 /* flag indicating this is an SPI slave controller */
521 * on some hardware transfer / message size may be constrained
522 * the limit may depend on device transfer settings
524 size_t (*max_transfer_size)(struct spi_device *spi);
525 size_t (*max_message_size)(struct spi_device *spi);
528 struct mutex io_mutex;
530 /* lock and mutex for SPI bus locking */
531 spinlock_t bus_lock_spinlock;
532 struct mutex bus_lock_mutex;
534 /* flag indicating that the SPI bus is locked for exclusive use */
537 /* Setup mode and clock, etc (spi driver may call many times).
539 * IMPORTANT: this may be called when transfers to another
540 * device are active. DO NOT UPDATE SHARED REGISTERS in ways
541 * which could break those transfers.
543 int (*setup)(struct spi_device *spi);
546 * set_cs_timing() method is for SPI controllers that supports
547 * configuring CS timing.
549 * This hook allows SPI client drivers to request SPI controllers
550 * to configure specific CS timing through spi_set_cs_timing() after
553 int (*set_cs_timing)(struct spi_device *spi, struct spi_delay *setup,
554 struct spi_delay *hold, struct spi_delay *inactive);
556 /* bidirectional bulk transfers
558 * + The transfer() method may not sleep; its main role is
559 * just to add the message to the queue.
560 * + For now there's no remove-from-queue operation, or
561 * any other request management
562 * + To a given spi_device, message queueing is pure fifo
564 * + The controller's main job is to process its message queue,
565 * selecting a chip (for masters), then transferring data
566 * + If there are multiple spi_device children, the i/o queue
567 * arbitration algorithm is unspecified (round robin, fifo,
568 * priority, reservations, preemption, etc)
570 * + Chipselect stays active during the entire message
571 * (unless modified by spi_transfer.cs_change != 0).
572 * + The message transfers use clock and SPI mode parameters
573 * previously established by setup() for this device
575 int (*transfer)(struct spi_device *spi,
576 struct spi_message *mesg);
578 /* called on release() to free memory provided by spi_controller */
579 void (*cleanup)(struct spi_device *spi);
582 * Used to enable core support for DMA handling, if can_dma()
583 * exists and returns true then the transfer will be mapped
584 * prior to transfer_one() being called. The driver should
585 * not modify or store xfer and dma_tx and dma_rx must be set
586 * while the device is prepared.
588 bool (*can_dma)(struct spi_controller *ctlr,
589 struct spi_device *spi,
590 struct spi_transfer *xfer);
591 struct device *dma_map_dev;
594 * These hooks are for drivers that want to use the generic
595 * controller transfer queueing mechanism. If these are used, the
596 * transfer() function above must NOT be specified by the driver.
597 * Over time we expect SPI drivers to be phased over to this API.
600 struct kthread_worker *kworker;
601 struct kthread_work pump_messages;
602 spinlock_t queue_lock;
603 struct list_head queue;
604 struct spi_message *cur_msg;
609 bool auto_runtime_pm;
610 bool cur_msg_prepared;
613 bool last_cs_mode_high;
615 struct completion xfer_completion;
618 int (*prepare_transfer_hardware)(struct spi_controller *ctlr);
619 int (*transfer_one_message)(struct spi_controller *ctlr,
620 struct spi_message *mesg);
621 int (*unprepare_transfer_hardware)(struct spi_controller *ctlr);
622 int (*prepare_message)(struct spi_controller *ctlr,
623 struct spi_message *message);
624 int (*unprepare_message)(struct spi_controller *ctlr,
625 struct spi_message *message);
626 int (*slave_abort)(struct spi_controller *ctlr);
629 * These hooks are for drivers that use a generic implementation
630 * of transfer_one_message() provided by the core.
632 void (*set_cs)(struct spi_device *spi, bool enable);
633 int (*transfer_one)(struct spi_controller *ctlr, struct spi_device *spi,
634 struct spi_transfer *transfer);
635 void (*handle_err)(struct spi_controller *ctlr,
636 struct spi_message *message);
638 /* Optimized handlers for SPI memory-like operations. */
639 const struct spi_controller_mem_ops *mem_ops;
642 struct spi_delay cs_setup;
643 struct spi_delay cs_hold;
644 struct spi_delay cs_inactive;
646 /* gpio chip select */
648 struct gpio_desc **cs_gpiods;
649 bool use_gpio_descriptors;
654 struct spi_statistics statistics;
656 /* DMA channels for use with core dmaengine helpers */
657 struct dma_chan *dma_tx;
658 struct dma_chan *dma_rx;
660 /* dummy data for full duplex devices */
664 int (*fw_translate_cs)(struct spi_controller *ctlr, unsigned cs);
667 * Driver sets this field to indicate it is able to snapshot SPI
668 * transfers (needed e.g. for reading the time of POSIX clocks)
670 bool ptp_sts_supported;
672 /* Interrupt enable state during PTP system timestamping */
673 unsigned long irq_flags;
676 static inline void *spi_controller_get_devdata(struct spi_controller *ctlr)
678 return dev_get_drvdata(&ctlr->dev);
681 static inline void spi_controller_set_devdata(struct spi_controller *ctlr,
684 dev_set_drvdata(&ctlr->dev, data);
687 static inline struct spi_controller *spi_controller_get(struct spi_controller *ctlr)
689 if (!ctlr || !get_device(&ctlr->dev))
694 static inline void spi_controller_put(struct spi_controller *ctlr)
697 put_device(&ctlr->dev);
700 static inline bool spi_controller_is_slave(struct spi_controller *ctlr)
702 return IS_ENABLED(CONFIG_SPI_SLAVE) && ctlr->slave;
705 /* PM calls that need to be issued by the driver */
706 extern int spi_controller_suspend(struct spi_controller *ctlr);
707 extern int spi_controller_resume(struct spi_controller *ctlr);
709 /* Calls the driver make to interact with the message queue */
710 extern struct spi_message *spi_get_next_queued_message(struct spi_controller *ctlr);
711 extern void spi_finalize_current_message(struct spi_controller *ctlr);
712 extern void spi_finalize_current_transfer(struct spi_controller *ctlr);
714 /* Helper calls for driver to timestamp transfer */
715 void spi_take_timestamp_pre(struct spi_controller *ctlr,
716 struct spi_transfer *xfer,
717 size_t progress, bool irqs_off);
718 void spi_take_timestamp_post(struct spi_controller *ctlr,
719 struct spi_transfer *xfer,
720 size_t progress, bool irqs_off);
722 /* the spi driver core manages memory for the spi_controller classdev */
723 extern struct spi_controller *__spi_alloc_controller(struct device *host,
724 unsigned int size, bool slave);
726 static inline struct spi_controller *spi_alloc_master(struct device *host,
729 return __spi_alloc_controller(host, size, false);
732 static inline struct spi_controller *spi_alloc_slave(struct device *host,
735 if (!IS_ENABLED(CONFIG_SPI_SLAVE))
738 return __spi_alloc_controller(host, size, true);
741 struct spi_controller *__devm_spi_alloc_controller(struct device *dev,
745 static inline struct spi_controller *devm_spi_alloc_master(struct device *dev,
748 return __devm_spi_alloc_controller(dev, size, false);
751 static inline struct spi_controller *devm_spi_alloc_slave(struct device *dev,
754 if (!IS_ENABLED(CONFIG_SPI_SLAVE))
757 return __devm_spi_alloc_controller(dev, size, true);
760 extern int spi_register_controller(struct spi_controller *ctlr);
761 extern int devm_spi_register_controller(struct device *dev,
762 struct spi_controller *ctlr);
763 extern void spi_unregister_controller(struct spi_controller *ctlr);
765 extern struct spi_controller *spi_busnum_to_master(u16 busnum);
768 * SPI resource management while processing a SPI message
771 typedef void (*spi_res_release_t)(struct spi_controller *ctlr,
772 struct spi_message *msg,
776 * struct spi_res - spi resource management structure
778 * @release: release code called prior to freeing this resource
779 * @data: extra data allocated for the specific use-case
781 * this is based on ideas from devres, but focused on life-cycle
782 * management during spi_message processing
785 struct list_head entry;
786 spi_res_release_t release;
787 unsigned long long data[]; /* guarantee ull alignment */
790 extern void *spi_res_alloc(struct spi_device *spi,
791 spi_res_release_t release,
792 size_t size, gfp_t gfp);
793 extern void spi_res_add(struct spi_message *message, void *res);
794 extern void spi_res_free(void *res);
796 extern void spi_res_release(struct spi_controller *ctlr,
797 struct spi_message *message);
799 /*---------------------------------------------------------------------------*/
802 * I/O INTERFACE between SPI controller and protocol drivers
804 * Protocol drivers use a queue of spi_messages, each transferring data
805 * between the controller and memory buffers.
807 * The spi_messages themselves consist of a series of read+write transfer
808 * segments. Those segments always read the same number of bits as they
809 * write; but one or the other is easily ignored by passing a null buffer
810 * pointer. (This is unlike most types of I/O API, because SPI hardware
813 * NOTE: Allocation of spi_transfer and spi_message memory is entirely
814 * up to the protocol driver, which guarantees the integrity of both (as
815 * well as the data buffers) for as long as the message is queued.
819 * struct spi_transfer - a read/write buffer pair
820 * @tx_buf: data to be written (dma-safe memory), or NULL
821 * @rx_buf: data to be read (dma-safe memory), or NULL
822 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped
823 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped
824 * @tx_nbits: number of bits used for writing. If 0 the default
825 * (SPI_NBITS_SINGLE) is used.
826 * @rx_nbits: number of bits used for reading. If 0 the default
827 * (SPI_NBITS_SINGLE) is used.
828 * @len: size of rx and tx buffers (in bytes)
829 * @speed_hz: Select a speed other than the device default for this
830 * transfer. If 0 the default (from @spi_device) is used.
831 * @bits_per_word: select a bits_per_word other than the device default
832 * for this transfer. If 0 the default (from @spi_device) is used.
833 * @dummy_data: indicates transfer is dummy bytes transfer.
834 * @cs_change: affects chipselect after this transfer completes
835 * @cs_change_delay: delay between cs deassert and assert when
836 * @cs_change is set and @spi_transfer is not the last in @spi_message
837 * @delay: delay to be introduced after this transfer before
838 * (optionally) changing the chipselect status, then starting
839 * the next transfer or completing this @spi_message.
840 * @word_delay: inter word delay to be introduced after each word size
841 * (set by bits_per_word) transmission.
842 * @effective_speed_hz: the effective SCK-speed that was used to
843 * transfer this transfer. Set to 0 if the spi bus driver does
845 * @transfer_list: transfers are sequenced through @spi_message.transfers
846 * @tx_sg: Scatterlist for transmit, currently not for client use
847 * @rx_sg: Scatterlist for receive, currently not for client use
848 * @ptp_sts_word_pre: The word (subject to bits_per_word semantics) offset
849 * within @tx_buf for which the SPI device is requesting that the time
850 * snapshot for this transfer begins. Upon completing the SPI transfer,
851 * this value may have changed compared to what was requested, depending
852 * on the available snapshotting resolution (DMA transfer,
853 * @ptp_sts_supported is false, etc).
854 * @ptp_sts_word_post: See @ptp_sts_word_post. The two can be equal (meaning
855 * that a single byte should be snapshotted).
856 * If the core takes care of the timestamp (if @ptp_sts_supported is false
857 * for this controller), it will set @ptp_sts_word_pre to 0, and
858 * @ptp_sts_word_post to the length of the transfer. This is done
859 * purposefully (instead of setting to spi_transfer->len - 1) to denote
860 * that a transfer-level snapshot taken from within the driver may still
861 * be of higher quality.
862 * @ptp_sts: Pointer to a memory location held by the SPI slave device where a
863 * PTP system timestamp structure may lie. If drivers use PIO or their
864 * hardware has some sort of assist for retrieving exact transfer timing,
865 * they can (and should) assert @ptp_sts_supported and populate this
866 * structure using the ptp_read_system_*ts helper functions.
867 * The timestamp must represent the time at which the SPI slave device has
868 * processed the word, i.e. the "pre" timestamp should be taken before
869 * transmitting the "pre" word, and the "post" timestamp after receiving
870 * transmit confirmation from the controller for the "post" word.
871 * @timestamped: true if the transfer has been timestamped
872 * @error: Error status logged by spi controller driver.
874 * SPI transfers always write the same number of bytes as they read.
875 * Protocol drivers should always provide @rx_buf and/or @tx_buf.
876 * In some cases, they may also want to provide DMA addresses for
877 * the data being transferred; that may reduce overhead, when the
878 * underlying driver uses dma.
880 * If the transmit buffer is null, zeroes will be shifted out
881 * while filling @rx_buf. If the receive buffer is null, the data
882 * shifted in will be discarded. Only "len" bytes shift out (or in).
883 * It's an error to try to shift out a partial word. (For example, by
884 * shifting out three bytes with word size of sixteen or twenty bits;
885 * the former uses two bytes per word, the latter uses four bytes.)
887 * In-memory data values are always in native CPU byte order, translated
888 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So
889 * for example when bits_per_word is sixteen, buffers are 2N bytes long
890 * (@len = 2N) and hold N sixteen bit words in CPU byte order.
892 * When the word size of the SPI transfer is not a power-of-two multiple
893 * of eight bits, those in-memory words include extra bits. In-memory
894 * words are always seen by protocol drivers as right-justified, so the
895 * undefined (rx) or unused (tx) bits are always the most significant bits.
897 * All SPI transfers start with the relevant chipselect active. Normally
898 * it stays selected until after the last transfer in a message. Drivers
899 * can affect the chipselect signal using cs_change.
901 * (i) If the transfer isn't the last one in the message, this flag is
902 * used to make the chipselect briefly go inactive in the middle of the
903 * message. Toggling chipselect in this way may be needed to terminate
904 * a chip command, letting a single spi_message perform all of group of
905 * chip transactions together.
907 * (ii) When the transfer is the last one in the message, the chip may
908 * stay selected until the next transfer. On multi-device SPI busses
909 * with nothing blocking messages going to other devices, this is just
910 * a performance hint; starting a message to another device deselects
911 * this one. But in other cases, this can be used to ensure correctness.
912 * Some devices need protocol transactions to be built from a series of
913 * spi_message submissions, where the content of one message is determined
914 * by the results of previous messages and where the whole transaction
915 * ends when the chipselect goes intactive.
917 * When SPI can transfer in 1x,2x or 4x. It can get this transfer information
918 * from device through @tx_nbits and @rx_nbits. In Bi-direction, these
919 * two should both be set. User can set transfer mode with SPI_NBITS_SINGLE(1x)
920 * SPI_NBITS_DUAL(2x) and SPI_NBITS_QUAD(4x) to support these three transfer.
922 * The code that submits an spi_message (and its spi_transfers)
923 * to the lower layers is responsible for managing its memory.
924 * Zero-initialize every field you don't set up explicitly, to
925 * insulate against future API updates. After you submit a message
926 * and its transfers, ignore them until its completion callback.
928 struct spi_transfer {
929 /* it's ok if tx_buf == rx_buf (right?)
930 * for MicroWire, one buffer must be null
931 * buffers must work with dma_*map_single() calls, unless
932 * spi_message.is_dma_mapped reports a pre-existing mapping
940 struct sg_table tx_sg;
941 struct sg_table rx_sg;
943 unsigned dummy_data:1;
944 unsigned cs_change:1;
947 #define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */
948 #define SPI_NBITS_DUAL 0x02 /* 2bits transfer */
949 #define SPI_NBITS_QUAD 0x04 /* 4bits transfer */
951 struct spi_delay delay;
952 struct spi_delay cs_change_delay;
953 struct spi_delay word_delay;
956 u32 effective_speed_hz;
958 unsigned int ptp_sts_word_pre;
959 unsigned int ptp_sts_word_post;
961 struct ptp_system_timestamp *ptp_sts;
965 struct list_head transfer_list;
967 #define SPI_TRANS_FAIL_NO_START BIT(0)
972 * struct spi_message - one multi-segment SPI transaction
973 * @transfers: list of transfer segments in this transaction
974 * @spi: SPI device to which the transaction is queued
975 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual
976 * addresses for each transfer buffer
977 * @complete: called to report transaction completions
978 * @context: the argument to complete() when it's called
979 * @frame_length: the total number of bytes in the message
980 * @actual_length: the total number of bytes that were transferred in all
981 * successful segments
982 * @status: zero for success, else negative errno
983 * @queue: for use by whichever driver currently owns the message
984 * @state: for use by whichever driver currently owns the message
985 * @resources: for resource management when the spi message is processed
987 * A @spi_message is used to execute an atomic sequence of data transfers,
988 * each represented by a struct spi_transfer. The sequence is "atomic"
989 * in the sense that no other spi_message may use that SPI bus until that
990 * sequence completes. On some systems, many such sequences can execute as
991 * a single programmed DMA transfer. On all systems, these messages are
992 * queued, and might complete after transactions to other devices. Messages
993 * sent to a given spi_device are always executed in FIFO order.
995 * The code that submits an spi_message (and its spi_transfers)
996 * to the lower layers is responsible for managing its memory.
997 * Zero-initialize every field you don't set up explicitly, to
998 * insulate against future API updates. After you submit a message
999 * and its transfers, ignore them until its completion callback.
1001 struct spi_message {
1002 struct list_head transfers;
1004 struct spi_device *spi;
1006 unsigned is_dma_mapped:1;
1008 /* REVISIT: we might want a flag affecting the behavior of the
1009 * last transfer ... allowing things like "read 16 bit length L"
1010 * immediately followed by "read L bytes". Basically imposing
1011 * a specific message scheduling algorithm.
1013 * Some controller drivers (message-at-a-time queue processing)
1014 * could provide that as their default scheduling algorithm. But
1015 * others (with multi-message pipelines) could need a flag to
1016 * tell them about such special cases.
1019 /* completion is reported through a callback */
1020 void (*complete)(void *context);
1022 unsigned frame_length;
1023 unsigned actual_length;
1026 /* for optional use by whatever driver currently owns the
1027 * spi_message ... between calls to spi_async and then later
1028 * complete(), that's the spi_controller controller driver.
1030 struct list_head queue;
1033 /* list of spi_res reources when the spi message is processed */
1034 struct list_head resources;
1037 static inline void spi_message_init_no_memset(struct spi_message *m)
1039 INIT_LIST_HEAD(&m->transfers);
1040 INIT_LIST_HEAD(&m->resources);
1043 static inline void spi_message_init(struct spi_message *m)
1045 memset(m, 0, sizeof *m);
1046 spi_message_init_no_memset(m);
1050 spi_message_add_tail(struct spi_transfer *t, struct spi_message *m)
1052 list_add_tail(&t->transfer_list, &m->transfers);
1056 spi_transfer_del(struct spi_transfer *t)
1058 list_del(&t->transfer_list);
1062 spi_transfer_delay_exec(struct spi_transfer *t)
1064 return spi_delay_exec(&t->delay, t);
1068 * spi_message_init_with_transfers - Initialize spi_message and append transfers
1069 * @m: spi_message to be initialized
1070 * @xfers: An array of spi transfers
1071 * @num_xfers: Number of items in the xfer array
1073 * This function initializes the given spi_message and adds each spi_transfer in
1074 * the given array to the message.
1077 spi_message_init_with_transfers(struct spi_message *m,
1078 struct spi_transfer *xfers, unsigned int num_xfers)
1082 spi_message_init(m);
1083 for (i = 0; i < num_xfers; ++i)
1084 spi_message_add_tail(&xfers[i], m);
1087 /* It's fine to embed message and transaction structures in other data
1088 * structures so long as you don't free them while they're in use.
1091 static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags)
1093 struct spi_message *m;
1095 m = kzalloc(sizeof(struct spi_message)
1096 + ntrans * sizeof(struct spi_transfer),
1100 struct spi_transfer *t = (struct spi_transfer *)(m + 1);
1102 spi_message_init_no_memset(m);
1103 for (i = 0; i < ntrans; i++, t++)
1104 spi_message_add_tail(t, m);
1109 static inline void spi_message_free(struct spi_message *m)
1114 extern int spi_setup(struct spi_device *spi);
1115 extern int spi_async(struct spi_device *spi, struct spi_message *message);
1116 extern int spi_async_locked(struct spi_device *spi,
1117 struct spi_message *message);
1118 extern int spi_slave_abort(struct spi_device *spi);
1120 static inline size_t
1121 spi_max_message_size(struct spi_device *spi)
1123 struct spi_controller *ctlr = spi->controller;
1125 if (!ctlr->max_message_size)
1127 return ctlr->max_message_size(spi);
1130 static inline size_t
1131 spi_max_transfer_size(struct spi_device *spi)
1133 struct spi_controller *ctlr = spi->controller;
1134 size_t tr_max = SIZE_MAX;
1135 size_t msg_max = spi_max_message_size(spi);
1137 if (ctlr->max_transfer_size)
1138 tr_max = ctlr->max_transfer_size(spi);
1140 /* transfer size limit must not be greater than messsage size limit */
1141 return min(tr_max, msg_max);
1145 * spi_is_bpw_supported - Check if bits per word is supported
1147 * @bpw: Bits per word
1149 * This function checks to see if the SPI controller supports @bpw.
1152 * True if @bpw is supported, false otherwise.
1154 static inline bool spi_is_bpw_supported(struct spi_device *spi, u32 bpw)
1156 u32 bpw_mask = spi->master->bits_per_word_mask;
1158 if (bpw == 8 || (bpw <= 32 && bpw_mask & SPI_BPW_MASK(bpw)))
1164 /*---------------------------------------------------------------------------*/
1166 /* SPI transfer replacement methods which make use of spi_res */
1168 struct spi_replaced_transfers;
1169 typedef void (*spi_replaced_release_t)(struct spi_controller *ctlr,
1170 struct spi_message *msg,
1171 struct spi_replaced_transfers *res);
1173 * struct spi_replaced_transfers - structure describing the spi_transfer
1174 * replacements that have occurred
1175 * so that they can get reverted
1176 * @release: some extra release code to get executed prior to
1177 * relasing this structure
1178 * @extradata: pointer to some extra data if requested or NULL
1179 * @replaced_transfers: transfers that have been replaced and which need
1181 * @replaced_after: the transfer after which the @replaced_transfers
1182 * are to get re-inserted
1183 * @inserted: number of transfers inserted
1184 * @inserted_transfers: array of spi_transfers of array-size @inserted,
1185 * that have been replacing replaced_transfers
1187 * note: that @extradata will point to @inserted_transfers[@inserted]
1188 * if some extra allocation is requested, so alignment will be the same
1189 * as for spi_transfers
1191 struct spi_replaced_transfers {
1192 spi_replaced_release_t release;
1194 struct list_head replaced_transfers;
1195 struct list_head *replaced_after;
1197 struct spi_transfer inserted_transfers[];
1200 extern struct spi_replaced_transfers *spi_replace_transfers(
1201 struct spi_message *msg,
1202 struct spi_transfer *xfer_first,
1205 spi_replaced_release_t release,
1206 size_t extradatasize,
1209 /*---------------------------------------------------------------------------*/
1211 /* SPI transfer transformation methods */
1213 extern int spi_split_transfers_maxsize(struct spi_controller *ctlr,
1214 struct spi_message *msg,
1218 /*---------------------------------------------------------------------------*/
1220 /* All these synchronous SPI transfer routines are utilities layered
1221 * over the core async transfer primitive. Here, "synchronous" means
1222 * they will sleep uninterruptibly until the async transfer completes.
1225 extern int spi_sync(struct spi_device *spi, struct spi_message *message);
1226 extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message);
1227 extern int spi_bus_lock(struct spi_controller *ctlr);
1228 extern int spi_bus_unlock(struct spi_controller *ctlr);
1231 * spi_sync_transfer - synchronous SPI data transfer
1232 * @spi: device with which data will be exchanged
1233 * @xfers: An array of spi_transfers
1234 * @num_xfers: Number of items in the xfer array
1235 * Context: can sleep
1237 * Does a synchronous SPI data transfer of the given spi_transfer array.
1239 * For more specific semantics see spi_sync().
1241 * Return: zero on success, else a negative error code.
1244 spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers,
1245 unsigned int num_xfers)
1247 struct spi_message msg;
1249 spi_message_init_with_transfers(&msg, xfers, num_xfers);
1251 return spi_sync(spi, &msg);
1255 * spi_write - SPI synchronous write
1256 * @spi: device to which data will be written
1258 * @len: data buffer size
1259 * Context: can sleep
1261 * This function writes the buffer @buf.
1262 * Callable only from contexts that can sleep.
1264 * Return: zero on success, else a negative error code.
1267 spi_write(struct spi_device *spi, const void *buf, size_t len)
1269 struct spi_transfer t = {
1274 return spi_sync_transfer(spi, &t, 1);
1278 * spi_read - SPI synchronous read
1279 * @spi: device from which data will be read
1281 * @len: data buffer size
1282 * Context: can sleep
1284 * This function reads the buffer @buf.
1285 * Callable only from contexts that can sleep.
1287 * Return: zero on success, else a negative error code.
1290 spi_read(struct spi_device *spi, void *buf, size_t len)
1292 struct spi_transfer t = {
1297 return spi_sync_transfer(spi, &t, 1);
1300 /* this copies txbuf and rxbuf data; for small transfers only! */
1301 extern int spi_write_then_read(struct spi_device *spi,
1302 const void *txbuf, unsigned n_tx,
1303 void *rxbuf, unsigned n_rx);
1306 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
1307 * @spi: device with which data will be exchanged
1308 * @cmd: command to be written before data is read back
1309 * Context: can sleep
1311 * Callable only from contexts that can sleep.
1313 * Return: the (unsigned) eight bit number returned by the
1314 * device, or else a negative error code.
1316 static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd)
1321 status = spi_write_then_read(spi, &cmd, 1, &result, 1);
1323 /* return negative errno or unsigned value */
1324 return (status < 0) ? status : result;
1328 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
1329 * @spi: device with which data will be exchanged
1330 * @cmd: command to be written before data is read back
1331 * Context: can sleep
1333 * The number is returned in wire-order, which is at least sometimes
1336 * Callable only from contexts that can sleep.
1338 * Return: the (unsigned) sixteen bit number returned by the
1339 * device, or else a negative error code.
1341 static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd)
1346 status = spi_write_then_read(spi, &cmd, 1, &result, 2);
1348 /* return negative errno or unsigned value */
1349 return (status < 0) ? status : result;
1353 * spi_w8r16be - SPI synchronous 8 bit write followed by 16 bit big-endian read
1354 * @spi: device with which data will be exchanged
1355 * @cmd: command to be written before data is read back
1356 * Context: can sleep
1358 * This function is similar to spi_w8r16, with the exception that it will
1359 * convert the read 16 bit data word from big-endian to native endianness.
1361 * Callable only from contexts that can sleep.
1363 * Return: the (unsigned) sixteen bit number returned by the device in cpu
1364 * endianness, or else a negative error code.
1366 static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd)
1372 status = spi_write_then_read(spi, &cmd, 1, &result, 2);
1376 return be16_to_cpu(result);
1379 /*---------------------------------------------------------------------------*/
1382 * INTERFACE between board init code and SPI infrastructure.
1384 * No SPI driver ever sees these SPI device table segments, but
1385 * it's how the SPI core (or adapters that get hotplugged) grows
1386 * the driver model tree.
1388 * As a rule, SPI devices can't be probed. Instead, board init code
1389 * provides a table listing the devices which are present, with enough
1390 * information to bind and set up the device's driver. There's basic
1391 * support for nonstatic configurations too; enough to handle adding
1392 * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
1396 * struct spi_board_info - board-specific template for a SPI device
1397 * @modalias: Initializes spi_device.modalias; identifies the driver.
1398 * @platform_data: Initializes spi_device.platform_data; the particular
1399 * data stored there is driver-specific.
1400 * @swnode: Software node for the device.
1401 * @controller_data: Initializes spi_device.controller_data; some
1402 * controllers need hints about hardware setup, e.g. for DMA.
1403 * @irq: Initializes spi_device.irq; depends on how the board is wired.
1404 * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits
1405 * from the chip datasheet and board-specific signal quality issues.
1406 * @bus_num: Identifies which spi_controller parents the spi_device; unused
1407 * by spi_new_device(), and otherwise depends on board wiring.
1408 * @chip_select: Initializes spi_device.chip_select; depends on how
1409 * the board is wired.
1410 * @mode: Initializes spi_device.mode; based on the chip datasheet, board
1411 * wiring (some devices support both 3WIRE and standard modes), and
1412 * possibly presence of an inverter in the chipselect path.
1414 * When adding new SPI devices to the device tree, these structures serve
1415 * as a partial device template. They hold information which can't always
1416 * be determined by drivers. Information that probe() can establish (such
1417 * as the default transfer wordsize) is not included here.
1419 * These structures are used in two places. Their primary role is to
1420 * be stored in tables of board-specific device descriptors, which are
1421 * declared early in board initialization and then used (much later) to
1422 * populate a controller's device tree after the that controller's driver
1423 * initializes. A secondary (and atypical) role is as a parameter to
1424 * spi_new_device() call, which happens after those controller drivers
1425 * are active in some dynamic board configuration models.
1427 struct spi_board_info {
1428 /* the device name and module name are coupled, like platform_bus;
1429 * "modalias" is normally the driver name.
1431 * platform_data goes to spi_device.dev.platform_data,
1432 * controller_data goes to spi_device.controller_data,
1435 char modalias[SPI_NAME_SIZE];
1436 const void *platform_data;
1437 const struct software_node *swnode;
1438 void *controller_data;
1441 /* slower signaling on noisy or low voltage boards */
1445 /* bus_num is board specific and matches the bus_num of some
1446 * spi_controller that will probably be registered later.
1448 * chip_select reflects how this chip is wired to that master;
1449 * it's less than num_chipselect.
1454 /* mode becomes spi_device.mode, and is essential for chips
1455 * where the default of SPI_CS_HIGH = 0 is wrong.
1459 /* ... may need additional spi_device chip config data here.
1460 * avoid stuff protocol drivers can set; but include stuff
1461 * needed to behave without being bound to a driver:
1462 * - quirks like clock rate mattering when not selected
1468 spi_register_board_info(struct spi_board_info const *info, unsigned n);
1470 /* board init code may ignore whether SPI is configured or not */
1472 spi_register_board_info(struct spi_board_info const *info, unsigned n)
1476 /* If you're hotplugging an adapter with devices (parport, usb, etc)
1477 * use spi_new_device() to describe each device. You can also call
1478 * spi_unregister_device() to start making that device vanish, but
1479 * normally that would be handled by spi_unregister_controller().
1481 * You can also use spi_alloc_device() and spi_add_device() to use a two
1482 * stage registration sequence for each spi_device. This gives the caller
1483 * some more control over the spi_device structure before it is registered,
1484 * but requires that caller to initialize fields that would otherwise
1485 * be defined using the board info.
1487 extern struct spi_device *
1488 spi_alloc_device(struct spi_controller *ctlr);
1491 spi_add_device(struct spi_device *spi);
1493 extern struct spi_device *
1494 spi_new_device(struct spi_controller *, struct spi_board_info *);
1496 extern void spi_unregister_device(struct spi_device *spi);
1498 extern const struct spi_device_id *
1499 spi_get_device_id(const struct spi_device *sdev);
1502 spi_transfer_is_last(struct spi_controller *ctlr, struct spi_transfer *xfer)
1504 return list_is_last(&xfer->transfer_list, &ctlr->cur_msg->transfers);
1507 /* OF support code */
1508 #if IS_ENABLED(CONFIG_OF)
1510 /* must call put_device() when done with returned spi_device device */
1511 extern struct spi_device *
1512 of_find_spi_device_by_node(struct device_node *node);
1516 static inline struct spi_device *
1517 of_find_spi_device_by_node(struct device_node *node)
1522 #endif /* IS_ENABLED(CONFIG_OF) */
1524 /* Compatibility layer */
1525 #define spi_master spi_controller
1527 #define SPI_MASTER_HALF_DUPLEX SPI_CONTROLLER_HALF_DUPLEX
1528 #define SPI_MASTER_NO_RX SPI_CONTROLLER_NO_RX
1529 #define SPI_MASTER_NO_TX SPI_CONTROLLER_NO_TX
1530 #define SPI_MASTER_MUST_RX SPI_CONTROLLER_MUST_RX
1531 #define SPI_MASTER_MUST_TX SPI_CONTROLLER_MUST_TX
1533 #define spi_master_get_devdata(_ctlr) spi_controller_get_devdata(_ctlr)
1534 #define spi_master_set_devdata(_ctlr, _data) \
1535 spi_controller_set_devdata(_ctlr, _data)
1536 #define spi_master_get(_ctlr) spi_controller_get(_ctlr)
1537 #define spi_master_put(_ctlr) spi_controller_put(_ctlr)
1538 #define spi_master_suspend(_ctlr) spi_controller_suspend(_ctlr)
1539 #define spi_master_resume(_ctlr) spi_controller_resume(_ctlr)
1541 #define spi_register_master(_ctlr) spi_register_controller(_ctlr)
1542 #define devm_spi_register_master(_dev, _ctlr) \
1543 devm_spi_register_controller(_dev, _ctlr)
1544 #define spi_unregister_master(_ctlr) spi_unregister_controller(_ctlr)
1546 #endif /* __LINUX_SPI_H */