1 /* SPDX-License-Identifier: GPL-2.0-only
2 * Copyright (C) 2020 Marvell.
5 #ifndef __SOC_OTX2_ASM_H
6 #define __SOC_OTX2_ASM_H
8 #if defined(CONFIG_ARM64)
10 * otx2_lmt_flush is used for LMT store operation.
11 * On octeontx2 platform CPT instruction enqueue and
12 * NIX packet send are only possible via LMTST
13 * operations and it uses LDEOR instruction targeting
14 * the coprocessor address.
16 #define otx2_lmt_flush(ioaddr) \
19 __asm__ volatile(".cpu generic+lse\n" \
20 "ldeor xzr, %x[rf], [%[rs]]" \
22 : [rs]"r" (ioaddr)); \
25 #define cn10k_lmt_flush(val, addr) \
27 __asm__ volatile(".cpu generic+lse\n" \
28 "steor %x[rf],[%[rs]]" \
33 #define otx2_lmt_flush(ioaddr) ({ 0; })
34 #define cn10k_lmt_flush(val, addr) ({ addr = val; })
37 #endif /* __SOC_OTX2_ASM_H */