1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/kernel.h>
6 #include <linux/list.h>
9 #ifdef CONFIG_PROC_CPU_RESCTRL
11 int proc_resctrl_show(struct seq_file *m,
12 struct pid_namespace *ns,
14 struct task_struct *tsk);
19 * enum resctrl_conf_type - The type of configuration.
20 * @CDP_NONE: No prioritisation, both code and data are controlled or monitored.
21 * @CDP_CODE: Configuration applies to instruction fetches.
22 * @CDP_DATA: Configuration applies to reads and writes.
24 enum resctrl_conf_type {
31 * struct rdt_domain - group of CPUs sharing a resctrl resource
32 * @list: all instances of this resource
33 * @id: unique id for this instance
34 * @cpu_mask: which CPUs share this resource
35 * @new_ctrl: new ctrl value to be loaded
36 * @have_new_ctrl: did user provide new_ctrl for this domain
37 * @rmid_busy_llc: bitmap of which limbo RMIDs are above threshold
38 * @mbm_total: saved state for MBM total bandwidth
39 * @mbm_local: saved state for MBM local bandwidth
40 * @mbm_over: worker to periodically read MBM h/w counters
41 * @cqm_limbo: worker to periodically read CQM h/w counters
42 * @mbm_work_cpu: worker CPU for MBM h/w counters
43 * @cqm_work_cpu: worker CPU for CQM h/w counters
44 * @plr: pseudo-locked region (if any) associated with domain
47 struct list_head list;
49 struct cpumask cpu_mask;
52 unsigned long *rmid_busy_llc;
53 struct mbm_state *mbm_total;
54 struct mbm_state *mbm_local;
55 struct delayed_work mbm_over;
56 struct delayed_work cqm_limbo;
59 struct pseudo_lock_region *plr;
63 * struct resctrl_cache - Cache allocation related data
64 * @cbm_len: Length of the cache bit mask
65 * @min_cbm_bits: Minimum number of consecutive bits to be set
66 * @cbm_idx_mult: Multiplier of CBM index
67 * @cbm_idx_offset: Offset of CBM index. CBM index is computed by:
68 * closid * cbm_idx_multi + cbm_idx_offset
70 * @shareable_bits: Bitmask of shareable resource with other
72 * @arch_has_sparse_bitmaps: True if a bitmap like f00f is valid.
73 * @arch_has_empty_bitmaps: True if the '0' bitmap is valid.
74 * @arch_has_per_cpu_cfg: True if QOS_CFG register for this cache
75 * level has CPU scope.
77 struct resctrl_cache {
79 unsigned int min_cbm_bits;
80 unsigned int cbm_idx_mult; // TODO remove this
81 unsigned int cbm_idx_offset; // TODO remove this
82 unsigned int shareable_bits;
83 bool arch_has_sparse_bitmaps;
84 bool arch_has_empty_bitmaps;
85 bool arch_has_per_cpu_cfg;
89 * enum membw_throttle_mode - System's memory bandwidth throttling mode
90 * @THREAD_THROTTLE_UNDEFINED: Not relevant to the system
91 * @THREAD_THROTTLE_MAX: Memory bandwidth is throttled at the core
92 * always using smallest bandwidth percentage
93 * assigned to threads, aka "max throttling"
94 * @THREAD_THROTTLE_PER_THREAD: Memory bandwidth is throttled at the thread
96 enum membw_throttle_mode {
97 THREAD_THROTTLE_UNDEFINED = 0,
99 THREAD_THROTTLE_PER_THREAD,
103 * struct resctrl_membw - Memory bandwidth allocation related data
104 * @min_bw: Minimum memory bandwidth percentage user can request
105 * @bw_gran: Granularity at which the memory bandwidth is allocated
106 * @delay_linear: True if memory B/W delay is in linear scale
107 * @arch_needs_linear: True if we can't configure non-linear resources
108 * @throttle_mode: Bandwidth throttling mode when threads request
109 * different memory bandwidths
110 * @mba_sc: True if MBA software controller(mba_sc) is enabled
111 * @mb_map: Mapping of memory B/W percentage to memory B/W delay
113 struct resctrl_membw {
117 bool arch_needs_linear;
118 enum membw_throttle_mode throttle_mode;
123 struct rdt_parse_data;
124 struct resctrl_schema;
127 * struct rdt_resource - attributes of a resctrl resource
128 * @rid: The index of the resource
129 * @alloc_enabled: Is allocation enabled on this machine
130 * @mon_enabled: Is monitoring enabled for this feature
131 * @alloc_capable: Is allocation available on this machine
132 * @mon_capable: Is monitor feature available on this machine
133 * @num_rmid: Number of RMIDs available
134 * @cache_level: Which cache level defines scope of this resource
135 * @cache: Cache allocation related data
136 * @membw: If the component has bandwidth controls, their properties.
137 * @domains: All domains for this resource
138 * @name: Name to use in "schemata" file.
139 * @data_width: Character width of data when displaying
140 * @default_ctrl: Specifies default cache cbm or memory B/W percent.
141 * @format_str: Per resource format string to show domain value
142 * @parse_ctrlval: Per resource function pointer to parse control values
143 * @evt_list: List of monitoring events
144 * @fflags: flags to choose base and info files
145 * @cdp_capable: Is the CDP feature available on this resource
147 struct rdt_resource {
155 struct resctrl_cache cache;
156 struct resctrl_membw membw;
157 struct list_head domains;
161 const char *format_str;
162 int (*parse_ctrlval)(struct rdt_parse_data *data,
163 struct resctrl_schema *s,
164 struct rdt_domain *d);
165 struct list_head evt_list;
166 unsigned long fflags;
171 * struct resctrl_schema - configuration abilities of a resource presented to
173 * @list: Member of resctrl_schema_all.
174 * @name: The name to use in the "schemata" file.
175 * @conf_type: Whether this schema is specific to code/data.
176 * @res: The resource structure exported by the architecture to describe
177 * the hardware that is configured by this schema.
178 * @num_closid: The number of closid that can be used with this schema. When
179 * features like CDP are enabled, this will be lower than the
180 * hardware supports for the resource.
182 struct resctrl_schema {
183 struct list_head list;
185 enum resctrl_conf_type conf_type;
186 struct rdt_resource *res;
190 /* The number of closid supported by this resource regardless of CDP */
191 u32 resctrl_arch_get_num_closid(struct rdt_resource *r);
193 #endif /* _RESCTRL_H */