include/linux/qed/qed_rdma_if.h

   1 /* QLogic qed NIC Driver
   2  * Copyright (c) 2015-2017  QLogic Corporation
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and /or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32 #ifndef _QED_RDMA_IF_H
  33 #define _QED_RDMA_IF_H
  34 #include <linux/types.h>
  35 #include <linux/delay.h>
  36 #include <linux/list.h>
  37 #include <linux/slab.h>
  38 #include <linux/qed/qed_if.h>
  39 #include <linux/qed/qed_ll2_if.h>
  40 #include <linux/qed/rdma_common.h>
  41
  42 #define QED_RDMA_MAX_CNQ_SIZE               (0xFFFF)
  43
  44 /* rdma interface */
  45
  46 enum qed_roce_qp_state {
  47         QED_ROCE_QP_STATE_RESET,
  48         QED_ROCE_QP_STATE_INIT,
  49         QED_ROCE_QP_STATE_RTR,
  50         QED_ROCE_QP_STATE_RTS,
  51         QED_ROCE_QP_STATE_SQD,
  52         QED_ROCE_QP_STATE_ERR,
  53         QED_ROCE_QP_STATE_SQE
  54 };
  55
  56 enum qed_rdma_qp_type {
  57         QED_RDMA_QP_TYPE_RC,
  58         QED_RDMA_QP_TYPE_XRC_INI,
  59         QED_RDMA_QP_TYPE_XRC_TGT,
  60         QED_RDMA_QP_TYPE_INVAL = 0xffff,
  61 };
  62
  63 enum qed_rdma_tid_type {
  64         QED_RDMA_TID_REGISTERED_MR,
  65         QED_RDMA_TID_FMR,
  66         QED_RDMA_TID_MW
  67 };
  68
  69 struct qed_rdma_events {
  70         void *context;
  71         void (*affiliated_event)(void *context, u8 fw_event_code,
  72                                  void *fw_handle);
  73         void (*unaffiliated_event)(void *context, u8 event_code);
  74 };
  75
  76 struct qed_rdma_device {
  77         u32 vendor_id;
  78         u32 vendor_part_id;
  79         u32 hw_ver;
  80         u64 fw_ver;
  81
  82         u64 node_guid;
  83         u64 sys_image_guid;
  84
  85         u8 max_cnq;
  86         u8 max_sge;
  87         u8 max_srq_sge;
  88         u16 max_inline;
  89         u32 max_wqe;
  90         u32 max_srq_wqe;
  91         u8 max_qp_resp_rd_atomic_resc;
  92         u8 max_qp_req_rd_atomic_resc;
  93         u64 max_dev_resp_rd_atomic_resc;
  94         u32 max_cq;
  95         u32 max_qp;
  96         u32 max_srq;
  97         u32 max_mr;
  98         u64 max_mr_size;
  99         u32 max_cqe;
 100         u32 max_mw;
 101         u32 max_mr_mw_fmr_pbl;
 102         u64 max_mr_mw_fmr_size;
 103         u32 max_pd;
 104         u32 max_ah;
 105         u8 max_pkey;
 106         u16 max_srq_wr;
 107         u8 max_stats_queues;
 108         u32 dev_caps;
 109
 110         /* Abilty to support RNR-NAK generation */
 111
 112 #define QED_RDMA_DEV_CAP_RNR_NAK_MASK                           0x1
 113 #define QED_RDMA_DEV_CAP_RNR_NAK_SHIFT                  0
 114         /* Abilty to support shutdown port */
 115 #define QED_RDMA_DEV_CAP_SHUTDOWN_PORT_MASK                     0x1
 116 #define QED_RDMA_DEV_CAP_SHUTDOWN_PORT_SHIFT                    1
 117         /* Abilty to support port active event */
 118 #define QED_RDMA_DEV_CAP_PORT_ACTIVE_EVENT_MASK         0x1
 119 #define QED_RDMA_DEV_CAP_PORT_ACTIVE_EVENT_SHIFT                2
 120         /* Abilty to support port change event */
 121 #define QED_RDMA_DEV_CAP_PORT_CHANGE_EVENT_MASK         0x1
 122 #define QED_RDMA_DEV_CAP_PORT_CHANGE_EVENT_SHIFT                3
 123         /* Abilty to support system image GUID */
 124 #define QED_RDMA_DEV_CAP_SYS_IMAGE_MASK                 0x1
 125 #define QED_RDMA_DEV_CAP_SYS_IMAGE_SHIFT                        4
 126         /* Abilty to support bad P_Key counter support */
 127 #define QED_RDMA_DEV_CAP_BAD_PKEY_CNT_MASK                      0x1
 128 #define QED_RDMA_DEV_CAP_BAD_PKEY_CNT_SHIFT                     5
 129         /* Abilty to support atomic operations */
 130 #define QED_RDMA_DEV_CAP_ATOMIC_OP_MASK                 0x1
 131 #define QED_RDMA_DEV_CAP_ATOMIC_OP_SHIFT                        6
 132 #define QED_RDMA_DEV_CAP_RESIZE_CQ_MASK                 0x1
 133 #define QED_RDMA_DEV_CAP_RESIZE_CQ_SHIFT                        7
 134         /* Abilty to support modifying the maximum number of
 135          * outstanding work requests per QP
 136          */
 137 #define QED_RDMA_DEV_CAP_RESIZE_MAX_WR_MASK                     0x1
 138 #define QED_RDMA_DEV_CAP_RESIZE_MAX_WR_SHIFT                    8
 139         /* Abilty to support automatic path migration */
 140 #define QED_RDMA_DEV_CAP_AUTO_PATH_MIG_MASK                     0x1
 141 #define QED_RDMA_DEV_CAP_AUTO_PATH_MIG_SHIFT                    9
 142         /* Abilty to support the base memory management extensions */
 143 #define QED_RDMA_DEV_CAP_BASE_MEMORY_EXT_MASK                   0x1
 144 #define QED_RDMA_DEV_CAP_BASE_MEMORY_EXT_SHIFT          10
 145 #define QED_RDMA_DEV_CAP_BASE_QUEUE_EXT_MASK                    0x1
 146 #define QED_RDMA_DEV_CAP_BASE_QUEUE_EXT_SHIFT                   11
 147         /* Abilty to support multipile page sizes per memory region */
 148 #define QED_RDMA_DEV_CAP_MULTI_PAGE_PER_MR_EXT_MASK             0x1
 149 #define QED_RDMA_DEV_CAP_MULTI_PAGE_PER_MR_EXT_SHIFT            12
 150         /* Abilty to support block list physical buffer list */
 151 #define QED_RDMA_DEV_CAP_BLOCK_MODE_MASK                        0x1
 152 #define QED_RDMA_DEV_CAP_BLOCK_MODE_SHIFT                       13
 153         /* Abilty to support zero based virtual addresses */
 154 #define QED_RDMA_DEV_CAP_ZBVA_MASK                              0x1
 155 #define QED_RDMA_DEV_CAP_ZBVA_SHIFT                             14
 156         /* Abilty to support local invalidate fencing */
 157 #define QED_RDMA_DEV_CAP_LOCAL_INV_FENCE_MASK                   0x1
 158 #define QED_RDMA_DEV_CAP_LOCAL_INV_FENCE_SHIFT          15
 159         /* Abilty to support Loopback on QP */
 160 #define QED_RDMA_DEV_CAP_LB_INDICATOR_MASK                      0x1
 161 #define QED_RDMA_DEV_CAP_LB_INDICATOR_SHIFT                     16
 162         u64 page_size_caps;
 163         u8 dev_ack_delay;
 164         u32 reserved_lkey;
 165         u32 bad_pkey_counter;
 166         struct qed_rdma_events events;
 167 };
 168
 169 enum qed_port_state {
 170         QED_RDMA_PORT_UP,
 171         QED_RDMA_PORT_DOWN,
 172 };
 173
 174 enum qed_roce_capability {
 175         QED_ROCE_V1 = 1 << 0,
 176         QED_ROCE_V2 = 1 << 1,
 177 };
 178
 179 struct qed_rdma_port {
 180         enum qed_port_state port_state;
 181         int link_speed;
 182         u64 max_msg_size;
 183         u8 source_gid_table_len;
 184         void *source_gid_table_ptr;
 185         u8 pkey_table_len;
 186         void *pkey_table_ptr;
 187         u32 pkey_bad_counter;
 188         enum qed_roce_capability capability;
 189 };
 190
 191 struct qed_rdma_cnq_params {
 192         u8 num_pbl_pages;
 193         u64 pbl_ptr;
 194 };
 195
 196 /* The CQ Mode affects the CQ doorbell transaction size.
 197  * 64/32 bit machines should configure to 32/16 bits respectively.
 198  */
 199 enum qed_rdma_cq_mode {
 200         QED_RDMA_CQ_MODE_16_BITS,
 201         QED_RDMA_CQ_MODE_32_BITS,
 202 };
 203
 204 struct qed_roce_dcqcn_params {
 205         u8 notification_point;
 206         u8 reaction_point;
 207
 208         /* fields for notification point */
 209         u32 cnp_send_timeout;
 210
 211         /* fields for reaction point */
 212         u32 rl_bc_rate;
 213         u16 rl_max_rate;
 214         u16 rl_r_ai;
 215         u16 rl_r_hai;
 216         u16 dcqcn_g;
 217         u32 dcqcn_k_us;
 218         u32 dcqcn_timeout_us;
 219 };
 220
 221 struct qed_rdma_start_in_params {
 222         struct qed_rdma_events *events;
 223         struct qed_rdma_cnq_params cnq_pbl_list[128];
 224         u8 desired_cnq;
 225         enum qed_rdma_cq_mode cq_mode;
 226         struct qed_roce_dcqcn_params dcqcn_params;
 227         u16 max_mtu;
 228         u8 mac_addr[ETH_ALEN];
 229         u8 iwarp_flags;
 230 };
 231
 232 struct qed_rdma_add_user_out_params {
 233         u16 dpi;
 234         void __iomem *dpi_addr;
 235         u64 dpi_phys_addr;
 236         u32 dpi_size;
 237         u16 wid_count;
 238 };
 239
 240 enum roce_mode {
 241         ROCE_V1,
 242         ROCE_V2_IPV4,
 243         ROCE_V2_IPV6,
 244         MAX_ROCE_MODE
 245 };
 246
 247 union qed_gid {
 248         u8 bytes[16];
 249         u16 words[8];
 250         u32 dwords[4];
 251         u64 qwords[2];
 252         u32 ipv4_addr;
 253 };
 254
 255 struct qed_rdma_register_tid_in_params {
 256         u32 itid;
 257         enum qed_rdma_tid_type tid_type;
 258         u8 key;
 259         u16 pd;
 260         bool local_read;
 261         bool local_write;
 262         bool remote_read;
 263         bool remote_write;
 264         bool remote_atomic;
 265         bool mw_bind;
 266         u64 pbl_ptr;
 267         bool pbl_two_level;
 268         u8 pbl_page_size_log;
 269         u8 page_size_log;
 270         u32 fbo;
 271         u64 length;
 272         u64 vaddr;
 273         bool zbva;
 274         bool phy_mr;
 275         bool dma_mr;
 276
 277         bool dif_enabled;
 278         u64 dif_error_addr;
 279 };
 280
 281 struct qed_rdma_create_cq_in_params {
 282         u32 cq_handle_lo;
 283         u32 cq_handle_hi;
 284         u32 cq_size;
 285         u16 dpi;
 286         bool pbl_two_level;
 287         u64 pbl_ptr;
 288         u16 pbl_num_pages;
 289         u8 pbl_page_size_log;
 290         u8 cnq_id;
 291         u16 int_timeout;
 292 };
 293
 294 struct qed_rdma_create_srq_in_params {
 295         u64 pbl_base_addr;
 296         u64 prod_pair_addr;
 297         u16 num_pages;
 298         u16 pd_id;
 299         u16 page_size;
 300
 301         /* XRC related only */
 302         bool reserved_key_en;
 303         bool is_xrc;
 304         u32 cq_cid;
 305         u16 xrcd_id;
 306 };
 307
 308 struct qed_rdma_destroy_cq_in_params {
 309         u16 icid;
 310 };
 311
 312 struct qed_rdma_destroy_cq_out_params {
 313         u16 num_cq_notif;
 314 };
 315
 316 struct qed_rdma_create_qp_in_params {
 317         u32 qp_handle_lo;
 318         u32 qp_handle_hi;
 319         u32 qp_handle_async_lo;
 320         u32 qp_handle_async_hi;
 321         bool use_srq;
 322         bool signal_all;
 323         bool fmr_and_reserved_lkey;
 324         u16 pd;
 325         u16 dpi;
 326         u16 sq_cq_id;
 327         u16 sq_num_pages;
 328         u64 sq_pbl_ptr;
 329         u8 max_sq_sges;
 330         u16 rq_cq_id;
 331         u16 rq_num_pages;
 332         u64 rq_pbl_ptr;
 333         u16 srq_id;
 334         u16 xrcd_id;
 335         u8 stats_queue;
 336         enum qed_rdma_qp_type qp_type;
 337         u8 flags;
 338 #define QED_ROCE_EDPM_MODE_MASK      0x1
 339 #define QED_ROCE_EDPM_MODE_SHIFT     0
 340 };
 341
 342 struct qed_rdma_create_qp_out_params {
 343         u32 qp_id;
 344         u16 icid;
 345         void *rq_pbl_virt;
 346         dma_addr_t rq_pbl_phys;
 347         void *sq_pbl_virt;
 348         dma_addr_t sq_pbl_phys;
 349 };
 350
 351 struct qed_rdma_modify_qp_in_params {
 352         u32 modify_flags;
 353 #define QED_RDMA_MODIFY_QP_VALID_NEW_STATE_MASK               0x1
 354 #define QED_RDMA_MODIFY_QP_VALID_NEW_STATE_SHIFT              0
 355 #define QED_ROCE_MODIFY_QP_VALID_PKEY_MASK                    0x1
 356 #define QED_ROCE_MODIFY_QP_VALID_PKEY_SHIFT                   1
 357 #define QED_RDMA_MODIFY_QP_VALID_RDMA_OPS_EN_MASK             0x1
 358 #define QED_RDMA_MODIFY_QP_VALID_RDMA_OPS_EN_SHIFT            2
 359 #define QED_ROCE_MODIFY_QP_VALID_DEST_QP_MASK                 0x1
 360 #define QED_ROCE_MODIFY_QP_VALID_DEST_QP_SHIFT                3
 361 #define QED_ROCE_MODIFY_QP_VALID_ADDRESS_VECTOR_MASK          0x1
 362 #define QED_ROCE_MODIFY_QP_VALID_ADDRESS_VECTOR_SHIFT         4
 363 #define QED_ROCE_MODIFY_QP_VALID_RQ_PSN_MASK                  0x1
 364 #define QED_ROCE_MODIFY_QP_VALID_RQ_PSN_SHIFT                 5
 365 #define QED_ROCE_MODIFY_QP_VALID_SQ_PSN_MASK                  0x1
 366 #define QED_ROCE_MODIFY_QP_VALID_SQ_PSN_SHIFT                 6
 367 #define QED_RDMA_MODIFY_QP_VALID_MAX_RD_ATOMIC_REQ_MASK       0x1
 368 #define QED_RDMA_MODIFY_QP_VALID_MAX_RD_ATOMIC_REQ_SHIFT      7
 369 #define QED_RDMA_MODIFY_QP_VALID_MAX_RD_ATOMIC_RESP_MASK      0x1
 370 #define QED_RDMA_MODIFY_QP_VALID_MAX_RD_ATOMIC_RESP_SHIFT     8
 371 #define QED_ROCE_MODIFY_QP_VALID_ACK_TIMEOUT_MASK             0x1
 372 #define QED_ROCE_MODIFY_QP_VALID_ACK_TIMEOUT_SHIFT            9
 373 #define QED_ROCE_MODIFY_QP_VALID_RETRY_CNT_MASK               0x1
 374 #define QED_ROCE_MODIFY_QP_VALID_RETRY_CNT_SHIFT              10
 375 #define QED_ROCE_MODIFY_QP_VALID_RNR_RETRY_CNT_MASK           0x1
 376 #define QED_ROCE_MODIFY_QP_VALID_RNR_RETRY_CNT_SHIFT          11
 377 #define QED_ROCE_MODIFY_QP_VALID_MIN_RNR_NAK_TIMER_MASK       0x1
 378 #define QED_ROCE_MODIFY_QP_VALID_MIN_RNR_NAK_TIMER_SHIFT      12
 379 #define QED_ROCE_MODIFY_QP_VALID_E2E_FLOW_CONTROL_EN_MASK     0x1
 380 #define QED_ROCE_MODIFY_QP_VALID_E2E_FLOW_CONTROL_EN_SHIFT    13
 381 #define QED_ROCE_MODIFY_QP_VALID_ROCE_MODE_MASK               0x1
 382 #define QED_ROCE_MODIFY_QP_VALID_ROCE_MODE_SHIFT              14
 383
 384         enum qed_roce_qp_state new_state;
 385         u16 pkey;
 386         bool incoming_rdma_read_en;
 387         bool incoming_rdma_write_en;
 388         bool incoming_atomic_en;
 389         bool e2e_flow_control_en;
 390         u32 dest_qp;
 391         bool lb_indication;
 392         u16 mtu;
 393         u8 traffic_class_tos;
 394         u8 hop_limit_ttl;
 395         u32 flow_label;
 396         union qed_gid sgid;
 397         union qed_gid dgid;
 398         u16 udp_src_port;
 399
 400         u16 vlan_id;
 401
 402         u32 rq_psn;
 403         u32 sq_psn;
 404         u8 max_rd_atomic_resp;
 405         u8 max_rd_atomic_req;
 406         u32 ack_timeout;
 407         u8 retry_cnt;
 408         u8 rnr_retry_cnt;
 409         u8 min_rnr_nak_timer;
 410         bool sqd_async;
 411         u8 remote_mac_addr[6];
 412         u8 local_mac_addr[6];
 413         bool use_local_mac;
 414         enum roce_mode roce_mode;
 415 };
 416
 417 struct qed_rdma_query_qp_out_params {
 418         enum qed_roce_qp_state state;
 419         u32 rq_psn;
 420         u32 sq_psn;
 421         bool draining;
 422         u16 mtu;
 423         u32 dest_qp;
 424         bool incoming_rdma_read_en;
 425         bool incoming_rdma_write_en;
 426         bool incoming_atomic_en;
 427         bool e2e_flow_control_en;
 428         union qed_gid sgid;
 429         union qed_gid dgid;
 430         u32 flow_label;
 431         u8 hop_limit_ttl;
 432         u8 traffic_class_tos;
 433         u32 timeout;
 434         u8 rnr_retry;
 435         u8 retry_cnt;
 436         u8 min_rnr_nak_timer;
 437         u16 pkey_index;
 438         u8 max_rd_atomic;
 439         u8 max_dest_rd_atomic;
 440         bool sqd_async;
 441 };
 442
 443 struct qed_rdma_create_srq_out_params {
 444         u16 srq_id;
 445 };
 446
 447 struct qed_rdma_destroy_srq_in_params {
 448         u16 srq_id;
 449         bool is_xrc;
 450 };
 451
 452 struct qed_rdma_modify_srq_in_params {
 453         u32 wqe_limit;
 454         u16 srq_id;
 455         bool is_xrc;
 456 };
 457
 458 struct qed_rdma_stats_out_params {
 459         u64 sent_bytes;
 460         u64 sent_pkts;
 461         u64 rcv_bytes;
 462         u64 rcv_pkts;
 463 };
 464
 465 struct qed_rdma_counters_out_params {
 466         u64 pd_count;
 467         u64 max_pd;
 468         u64 dpi_count;
 469         u64 max_dpi;
 470         u64 cq_count;
 471         u64 max_cq;
 472         u64 qp_count;
 473         u64 max_qp;
 474         u64 tid_count;
 475         u64 max_tid;
 476 };
 477
 478 #define QED_ROCE_TX_HEAD_FAILURE        (1)
 479 #define QED_ROCE_TX_FRAG_FAILURE        (2)
 480
 481 enum qed_iwarp_event_type {
 482         QED_IWARP_EVENT_MPA_REQUEST,      /* Passive side request received */
 483         QED_IWARP_EVENT_PASSIVE_COMPLETE, /* ack on mpa response */
 484         QED_IWARP_EVENT_ACTIVE_COMPLETE,  /* Active side reply received */
 485         QED_IWARP_EVENT_DISCONNECT,
 486         QED_IWARP_EVENT_CLOSE,
 487         QED_IWARP_EVENT_IRQ_FULL,
 488         QED_IWARP_EVENT_RQ_EMPTY,
 489         QED_IWARP_EVENT_LLP_TIMEOUT,
 490         QED_IWARP_EVENT_REMOTE_PROTECTION_ERROR,
 491         QED_IWARP_EVENT_CQ_OVERFLOW,
 492         QED_IWARP_EVENT_QP_CATASTROPHIC,
 493         QED_IWARP_EVENT_ACTIVE_MPA_REPLY,
 494         QED_IWARP_EVENT_LOCAL_ACCESS_ERROR,
 495         QED_IWARP_EVENT_REMOTE_OPERATION_ERROR,
 496         QED_IWARP_EVENT_TERMINATE_RECEIVED,
 497         QED_IWARP_EVENT_SRQ_LIMIT,
 498         QED_IWARP_EVENT_SRQ_EMPTY,
 499 };
 500
 501 enum qed_tcp_ip_version {
 502         QED_TCP_IPV4,
 503         QED_TCP_IPV6,
 504 };
 505
 506 struct qed_iwarp_cm_info {
 507         enum qed_tcp_ip_version ip_version;
 508         u32 remote_ip[4];
 509         u32 local_ip[4];
 510         u16 remote_port;
 511         u16 local_port;
 512         u16 vlan;
 513         u8 ord;
 514         u8 ird;
 515         u16 private_data_len;
 516         const void *private_data;
 517 };
 518
 519 struct qed_iwarp_cm_event_params {
 520         enum qed_iwarp_event_type event;
 521         const struct qed_iwarp_cm_info *cm_info;
 522         void *ep_context;       /* To be passed to accept call */
 523         int status;
 524 };
 525
 526 typedef int (*iwarp_event_handler) (void *context,
 527                                     struct qed_iwarp_cm_event_params *event);
 528
 529 struct qed_iwarp_connect_in {
 530         iwarp_event_handler event_cb;
 531         void *cb_context;
 532         struct qed_rdma_qp *qp;
 533         struct qed_iwarp_cm_info cm_info;
 534         u16 mss;
 535         u8 remote_mac_addr[ETH_ALEN];
 536         u8 local_mac_addr[ETH_ALEN];
 537 };
 538
 539 struct qed_iwarp_connect_out {
 540         void *ep_context;
 541 };
 542
 543 struct qed_iwarp_listen_in {
 544         iwarp_event_handler event_cb;
 545         void *cb_context;       /* passed to event_cb */
 546         u32 max_backlog;
 547         enum qed_tcp_ip_version ip_version;
 548         u32 ip_addr[4];
 549         u16 port;
 550         u16 vlan;
 551 };
 552
 553 struct qed_iwarp_listen_out {
 554         void *handle;
 555 };
 556
 557 struct qed_iwarp_accept_in {
 558         void *ep_context;
 559         void *cb_context;
 560         struct qed_rdma_qp *qp;
 561         const void *private_data;
 562         u16 private_data_len;
 563         u8 ord;
 564         u8 ird;
 565 };
 566
 567 struct qed_iwarp_reject_in {
 568         void *ep_context;
 569         void *cb_context;
 570         const void *private_data;
 571         u16 private_data_len;
 572 };
 573
 574 struct qed_iwarp_send_rtr_in {
 575         void *ep_context;
 576 };
 577
 578 struct qed_roce_ll2_header {
 579         void *vaddr;
 580         dma_addr_t baddr;
 581         size_t len;
 582 };
 583
 584 struct qed_roce_ll2_buffer {
 585         dma_addr_t baddr;
 586         size_t len;
 587 };
 588
 589 struct qed_roce_ll2_packet {
 590         struct qed_roce_ll2_header header;
 591         int n_seg;
 592         struct qed_roce_ll2_buffer payload[RDMA_MAX_SGE_PER_SQ_WQE];
 593         int roce_mode;
 594         enum qed_ll2_tx_dest tx_dest;
 595 };
 596
 597 enum qed_rdma_type {
 598         QED_RDMA_TYPE_ROCE,
 599         QED_RDMA_TYPE_IWARP
 600 };
 601
 602 struct qed_dev_rdma_info {
 603         struct qed_dev_info common;
 604         enum qed_rdma_type rdma_type;
 605         u8 user_dpm_enabled;
 606 };
 607
 608 struct qed_rdma_ops {
 609         const struct qed_common_ops *common;
 610
 611         int (*fill_dev_info)(struct qed_dev *cdev,
 612                              struct qed_dev_rdma_info *info);
 613         void *(*rdma_get_rdma_ctx)(struct qed_dev *cdev);
 614
 615         int (*rdma_init)(struct qed_dev *dev,
 616                          struct qed_rdma_start_in_params *iparams);
 617
 618         int (*rdma_add_user)(void *rdma_cxt,
 619                              struct qed_rdma_add_user_out_params *oparams);
 620
 621         void (*rdma_remove_user)(void *rdma_cxt, u16 dpi);
 622         int (*rdma_stop)(void *rdma_cxt);
 623         struct qed_rdma_device* (*rdma_query_device)(void *rdma_cxt);
 624         struct qed_rdma_port* (*rdma_query_port)(void *rdma_cxt);
 625         int (*rdma_get_start_sb)(struct qed_dev *cdev);
 626         int (*rdma_get_min_cnq_msix)(struct qed_dev *cdev);
 627         void (*rdma_cnq_prod_update)(void *rdma_cxt, u8 cnq_index, u16 prod);
 628         int (*rdma_get_rdma_int)(struct qed_dev *cdev,
 629                                  struct qed_int_info *info);
 630         int (*rdma_set_rdma_int)(struct qed_dev *cdev, u16 cnt);
 631         int (*rdma_alloc_pd)(void *rdma_cxt, u16 *pd);
 632         void (*rdma_dealloc_pd)(void *rdma_cxt, u16 pd);
 633         int (*rdma_alloc_xrcd)(void *rdma_cxt, u16 *xrcd);
 634         void (*rdma_dealloc_xrcd)(void *rdma_cxt, u16 xrcd);
 635         int (*rdma_create_cq)(void *rdma_cxt,
 636                               struct qed_rdma_create_cq_in_params *params,
 637                               u16 *icid);
 638         int (*rdma_destroy_cq)(void *rdma_cxt,
 639                                struct qed_rdma_destroy_cq_in_params *iparams,
 640                                struct qed_rdma_destroy_cq_out_params *oparams);
 641         struct qed_rdma_qp *
 642         (*rdma_create_qp)(void *rdma_cxt,
 643                           struct qed_rdma_create_qp_in_params *iparams,
 644                           struct qed_rdma_create_qp_out_params *oparams);
 645
 646         int (*rdma_modify_qp)(void *roce_cxt, struct qed_rdma_qp *qp,
 647                               struct qed_rdma_modify_qp_in_params *iparams);
 648
 649         int (*rdma_query_qp)(void *rdma_cxt, struct qed_rdma_qp *qp,
 650                              struct qed_rdma_query_qp_out_params *oparams);
 651         int (*rdma_destroy_qp)(void *rdma_cxt, struct qed_rdma_qp *qp);
 652
 653         int
 654         (*rdma_register_tid)(void *rdma_cxt,
 655                              struct qed_rdma_register_tid_in_params *iparams);
 656
 657         int (*rdma_deregister_tid)(void *rdma_cxt, u32 itid);
 658         int (*rdma_alloc_tid)(void *rdma_cxt, u32 *itid);
 659         void (*rdma_free_tid)(void *rdma_cxt, u32 itid);
 660
 661         int (*rdma_create_srq)(void *rdma_cxt,
 662                                struct qed_rdma_create_srq_in_params *iparams,
 663                                struct qed_rdma_create_srq_out_params *oparams);
 664         int (*rdma_destroy_srq)(void *rdma_cxt,
 665                                 struct qed_rdma_destroy_srq_in_params *iparams);
 666         int (*rdma_modify_srq)(void *rdma_cxt,
 667                                struct qed_rdma_modify_srq_in_params *iparams);
 668
 669         int (*ll2_acquire_connection)(void *rdma_cxt,
 670                                       struct qed_ll2_acquire_data *data);
 671
 672         int (*ll2_establish_connection)(void *rdma_cxt, u8 connection_handle);
 673         int (*ll2_terminate_connection)(void *rdma_cxt, u8 connection_handle);
 674         void (*ll2_release_connection)(void *rdma_cxt, u8 connection_handle);
 675
 676         int (*ll2_prepare_tx_packet)(void *rdma_cxt,
 677                                      u8 connection_handle,
 678                                      struct qed_ll2_tx_pkt_info *pkt,
 679                                      bool notify_fw);
 680
 681         int (*ll2_set_fragment_of_tx_packet)(void *rdma_cxt,
 682                                              u8 connection_handle,
 683                                              dma_addr_t addr,
 684                                              u16 nbytes);
 685         int (*ll2_post_rx_buffer)(void *rdma_cxt, u8 connection_handle,
 686                                   dma_addr_t addr, u16 buf_len, void *cookie,
 687                                   u8 notify_fw);
 688         int (*ll2_get_stats)(void *rdma_cxt,
 689                              u8 connection_handle,
 690                              struct qed_ll2_stats *p_stats);
 691         int (*ll2_set_mac_filter)(struct qed_dev *cdev,
 692                                   u8 *old_mac_address, u8 *new_mac_address);
 693
 694         int (*iwarp_set_engine_affin)(struct qed_dev *cdev, bool b_reset);
 695
 696         int (*iwarp_connect)(void *rdma_cxt,
 697                              struct qed_iwarp_connect_in *iparams,
 698                              struct qed_iwarp_connect_out *oparams);
 699
 700         int (*iwarp_create_listen)(void *rdma_cxt,
 701                                    struct qed_iwarp_listen_in *iparams,
 702                                    struct qed_iwarp_listen_out *oparams);
 703
 704         int (*iwarp_accept)(void *rdma_cxt,
 705                             struct qed_iwarp_accept_in *iparams);
 706
 707         int (*iwarp_reject)(void *rdma_cxt,
 708                             struct qed_iwarp_reject_in *iparams);
 709
 710         int (*iwarp_destroy_listen)(void *rdma_cxt, void *handle);
 711
 712         int (*iwarp_send_rtr)(void *rdma_cxt,
 713                               struct qed_iwarp_send_rtr_in *iparams);
 714 };
 715
 716 const struct qed_rdma_ops *qed_get_rdma_ops(void);
 717
 718 #endif