include/linux/qed/qed_if.h

   1 /* QLogic qed NIC Driver
   2  *
   3  * Copyright (c) 2015 QLogic Corporation
   4  *
   5  * This software is available under the terms of the GNU General Public License
   6  * (GPL) Version 2, available from the file COPYING in the main directory of
   7  * this source tree.
   8  */
   9
  10 #ifndef _QED_IF_H
  11 #define _QED_IF_H
  12
  13 #include <linux/types.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/netdevice.h>
  16 #include <linux/pci.h>
  17 #include <linux/skbuff.h>
  18 #include <linux/types.h>
  19 #include <asm/byteorder.h>
  20 #include <linux/io.h>
  21 #include <linux/compiler.h>
  22 #include <linux/kernel.h>
  23 #include <linux/list.h>
  24 #include <linux/slab.h>
  25 #include <linux/qed/common_hsi.h>
  26 #include <linux/qed/qed_chain.h>
  27
  28 enum qed_led_mode {
  29         QED_LED_MODE_OFF,
  30         QED_LED_MODE_ON,
  31         QED_LED_MODE_RESTORE
  32 };
  33
  34 #define DIRECT_REG_WR(reg_addr, val) writel((u32)val, \
  35                                             (void __iomem *)(reg_addr))
  36
  37 #define DIRECT_REG_RD(reg_addr) readl((void __iomem *)(reg_addr))
  38
  39 #define QED_COALESCE_MAX 0xFF
  40
  41 /* forward */
  42 struct qed_dev;
  43
  44 struct qed_eth_pf_params {
  45         /* The following parameters are used during HW-init
  46          * and these parameters need to be passed as arguments
  47          * to update_pf_params routine invoked before slowpath start
  48          */
  49         u16 num_cons;
  50 };
  51
  52 struct qed_pf_params {
  53         struct qed_eth_pf_params eth_pf_params;
  54 };
  55
  56 enum qed_int_mode {
  57         QED_INT_MODE_INTA,
  58         QED_INT_MODE_MSIX,
  59         QED_INT_MODE_MSI,
  60         QED_INT_MODE_POLL,
  61 };
  62
  63 struct qed_sb_info {
  64         struct status_block     *sb_virt;
  65         dma_addr_t              sb_phys;
  66         u32                     sb_ack; /* Last given ack */
  67         u16                     igu_sb_id;
  68         void __iomem            *igu_addr;
  69         u8                      flags;
  70 #define QED_SB_INFO_INIT        0x1
  71 #define QED_SB_INFO_SETUP       0x2
  72
  73         struct qed_dev          *cdev;
  74 };
  75
  76 struct qed_dev_info {
  77         unsigned long   pci_mem_start;
  78         unsigned long   pci_mem_end;
  79         unsigned int    pci_irq;
  80         u8              num_hwfns;
  81
  82         u8              hw_mac[ETH_ALEN];
  83         bool            is_mf_default;
  84
  85         /* FW version */
  86         u16             fw_major;
  87         u16             fw_minor;
  88         u16             fw_rev;
  89         u16             fw_eng;
  90
  91         /* MFW version */
  92         u32             mfw_rev;
  93
  94         u32             flash_size;
  95         u8              mf_mode;
  96 };
  97
  98 enum qed_sb_type {
  99         QED_SB_TYPE_L2_QUEUE,
 100 };
 101
 102 enum qed_protocol {
 103         QED_PROTOCOL_ETH,
 104 };
 105
 106 struct qed_link_params {
 107         bool    link_up;
 108
 109 #define QED_LINK_OVERRIDE_SPEED_AUTONEG         BIT(0)
 110 #define QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS      BIT(1)
 111 #define QED_LINK_OVERRIDE_SPEED_FORCED_SPEED    BIT(2)
 112 #define QED_LINK_OVERRIDE_PAUSE_CONFIG          BIT(3)
 113 #define QED_LINK_OVERRIDE_LOOPBACK_MODE         BIT(4)
 114         u32     override_flags;
 115         bool    autoneg;
 116         u32     adv_speeds;
 117         u32     forced_speed;
 118 #define QED_LINK_PAUSE_AUTONEG_ENABLE           BIT(0)
 119 #define QED_LINK_PAUSE_RX_ENABLE                BIT(1)
 120 #define QED_LINK_PAUSE_TX_ENABLE                BIT(2)
 121         u32     pause_config;
 122 #define QED_LINK_LOOPBACK_NONE                  BIT(0)
 123 #define QED_LINK_LOOPBACK_INT_PHY               BIT(1)
 124 #define QED_LINK_LOOPBACK_EXT_PHY               BIT(2)
 125 #define QED_LINK_LOOPBACK_EXT                   BIT(3)
 126 #define QED_LINK_LOOPBACK_MAC                   BIT(4)
 127         u32     loopback_mode;
 128 };
 129
 130 struct qed_link_output {
 131         bool    link_up;
 132
 133         u32     supported_caps;         /* In SUPPORTED defs */
 134         u32     advertised_caps;        /* In ADVERTISED defs */
 135         u32     lp_caps;                /* In ADVERTISED defs */
 136         u32     speed;                  /* In Mb/s */
 137         u8      duplex;                 /* In DUPLEX defs */
 138         u8      port;                   /* In PORT defs */
 139         bool    autoneg;
 140         u32     pause_config;
 141 };
 142
 143 #define QED_DRV_VER_STR_SIZE 12
 144 struct qed_slowpath_params {
 145         u32     int_mode;
 146         u8      drv_major;
 147         u8      drv_minor;
 148         u8      drv_rev;
 149         u8      drv_eng;
 150         u8      name[QED_DRV_VER_STR_SIZE];
 151 };
 152
 153 #define ILT_PAGE_SIZE_TCFC 0x8000 /* 32KB */
 154
 155 struct qed_int_info {
 156         struct msix_entry       *msix;
 157         u8                      msix_cnt;
 158
 159         /* This should be updated by the protocol driver */
 160         u8                      used_cnt;
 161 };
 162
 163 struct qed_common_cb_ops {
 164         void    (*link_update)(void                     *dev,
 165                                struct qed_link_output   *link);
 166 };
 167
 168 struct qed_selftest_ops {
 169 /**
 170  * @brief selftest_interrupt - Perform interrupt test
 171  *
 172  * @param cdev
 173  *
 174  * @return 0 on success, error otherwise.
 175  */
 176         int (*selftest_interrupt)(struct qed_dev *cdev);
 177
 178 /**
 179  * @brief selftest_memory - Perform memory test
 180  *
 181  * @param cdev
 182  *
 183  * @return 0 on success, error otherwise.
 184  */
 185         int (*selftest_memory)(struct qed_dev *cdev);
 186
 187 /**
 188  * @brief selftest_register - Perform register test
 189  *
 190  * @param cdev
 191  *
 192  * @return 0 on success, error otherwise.
 193  */
 194         int (*selftest_register)(struct qed_dev *cdev);
 195
 196 /**
 197  * @brief selftest_clock - Perform clock test
 198  *
 199  * @param cdev
 200  *
 201  * @return 0 on success, error otherwise.
 202  */
 203         int (*selftest_clock)(struct qed_dev *cdev);
 204 };
 205
 206 struct qed_common_ops {
 207         struct qed_selftest_ops *selftest;
 208
 209         struct qed_dev* (*probe)(struct pci_dev *dev,
 210                                  enum qed_protocol protocol,
 211                                  u32 dp_module, u8 dp_level);
 212
 213         void            (*remove)(struct qed_dev *cdev);
 214
 215         int             (*set_power_state)(struct qed_dev *cdev,
 216                                            pci_power_t state);
 217
 218         void            (*set_id)(struct qed_dev *cdev,
 219                                   char name[],
 220                                   char ver_str[]);
 221
 222         /* Client drivers need to make this call before slowpath_start.
 223          * PF params required for the call before slowpath_start is
 224          * documented within the qed_pf_params structure definition.
 225          */
 226         void            (*update_pf_params)(struct qed_dev *cdev,
 227                                             struct qed_pf_params *params);
 228         int             (*slowpath_start)(struct qed_dev *cdev,
 229                                           struct qed_slowpath_params *params);
 230
 231         int             (*slowpath_stop)(struct qed_dev *cdev);
 232
 233         /* Requests to use `cnt' interrupts for fastpath.
 234          * upon success, returns number of interrupts allocated for fastpath.
 235          */
 236         int             (*set_fp_int)(struct qed_dev *cdev,
 237                                       u16 cnt);
 238
 239         /* Fills `info' with pointers required for utilizing interrupts */
 240         int             (*get_fp_int)(struct qed_dev *cdev,
 241                                       struct qed_int_info *info);
 242
 243         u32             (*sb_init)(struct qed_dev *cdev,
 244                                    struct qed_sb_info *sb_info,
 245                                    void *sb_virt_addr,
 246                                    dma_addr_t sb_phy_addr,
 247                                    u16 sb_id,
 248                                    enum qed_sb_type type);
 249
 250         u32             (*sb_release)(struct qed_dev *cdev,
 251                                       struct qed_sb_info *sb_info,
 252                                       u16 sb_id);
 253
 254         void            (*simd_handler_config)(struct qed_dev *cdev,
 255                                                void *token,
 256                                                int index,
 257                                                void (*handler)(void *));
 258
 259         void            (*simd_handler_clean)(struct qed_dev *cdev,
 260                                               int index);
 261
 262 /**
 263  * @brief can_link_change - can the instance change the link or not
 264  *
 265  * @param cdev
 266  *
 267  * @return true if link-change is allowed, false otherwise.
 268  */
 269         bool (*can_link_change)(struct qed_dev *cdev);
 270
 271 /**
 272  * @brief set_link - set links according to params
 273  *
 274  * @param cdev
 275  * @param params - values used to override the default link configuration
 276  *
 277  * @return 0 on success, error otherwise.
 278  */
 279         int             (*set_link)(struct qed_dev *cdev,
 280                                     struct qed_link_params *params);
 281
 282 /**
 283  * @brief get_link - returns the current link state.
 284  *
 285  * @param cdev
 286  * @param if_link - structure to be filled with current link configuration.
 287  */
 288         void            (*get_link)(struct qed_dev *cdev,
 289                                     struct qed_link_output *if_link);
 290
 291 /**
 292  * @brief - drains chip in case Tx completions fail to arrive due to pause.
 293  *
 294  * @param cdev
 295  */
 296         int             (*drain)(struct qed_dev *cdev);
 297
 298 /**
 299  * @brief update_msglvl - update module debug level
 300  *
 301  * @param cdev
 302  * @param dp_module
 303  * @param dp_level
 304  */
 305         void            (*update_msglvl)(struct qed_dev *cdev,
 306                                          u32 dp_module,
 307                                          u8 dp_level);
 308
 309         int             (*chain_alloc)(struct qed_dev *cdev,
 310                                        enum qed_chain_use_mode intended_use,
 311                                        enum qed_chain_mode mode,
 312                                        u16 num_elems,
 313                                        size_t elem_size,
 314                                        struct qed_chain *p_chain);
 315
 316         void            (*chain_free)(struct qed_dev *cdev,
 317                                       struct qed_chain *p_chain);
 318
 319 /**
 320  * @brief set_led - Configure LED mode
 321  *
 322  * @param cdev
 323  * @param mode - LED mode
 324  *
 325  * @return 0 on success, error otherwise.
 326  */
 327         int (*set_led)(struct qed_dev *cdev,
 328                        enum qed_led_mode mode);
 329 };
 330
 331 #define MASK_FIELD(_name, _value) \
 332         ((_value) &= (_name ## _MASK))
 333
 334 #define FIELD_VALUE(_name, _value) \
 335         ((_value & _name ## _MASK) << _name ## _SHIFT)
 336
 337 #define SET_FIELD(value, name, flag)                           \
 338         do {                                                   \
 339                 (value) &= ~(name ## _MASK << name ## _SHIFT); \
 340                 (value) |= (((u64)flag) << (name ## _SHIFT));  \
 341         } while (0)
 342
 343 #define GET_FIELD(value, name) \
 344         (((value) >> (name ## _SHIFT)) & name ## _MASK)
 345
 346 /* Debug print definitions */
 347 #define DP_ERR(cdev, fmt, ...)                                               \
 348                 pr_err("[%s:%d(%s)]" fmt,                                    \
 349                        __func__, __LINE__,                                   \
 350                        DP_NAME(cdev) ? DP_NAME(cdev) : "",                   \
 351                        ## __VA_ARGS__)                                       \
 352
 353 #define DP_NOTICE(cdev, fmt, ...)                                     \
 354         do {                                                          \
 355                 if (unlikely((cdev)->dp_level <= QED_LEVEL_NOTICE)) { \
 356                         pr_notice("[%s:%d(%s)]" fmt,                  \
 357                                   __func__, __LINE__,                 \
 358                                   DP_NAME(cdev) ? DP_NAME(cdev) : "", \
 359                                   ## __VA_ARGS__);                    \
 360                                                                       \
 361                 }                                                     \
 362         } while (0)
 363
 364 #define DP_INFO(cdev, fmt, ...)                                       \
 365         do {                                                          \
 366                 if (unlikely((cdev)->dp_level <= QED_LEVEL_INFO)) {   \
 367                         pr_notice("[%s:%d(%s)]" fmt,                  \
 368                                   __func__, __LINE__,                 \
 369                                   DP_NAME(cdev) ? DP_NAME(cdev) : "", \
 370                                   ## __VA_ARGS__);                    \
 371                 }                                                     \
 372         } while (0)
 373
 374 #define DP_VERBOSE(cdev, module, fmt, ...)                              \
 375         do {                                                            \
 376                 if (unlikely(((cdev)->dp_level <= QED_LEVEL_VERBOSE) && \
 377                              ((cdev)->dp_module & module))) {           \
 378                         pr_notice("[%s:%d(%s)]" fmt,                    \
 379                                   __func__, __LINE__,                   \
 380                                   DP_NAME(cdev) ? DP_NAME(cdev) : "",   \
 381                                   ## __VA_ARGS__);                      \
 382                 }                                                       \
 383         } while (0)
 384
 385 enum DP_LEVEL {
 386         QED_LEVEL_VERBOSE       = 0x0,
 387         QED_LEVEL_INFO          = 0x1,
 388         QED_LEVEL_NOTICE        = 0x2,
 389         QED_LEVEL_ERR           = 0x3,
 390 };
 391
 392 #define QED_LOG_LEVEL_SHIFT     (30)
 393 #define QED_LOG_VERBOSE_MASK    (0x3fffffff)
 394 #define QED_LOG_INFO_MASK       (0x40000000)
 395 #define QED_LOG_NOTICE_MASK     (0x80000000)
 396
 397 enum DP_MODULE {
 398         QED_MSG_SPQ     = 0x10000,
 399         QED_MSG_STATS   = 0x20000,
 400         QED_MSG_DCB     = 0x40000,
 401         QED_MSG_IOV     = 0x80000,
 402         QED_MSG_SP      = 0x100000,
 403         QED_MSG_STORAGE = 0x200000,
 404         QED_MSG_CXT     = 0x800000,
 405         QED_MSG_ILT     = 0x2000000,
 406         QED_MSG_ROCE    = 0x4000000,
 407         QED_MSG_DEBUG   = 0x8000000,
 408         /* to be added...up to 0x8000000 */
 409 };
 410
 411 enum qed_mf_mode {
 412         QED_MF_DEFAULT,
 413         QED_MF_OVLAN,
 414         QED_MF_NPAR,
 415 };
 416
 417 struct qed_eth_stats {
 418         u64     no_buff_discards;
 419         u64     packet_too_big_discard;
 420         u64     ttl0_discard;
 421         u64     rx_ucast_bytes;
 422         u64     rx_mcast_bytes;
 423         u64     rx_bcast_bytes;
 424         u64     rx_ucast_pkts;
 425         u64     rx_mcast_pkts;
 426         u64     rx_bcast_pkts;
 427         u64     mftag_filter_discards;
 428         u64     mac_filter_discards;
 429         u64     tx_ucast_bytes;
 430         u64     tx_mcast_bytes;
 431         u64     tx_bcast_bytes;
 432         u64     tx_ucast_pkts;
 433         u64     tx_mcast_pkts;
 434         u64     tx_bcast_pkts;
 435         u64     tx_err_drop_pkts;
 436         u64     tpa_coalesced_pkts;
 437         u64     tpa_coalesced_events;
 438         u64     tpa_aborts_num;
 439         u64     tpa_not_coalesced_pkts;
 440         u64     tpa_coalesced_bytes;
 441
 442         /* port */
 443         u64     rx_64_byte_packets;
 444         u64     rx_65_to_127_byte_packets;
 445         u64     rx_128_to_255_byte_packets;
 446         u64     rx_256_to_511_byte_packets;
 447         u64     rx_512_to_1023_byte_packets;
 448         u64     rx_1024_to_1518_byte_packets;
 449         u64     rx_1519_to_1522_byte_packets;
 450         u64     rx_1519_to_2047_byte_packets;
 451         u64     rx_2048_to_4095_byte_packets;
 452         u64     rx_4096_to_9216_byte_packets;
 453         u64     rx_9217_to_16383_byte_packets;
 454         u64     rx_crc_errors;
 455         u64     rx_mac_crtl_frames;
 456         u64     rx_pause_frames;
 457         u64     rx_pfc_frames;
 458         u64     rx_align_errors;
 459         u64     rx_carrier_errors;
 460         u64     rx_oversize_packets;
 461         u64     rx_jabbers;
 462         u64     rx_undersize_packets;
 463         u64     rx_fragments;
 464         u64     tx_64_byte_packets;
 465         u64     tx_65_to_127_byte_packets;
 466         u64     tx_128_to_255_byte_packets;
 467         u64     tx_256_to_511_byte_packets;
 468         u64     tx_512_to_1023_byte_packets;
 469         u64     tx_1024_to_1518_byte_packets;
 470         u64     tx_1519_to_2047_byte_packets;
 471         u64     tx_2048_to_4095_byte_packets;
 472         u64     tx_4096_to_9216_byte_packets;
 473         u64     tx_9217_to_16383_byte_packets;
 474         u64     tx_pause_frames;
 475         u64     tx_pfc_frames;
 476         u64     tx_lpi_entry_count;
 477         u64     tx_total_collisions;
 478         u64     brb_truncates;
 479         u64     brb_discards;
 480         u64     rx_mac_bytes;
 481         u64     rx_mac_uc_packets;
 482         u64     rx_mac_mc_packets;
 483         u64     rx_mac_bc_packets;
 484         u64     rx_mac_frames_ok;
 485         u64     tx_mac_bytes;
 486         u64     tx_mac_uc_packets;
 487         u64     tx_mac_mc_packets;
 488         u64     tx_mac_bc_packets;
 489         u64     tx_mac_ctrl_frames;
 490 };
 491
 492 #define QED_SB_IDX              0x0002
 493
 494 #define RX_PI           0
 495 #define TX_PI(tc)       (RX_PI + 1 + tc)
 496
 497 struct qed_sb_cnt_info {
 498         int     sb_cnt;
 499         int     sb_iov_cnt;
 500         int     sb_free_blk;
 501 };
 502
 503 static inline u16 qed_sb_update_sb_idx(struct qed_sb_info *sb_info)
 504 {
 505         u32 prod = 0;
 506         u16 rc = 0;
 507
 508         prod = le32_to_cpu(sb_info->sb_virt->prod_index) &
 509                STATUS_BLOCK_PROD_INDEX_MASK;
 510         if (sb_info->sb_ack != prod) {
 511                 sb_info->sb_ack = prod;
 512                 rc |= QED_SB_IDX;
 513         }
 514
 515         /* Let SB update */
 516         mmiowb();
 517         return rc;
 518 }
 519
 520 /**
 521  *
 522  * @brief This function creates an update command for interrupts that is
 523  *        written to the IGU.
 524  *
 525  * @param sb_info       - This is the structure allocated and
 526  *                 initialized per status block. Assumption is
 527  *                 that it was initialized using qed_sb_init
 528  * @param int_cmd       - Enable/Disable/Nop
 529  * @param upd_flg       - whether igu consumer should be
 530  *                 updated.
 531  *
 532  * @return inline void
 533  */
 534 static inline void qed_sb_ack(struct qed_sb_info *sb_info,
 535                               enum igu_int_cmd int_cmd,
 536                               u8 upd_flg)
 537 {
 538         struct igu_prod_cons_update igu_ack = { 0 };
 539
 540         igu_ack.sb_id_and_flags =
 541                 ((sb_info->sb_ack << IGU_PROD_CONS_UPDATE_SB_INDEX_SHIFT) |
 542                  (upd_flg << IGU_PROD_CONS_UPDATE_UPDATE_FLAG_SHIFT) |
 543                  (int_cmd << IGU_PROD_CONS_UPDATE_ENABLE_INT_SHIFT) |
 544                  (IGU_SEG_ACCESS_REG <<
 545                   IGU_PROD_CONS_UPDATE_SEGMENT_ACCESS_SHIFT));
 546
 547         DIRECT_REG_WR(sb_info->igu_addr, igu_ack.sb_id_and_flags);
 548
 549         /* Both segments (interrupts & acks) are written to same place address;
 550          * Need to guarantee all commands will be received (in-order) by HW.
 551          */
 552         mmiowb();
 553         barrier();
 554 }
 555
 556 static inline void __internal_ram_wr(void *p_hwfn,
 557                                      void __iomem *addr,
 558                                      int size,
 559                                      u32 *data)
 560
 561 {
 562         unsigned int i;
 563
 564         for (i = 0; i < size / sizeof(*data); i++)
 565                 DIRECT_REG_WR(&((u32 __iomem *)addr)[i], data[i]);
 566 }
 567
 568 static inline void internal_ram_wr(void __iomem *addr,
 569                                    int size,
 570                                    u32 *data)
 571 {
 572         __internal_ram_wr(NULL, addr, size, data);
 573 }
 574
 575 enum qed_rss_caps {
 576         QED_RSS_IPV4            = 0x1,
 577         QED_RSS_IPV6            = 0x2,
 578         QED_RSS_IPV4_TCP        = 0x4,
 579         QED_RSS_IPV6_TCP        = 0x8,
 580         QED_RSS_IPV4_UDP        = 0x10,
 581         QED_RSS_IPV6_UDP        = 0x20,
 582 };
 583
 584 #define QED_RSS_IND_TABLE_SIZE 128
 585 #define QED_RSS_KEY_SIZE 10 /* size in 32b chunks */
 586 #endif