1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _LINUX_PGTABLE_H
3 #define _LINUX_PGTABLE_H
6 #include <asm/pgtable.h>
11 #include <linux/mm_types.h>
12 #include <linux/bug.h>
13 #include <linux/errno.h>
14 #include <asm-generic/pgtable_uffd.h>
16 #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \
17 defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS
18 #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED
22 * On almost all architectures and configurations, 0 can be used as the
23 * upper ceiling to free_pgtables(): on many architectures it has the same
24 * effect as using TASK_SIZE. However, there is one configuration which
25 * must impose a more careful limit, to avoid freeing kernel pgtables.
27 #ifndef USER_PGTABLES_CEILING
28 #define USER_PGTABLES_CEILING 0UL
32 * This defines the first usable user address. Platforms
33 * can override its value with custom FIRST_USER_ADDRESS
34 * defined in their respective <asm/pgtable.h>.
36 #ifndef FIRST_USER_ADDRESS
37 #define FIRST_USER_ADDRESS 0UL
41 * This defines the generic helper for accessing PMD page
42 * table page. Although platforms can still override this
43 * via their respective <asm/pgtable.h>.
46 #define pmd_pgtable(pmd) pmd_page(pmd)
50 * A page table page can be thought of an array like this: pXd_t[PTRS_PER_PxD]
52 * The pXx_index() functions return the index of the entry in the page
53 * table page which would control the given virtual address
55 * As these functions may be used by the same code for different levels of
56 * the page table folding, they are always available, regardless of
57 * CONFIG_PGTABLE_LEVELS value. For the folded levels they simply return 0
58 * because in such cases PTRS_PER_PxD equals 1.
61 static inline unsigned long pte_index(unsigned long address)
63 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
65 #define pte_index pte_index
68 static inline unsigned long pmd_index(unsigned long address)
70 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
72 #define pmd_index pmd_index
76 static inline unsigned long pud_index(unsigned long address)
78 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
80 #define pud_index pud_index
84 /* Must be a compile-time constant, so implement it as a macro */
85 #define pgd_index(a) (((a) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
88 #ifndef pte_offset_kernel
89 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
91 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
93 #define pte_offset_kernel pte_offset_kernel
96 #if defined(CONFIG_HIGHPTE)
97 #define pte_offset_map(dir, address) \
98 ((pte_t *)kmap_atomic(pmd_page(*(dir))) + \
100 #define pte_unmap(pte) kunmap_atomic((pte))
102 #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address))
103 #define pte_unmap(pte) ((void)(pte)) /* NOP */
106 /* Find an entry in the second-level page table.. */
108 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
110 return pud_pgtable(*pud) + pmd_index(address);
112 #define pmd_offset pmd_offset
116 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address)
118 return p4d_pgtable(*p4d) + pud_index(address);
120 #define pud_offset pud_offset
123 static inline pgd_t *pgd_offset_pgd(pgd_t *pgd, unsigned long address)
125 return (pgd + pgd_index(address));
129 * a shortcut to get a pgd_t in a given mm
132 #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address))
136 * a shortcut which implies the use of the kernel's pgd, instead
140 #define pgd_offset_k(address) pgd_offset(&init_mm, (address))
144 * In many cases it is known that a virtual address is mapped at PMD or PTE
145 * level, so instead of traversing all the page table levels, we can get a
146 * pointer to the PMD entry in user or kernel page table or translate a virtual
147 * address to the pointer in the PTE in the kernel page tables with simple
150 static inline pmd_t *pmd_off(struct mm_struct *mm, unsigned long va)
152 return pmd_offset(pud_offset(p4d_offset(pgd_offset(mm, va), va), va), va);
155 static inline pmd_t *pmd_off_k(unsigned long va)
157 return pmd_offset(pud_offset(p4d_offset(pgd_offset_k(va), va), va), va);
160 static inline pte_t *virt_to_kpte(unsigned long vaddr)
162 pmd_t *pmd = pmd_off_k(vaddr);
164 return pmd_none(*pmd) ? NULL : pte_offset_kernel(pmd, vaddr);
167 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
168 extern int ptep_set_access_flags(struct vm_area_struct *vma,
169 unsigned long address, pte_t *ptep,
170 pte_t entry, int dirty);
173 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
174 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
175 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
176 unsigned long address, pmd_t *pmdp,
177 pmd_t entry, int dirty);
178 extern int pudp_set_access_flags(struct vm_area_struct *vma,
179 unsigned long address, pud_t *pudp,
180 pud_t entry, int dirty);
182 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
183 unsigned long address, pmd_t *pmdp,
184 pmd_t entry, int dirty)
189 static inline int pudp_set_access_flags(struct vm_area_struct *vma,
190 unsigned long address, pud_t *pudp,
191 pud_t entry, int dirty)
196 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
199 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
200 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
201 unsigned long address,
209 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
214 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
215 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
216 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
217 unsigned long address,
225 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
229 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
230 unsigned long address,
236 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
239 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
240 int ptep_clear_flush_young(struct vm_area_struct *vma,
241 unsigned long address, pte_t *ptep);
244 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
245 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
246 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
247 unsigned long address, pmd_t *pmdp);
250 * Despite relevant to THP only, this API is called from generic rmap code
251 * under PageTransHuge(), hence needs a dummy implementation for !THP
253 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
254 unsigned long address, pmd_t *pmdp)
259 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
262 #ifndef __HAVE_ARCH_PTEP_CLEAR
263 static inline void ptep_clear(struct mm_struct *mm, unsigned long addr,
266 pte_clear(mm, addr, ptep);
270 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
271 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
272 unsigned long address,
276 pte_clear(mm, address, ptep);
281 #ifndef __HAVE_ARCH_PTEP_GET
282 static inline pte_t ptep_get(pte_t *ptep)
284 return READ_ONCE(*ptep);
288 #ifdef CONFIG_GUP_GET_PTE_LOW_HIGH
290 * WARNING: only to be used in the get_user_pages_fast() implementation.
292 * With get_user_pages_fast(), we walk down the pagetables without taking any
293 * locks. For this we would like to load the pointers atomically, but sometimes
294 * that is not possible (e.g. without expensive cmpxchg8b on x86_32 PAE). What
295 * we do have is the guarantee that a PTE will only either go from not present
296 * to present, or present to not present or both -- it will not switch to a
297 * completely different present page without a TLB flush in between; something
298 * that we are blocking by holding interrupts off.
300 * Setting ptes from not present to present goes:
302 * ptep->pte_high = h;
306 * And present to not present goes:
310 * ptep->pte_high = 0;
312 * We must ensure here that the load of pte_low sees 'l' IFF pte_high sees 'h'.
313 * We load pte_high *after* loading pte_low, which ensures we don't see an older
314 * value of pte_high. *Then* we recheck pte_low, which ensures that we haven't
315 * picked up a changed pte high. We might have gotten rubbish values from
316 * pte_low and pte_high, but we are guaranteed that pte_low will not have the
317 * present bit set *unless* it is 'l'. Because get_user_pages_fast() only
318 * operates on present ptes we're safe.
320 static inline pte_t ptep_get_lockless(pte_t *ptep)
325 pte.pte_low = ptep->pte_low;
327 pte.pte_high = ptep->pte_high;
329 } while (unlikely(pte.pte_low != ptep->pte_low));
333 #else /* CONFIG_GUP_GET_PTE_LOW_HIGH */
335 * We require that the PTE can be read atomically.
337 static inline pte_t ptep_get_lockless(pte_t *ptep)
339 return ptep_get(ptep);
341 #endif /* CONFIG_GUP_GET_PTE_LOW_HIGH */
343 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
344 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
345 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
346 unsigned long address,
353 #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */
354 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
355 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
356 unsigned long address,
364 #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */
365 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
367 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
368 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
369 static inline pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma,
370 unsigned long address, pmd_t *pmdp,
373 return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp);
377 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL
378 static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm,
379 unsigned long address, pud_t *pudp,
382 return pudp_huge_get_and_clear(mm, address, pudp);
385 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
387 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
388 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
389 unsigned long address, pte_t *ptep,
393 pte = ptep_get_and_clear(mm, address, ptep);
400 * If two threads concurrently fault at the same page, the thread that
401 * won the race updates the PTE and its local TLB/Cache. The other thread
402 * gives up, simply does nothing, and continues; on architectures where
403 * software can update TLB, local TLB can be updated here to avoid next page
404 * fault. This function updates TLB only, do nothing with cache or others.
405 * It is the difference with function update_mmu_cache.
407 #ifndef __HAVE_ARCH_UPDATE_MMU_TLB
408 static inline void update_mmu_tlb(struct vm_area_struct *vma,
409 unsigned long address, pte_t *ptep)
412 #define __HAVE_ARCH_UPDATE_MMU_TLB
416 * Some architectures may be able to avoid expensive synchronization
417 * primitives when modifications are made to PTE's which are already
418 * not present, or in the process of an address space destruction.
420 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
421 static inline void pte_clear_not_present_full(struct mm_struct *mm,
422 unsigned long address,
426 pte_clear(mm, address, ptep);
430 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
431 extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
432 unsigned long address,
436 #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
437 extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,
438 unsigned long address,
440 extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma,
441 unsigned long address,
445 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
447 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
449 pte_t old_pte = *ptep;
450 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
455 * On some architectures hardware does not set page access bit when accessing
456 * memory page, it is responsibility of software setting this bit. It brings
457 * out extra page fault penalty to track page access bit. For optimization page
458 * access bit can be set during all page fault flow on these arches.
459 * To be differentiate with macro pte_mkyoung, this macro is used on platforms
460 * where software maintains page access bit.
462 #ifndef pte_sw_mkyoung
463 static inline pte_t pte_sw_mkyoung(pte_t pte)
467 #define pte_sw_mkyoung pte_sw_mkyoung
470 #ifndef pte_savedwrite
471 #define pte_savedwrite pte_write
474 #ifndef pte_mk_savedwrite
475 #define pte_mk_savedwrite pte_mkwrite
478 #ifndef pte_clear_savedwrite
479 #define pte_clear_savedwrite pte_wrprotect
482 #ifndef pmd_savedwrite
483 #define pmd_savedwrite pmd_write
486 #ifndef pmd_mk_savedwrite
487 #define pmd_mk_savedwrite pmd_mkwrite
490 #ifndef pmd_clear_savedwrite
491 #define pmd_clear_savedwrite pmd_wrprotect
494 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
495 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
496 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
497 unsigned long address, pmd_t *pmdp)
499 pmd_t old_pmd = *pmdp;
500 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
503 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
504 unsigned long address, pmd_t *pmdp)
508 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
510 #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT
511 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
512 static inline void pudp_set_wrprotect(struct mm_struct *mm,
513 unsigned long address, pud_t *pudp)
515 pud_t old_pud = *pudp;
517 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud));
520 static inline void pudp_set_wrprotect(struct mm_struct *mm,
521 unsigned long address, pud_t *pudp)
525 #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */
528 #ifndef pmdp_collapse_flush
529 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
530 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
531 unsigned long address, pmd_t *pmdp);
533 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
534 unsigned long address,
540 #define pmdp_collapse_flush pmdp_collapse_flush
541 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
544 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
545 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
549 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
550 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
553 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
555 * This is an implementation of pmdp_establish() that is only suitable for an
556 * architecture that doesn't have hardware dirty/accessed bits. In this case we
557 * can't race with CPU which sets these bits and non-atomic approach is fine.
559 static inline pmd_t generic_pmdp_establish(struct vm_area_struct *vma,
560 unsigned long address, pmd_t *pmdp, pmd_t pmd)
562 pmd_t old_pmd = *pmdp;
563 set_pmd_at(vma->vm_mm, address, pmdp, pmd);
568 #ifndef __HAVE_ARCH_PMDP_INVALIDATE
569 extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
573 #ifndef __HAVE_ARCH_PTE_SAME
574 static inline int pte_same(pte_t pte_a, pte_t pte_b)
576 return pte_val(pte_a) == pte_val(pte_b);
580 #ifndef __HAVE_ARCH_PTE_UNUSED
582 * Some architectures provide facilities to virtualization guests
583 * so that they can flag allocated pages as unused. This allows the
584 * host to transparently reclaim unused pages. This function returns
585 * whether the pte's page is unused.
587 static inline int pte_unused(pte_t pte)
593 #ifndef pte_access_permitted
594 #define pte_access_permitted(pte, write) \
595 (pte_present(pte) && (!(write) || pte_write(pte)))
598 #ifndef pmd_access_permitted
599 #define pmd_access_permitted(pmd, write) \
600 (pmd_present(pmd) && (!(write) || pmd_write(pmd)))
603 #ifndef pud_access_permitted
604 #define pud_access_permitted(pud, write) \
605 (pud_present(pud) && (!(write) || pud_write(pud)))
608 #ifndef p4d_access_permitted
609 #define p4d_access_permitted(p4d, write) \
610 (p4d_present(p4d) && (!(write) || p4d_write(p4d)))
613 #ifndef pgd_access_permitted
614 #define pgd_access_permitted(pgd, write) \
615 (pgd_present(pgd) && (!(write) || pgd_write(pgd)))
618 #ifndef __HAVE_ARCH_PMD_SAME
619 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
621 return pmd_val(pmd_a) == pmd_val(pmd_b);
624 static inline int pud_same(pud_t pud_a, pud_t pud_b)
626 return pud_val(pud_a) == pud_val(pud_b);
630 #ifndef __HAVE_ARCH_P4D_SAME
631 static inline int p4d_same(p4d_t p4d_a, p4d_t p4d_b)
633 return p4d_val(p4d_a) == p4d_val(p4d_b);
637 #ifndef __HAVE_ARCH_PGD_SAME
638 static inline int pgd_same(pgd_t pgd_a, pgd_t pgd_b)
640 return pgd_val(pgd_a) == pgd_val(pgd_b);
645 * Use set_p*_safe(), and elide TLB flushing, when confident that *no*
646 * TLB flush will be required as a result of the "set". For example, use
647 * in scenarios where it is known ahead of time that the routine is
648 * setting non-present entries, or re-setting an existing entry to the
649 * same value. Otherwise, use the typical "set" helpers and flush the
652 #define set_pte_safe(ptep, pte) \
654 WARN_ON_ONCE(pte_present(*ptep) && !pte_same(*ptep, pte)); \
655 set_pte(ptep, pte); \
658 #define set_pmd_safe(pmdp, pmd) \
660 WARN_ON_ONCE(pmd_present(*pmdp) && !pmd_same(*pmdp, pmd)); \
661 set_pmd(pmdp, pmd); \
664 #define set_pud_safe(pudp, pud) \
666 WARN_ON_ONCE(pud_present(*pudp) && !pud_same(*pudp, pud)); \
667 set_pud(pudp, pud); \
670 #define set_p4d_safe(p4dp, p4d) \
672 WARN_ON_ONCE(p4d_present(*p4dp) && !p4d_same(*p4dp, p4d)); \
673 set_p4d(p4dp, p4d); \
676 #define set_pgd_safe(pgdp, pgd) \
678 WARN_ON_ONCE(pgd_present(*pgdp) && !pgd_same(*pgdp, pgd)); \
679 set_pgd(pgdp, pgd); \
682 #ifndef __HAVE_ARCH_DO_SWAP_PAGE
684 * Some architectures support metadata associated with a page. When a
685 * page is being swapped out, this metadata must be saved so it can be
686 * restored when the page is swapped back in. SPARC M7 and newer
687 * processors support an ADI (Application Data Integrity) tag for the
688 * page as metadata for the page. arch_do_swap_page() can restore this
689 * metadata when a page is swapped back in.
691 static inline void arch_do_swap_page(struct mm_struct *mm,
692 struct vm_area_struct *vma,
694 pte_t pte, pte_t oldpte)
700 #ifndef __HAVE_ARCH_UNMAP_ONE
702 * Some architectures support metadata associated with a page. When a
703 * page is being swapped out, this metadata must be saved so it can be
704 * restored when the page is swapped back in. SPARC M7 and newer
705 * processors support an ADI (Application Data Integrity) tag for the
706 * page as metadata for the page. arch_unmap_one() can save this
707 * metadata on a swap-out of a page.
709 static inline int arch_unmap_one(struct mm_struct *mm,
710 struct vm_area_struct *vma,
719 * Allow architectures to preserve additional metadata associated with
720 * swapped-out pages. The corresponding __HAVE_ARCH_SWAP_* macros and function
721 * prototypes must be defined in the arch-specific asm/pgtable.h file.
723 #ifndef __HAVE_ARCH_PREPARE_TO_SWAP
724 static inline int arch_prepare_to_swap(struct page *page)
730 #ifndef __HAVE_ARCH_SWAP_INVALIDATE
731 static inline void arch_swap_invalidate_page(int type, pgoff_t offset)
735 static inline void arch_swap_invalidate_area(int type)
740 #ifndef __HAVE_ARCH_SWAP_RESTORE
741 static inline void arch_swap_restore(swp_entry_t entry, struct page *page)
746 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
747 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
750 #ifndef __HAVE_ARCH_MOVE_PTE
751 #define move_pte(pte, prot, old_addr, new_addr) (pte)
754 #ifndef pte_accessible
755 # define pte_accessible(mm, pte) ((void)(pte), 1)
758 #ifndef flush_tlb_fix_spurious_fault
759 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
763 * When walking page tables, get the address of the next boundary,
764 * or the end address of the range if that comes earlier. Although no
765 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
768 #define pgd_addr_end(addr, end) \
769 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
770 (__boundary - 1 < (end) - 1)? __boundary: (end); \
774 #define p4d_addr_end(addr, end) \
775 ({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \
776 (__boundary - 1 < (end) - 1)? __boundary: (end); \
781 #define pud_addr_end(addr, end) \
782 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
783 (__boundary - 1 < (end) - 1)? __boundary: (end); \
788 #define pmd_addr_end(addr, end) \
789 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
790 (__boundary - 1 < (end) - 1)? __boundary: (end); \
795 * When walking page tables, we usually want to skip any p?d_none entries;
796 * and any p?d_bad entries - reporting the error before resetting to none.
797 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
799 void pgd_clear_bad(pgd_t *);
801 #ifndef __PAGETABLE_P4D_FOLDED
802 void p4d_clear_bad(p4d_t *);
804 #define p4d_clear_bad(p4d) do { } while (0)
807 #ifndef __PAGETABLE_PUD_FOLDED
808 void pud_clear_bad(pud_t *);
810 #define pud_clear_bad(p4d) do { } while (0)
813 void pmd_clear_bad(pmd_t *);
815 static inline int pgd_none_or_clear_bad(pgd_t *pgd)
819 if (unlikely(pgd_bad(*pgd))) {
826 static inline int p4d_none_or_clear_bad(p4d_t *p4d)
830 if (unlikely(p4d_bad(*p4d))) {
837 static inline int pud_none_or_clear_bad(pud_t *pud)
841 if (unlikely(pud_bad(*pud))) {
848 static inline int pmd_none_or_clear_bad(pmd_t *pmd)
852 if (unlikely(pmd_bad(*pmd))) {
859 static inline pte_t __ptep_modify_prot_start(struct vm_area_struct *vma,
864 * Get the current pte state, but zero it out to make it
865 * non-present, preventing the hardware from asynchronously
868 return ptep_get_and_clear(vma->vm_mm, addr, ptep);
871 static inline void __ptep_modify_prot_commit(struct vm_area_struct *vma,
873 pte_t *ptep, pte_t pte)
876 * The pte is non-present, so there's no hardware state to
879 set_pte_at(vma->vm_mm, addr, ptep, pte);
882 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
884 * Start a pte protection read-modify-write transaction, which
885 * protects against asynchronous hardware modifications to the pte.
886 * The intention is not to prevent the hardware from making pte
887 * updates, but to prevent any updates it may make from being lost.
889 * This does not protect against other software modifications of the
890 * pte; the appropriate pte lock must be held over the transaction.
892 * Note that this interface is intended to be batchable, meaning that
893 * ptep_modify_prot_commit may not actually update the pte, but merely
894 * queue the update to be done at some later time. The update must be
895 * actually committed before the pte lock is released, however.
897 static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma,
901 return __ptep_modify_prot_start(vma, addr, ptep);
905 * Commit an update to a pte, leaving any hardware-controlled bits in
906 * the PTE unmodified.
908 static inline void ptep_modify_prot_commit(struct vm_area_struct *vma,
910 pte_t *ptep, pte_t old_pte, pte_t pte)
912 __ptep_modify_prot_commit(vma, addr, ptep, pte);
914 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
915 #endif /* CONFIG_MMU */
918 * No-op macros that just return the current protection value. Defined here
919 * because these macros can be used even if CONFIG_MMU is not defined.
923 #define pgprot_nx(prot) (prot)
926 #ifndef pgprot_noncached
927 #define pgprot_noncached(prot) (prot)
930 #ifndef pgprot_writecombine
931 #define pgprot_writecombine pgprot_noncached
934 #ifndef pgprot_writethrough
935 #define pgprot_writethrough pgprot_noncached
938 #ifndef pgprot_device
939 #define pgprot_device pgprot_noncached
943 #define pgprot_mhp(prot) (prot)
947 #ifndef pgprot_modify
948 #define pgprot_modify pgprot_modify
949 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
951 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot)))
952 newprot = pgprot_noncached(newprot);
953 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot)))
954 newprot = pgprot_writecombine(newprot);
955 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot)))
956 newprot = pgprot_device(newprot);
960 #endif /* CONFIG_MMU */
962 #ifndef pgprot_encrypted
963 #define pgprot_encrypted(prot) (prot)
966 #ifndef pgprot_decrypted
967 #define pgprot_decrypted(prot) (prot)
971 * A facility to provide lazy MMU batching. This allows PTE updates and
972 * page invalidations to be delayed until a call to leave lazy MMU mode
973 * is issued. Some architectures may benefit from doing this, and it is
974 * beneficial for both shadow and direct mode hypervisors, which may batch
975 * the PTE updates which happen during this window. Note that using this
976 * interface requires that read hazards be removed from the code. A read
977 * hazard could result in the direct mode hypervisor case, since the actual
978 * write to the page tables may not yet have taken place, so reads though
979 * a raw PTE pointer after it has been modified are not guaranteed to be
980 * up to date. This mode can only be entered and left under the protection of
981 * the page table locks for all page tables which may be modified. In the UP
982 * case, this is required so that preemption is disabled, and in the SMP case,
983 * it must synchronize the delayed page table writes properly on other CPUs.
985 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
986 #define arch_enter_lazy_mmu_mode() do {} while (0)
987 #define arch_leave_lazy_mmu_mode() do {} while (0)
988 #define arch_flush_lazy_mmu_mode() do {} while (0)
992 * A facility to provide batching of the reload of page tables and
993 * other process state with the actual context switch code for
994 * paravirtualized guests. By convention, only one of the batched
995 * update (lazy) modes (CPU, MMU) should be active at any given time,
996 * entry should never be nested, and entry and exits should always be
997 * paired. This is for sanity of maintaining and reasoning about the
998 * kernel code. In this case, the exit (end of the context switch) is
999 * in architecture-specific code, and so doesn't need a generic
1002 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
1003 #define arch_start_context_switch(prev) do {} while (0)
1006 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
1007 #ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION
1008 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1013 static inline int pmd_swp_soft_dirty(pmd_t pmd)
1018 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1023 #else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */
1024 static inline int pte_soft_dirty(pte_t pte)
1029 static inline int pmd_soft_dirty(pmd_t pmd)
1034 static inline pte_t pte_mksoft_dirty(pte_t pte)
1039 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
1044 static inline pte_t pte_clear_soft_dirty(pte_t pte)
1049 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
1054 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
1059 static inline int pte_swp_soft_dirty(pte_t pte)
1064 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
1069 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1074 static inline int pmd_swp_soft_dirty(pmd_t pmd)
1079 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1085 #ifndef __HAVE_PFNMAP_TRACKING
1087 * Interfaces that can be used by architecture code to keep track of
1088 * memory type of pfn mappings specified by the remap_pfn_range,
1093 * track_pfn_remap is called when a _new_ pfn mapping is being established
1094 * by remap_pfn_range() for physical range indicated by pfn and size.
1096 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
1097 unsigned long pfn, unsigned long addr,
1104 * track_pfn_insert is called when a _new_ single pfn is established
1105 * by vmf_insert_pfn().
1107 static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
1113 * track_pfn_copy is called when vma that is covering the pfnmap gets
1114 * copied through copy_page_range().
1116 static inline int track_pfn_copy(struct vm_area_struct *vma)
1122 * untrack_pfn is called while unmapping a pfnmap for a region.
1123 * untrack can be called for a specific region indicated by pfn and size or
1124 * can be for the entire vma (in which case pfn, size are zero).
1126 static inline void untrack_pfn(struct vm_area_struct *vma,
1127 unsigned long pfn, unsigned long size)
1132 * untrack_pfn_moved is called while mremapping a pfnmap for a new region.
1134 static inline void untrack_pfn_moved(struct vm_area_struct *vma)
1138 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
1139 unsigned long pfn, unsigned long addr,
1140 unsigned long size);
1141 extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
1143 extern int track_pfn_copy(struct vm_area_struct *vma);
1144 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
1145 unsigned long size);
1146 extern void untrack_pfn_moved(struct vm_area_struct *vma);
1150 #ifdef __HAVE_COLOR_ZERO_PAGE
1151 static inline int is_zero_pfn(unsigned long pfn)
1153 extern unsigned long zero_pfn;
1154 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
1155 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
1158 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
1161 static inline int is_zero_pfn(unsigned long pfn)
1163 extern unsigned long zero_pfn;
1164 return pfn == zero_pfn;
1167 static inline unsigned long my_zero_pfn(unsigned long addr)
1169 extern unsigned long zero_pfn;
1174 static inline int is_zero_pfn(unsigned long pfn)
1179 static inline unsigned long my_zero_pfn(unsigned long addr)
1183 #endif /* CONFIG_MMU */
1187 #ifndef CONFIG_TRANSPARENT_HUGEPAGE
1188 static inline int pmd_trans_huge(pmd_t pmd)
1193 static inline int pmd_write(pmd_t pmd)
1198 #endif /* pmd_write */
1199 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1202 static inline int pud_write(pud_t pud)
1207 #endif /* pud_write */
1209 #if !defined(CONFIG_ARCH_HAS_PTE_DEVMAP) || !defined(CONFIG_TRANSPARENT_HUGEPAGE)
1210 static inline int pmd_devmap(pmd_t pmd)
1214 static inline int pud_devmap(pud_t pud)
1218 static inline int pgd_devmap(pgd_t pgd)
1224 #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \
1225 (defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
1226 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD))
1227 static inline int pud_trans_huge(pud_t pud)
1233 /* See pmd_none_or_trans_huge_or_clear_bad for discussion. */
1234 static inline int pud_none_or_trans_huge_or_dev_or_clear_bad(pud_t *pud)
1236 pud_t pudval = READ_ONCE(*pud);
1238 if (pud_none(pudval) || pud_trans_huge(pudval) || pud_devmap(pudval))
1240 if (unlikely(pud_bad(pudval))) {
1247 /* See pmd_trans_unstable for discussion. */
1248 static inline int pud_trans_unstable(pud_t *pud)
1250 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
1251 defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)
1252 return pud_none_or_trans_huge_or_dev_or_clear_bad(pud);
1258 #ifndef pmd_read_atomic
1259 static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
1262 * Depend on compiler for an atomic pmd read. NOTE: this is
1263 * only going to work, if the pmdval_t isn't larger than
1270 #ifndef arch_needs_pgtable_deposit
1271 #define arch_needs_pgtable_deposit() (false)
1274 * This function is meant to be used by sites walking pagetables with
1275 * the mmap_lock held in read mode to protect against MADV_DONTNEED and
1276 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
1277 * into a null pmd and the transhuge page fault can convert a null pmd
1278 * into an hugepmd or into a regular pmd (if the hugepage allocation
1279 * fails). While holding the mmap_lock in read mode the pmd becomes
1280 * stable and stops changing under us only if it's not null and not a
1281 * transhuge pmd. When those races occurs and this function makes a
1282 * difference vs the standard pmd_none_or_clear_bad, the result is
1283 * undefined so behaving like if the pmd was none is safe (because it
1284 * can return none anyway). The compiler level barrier() is critically
1285 * important to compute the two checks atomically on the same pmdval.
1287 * For 32bit kernels with a 64bit large pmd_t this automatically takes
1288 * care of reading the pmd atomically to avoid SMP race conditions
1289 * against pmd_populate() when the mmap_lock is hold for reading by the
1290 * caller (a special atomic read not done by "gcc" as in the generic
1291 * version above, is also needed when THP is disabled because the page
1292 * fault can populate the pmd from under us).
1294 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
1296 pmd_t pmdval = pmd_read_atomic(pmd);
1298 * The barrier will stabilize the pmdval in a register or on
1299 * the stack so that it will stop changing under the code.
1301 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
1302 * pmd_read_atomic is allowed to return a not atomic pmdval
1303 * (for example pointing to an hugepage that has never been
1304 * mapped in the pmd). The below checks will only care about
1305 * the low part of the pmd with 32bit PAE x86 anyway, with the
1306 * exception of pmd_none(). So the important thing is that if
1307 * the low part of the pmd is found null, the high part will
1308 * be also null or the pmd_none() check below would be
1311 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1315 * !pmd_present() checks for pmd migration entries
1317 * The complete check uses is_pmd_migration_entry() in linux/swapops.h
1318 * But using that requires moving current function and pmd_trans_unstable()
1319 * to linux/swapops.h to resolve dependency, which is too much code move.
1321 * !pmd_present() is equivalent to is_pmd_migration_entry() currently,
1322 * because !pmd_present() pages can only be under migration not swapped
1325 * pmd_none() is preserved for future condition checks on pmd migration
1326 * entries and not confusing with this function name, although it is
1327 * redundant with !pmd_present().
1329 if (pmd_none(pmdval) || pmd_trans_huge(pmdval) ||
1330 (IS_ENABLED(CONFIG_ARCH_ENABLE_THP_MIGRATION) && !pmd_present(pmdval)))
1332 if (unlikely(pmd_bad(pmdval))) {
1340 * This is a noop if Transparent Hugepage Support is not built into
1341 * the kernel. Otherwise it is equivalent to
1342 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
1343 * places that already verified the pmd is not none and they want to
1344 * walk ptes while holding the mmap sem in read mode (write mode don't
1345 * need this). If THP is not enabled, the pmd can't go away under the
1346 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
1347 * run a pmd_trans_unstable before walking the ptes after
1348 * split_huge_pmd returns (because it may have run when the pmd become
1349 * null, but then a page fault can map in a THP and not a regular page).
1351 static inline int pmd_trans_unstable(pmd_t *pmd)
1353 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1354 return pmd_none_or_trans_huge_or_clear_bad(pmd);
1361 * the ordering of these checks is important for pmds with _page_devmap set.
1362 * if we check pmd_trans_unstable() first we will trip the bad_pmd() check
1363 * inside of pmd_none_or_trans_huge_or_clear_bad(). this will end up correctly
1364 * returning 1 but not before it spams dmesg with the pmd_clear_bad() output.
1366 static inline int pmd_devmap_trans_unstable(pmd_t *pmd)
1368 return pmd_devmap(*pmd) || pmd_trans_unstable(pmd);
1371 #ifndef CONFIG_NUMA_BALANCING
1373 * Technically a PTE can be PROTNONE even when not doing NUMA balancing but
1374 * the only case the kernel cares is for NUMA balancing and is only ever set
1375 * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked
1376 * _PAGE_PROTNONE so by default, implement the helper as "always no". It
1377 * is the responsibility of the caller to distinguish between PROT_NONE
1378 * protections and NUMA hinting fault protections.
1380 static inline int pte_protnone(pte_t pte)
1385 static inline int pmd_protnone(pmd_t pmd)
1389 #endif /* CONFIG_NUMA_BALANCING */
1391 #endif /* CONFIG_MMU */
1393 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
1395 #ifndef __PAGETABLE_P4D_FOLDED
1396 int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot);
1397 int p4d_clear_huge(p4d_t *p4d);
1399 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1403 static inline int p4d_clear_huge(p4d_t *p4d)
1407 #endif /* !__PAGETABLE_P4D_FOLDED */
1409 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot);
1410 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot);
1411 int pud_clear_huge(pud_t *pud);
1412 int pmd_clear_huge(pmd_t *pmd);
1413 int p4d_free_pud_page(p4d_t *p4d, unsigned long addr);
1414 int pud_free_pmd_page(pud_t *pud, unsigned long addr);
1415 int pmd_free_pte_page(pmd_t *pmd, unsigned long addr);
1416 #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */
1417 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1421 static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
1425 static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
1429 static inline int p4d_clear_huge(p4d_t *p4d)
1433 static inline int pud_clear_huge(pud_t *pud)
1437 static inline int pmd_clear_huge(pmd_t *pmd)
1441 static inline int p4d_free_pud_page(p4d_t *p4d, unsigned long addr)
1445 static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr)
1449 static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
1453 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
1455 #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
1456 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1458 * ARCHes with special requirements for evicting THP backing TLB entries can
1459 * implement this. Otherwise also, it can help optimize normal TLB flush in
1460 * THP regime. Stock flush_tlb_range() typically has optimization to nuke the
1461 * entire TLB if flush span is greater than a threshold, which will
1462 * likely be true for a single huge page. Thus a single THP flush will
1463 * invalidate the entire TLB which is not desirable.
1464 * e.g. see arch/arc: flush_pmd_tlb_range
1466 #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1467 #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1469 #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG()
1470 #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG()
1475 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
1476 unsigned long size, pgprot_t *vma_prot);
1478 #ifndef CONFIG_X86_ESPFIX64
1479 static inline void init_espfix_bsp(void) { }
1482 extern void __init pgtable_cache_init(void);
1484 #ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED
1485 static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot)
1490 static inline bool arch_has_pfn_modify_check(void)
1494 #endif /* !_HAVE_ARCH_PFN_MODIFY_ALLOWED */
1497 * Architecture PAGE_KERNEL_* fallbacks
1499 * Some architectures don't define certain PAGE_KERNEL_* flags. This is either
1500 * because they really don't support them, or the port needs to be updated to
1501 * reflect the required functionality. Below are a set of relatively safe
1502 * fallbacks, as best effort, which we can count on in lieu of the architectures
1503 * not defining them on their own yet.
1506 #ifndef PAGE_KERNEL_RO
1507 # define PAGE_KERNEL_RO PAGE_KERNEL
1510 #ifndef PAGE_KERNEL_EXEC
1511 # define PAGE_KERNEL_EXEC PAGE_KERNEL
1515 * Page Table Modification bits for pgtbl_mod_mask.
1517 * These are used by the p?d_alloc_track*() set of functions an in the generic
1518 * vmalloc/ioremap code to track at which page-table levels entries have been
1519 * modified. Based on that the code can better decide when vmalloc and ioremap
1520 * mapping changes need to be synchronized to other page-tables in the system.
1522 #define __PGTBL_PGD_MODIFIED 0
1523 #define __PGTBL_P4D_MODIFIED 1
1524 #define __PGTBL_PUD_MODIFIED 2
1525 #define __PGTBL_PMD_MODIFIED 3
1526 #define __PGTBL_PTE_MODIFIED 4
1528 #define PGTBL_PGD_MODIFIED BIT(__PGTBL_PGD_MODIFIED)
1529 #define PGTBL_P4D_MODIFIED BIT(__PGTBL_P4D_MODIFIED)
1530 #define PGTBL_PUD_MODIFIED BIT(__PGTBL_PUD_MODIFIED)
1531 #define PGTBL_PMD_MODIFIED BIT(__PGTBL_PMD_MODIFIED)
1532 #define PGTBL_PTE_MODIFIED BIT(__PGTBL_PTE_MODIFIED)
1534 /* Page-Table Modification Mask */
1535 typedef unsigned int pgtbl_mod_mask;
1537 #endif /* !__ASSEMBLY__ */
1539 #if !defined(MAX_POSSIBLE_PHYSMEM_BITS) && !defined(CONFIG_64BIT)
1540 #ifdef CONFIG_PHYS_ADDR_T_64BIT
1542 * ZSMALLOC needs to know the highest PFN on 32-bit architectures
1543 * with physical address space extension, but falls back to
1544 * BITS_PER_LONG otherwise.
1546 #error Missing MAX_POSSIBLE_PHYSMEM_BITS definition
1548 #define MAX_POSSIBLE_PHYSMEM_BITS 32
1552 #ifndef has_transparent_hugepage
1553 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1554 #define has_transparent_hugepage() 1
1556 #define has_transparent_hugepage() 0
1561 * On some architectures it depends on the mm if the p4d/pud or pmd
1562 * layer of the page table hierarchy is folded or not.
1564 #ifndef mm_p4d_folded
1565 #define mm_p4d_folded(mm) __is_defined(__PAGETABLE_P4D_FOLDED)
1568 #ifndef mm_pud_folded
1569 #define mm_pud_folded(mm) __is_defined(__PAGETABLE_PUD_FOLDED)
1572 #ifndef mm_pmd_folded
1573 #define mm_pmd_folded(mm) __is_defined(__PAGETABLE_PMD_FOLDED)
1576 #ifndef p4d_offset_lockless
1577 #define p4d_offset_lockless(pgdp, pgd, address) p4d_offset(&(pgd), address)
1579 #ifndef pud_offset_lockless
1580 #define pud_offset_lockless(p4dp, p4d, address) pud_offset(&(p4d), address)
1582 #ifndef pmd_offset_lockless
1583 #define pmd_offset_lockless(pudp, pud, address) pmd_offset(&(pud), address)
1587 * p?d_leaf() - true if this entry is a final mapping to a physical address.
1588 * This differs from p?d_huge() by the fact that they are always available (if
1589 * the architecture supports large pages at the appropriate level) even
1590 * if CONFIG_HUGETLB_PAGE is not defined.
1591 * Only meaningful when called on a valid entry.
1594 #define pgd_leaf(x) 0
1597 #define p4d_leaf(x) 0
1600 #define pud_leaf(x) 0
1603 #define pmd_leaf(x) 0
1606 #ifndef pgd_leaf_size
1607 #define pgd_leaf_size(x) (1ULL << PGDIR_SHIFT)
1609 #ifndef p4d_leaf_size
1610 #define p4d_leaf_size(x) P4D_SIZE
1612 #ifndef pud_leaf_size
1613 #define pud_leaf_size(x) PUD_SIZE
1615 #ifndef pmd_leaf_size
1616 #define pmd_leaf_size(x) PMD_SIZE
1618 #ifndef pte_leaf_size
1619 #define pte_leaf_size(x) PAGE_SIZE
1623 * Some architectures have MMUs that are configurable or selectable at boot
1624 * time. These lead to variable PTRS_PER_x. For statically allocated arrays it
1625 * helps to have a static maximum value.
1628 #ifndef MAX_PTRS_PER_PTE
1629 #define MAX_PTRS_PER_PTE PTRS_PER_PTE
1632 #ifndef MAX_PTRS_PER_PMD
1633 #define MAX_PTRS_PER_PMD PTRS_PER_PMD
1636 #ifndef MAX_PTRS_PER_PUD
1637 #define MAX_PTRS_PER_PUD PTRS_PER_PUD
1640 #ifndef MAX_PTRS_PER_P4D
1641 #define MAX_PTRS_PER_P4D PTRS_PER_P4D
1644 #endif /* _LINUX_PGTABLE_H */