1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _LINUX_PGTABLE_H
3 #define _LINUX_PGTABLE_H
6 #include <asm/pgtable.h>
11 #include <linux/mm_types.h>
12 #include <linux/bug.h>
13 #include <linux/errno.h>
14 #include <asm-generic/pgtable_uffd.h>
16 #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \
17 defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS
18 #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED
22 * On almost all architectures and configurations, 0 can be used as the
23 * upper ceiling to free_pgtables(): on many architectures it has the same
24 * effect as using TASK_SIZE. However, there is one configuration which
25 * must impose a more careful limit, to avoid freeing kernel pgtables.
27 #ifndef USER_PGTABLES_CEILING
28 #define USER_PGTABLES_CEILING 0UL
32 * A page table page can be thought of an array like this: pXd_t[PTRS_PER_PxD]
34 * The pXx_index() functions return the index of the entry in the page
35 * table page which would control the given virtual address
37 * As these functions may be used by the same code for different levels of
38 * the page table folding, they are always available, regardless of
39 * CONFIG_PGTABLE_LEVELS value. For the folded levels they simply return 0
40 * because in such cases PTRS_PER_PxD equals 1.
43 static inline unsigned long pte_index(unsigned long address)
45 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
49 static inline unsigned long pmd_index(unsigned long address)
51 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
53 #define pmd_index pmd_index
57 static inline unsigned long pud_index(unsigned long address)
59 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
61 #define pud_index pud_index
65 /* Must be a compile-time constant, so implement it as a macro */
66 #define pgd_index(a) (((a) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
69 #ifndef pte_offset_kernel
70 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
72 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
74 #define pte_offset_kernel pte_offset_kernel
77 #if defined(CONFIG_HIGHPTE)
78 #define pte_offset_map(dir, address) \
79 ((pte_t *)kmap_atomic(pmd_page(*(dir))) + \
81 #define pte_unmap(pte) kunmap_atomic((pte))
83 #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address))
84 #define pte_unmap(pte) ((void)(pte)) /* NOP */
87 /* Find an entry in the second-level page table.. */
89 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
91 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
93 #define pmd_offset pmd_offset
97 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address)
99 return (pud_t *)p4d_page_vaddr(*p4d) + pud_index(address);
101 #define pud_offset pud_offset
104 static inline pgd_t *pgd_offset_pgd(pgd_t *pgd, unsigned long address)
106 return (pgd + pgd_index(address));
110 * a shortcut to get a pgd_t in a given mm
113 #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address))
117 * a shortcut which implies the use of the kernel's pgd, instead
121 #define pgd_offset_k(address) pgd_offset(&init_mm, (address))
125 * In many cases it is known that a virtual address is mapped at PMD or PTE
126 * level, so instead of traversing all the page table levels, we can get a
127 * pointer to the PMD entry in user or kernel page table or translate a virtual
128 * address to the pointer in the PTE in the kernel page tables with simple
131 static inline pmd_t *pmd_off(struct mm_struct *mm, unsigned long va)
133 return pmd_offset(pud_offset(p4d_offset(pgd_offset(mm, va), va), va), va);
136 static inline pmd_t *pmd_off_k(unsigned long va)
138 return pmd_offset(pud_offset(p4d_offset(pgd_offset_k(va), va), va), va);
141 static inline pte_t *virt_to_kpte(unsigned long vaddr)
143 pmd_t *pmd = pmd_off_k(vaddr);
145 return pmd_none(*pmd) ? NULL : pte_offset_kernel(pmd, vaddr);
148 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
149 extern int ptep_set_access_flags(struct vm_area_struct *vma,
150 unsigned long address, pte_t *ptep,
151 pte_t entry, int dirty);
154 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
155 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
156 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
157 unsigned long address, pmd_t *pmdp,
158 pmd_t entry, int dirty);
159 extern int pudp_set_access_flags(struct vm_area_struct *vma,
160 unsigned long address, pud_t *pudp,
161 pud_t entry, int dirty);
163 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
164 unsigned long address, pmd_t *pmdp,
165 pmd_t entry, int dirty)
170 static inline int pudp_set_access_flags(struct vm_area_struct *vma,
171 unsigned long address, pud_t *pudp,
172 pud_t entry, int dirty)
177 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
180 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
181 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
182 unsigned long address,
190 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
195 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
196 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
197 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
198 unsigned long address,
206 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
210 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
211 unsigned long address,
217 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
220 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
221 int ptep_clear_flush_young(struct vm_area_struct *vma,
222 unsigned long address, pte_t *ptep);
225 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
226 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
227 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
228 unsigned long address, pmd_t *pmdp);
231 * Despite relevant to THP only, this API is called from generic rmap code
232 * under PageTransHuge(), hence needs a dummy implementation for !THP
234 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
235 unsigned long address, pmd_t *pmdp)
240 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
243 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
244 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
245 unsigned long address,
249 pte_clear(mm, address, ptep);
254 #ifndef __HAVE_ARCH_PTEP_GET
255 static inline pte_t ptep_get(pte_t *ptep)
257 return READ_ONCE(*ptep);
261 #ifdef CONFIG_GUP_GET_PTE_LOW_HIGH
263 * WARNING: only to be used in the get_user_pages_fast() implementation.
265 * With get_user_pages_fast(), we walk down the pagetables without taking any
266 * locks. For this we would like to load the pointers atomically, but sometimes
267 * that is not possible (e.g. without expensive cmpxchg8b on x86_32 PAE). What
268 * we do have is the guarantee that a PTE will only either go from not present
269 * to present, or present to not present or both -- it will not switch to a
270 * completely different present page without a TLB flush in between; something
271 * that we are blocking by holding interrupts off.
273 * Setting ptes from not present to present goes:
275 * ptep->pte_high = h;
279 * And present to not present goes:
283 * ptep->pte_high = 0;
285 * We must ensure here that the load of pte_low sees 'l' IFF pte_high sees 'h'.
286 * We load pte_high *after* loading pte_low, which ensures we don't see an older
287 * value of pte_high. *Then* we recheck pte_low, which ensures that we haven't
288 * picked up a changed pte high. We might have gotten rubbish values from
289 * pte_low and pte_high, but we are guaranteed that pte_low will not have the
290 * present bit set *unless* it is 'l'. Because get_user_pages_fast() only
291 * operates on present ptes we're safe.
293 static inline pte_t ptep_get_lockless(pte_t *ptep)
298 pte.pte_low = ptep->pte_low;
300 pte.pte_high = ptep->pte_high;
302 } while (unlikely(pte.pte_low != ptep->pte_low));
306 #else /* CONFIG_GUP_GET_PTE_LOW_HIGH */
308 * We require that the PTE can be read atomically.
310 static inline pte_t ptep_get_lockless(pte_t *ptep)
312 return ptep_get(ptep);
314 #endif /* CONFIG_GUP_GET_PTE_LOW_HIGH */
316 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
317 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
318 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
319 unsigned long address,
326 #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */
327 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
328 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
329 unsigned long address,
337 #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */
338 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
340 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
341 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
342 static inline pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma,
343 unsigned long address, pmd_t *pmdp,
346 return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp);
350 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL
351 static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm,
352 unsigned long address, pud_t *pudp,
355 return pudp_huge_get_and_clear(mm, address, pudp);
358 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
360 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
361 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
362 unsigned long address, pte_t *ptep,
366 pte = ptep_get_and_clear(mm, address, ptep);
373 * If two threads concurrently fault at the same page, the thread that
374 * won the race updates the PTE and its local TLB/Cache. The other thread
375 * gives up, simply does nothing, and continues; on architectures where
376 * software can update TLB, local TLB can be updated here to avoid next page
377 * fault. This function updates TLB only, do nothing with cache or others.
378 * It is the difference with function update_mmu_cache.
380 #ifndef __HAVE_ARCH_UPDATE_MMU_TLB
381 static inline void update_mmu_tlb(struct vm_area_struct *vma,
382 unsigned long address, pte_t *ptep)
385 #define __HAVE_ARCH_UPDATE_MMU_TLB
389 * Some architectures may be able to avoid expensive synchronization
390 * primitives when modifications are made to PTE's which are already
391 * not present, or in the process of an address space destruction.
393 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
394 static inline void pte_clear_not_present_full(struct mm_struct *mm,
395 unsigned long address,
399 pte_clear(mm, address, ptep);
403 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
404 extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
405 unsigned long address,
409 #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
410 extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,
411 unsigned long address,
413 extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma,
414 unsigned long address,
418 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
420 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
422 pte_t old_pte = *ptep;
423 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
428 * On some architectures hardware does not set page access bit when accessing
429 * memory page, it is responsibilty of software setting this bit. It brings
430 * out extra page fault penalty to track page access bit. For optimization page
431 * access bit can be set during all page fault flow on these arches.
432 * To be differentiate with macro pte_mkyoung, this macro is used on platforms
433 * where software maintains page access bit.
435 #ifndef pte_sw_mkyoung
436 static inline pte_t pte_sw_mkyoung(pte_t pte)
440 #define pte_sw_mkyoung pte_sw_mkyoung
443 #ifndef pte_savedwrite
444 #define pte_savedwrite pte_write
447 #ifndef pte_mk_savedwrite
448 #define pte_mk_savedwrite pte_mkwrite
451 #ifndef pte_clear_savedwrite
452 #define pte_clear_savedwrite pte_wrprotect
455 #ifndef pmd_savedwrite
456 #define pmd_savedwrite pmd_write
459 #ifndef pmd_mk_savedwrite
460 #define pmd_mk_savedwrite pmd_mkwrite
463 #ifndef pmd_clear_savedwrite
464 #define pmd_clear_savedwrite pmd_wrprotect
467 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
468 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
469 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
470 unsigned long address, pmd_t *pmdp)
472 pmd_t old_pmd = *pmdp;
473 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
476 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
477 unsigned long address, pmd_t *pmdp)
481 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
483 #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT
484 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
485 static inline void pudp_set_wrprotect(struct mm_struct *mm,
486 unsigned long address, pud_t *pudp)
488 pud_t old_pud = *pudp;
490 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud));
493 static inline void pudp_set_wrprotect(struct mm_struct *mm,
494 unsigned long address, pud_t *pudp)
498 #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */
501 #ifndef pmdp_collapse_flush
502 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
503 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
504 unsigned long address, pmd_t *pmdp);
506 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
507 unsigned long address,
513 #define pmdp_collapse_flush pmdp_collapse_flush
514 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
517 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
518 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
522 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
523 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
526 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
528 * This is an implementation of pmdp_establish() that is only suitable for an
529 * architecture that doesn't have hardware dirty/accessed bits. In this case we
530 * can't race with CPU which sets these bits and non-atomic aproach is fine.
532 static inline pmd_t generic_pmdp_establish(struct vm_area_struct *vma,
533 unsigned long address, pmd_t *pmdp, pmd_t pmd)
535 pmd_t old_pmd = *pmdp;
536 set_pmd_at(vma->vm_mm, address, pmdp, pmd);
541 #ifndef __HAVE_ARCH_PMDP_INVALIDATE
542 extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
546 #ifndef __HAVE_ARCH_PTE_SAME
547 static inline int pte_same(pte_t pte_a, pte_t pte_b)
549 return pte_val(pte_a) == pte_val(pte_b);
553 #ifndef __HAVE_ARCH_PTE_UNUSED
555 * Some architectures provide facilities to virtualization guests
556 * so that they can flag allocated pages as unused. This allows the
557 * host to transparently reclaim unused pages. This function returns
558 * whether the pte's page is unused.
560 static inline int pte_unused(pte_t pte)
566 #ifndef pte_access_permitted
567 #define pte_access_permitted(pte, write) \
568 (pte_present(pte) && (!(write) || pte_write(pte)))
571 #ifndef pmd_access_permitted
572 #define pmd_access_permitted(pmd, write) \
573 (pmd_present(pmd) && (!(write) || pmd_write(pmd)))
576 #ifndef pud_access_permitted
577 #define pud_access_permitted(pud, write) \
578 (pud_present(pud) && (!(write) || pud_write(pud)))
581 #ifndef p4d_access_permitted
582 #define p4d_access_permitted(p4d, write) \
583 (p4d_present(p4d) && (!(write) || p4d_write(p4d)))
586 #ifndef pgd_access_permitted
587 #define pgd_access_permitted(pgd, write) \
588 (pgd_present(pgd) && (!(write) || pgd_write(pgd)))
591 #ifndef __HAVE_ARCH_PMD_SAME
592 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
594 return pmd_val(pmd_a) == pmd_val(pmd_b);
597 static inline int pud_same(pud_t pud_a, pud_t pud_b)
599 return pud_val(pud_a) == pud_val(pud_b);
603 #ifndef __HAVE_ARCH_P4D_SAME
604 static inline int p4d_same(p4d_t p4d_a, p4d_t p4d_b)
606 return p4d_val(p4d_a) == p4d_val(p4d_b);
610 #ifndef __HAVE_ARCH_PGD_SAME
611 static inline int pgd_same(pgd_t pgd_a, pgd_t pgd_b)
613 return pgd_val(pgd_a) == pgd_val(pgd_b);
618 * Use set_p*_safe(), and elide TLB flushing, when confident that *no*
619 * TLB flush will be required as a result of the "set". For example, use
620 * in scenarios where it is known ahead of time that the routine is
621 * setting non-present entries, or re-setting an existing entry to the
622 * same value. Otherwise, use the typical "set" helpers and flush the
625 #define set_pte_safe(ptep, pte) \
627 WARN_ON_ONCE(pte_present(*ptep) && !pte_same(*ptep, pte)); \
628 set_pte(ptep, pte); \
631 #define set_pmd_safe(pmdp, pmd) \
633 WARN_ON_ONCE(pmd_present(*pmdp) && !pmd_same(*pmdp, pmd)); \
634 set_pmd(pmdp, pmd); \
637 #define set_pud_safe(pudp, pud) \
639 WARN_ON_ONCE(pud_present(*pudp) && !pud_same(*pudp, pud)); \
640 set_pud(pudp, pud); \
643 #define set_p4d_safe(p4dp, p4d) \
645 WARN_ON_ONCE(p4d_present(*p4dp) && !p4d_same(*p4dp, p4d)); \
646 set_p4d(p4dp, p4d); \
649 #define set_pgd_safe(pgdp, pgd) \
651 WARN_ON_ONCE(pgd_present(*pgdp) && !pgd_same(*pgdp, pgd)); \
652 set_pgd(pgdp, pgd); \
655 #ifndef __HAVE_ARCH_DO_SWAP_PAGE
657 * Some architectures support metadata associated with a page. When a
658 * page is being swapped out, this metadata must be saved so it can be
659 * restored when the page is swapped back in. SPARC M7 and newer
660 * processors support an ADI (Application Data Integrity) tag for the
661 * page as metadata for the page. arch_do_swap_page() can restore this
662 * metadata when a page is swapped back in.
664 static inline void arch_do_swap_page(struct mm_struct *mm,
665 struct vm_area_struct *vma,
667 pte_t pte, pte_t oldpte)
673 #ifndef __HAVE_ARCH_UNMAP_ONE
675 * Some architectures support metadata associated with a page. When a
676 * page is being swapped out, this metadata must be saved so it can be
677 * restored when the page is swapped back in. SPARC M7 and newer
678 * processors support an ADI (Application Data Integrity) tag for the
679 * page as metadata for the page. arch_unmap_one() can save this
680 * metadata on a swap-out of a page.
682 static inline int arch_unmap_one(struct mm_struct *mm,
683 struct vm_area_struct *vma,
692 * Allow architectures to preserve additional metadata associated with
693 * swapped-out pages. The corresponding __HAVE_ARCH_SWAP_* macros and function
694 * prototypes must be defined in the arch-specific asm/pgtable.h file.
696 #ifndef __HAVE_ARCH_PREPARE_TO_SWAP
697 static inline int arch_prepare_to_swap(struct page *page)
703 #ifndef __HAVE_ARCH_SWAP_INVALIDATE
704 static inline void arch_swap_invalidate_page(int type, pgoff_t offset)
708 static inline void arch_swap_invalidate_area(int type)
713 #ifndef __HAVE_ARCH_SWAP_RESTORE
714 static inline void arch_swap_restore(swp_entry_t entry, struct page *page)
719 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
720 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
723 #ifndef __HAVE_ARCH_MOVE_PTE
724 #define move_pte(pte, prot, old_addr, new_addr) (pte)
727 #ifndef pte_accessible
728 # define pte_accessible(mm, pte) ((void)(pte), 1)
731 #ifndef flush_tlb_fix_spurious_fault
732 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
736 * When walking page tables, get the address of the next boundary,
737 * or the end address of the range if that comes earlier. Although no
738 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
741 #define pgd_addr_end(addr, end) \
742 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
743 (__boundary - 1 < (end) - 1)? __boundary: (end); \
747 #define p4d_addr_end(addr, end) \
748 ({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \
749 (__boundary - 1 < (end) - 1)? __boundary: (end); \
754 #define pud_addr_end(addr, end) \
755 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
756 (__boundary - 1 < (end) - 1)? __boundary: (end); \
761 #define pmd_addr_end(addr, end) \
762 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
763 (__boundary - 1 < (end) - 1)? __boundary: (end); \
768 * When walking page tables, we usually want to skip any p?d_none entries;
769 * and any p?d_bad entries - reporting the error before resetting to none.
770 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
772 void pgd_clear_bad(pgd_t *);
774 #ifndef __PAGETABLE_P4D_FOLDED
775 void p4d_clear_bad(p4d_t *);
777 #define p4d_clear_bad(p4d) do { } while (0)
780 #ifndef __PAGETABLE_PUD_FOLDED
781 void pud_clear_bad(pud_t *);
783 #define pud_clear_bad(p4d) do { } while (0)
786 void pmd_clear_bad(pmd_t *);
788 static inline int pgd_none_or_clear_bad(pgd_t *pgd)
792 if (unlikely(pgd_bad(*pgd))) {
799 static inline int p4d_none_or_clear_bad(p4d_t *p4d)
803 if (unlikely(p4d_bad(*p4d))) {
810 static inline int pud_none_or_clear_bad(pud_t *pud)
814 if (unlikely(pud_bad(*pud))) {
821 static inline int pmd_none_or_clear_bad(pmd_t *pmd)
825 if (unlikely(pmd_bad(*pmd))) {
832 static inline pte_t __ptep_modify_prot_start(struct vm_area_struct *vma,
837 * Get the current pte state, but zero it out to make it
838 * non-present, preventing the hardware from asynchronously
841 return ptep_get_and_clear(vma->vm_mm, addr, ptep);
844 static inline void __ptep_modify_prot_commit(struct vm_area_struct *vma,
846 pte_t *ptep, pte_t pte)
849 * The pte is non-present, so there's no hardware state to
852 set_pte_at(vma->vm_mm, addr, ptep, pte);
855 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
857 * Start a pte protection read-modify-write transaction, which
858 * protects against asynchronous hardware modifications to the pte.
859 * The intention is not to prevent the hardware from making pte
860 * updates, but to prevent any updates it may make from being lost.
862 * This does not protect against other software modifications of the
863 * pte; the appropriate pte lock must be held over the transation.
865 * Note that this interface is intended to be batchable, meaning that
866 * ptep_modify_prot_commit may not actually update the pte, but merely
867 * queue the update to be done at some later time. The update must be
868 * actually committed before the pte lock is released, however.
870 static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma,
874 return __ptep_modify_prot_start(vma, addr, ptep);
878 * Commit an update to a pte, leaving any hardware-controlled bits in
879 * the PTE unmodified.
881 static inline void ptep_modify_prot_commit(struct vm_area_struct *vma,
883 pte_t *ptep, pte_t old_pte, pte_t pte)
885 __ptep_modify_prot_commit(vma, addr, ptep, pte);
887 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
888 #endif /* CONFIG_MMU */
891 * No-op macros that just return the current protection value. Defined here
892 * because these macros can be used even if CONFIG_MMU is not defined.
896 #define pgprot_nx(prot) (prot)
899 #ifndef pgprot_noncached
900 #define pgprot_noncached(prot) (prot)
903 #ifndef pgprot_writecombine
904 #define pgprot_writecombine pgprot_noncached
907 #ifndef pgprot_writethrough
908 #define pgprot_writethrough pgprot_noncached
911 #ifndef pgprot_device
912 #define pgprot_device pgprot_noncached
916 #ifndef pgprot_modify
917 #define pgprot_modify pgprot_modify
918 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
920 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot)))
921 newprot = pgprot_noncached(newprot);
922 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot)))
923 newprot = pgprot_writecombine(newprot);
924 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot)))
925 newprot = pgprot_device(newprot);
929 #endif /* CONFIG_MMU */
931 #ifndef pgprot_encrypted
932 #define pgprot_encrypted(prot) (prot)
935 #ifndef pgprot_decrypted
936 #define pgprot_decrypted(prot) (prot)
940 * A facility to provide lazy MMU batching. This allows PTE updates and
941 * page invalidations to be delayed until a call to leave lazy MMU mode
942 * is issued. Some architectures may benefit from doing this, and it is
943 * beneficial for both shadow and direct mode hypervisors, which may batch
944 * the PTE updates which happen during this window. Note that using this
945 * interface requires that read hazards be removed from the code. A read
946 * hazard could result in the direct mode hypervisor case, since the actual
947 * write to the page tables may not yet have taken place, so reads though
948 * a raw PTE pointer after it has been modified are not guaranteed to be
949 * up to date. This mode can only be entered and left under the protection of
950 * the page table locks for all page tables which may be modified. In the UP
951 * case, this is required so that preemption is disabled, and in the SMP case,
952 * it must synchronize the delayed page table writes properly on other CPUs.
954 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
955 #define arch_enter_lazy_mmu_mode() do {} while (0)
956 #define arch_leave_lazy_mmu_mode() do {} while (0)
957 #define arch_flush_lazy_mmu_mode() do {} while (0)
961 * A facility to provide batching of the reload of page tables and
962 * other process state with the actual context switch code for
963 * paravirtualized guests. By convention, only one of the batched
964 * update (lazy) modes (CPU, MMU) should be active at any given time,
965 * entry should never be nested, and entry and exits should always be
966 * paired. This is for sanity of maintaining and reasoning about the
967 * kernel code. In this case, the exit (end of the context switch) is
968 * in architecture-specific code, and so doesn't need a generic
971 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
972 #define arch_start_context_switch(prev) do {} while (0)
975 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
976 #ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION
977 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
982 static inline int pmd_swp_soft_dirty(pmd_t pmd)
987 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
992 #else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */
993 static inline int pte_soft_dirty(pte_t pte)
998 static inline int pmd_soft_dirty(pmd_t pmd)
1003 static inline pte_t pte_mksoft_dirty(pte_t pte)
1008 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
1013 static inline pte_t pte_clear_soft_dirty(pte_t pte)
1018 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
1023 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
1028 static inline int pte_swp_soft_dirty(pte_t pte)
1033 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
1038 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1043 static inline int pmd_swp_soft_dirty(pmd_t pmd)
1048 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1054 #ifndef __HAVE_PFNMAP_TRACKING
1056 * Interfaces that can be used by architecture code to keep track of
1057 * memory type of pfn mappings specified by the remap_pfn_range,
1062 * track_pfn_remap is called when a _new_ pfn mapping is being established
1063 * by remap_pfn_range() for physical range indicated by pfn and size.
1065 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
1066 unsigned long pfn, unsigned long addr,
1073 * track_pfn_insert is called when a _new_ single pfn is established
1074 * by vmf_insert_pfn().
1076 static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
1082 * track_pfn_copy is called when vma that is covering the pfnmap gets
1083 * copied through copy_page_range().
1085 static inline int track_pfn_copy(struct vm_area_struct *vma)
1091 * untrack_pfn is called while unmapping a pfnmap for a region.
1092 * untrack can be called for a specific region indicated by pfn and size or
1093 * can be for the entire vma (in which case pfn, size are zero).
1095 static inline void untrack_pfn(struct vm_area_struct *vma,
1096 unsigned long pfn, unsigned long size)
1101 * untrack_pfn_moved is called while mremapping a pfnmap for a new region.
1103 static inline void untrack_pfn_moved(struct vm_area_struct *vma)
1107 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
1108 unsigned long pfn, unsigned long addr,
1109 unsigned long size);
1110 extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
1112 extern int track_pfn_copy(struct vm_area_struct *vma);
1113 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
1114 unsigned long size);
1115 extern void untrack_pfn_moved(struct vm_area_struct *vma);
1118 #ifdef __HAVE_COLOR_ZERO_PAGE
1119 static inline int is_zero_pfn(unsigned long pfn)
1121 extern unsigned long zero_pfn;
1122 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
1123 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
1126 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
1129 static inline int is_zero_pfn(unsigned long pfn)
1131 extern unsigned long zero_pfn;
1132 return pfn == zero_pfn;
1135 static inline unsigned long my_zero_pfn(unsigned long addr)
1137 extern unsigned long zero_pfn;
1144 #ifndef CONFIG_TRANSPARENT_HUGEPAGE
1145 static inline int pmd_trans_huge(pmd_t pmd)
1150 static inline int pmd_write(pmd_t pmd)
1155 #endif /* pmd_write */
1156 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1159 static inline int pud_write(pud_t pud)
1164 #endif /* pud_write */
1166 #if !defined(CONFIG_ARCH_HAS_PTE_DEVMAP) || !defined(CONFIG_TRANSPARENT_HUGEPAGE)
1167 static inline int pmd_devmap(pmd_t pmd)
1171 static inline int pud_devmap(pud_t pud)
1175 static inline int pgd_devmap(pgd_t pgd)
1181 #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \
1182 (defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
1183 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD))
1184 static inline int pud_trans_huge(pud_t pud)
1190 /* See pmd_none_or_trans_huge_or_clear_bad for discussion. */
1191 static inline int pud_none_or_trans_huge_or_dev_or_clear_bad(pud_t *pud)
1193 pud_t pudval = READ_ONCE(*pud);
1195 if (pud_none(pudval) || pud_trans_huge(pudval) || pud_devmap(pudval))
1197 if (unlikely(pud_bad(pudval))) {
1204 /* See pmd_trans_unstable for discussion. */
1205 static inline int pud_trans_unstable(pud_t *pud)
1207 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
1208 defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)
1209 return pud_none_or_trans_huge_or_dev_or_clear_bad(pud);
1215 #ifndef pmd_read_atomic
1216 static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
1219 * Depend on compiler for an atomic pmd read. NOTE: this is
1220 * only going to work, if the pmdval_t isn't larger than
1227 #ifndef arch_needs_pgtable_deposit
1228 #define arch_needs_pgtable_deposit() (false)
1231 * This function is meant to be used by sites walking pagetables with
1232 * the mmap_lock held in read mode to protect against MADV_DONTNEED and
1233 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
1234 * into a null pmd and the transhuge page fault can convert a null pmd
1235 * into an hugepmd or into a regular pmd (if the hugepage allocation
1236 * fails). While holding the mmap_lock in read mode the pmd becomes
1237 * stable and stops changing under us only if it's not null and not a
1238 * transhuge pmd. When those races occurs and this function makes a
1239 * difference vs the standard pmd_none_or_clear_bad, the result is
1240 * undefined so behaving like if the pmd was none is safe (because it
1241 * can return none anyway). The compiler level barrier() is critically
1242 * important to compute the two checks atomically on the same pmdval.
1244 * For 32bit kernels with a 64bit large pmd_t this automatically takes
1245 * care of reading the pmd atomically to avoid SMP race conditions
1246 * against pmd_populate() when the mmap_lock is hold for reading by the
1247 * caller (a special atomic read not done by "gcc" as in the generic
1248 * version above, is also needed when THP is disabled because the page
1249 * fault can populate the pmd from under us).
1251 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
1253 pmd_t pmdval = pmd_read_atomic(pmd);
1255 * The barrier will stabilize the pmdval in a register or on
1256 * the stack so that it will stop changing under the code.
1258 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
1259 * pmd_read_atomic is allowed to return a not atomic pmdval
1260 * (for example pointing to an hugepage that has never been
1261 * mapped in the pmd). The below checks will only care about
1262 * the low part of the pmd with 32bit PAE x86 anyway, with the
1263 * exception of pmd_none(). So the important thing is that if
1264 * the low part of the pmd is found null, the high part will
1265 * be also null or the pmd_none() check below would be
1268 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1272 * !pmd_present() checks for pmd migration entries
1274 * The complete check uses is_pmd_migration_entry() in linux/swapops.h
1275 * But using that requires moving current function and pmd_trans_unstable()
1276 * to linux/swapops.h to resovle dependency, which is too much code move.
1278 * !pmd_present() is equivalent to is_pmd_migration_entry() currently,
1279 * because !pmd_present() pages can only be under migration not swapped
1282 * pmd_none() is preseved for future condition checks on pmd migration
1283 * entries and not confusing with this function name, although it is
1284 * redundant with !pmd_present().
1286 if (pmd_none(pmdval) || pmd_trans_huge(pmdval) ||
1287 (IS_ENABLED(CONFIG_ARCH_ENABLE_THP_MIGRATION) && !pmd_present(pmdval)))
1289 if (unlikely(pmd_bad(pmdval))) {
1297 * This is a noop if Transparent Hugepage Support is not built into
1298 * the kernel. Otherwise it is equivalent to
1299 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
1300 * places that already verified the pmd is not none and they want to
1301 * walk ptes while holding the mmap sem in read mode (write mode don't
1302 * need this). If THP is not enabled, the pmd can't go away under the
1303 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
1304 * run a pmd_trans_unstable before walking the ptes after
1305 * split_huge_pmd returns (because it may have run when the pmd become
1306 * null, but then a page fault can map in a THP and not a regular page).
1308 static inline int pmd_trans_unstable(pmd_t *pmd)
1310 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1311 return pmd_none_or_trans_huge_or_clear_bad(pmd);
1317 #ifndef CONFIG_NUMA_BALANCING
1319 * Technically a PTE can be PROTNONE even when not doing NUMA balancing but
1320 * the only case the kernel cares is for NUMA balancing and is only ever set
1321 * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked
1322 * _PAGE_PROTNONE so by default, implement the helper as "always no". It
1323 * is the responsibility of the caller to distinguish between PROT_NONE
1324 * protections and NUMA hinting fault protections.
1326 static inline int pte_protnone(pte_t pte)
1331 static inline int pmd_protnone(pmd_t pmd)
1335 #endif /* CONFIG_NUMA_BALANCING */
1337 #endif /* CONFIG_MMU */
1339 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
1341 #ifndef __PAGETABLE_P4D_FOLDED
1342 int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot);
1343 int p4d_clear_huge(p4d_t *p4d);
1345 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1349 static inline int p4d_clear_huge(p4d_t *p4d)
1353 #endif /* !__PAGETABLE_P4D_FOLDED */
1355 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot);
1356 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot);
1357 int pud_clear_huge(pud_t *pud);
1358 int pmd_clear_huge(pmd_t *pmd);
1359 int p4d_free_pud_page(p4d_t *p4d, unsigned long addr);
1360 int pud_free_pmd_page(pud_t *pud, unsigned long addr);
1361 int pmd_free_pte_page(pmd_t *pmd, unsigned long addr);
1362 #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */
1363 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1367 static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
1371 static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
1375 static inline int p4d_clear_huge(p4d_t *p4d)
1379 static inline int pud_clear_huge(pud_t *pud)
1383 static inline int pmd_clear_huge(pmd_t *pmd)
1387 static inline int p4d_free_pud_page(p4d_t *p4d, unsigned long addr)
1391 static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr)
1395 static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
1399 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
1401 #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
1402 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1404 * ARCHes with special requirements for evicting THP backing TLB entries can
1405 * implement this. Otherwise also, it can help optimize normal TLB flush in
1406 * THP regime. Stock flush_tlb_range() typically has optimization to nuke the
1407 * entire TLB if flush span is greater than a threshold, which will
1408 * likely be true for a single huge page. Thus a single THP flush will
1409 * invalidate the entire TLB which is not desirable.
1410 * e.g. see arch/arc: flush_pmd_tlb_range
1412 #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1413 #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1415 #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG()
1416 #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG()
1421 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
1422 unsigned long size, pgprot_t *vma_prot);
1424 #ifndef CONFIG_X86_ESPFIX64
1425 static inline void init_espfix_bsp(void) { }
1428 extern void __init pgtable_cache_init(void);
1430 #ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED
1431 static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot)
1436 static inline bool arch_has_pfn_modify_check(void)
1440 #endif /* !_HAVE_ARCH_PFN_MODIFY_ALLOWED */
1443 * Architecture PAGE_KERNEL_* fallbacks
1445 * Some architectures don't define certain PAGE_KERNEL_* flags. This is either
1446 * because they really don't support them, or the port needs to be updated to
1447 * reflect the required functionality. Below are a set of relatively safe
1448 * fallbacks, as best effort, which we can count on in lieu of the architectures
1449 * not defining them on their own yet.
1452 #ifndef PAGE_KERNEL_RO
1453 # define PAGE_KERNEL_RO PAGE_KERNEL
1456 #ifndef PAGE_KERNEL_EXEC
1457 # define PAGE_KERNEL_EXEC PAGE_KERNEL
1461 * Page Table Modification bits for pgtbl_mod_mask.
1463 * These are used by the p?d_alloc_track*() set of functions an in the generic
1464 * vmalloc/ioremap code to track at which page-table levels entries have been
1465 * modified. Based on that the code can better decide when vmalloc and ioremap
1466 * mapping changes need to be synchronized to other page-tables in the system.
1468 #define __PGTBL_PGD_MODIFIED 0
1469 #define __PGTBL_P4D_MODIFIED 1
1470 #define __PGTBL_PUD_MODIFIED 2
1471 #define __PGTBL_PMD_MODIFIED 3
1472 #define __PGTBL_PTE_MODIFIED 4
1474 #define PGTBL_PGD_MODIFIED BIT(__PGTBL_PGD_MODIFIED)
1475 #define PGTBL_P4D_MODIFIED BIT(__PGTBL_P4D_MODIFIED)
1476 #define PGTBL_PUD_MODIFIED BIT(__PGTBL_PUD_MODIFIED)
1477 #define PGTBL_PMD_MODIFIED BIT(__PGTBL_PMD_MODIFIED)
1478 #define PGTBL_PTE_MODIFIED BIT(__PGTBL_PTE_MODIFIED)
1480 /* Page-Table Modification Mask */
1481 typedef unsigned int pgtbl_mod_mask;
1483 #endif /* !__ASSEMBLY__ */
1485 #if !defined(MAX_POSSIBLE_PHYSMEM_BITS) && !defined(CONFIG_64BIT)
1486 #ifdef CONFIG_PHYS_ADDR_T_64BIT
1488 * ZSMALLOC needs to know the highest PFN on 32-bit architectures
1489 * with physical address space extension, but falls back to
1490 * BITS_PER_LONG otherwise.
1492 #error Missing MAX_POSSIBLE_PHYSMEM_BITS definition
1494 #define MAX_POSSIBLE_PHYSMEM_BITS 32
1498 #ifndef has_transparent_hugepage
1499 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1500 #define has_transparent_hugepage() 1
1502 #define has_transparent_hugepage() 0
1507 * On some architectures it depends on the mm if the p4d/pud or pmd
1508 * layer of the page table hierarchy is folded or not.
1510 #ifndef mm_p4d_folded
1511 #define mm_p4d_folded(mm) __is_defined(__PAGETABLE_P4D_FOLDED)
1514 #ifndef mm_pud_folded
1515 #define mm_pud_folded(mm) __is_defined(__PAGETABLE_PUD_FOLDED)
1518 #ifndef mm_pmd_folded
1519 #define mm_pmd_folded(mm) __is_defined(__PAGETABLE_PMD_FOLDED)
1522 #ifndef p4d_offset_lockless
1523 #define p4d_offset_lockless(pgdp, pgd, address) p4d_offset(&(pgd), address)
1525 #ifndef pud_offset_lockless
1526 #define pud_offset_lockless(p4dp, p4d, address) pud_offset(&(p4d), address)
1528 #ifndef pmd_offset_lockless
1529 #define pmd_offset_lockless(pudp, pud, address) pmd_offset(&(pud), address)
1533 * p?d_leaf() - true if this entry is a final mapping to a physical address.
1534 * This differs from p?d_huge() by the fact that they are always available (if
1535 * the architecture supports large pages at the appropriate level) even
1536 * if CONFIG_HUGETLB_PAGE is not defined.
1537 * Only meaningful when called on a valid entry.
1540 #define pgd_leaf(x) 0
1543 #define p4d_leaf(x) 0
1546 #define pud_leaf(x) 0
1549 #define pmd_leaf(x) 0
1552 #ifndef pgd_leaf_size
1553 #define pgd_leaf_size(x) (1ULL << PGDIR_SHIFT)
1555 #ifndef p4d_leaf_size
1556 #define p4d_leaf_size(x) P4D_SIZE
1558 #ifndef pud_leaf_size
1559 #define pud_leaf_size(x) PUD_SIZE
1561 #ifndef pmd_leaf_size
1562 #define pmd_leaf_size(x) PMD_SIZE
1564 #ifndef pte_leaf_size
1565 #define pte_leaf_size(x) PAGE_SIZE
1568 #endif /* _LINUX_PGTABLE_H */