4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
20 #include <linux/pci_regs.h> /* The pci register defines */
23 * The PCI interface treats multi-function devices as independent
24 * devices. The slot/function address of each device is encoded
25 * in a single byte as follows:
30 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
31 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
32 #define PCI_FUNC(devfn) ((devfn) & 0x07)
34 /* Ioctls for /proc/bus/pci/X/Y nodes. */
35 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
36 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
37 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
38 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
39 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
43 #include <linux/mod_devicetable.h>
45 #include <linux/types.h>
46 #include <linux/init.h>
47 #include <linux/ioport.h>
48 #include <linux/list.h>
49 #include <linux/compiler.h>
50 #include <linux/errno.h>
51 #include <linux/kobject.h>
52 #include <asm/atomic.h>
53 #include <linux/device.h>
55 #include <linux/irqreturn.h>
57 /* Include the ID list */
58 #include <linux/pci_ids.h>
60 /* pci_slot represents a physical slot */
62 struct pci_bus *bus; /* The bus this slot is on */
63 struct list_head list; /* node in list of slots on this bus */
64 struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */
65 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
69 static inline const char *pci_slot_name(const struct pci_slot *slot)
71 return kobject_name(&slot->kobj);
74 /* File state for mmap()s on /proc/bus/pci/X/Y */
80 /* This defines the direction arg to the DMA mapping routines. */
81 #define PCI_DMA_BIDIRECTIONAL 0
82 #define PCI_DMA_TODEVICE 1
83 #define PCI_DMA_FROMDEVICE 2
84 #define PCI_DMA_NONE 3
87 * For PCI devices, the region numbers are assigned this way:
90 /* #0-5: standard PCI resources */
92 PCI_STD_RESOURCE_END = 5,
94 /* #6: expansion ROM resource */
97 /* device specific resources */
100 PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
103 /* resources assigned to buses behind the bridge */
104 #define PCI_BRIDGE_RESOURCE_NUM 4
106 PCI_BRIDGE_RESOURCES,
107 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
108 PCI_BRIDGE_RESOURCE_NUM - 1,
110 /* total resources associated with a PCI device */
113 /* preserve this for compatibility */
114 DEVICE_COUNT_RESOURCE
117 typedef int __bitwise pci_power_t;
119 #define PCI_D0 ((pci_power_t __force) 0)
120 #define PCI_D1 ((pci_power_t __force) 1)
121 #define PCI_D2 ((pci_power_t __force) 2)
122 #define PCI_D3hot ((pci_power_t __force) 3)
123 #define PCI_D3cold ((pci_power_t __force) 4)
124 #define PCI_UNKNOWN ((pci_power_t __force) 5)
125 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
127 /* Remember to update this when the list above changes! */
128 extern const char *pci_power_names[];
130 static inline const char *pci_power_name(pci_power_t state)
132 return pci_power_names[1 + (int) state];
135 #define PCI_PM_D2_DELAY 200
136 #define PCI_PM_D3_WAIT 10
137 #define PCI_PM_BUS_WAIT 50
139 /** The pci_channel state describes connectivity between the CPU and
140 * the pci device. If some PCI bus between here and the pci device
141 * has crashed or locked up, this info is reflected here.
143 typedef unsigned int __bitwise pci_channel_state_t;
145 enum pci_channel_state {
146 /* I/O channel is in normal state */
147 pci_channel_io_normal = (__force pci_channel_state_t) 1,
149 /* I/O to channel is blocked */
150 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
152 /* PCI card is dead */
153 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
156 typedef unsigned int __bitwise pcie_reset_state_t;
158 enum pcie_reset_state {
159 /* Reset is NOT asserted (Use to deassert reset) */
160 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
162 /* Use #PERST to reset PCI-E device */
163 pcie_warm_reset = (__force pcie_reset_state_t) 2,
165 /* Use PCI-E Hot Reset to reset device */
166 pcie_hot_reset = (__force pcie_reset_state_t) 3
169 typedef unsigned short __bitwise pci_dev_flags_t;
171 /* INTX_DISABLE in PCI_COMMAND register disables MSI
174 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
175 /* Device configuration is irrevocably lost if disabled into D3 */
176 PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2,
179 enum pci_irq_reroute_variant {
180 INTEL_IRQ_REROUTE_VARIANT = 1,
181 MAX_IRQ_REROUTE_VARIANTS = 3
184 typedef unsigned short __bitwise pci_bus_flags_t;
186 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
187 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
190 /* Based on the PCI Hotplug Spec, but some values are made up by us */
192 PCI_SPEED_33MHz = 0x00,
193 PCI_SPEED_66MHz = 0x01,
194 PCI_SPEED_66MHz_PCIX = 0x02,
195 PCI_SPEED_100MHz_PCIX = 0x03,
196 PCI_SPEED_133MHz_PCIX = 0x04,
197 PCI_SPEED_66MHz_PCIX_ECC = 0x05,
198 PCI_SPEED_100MHz_PCIX_ECC = 0x06,
199 PCI_SPEED_133MHz_PCIX_ECC = 0x07,
200 PCI_SPEED_66MHz_PCIX_266 = 0x09,
201 PCI_SPEED_100MHz_PCIX_266 = 0x0a,
202 PCI_SPEED_133MHz_PCIX_266 = 0x0b,
208 PCI_SPEED_66MHz_PCIX_533 = 0x11,
209 PCI_SPEED_100MHz_PCIX_533 = 0x12,
210 PCI_SPEED_133MHz_PCIX_533 = 0x13,
211 PCIE_SPEED_2_5GT = 0x14,
212 PCIE_SPEED_5_0GT = 0x15,
213 PCIE_SPEED_8_0GT = 0x16,
214 PCI_SPEED_UNKNOWN = 0xff,
217 struct pci_cap_saved_state {
218 struct hlist_node next;
223 struct pcie_link_state;
229 * The pci_dev structure is used to describe PCI devices.
232 struct list_head bus_list; /* node in per-bus list */
233 struct pci_bus *bus; /* bus this device is on */
234 struct pci_bus *subordinate; /* bus this device bridges to */
236 void *sysdata; /* hook for sys-specific extension */
237 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
238 struct pci_slot *slot; /* Physical slot this device is in */
240 unsigned int devfn; /* encoded device & function index */
241 unsigned short vendor;
242 unsigned short device;
243 unsigned short subsystem_vendor;
244 unsigned short subsystem_device;
245 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
246 u8 revision; /* PCI revision, low byte of class word */
247 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
248 u8 pcie_cap; /* PCI-E capability offset */
249 u8 pcie_type; /* PCI-E device/port type */
250 u8 rom_base_reg; /* which config register controls the ROM */
251 u8 pin; /* which interrupt pin this device uses */
253 struct pci_driver *driver; /* which driver has allocated this device */
254 u64 dma_mask; /* Mask of the bits of bus address this
255 device implements. Normally this is
256 0xffffffff. You only need to change
257 this if your device has broken DMA
258 or supports 64-bit transfers. */
260 struct device_dma_parameters dma_parms;
262 pci_power_t current_state; /* Current operating state. In ACPI-speak,
263 this is D0-D3, D0 being fully functional,
265 int pm_cap; /* PM capability offset in the
266 configuration space */
267 unsigned int pme_support:5; /* Bitmask of states from which PME#
269 unsigned int pme_interrupt:1;
270 unsigned int d1_support:1; /* Low power state D1 is supported */
271 unsigned int d2_support:1; /* Low power state D2 is supported */
272 unsigned int no_d1d2:1; /* Only allow D0 and D3 */
273 unsigned int wakeup_prepared:1;
274 unsigned int d3_delay; /* D3->D0 transition time in ms */
276 #ifdef CONFIG_PCIEASPM
277 struct pcie_link_state *link_state; /* ASPM link state. */
280 pci_channel_state_t error_state; /* current connectivity state */
281 struct device dev; /* Generic device interface */
283 int cfg_size; /* Size of configuration space */
286 * Instead of touching interrupt line and base address registers
287 * directly, use the values stored here. They might be different!
290 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
292 /* These fields are used by common fixups */
293 unsigned int transparent:1; /* Transparent PCI bridge */
294 unsigned int multifunction:1;/* Part of multi-function device */
295 /* keep track of device state */
296 unsigned int is_added:1;
297 unsigned int is_busmaster:1; /* device is busmaster */
298 unsigned int no_msi:1; /* device may not use msi */
299 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
300 unsigned int broken_parity_status:1; /* Device generates false positive parity */
301 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */
302 unsigned int msi_enabled:1;
303 unsigned int msix_enabled:1;
304 unsigned int ari_enabled:1; /* ARI forwarding */
305 unsigned int is_managed:1;
306 unsigned int is_pcie:1; /* Obsolete. Will be removed.
307 Use pci_is_pcie() instead */
308 unsigned int needs_freset:1; /* Dev requires fundamental reset */
309 unsigned int state_saved:1;
310 unsigned int is_physfn:1;
311 unsigned int is_virtfn:1;
312 unsigned int reset_fn:1;
313 unsigned int is_hotplug_bridge:1;
314 unsigned int __aer_firmware_first_valid:1;
315 unsigned int __aer_firmware_first:1;
316 pci_dev_flags_t dev_flags;
317 atomic_t enable_cnt; /* pci_enable_device has been called */
319 u32 saved_config_space[16]; /* config space saved at suspend time */
320 struct hlist_head saved_cap_space;
321 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
322 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
323 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
324 struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
325 #ifdef CONFIG_PCI_MSI
326 struct list_head msi_list;
329 #ifdef CONFIG_PCI_IOV
331 struct pci_sriov *sriov; /* SR-IOV capability related */
332 struct pci_dev *physfn; /* the PF this VF is associated with */
334 struct pci_ats *ats; /* Address Translation Service */
338 extern struct pci_dev *alloc_pci_dev(void);
340 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
341 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
342 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
344 static inline int pci_channel_offline(struct pci_dev *pdev)
346 return (pdev->error_state != pci_channel_io_normal);
349 static inline struct pci_cap_saved_state *pci_find_saved_cap(
350 struct pci_dev *pci_dev, char cap)
352 struct pci_cap_saved_state *tmp;
353 struct hlist_node *pos;
355 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
356 if (tmp->cap_nr == cap)
362 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
363 struct pci_cap_saved_state *new_cap)
365 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
369 * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond
370 * to P2P or CardBus bridge windows) go in a table. Additional ones (for
371 * buses below host bridges or subtractive decode bridges) go in the list.
372 * Use pci_bus_for_each_resource() to iterate through all the resources.
376 * PCI_SUBTRACTIVE_DECODE means the bridge forwards the window implicitly
377 * and there's no way to program the bridge with the details of the window.
378 * This does not apply to ACPI _CRS windows, even with the _DEC subtractive-
379 * decode bit set, because they are explicit and can be programmed with _SRS.
381 #define PCI_SUBTRACTIVE_DECODE 0x1
383 struct pci_bus_resource {
384 struct list_head list;
385 struct resource *res;
389 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
392 struct list_head node; /* node in list of buses */
393 struct pci_bus *parent; /* parent bus this bridge is on */
394 struct list_head children; /* list of child buses */
395 struct list_head devices; /* list of devices on this bus */
396 struct pci_dev *self; /* bridge device as seen by parent */
397 struct list_head slots; /* list of slots on this bus */
398 struct resource *resource[PCI_BRIDGE_RESOURCE_NUM];
399 struct list_head resources; /* address space routed to this bus */
401 struct pci_ops *ops; /* configuration access functions */
402 void *sysdata; /* hook for sys-specific extension */
403 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
405 unsigned char number; /* bus number */
406 unsigned char primary; /* number of primary bridge */
407 unsigned char secondary; /* number of secondary bridge */
408 unsigned char subordinate; /* max number of subordinate buses */
409 unsigned char max_bus_speed; /* enum pci_bus_speed */
410 unsigned char cur_bus_speed; /* enum pci_bus_speed */
414 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
415 pci_bus_flags_t bus_flags; /* Inherited by child busses */
416 struct device *bridge;
418 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
419 struct bin_attribute *legacy_mem; /* legacy mem */
420 unsigned int is_added:1;
423 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
424 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
427 * Returns true if the pci bus is root (behind host-pci bridge),
430 static inline bool pci_is_root_bus(struct pci_bus *pbus)
432 return !(pbus->parent);
435 #ifdef CONFIG_PCI_MSI
436 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
438 return pci_dev->msi_enabled || pci_dev->msix_enabled;
441 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; }
445 * Error values that may be returned by PCI functions.
447 #define PCIBIOS_SUCCESSFUL 0x00
448 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
449 #define PCIBIOS_BAD_VENDOR_ID 0x83
450 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
451 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
452 #define PCIBIOS_SET_FAILED 0x88
453 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
455 /* Low-level architecture-dependent routines */
458 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
459 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
463 * ACPI needs to be able to access PCI config space before we've done a
464 * PCI bus scan and created pci_bus structures.
466 extern int raw_pci_read(unsigned int domain, unsigned int bus,
467 unsigned int devfn, int reg, int len, u32 *val);
468 extern int raw_pci_write(unsigned int domain, unsigned int bus,
469 unsigned int devfn, int reg, int len, u32 val);
471 struct pci_bus_region {
472 resource_size_t start;
477 spinlock_t lock; /* protects list, index */
478 struct list_head list; /* for IDs added at runtime */
481 /* ---------------------------------------------------------------- */
482 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
483 * a set of callbacks in struct pci_error_handlers, then that device driver
484 * will be notified of PCI bus errors, and will be driven to recovery
485 * when an error occurs.
488 typedef unsigned int __bitwise pci_ers_result_t;
490 enum pci_ers_result {
491 /* no result/none/not supported in device driver */
492 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
494 /* Device driver can recover without slot reset */
495 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
497 /* Device driver wants slot to be reset. */
498 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
500 /* Device has completely failed, is unrecoverable */
501 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
503 /* Device driver is fully recovered and operational */
504 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
507 /* PCI bus error event callbacks */
508 struct pci_error_handlers {
509 /* PCI bus error detected on this device */
510 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
511 enum pci_channel_state error);
513 /* MMIO has been re-enabled, but not DMA */
514 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
516 /* PCI Express link has been reset */
517 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
519 /* PCI slot has been reset */
520 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
522 /* Device driver may resume normal operations */
523 void (*resume)(struct pci_dev *dev);
526 /* ---------------------------------------------------------------- */
530 struct list_head node;
532 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
533 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
534 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
535 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
536 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
537 int (*resume_early) (struct pci_dev *dev);
538 int (*resume) (struct pci_dev *dev); /* Device woken up */
539 void (*shutdown) (struct pci_dev *dev);
540 struct pci_error_handlers *err_handler;
541 struct device_driver driver;
542 struct pci_dynids dynids;
545 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
548 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
549 * @_table: device table name
551 * This macro is used to create a struct pci_device_id array (a device table)
552 * in a generic manner.
554 #define DEFINE_PCI_DEVICE_TABLE(_table) \
555 const struct pci_device_id _table[] __devinitconst
558 * PCI_DEVICE - macro used to describe a specific pci device
559 * @vend: the 16 bit PCI Vendor ID
560 * @dev: the 16 bit PCI Device ID
562 * This macro is used to create a struct pci_device_id that matches a
563 * specific device. The subvendor and subdevice fields will be set to
566 #define PCI_DEVICE(vend,dev) \
567 .vendor = (vend), .device = (dev), \
568 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
571 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
572 * @dev_class: the class, subclass, prog-if triple for this device
573 * @dev_class_mask: the class mask for this device
575 * This macro is used to create a struct pci_device_id that matches a
576 * specific PCI class. The vendor, device, subvendor, and subdevice
577 * fields will be set to PCI_ANY_ID.
579 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
580 .class = (dev_class), .class_mask = (dev_class_mask), \
581 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
582 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
585 * PCI_VDEVICE - macro used to describe a specific pci device in short form
586 * @vendor: the vendor name
587 * @device: the 16 bit PCI Device ID
589 * This macro is used to create a struct pci_device_id that matches a
590 * specific PCI device. The subvendor, and subdevice fields will be set
591 * to PCI_ANY_ID. The macro allows the next field to follow as the device
595 #define PCI_VDEVICE(vendor, device) \
596 PCI_VENDOR_ID_##vendor, (device), \
597 PCI_ANY_ID, PCI_ANY_ID, 0, 0
599 /* these external functions are only available when PCI support is enabled */
602 extern struct bus_type pci_bus_type;
604 /* Do NOT directly access these two variables, unless you are arch specific pci
605 * code, or pci core code. */
606 extern struct list_head pci_root_buses; /* list of all known PCI buses */
607 /* Some device drivers need know if pci is initiated */
608 extern int no_pci_devices(void);
610 void pcibios_fixup_bus(struct pci_bus *);
611 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
612 char *pcibios_setup(char *str);
614 /* Used only when drivers/pci/setup.c is used */
615 resource_size_t pcibios_align_resource(void *, const struct resource *,
618 void pcibios_update_irq(struct pci_dev *, int irq);
620 /* Weak but can be overriden by arch */
621 void pci_fixup_cardbus(struct pci_bus *);
623 /* Generic PCI functions used internally */
625 extern struct pci_bus *pci_find_bus(int domain, int busnr);
626 void pci_bus_add_devices(const struct pci_bus *bus);
627 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
628 struct pci_ops *ops, void *sysdata);
629 static inline struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops,
632 struct pci_bus *root_bus;
633 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
635 pci_bus_add_devices(root_bus);
638 struct pci_bus *pci_create_bus(struct device *parent, int bus,
639 struct pci_ops *ops, void *sysdata);
640 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
642 void pcie_update_link_speed(struct pci_bus *bus, u16 link_status);
643 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
645 struct hotplug_slot *hotplug);
646 void pci_destroy_slot(struct pci_slot *slot);
647 void pci_renumber_slot(struct pci_slot *slot, int slot_nr);
648 int pci_scan_slot(struct pci_bus *bus, int devfn);
649 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
650 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
651 unsigned int pci_scan_child_bus(struct pci_bus *bus);
652 int __must_check pci_bus_add_device(struct pci_dev *dev);
653 void pci_read_bridge_bases(struct pci_bus *child);
654 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
655 struct resource *res);
656 u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin);
657 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
658 u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp);
659 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
660 extern void pci_dev_put(struct pci_dev *dev);
661 extern void pci_remove_bus(struct pci_bus *b);
662 extern void pci_remove_bus_device(struct pci_dev *dev);
663 extern void pci_stop_bus_device(struct pci_dev *dev);
664 void pci_setup_cardbus(struct pci_bus *bus);
665 extern void pci_sort_breadthfirst(void);
666 #define dev_is_pci(d) ((d)->bus == &pci_bus_type)
667 #define dev_is_pf(d) ((dev_is_pci(d) ? to_pci_dev(d)->is_physfn : false))
668 #define dev_num_vf(d) ((dev_is_pci(d) ? pci_num_vf(to_pci_dev(d)) : 0))
670 /* Generic PCI functions exported to card drivers */
672 enum pci_lost_interrupt_reason {
673 PCI_LOST_IRQ_NO_INFORMATION = 0,
674 PCI_LOST_IRQ_DISABLE_MSI,
675 PCI_LOST_IRQ_DISABLE_MSIX,
676 PCI_LOST_IRQ_DISABLE_ACPI,
678 enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
679 int pci_find_capability(struct pci_dev *dev, int cap);
680 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
681 int pci_find_ext_capability(struct pci_dev *dev, int cap);
682 int pci_bus_find_ext_capability(struct pci_bus *bus, unsigned int devfn,
684 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
685 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
686 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
688 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
689 struct pci_dev *from);
690 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
691 unsigned int ss_vendor, unsigned int ss_device,
692 struct pci_dev *from);
693 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
694 struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus,
696 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
699 return pci_get_domain_bus_and_slot(0, bus, devfn);
701 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
702 int pci_dev_present(const struct pci_device_id *ids);
704 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
706 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
707 int where, u16 *val);
708 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
709 int where, u32 *val);
710 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
712 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
714 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
716 struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops);
718 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
720 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
722 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
724 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
726 static inline int pci_read_config_dword(struct pci_dev *dev, int where,
729 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
731 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
733 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
735 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
737 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
739 static inline int pci_write_config_dword(struct pci_dev *dev, int where,
742 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
745 int __must_check pci_enable_device(struct pci_dev *dev);
746 int __must_check pci_enable_device_io(struct pci_dev *dev);
747 int __must_check pci_enable_device_mem(struct pci_dev *dev);
748 int __must_check pci_reenable_device(struct pci_dev *);
749 int __must_check pcim_enable_device(struct pci_dev *pdev);
750 void pcim_pin_device(struct pci_dev *pdev);
752 static inline int pci_is_enabled(struct pci_dev *pdev)
754 return (atomic_read(&pdev->enable_cnt) > 0);
757 static inline int pci_is_managed(struct pci_dev *pdev)
759 return pdev->is_managed;
762 void pci_disable_device(struct pci_dev *dev);
763 void pci_set_master(struct pci_dev *dev);
764 void pci_clear_master(struct pci_dev *dev);
765 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
766 int pci_set_cacheline_size(struct pci_dev *dev);
767 #define HAVE_PCI_SET_MWI
768 int __must_check pci_set_mwi(struct pci_dev *dev);
769 int pci_try_set_mwi(struct pci_dev *dev);
770 void pci_clear_mwi(struct pci_dev *dev);
771 void pci_intx(struct pci_dev *dev, int enable);
772 void pci_msi_off(struct pci_dev *dev);
773 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
774 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
775 int pcix_get_max_mmrbc(struct pci_dev *dev);
776 int pcix_get_mmrbc(struct pci_dev *dev);
777 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
778 int pcie_get_readrq(struct pci_dev *dev);
779 int pcie_set_readrq(struct pci_dev *dev, int rq);
780 int __pci_reset_function(struct pci_dev *dev);
781 int pci_reset_function(struct pci_dev *dev);
782 void pci_update_resource(struct pci_dev *dev, int resno);
783 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
784 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
786 /* ROM control related routines */
787 int pci_enable_rom(struct pci_dev *pdev);
788 void pci_disable_rom(struct pci_dev *pdev);
789 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
790 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
791 size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
793 /* Power management related routines */
794 int pci_save_state(struct pci_dev *dev);
795 int pci_restore_state(struct pci_dev *dev);
796 int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
797 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
798 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
799 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
800 void pci_pme_active(struct pci_dev *dev, bool enable);
801 int __pci_enable_wake(struct pci_dev *dev, pci_power_t state,
802 bool runtime, bool enable);
803 int pci_wake_from_d3(struct pci_dev *dev, bool enable);
804 pci_power_t pci_target_state(struct pci_dev *dev);
805 int pci_prepare_to_sleep(struct pci_dev *dev);
806 int pci_back_from_sleep(struct pci_dev *dev);
807 bool pci_dev_run_wake(struct pci_dev *dev);
809 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
812 return __pci_enable_wake(dev, state, false, enable);
815 /* For use by arch with custom probe code */
816 void set_pcie_port_type(struct pci_dev *pdev);
817 void set_pcie_hotplug_bridge(struct pci_dev *pdev);
819 /* Functions for PCI Hotplug drivers to use */
820 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
821 #ifdef CONFIG_HOTPLUG
822 unsigned int pci_rescan_bus(struct pci_bus *bus);
825 /* Vital product data routines */
826 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
827 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
828 int pci_vpd_truncate(struct pci_dev *dev, size_t size);
830 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
831 void pci_bus_assign_resources(const struct pci_bus *bus);
832 void pci_bus_size_bridges(struct pci_bus *bus);
833 int pci_claim_resource(struct pci_dev *, int);
834 void pci_assign_unassigned_resources(void);
835 void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge);
836 void pdev_enable_device(struct pci_dev *);
837 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
838 int pci_enable_resources(struct pci_dev *, int mask);
839 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
840 int (*)(struct pci_dev *, u8, u8));
841 #define HAVE_PCI_REQ_REGIONS 2
842 int __must_check pci_request_regions(struct pci_dev *, const char *);
843 int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *);
844 void pci_release_regions(struct pci_dev *);
845 int __must_check pci_request_region(struct pci_dev *, int, const char *);
846 int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *);
847 void pci_release_region(struct pci_dev *, int);
848 int pci_request_selected_regions(struct pci_dev *, int, const char *);
849 int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
850 void pci_release_selected_regions(struct pci_dev *, int);
852 /* drivers/pci/bus.c */
853 void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags);
854 struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n);
855 void pci_bus_remove_resources(struct pci_bus *bus);
857 #define pci_bus_for_each_resource(bus, res, i) \
859 (res = pci_bus_resource_n(bus, i)) || i < PCI_BRIDGE_RESOURCE_NUM; \
862 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
863 struct resource *res, resource_size_t size,
864 resource_size_t align, resource_size_t min,
865 unsigned int type_mask,
866 resource_size_t (*alignf)(void *,
867 const struct resource *,
871 void pci_enable_bridges(struct pci_bus *bus);
873 /* Proper probing supporting hot-pluggable devices */
874 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
875 const char *mod_name);
878 * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded
880 #define pci_register_driver(driver) \
881 __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
883 void pci_unregister_driver(struct pci_driver *dev);
884 void pci_remove_behind_bridge(struct pci_dev *dev);
885 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
886 int pci_add_dynid(struct pci_driver *drv,
887 unsigned int vendor, unsigned int device,
888 unsigned int subvendor, unsigned int subdevice,
889 unsigned int class, unsigned int class_mask,
890 unsigned long driver_data);
891 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
892 struct pci_dev *dev);
893 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
896 void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
898 int pci_cfg_space_size_ext(struct pci_dev *dev);
899 int pci_cfg_space_size(struct pci_dev *dev);
900 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
902 int pci_set_vga_state(struct pci_dev *pdev, bool decode,
903 unsigned int command_bits, bool change_bridge);
904 /* kmem_cache style wrapper around pci_alloc_consistent() */
906 #include <linux/pci-dma.h>
907 #include <linux/dmapool.h>
909 #define pci_pool dma_pool
910 #define pci_pool_create(name, pdev, size, align, allocation) \
911 dma_pool_create(name, &pdev->dev, size, align, allocation)
912 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
913 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
914 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
916 enum pci_dma_burst_strategy {
917 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
918 strategy_parameter is N/A */
919 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
921 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
922 strategy_parameter byte boundaries */
926 u32 vector; /* kernel uses to write allocated vector */
927 u16 entry; /* driver uses to specify entry, OS writes */
931 #ifndef CONFIG_PCI_MSI
932 static inline int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec)
937 static inline void pci_msi_shutdown(struct pci_dev *dev)
939 static inline void pci_disable_msi(struct pci_dev *dev)
942 static inline int pci_msix_table_size(struct pci_dev *dev)
946 static inline int pci_enable_msix(struct pci_dev *dev,
947 struct msix_entry *entries, int nvec)
952 static inline void pci_msix_shutdown(struct pci_dev *dev)
954 static inline void pci_disable_msix(struct pci_dev *dev)
957 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
960 static inline void pci_restore_msi_state(struct pci_dev *dev)
962 static inline int pci_msi_enabled(void)
967 extern int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec);
968 extern void pci_msi_shutdown(struct pci_dev *dev);
969 extern void pci_disable_msi(struct pci_dev *dev);
970 extern int pci_msix_table_size(struct pci_dev *dev);
971 extern int pci_enable_msix(struct pci_dev *dev,
972 struct msix_entry *entries, int nvec);
973 extern void pci_msix_shutdown(struct pci_dev *dev);
974 extern void pci_disable_msix(struct pci_dev *dev);
975 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
976 extern void pci_restore_msi_state(struct pci_dev *dev);
977 extern int pci_msi_enabled(void);
980 #ifndef CONFIG_PCIEASPM
981 static inline int pcie_aspm_enabled(void)
986 extern int pcie_aspm_enabled(void);
989 #ifndef CONFIG_PCIE_ECRC
990 static inline void pcie_set_ecrc_checking(struct pci_dev *dev)
994 static inline void pcie_ecrc_get_policy(char *str) {};
996 extern void pcie_set_ecrc_checking(struct pci_dev *dev);
997 extern void pcie_ecrc_get_policy(char *str);
1000 #define pci_enable_msi(pdev) pci_enable_msi_block(pdev, 1)
1002 #ifdef CONFIG_HT_IRQ
1003 /* The functions a driver should call */
1004 int ht_create_irq(struct pci_dev *dev, int idx);
1005 void ht_destroy_irq(unsigned int irq);
1006 #endif /* CONFIG_HT_IRQ */
1008 extern void pci_block_user_cfg_access(struct pci_dev *dev);
1009 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
1012 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
1013 * a PCI domain is defined to be a set of PCI busses which share
1014 * configuration space.
1016 #ifdef CONFIG_PCI_DOMAINS
1017 extern int pci_domains_supported;
1019 enum { pci_domains_supported = 0 };
1020 static inline int pci_domain_nr(struct pci_bus *bus)
1025 static inline int pci_proc_domain(struct pci_bus *bus)
1029 #endif /* CONFIG_PCI_DOMAINS */
1031 /* some architectures require additional setup to direct VGA traffic */
1032 typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode,
1033 unsigned int command_bits, bool change_bridge);
1034 extern void pci_register_set_vga_state(arch_set_vga_state_t func);
1036 #else /* CONFIG_PCI is not enabled */
1039 * If the system does not have PCI, clearly these return errors. Define
1040 * these as simple inline functions to avoid hair in drivers.
1043 #define _PCI_NOP(o, s, t) \
1044 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
1046 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
1048 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
1049 _PCI_NOP(o, word, u16 x) \
1050 _PCI_NOP(o, dword, u32 x)
1051 _PCI_NOP_ALL(read, *)
1052 _PCI_NOP_ALL(write,)
1054 static inline struct pci_dev *pci_get_device(unsigned int vendor,
1055 unsigned int device,
1056 struct pci_dev *from)
1061 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
1062 unsigned int device,
1063 unsigned int ss_vendor,
1064 unsigned int ss_device,
1065 struct pci_dev *from)
1070 static inline struct pci_dev *pci_get_class(unsigned int class,
1071 struct pci_dev *from)
1076 #define pci_dev_present(ids) (0)
1077 #define no_pci_devices() (1)
1078 #define pci_dev_put(dev) do { } while (0)
1080 static inline void pci_set_master(struct pci_dev *dev)
1083 static inline int pci_enable_device(struct pci_dev *dev)
1088 static inline void pci_disable_device(struct pci_dev *dev)
1091 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
1096 static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
1101 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
1107 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
1113 static inline int pci_assign_resource(struct pci_dev *dev, int i)
1118 static inline int __pci_register_driver(struct pci_driver *drv,
1119 struct module *owner)
1124 static inline int pci_register_driver(struct pci_driver *drv)
1129 static inline void pci_unregister_driver(struct pci_driver *drv)
1132 static inline int pci_find_capability(struct pci_dev *dev, int cap)
1137 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
1143 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
1148 /* Power management related routines */
1149 static inline int pci_save_state(struct pci_dev *dev)
1154 static inline int pci_restore_state(struct pci_dev *dev)
1159 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
1164 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
1170 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1176 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
1181 static inline void pci_release_regions(struct pci_dev *dev)
1184 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
1186 static inline void pci_block_user_cfg_access(struct pci_dev *dev)
1189 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev)
1192 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
1195 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
1199 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
1203 #define dev_is_pci(d) (false)
1204 #define dev_is_pf(d) (false)
1205 #define dev_num_vf(d) (0)
1206 #endif /* CONFIG_PCI */
1208 /* Include architecture-dependent settings and functions */
1210 #include <asm/pci.h>
1212 #ifndef PCIBIOS_MAX_MEM_32
1213 #define PCIBIOS_MAX_MEM_32 (-1)
1216 /* these helpers provide future and backwards compatibility
1217 * for accessing popular PCI BAR info */
1218 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
1219 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
1220 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
1221 #define pci_resource_len(dev,bar) \
1222 ((pci_resource_start((dev), (bar)) == 0 && \
1223 pci_resource_end((dev), (bar)) == \
1224 pci_resource_start((dev), (bar))) ? 0 : \
1226 (pci_resource_end((dev), (bar)) - \
1227 pci_resource_start((dev), (bar)) + 1))
1229 /* Similar to the helpers above, these manipulate per-pci_dev
1230 * driver-specific data. They are really just a wrapper around
1231 * the generic device structure functions of these calls.
1233 static inline void *pci_get_drvdata(struct pci_dev *pdev)
1235 return dev_get_drvdata(&pdev->dev);
1238 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1240 dev_set_drvdata(&pdev->dev, data);
1243 /* If you want to know what to call your pci_dev, ask this function.
1244 * Again, it's a wrapper around the generic device.
1246 static inline const char *pci_name(const struct pci_dev *pdev)
1248 return dev_name(&pdev->dev);
1252 /* Some archs don't want to expose struct resource to userland as-is
1253 * in sysfs and /proc
1255 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
1256 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1257 const struct resource *rsrc, resource_size_t *start,
1258 resource_size_t *end)
1260 *start = rsrc->start;
1263 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1267 * The world is not perfect and supplies us with broken PCI devices.
1268 * For at least a part of these bugs we need a work-around, so both
1269 * generic (drivers/pci/quirks.c) and per-architecture code can define
1270 * fixup hooks to be called for particular buggy devices.
1274 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
1275 void (*hook)(struct pci_dev *dev);
1278 enum pci_fixup_pass {
1279 pci_fixup_early, /* Before probing BARs */
1280 pci_fixup_header, /* After reading configuration header */
1281 pci_fixup_final, /* Final phase of device fixups */
1282 pci_fixup_enable, /* pci_enable_device() time */
1283 pci_fixup_resume, /* pci_device_resume() */
1284 pci_fixup_suspend, /* pci_device_suspend */
1285 pci_fixup_resume_early, /* pci_device_resume_early() */
1288 /* Anonymous variables would be nice... */
1289 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
1290 static const struct pci_fixup __pci_fixup_##name __used \
1291 __attribute__((__section__(#section))) = { vendor, device, hook };
1292 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1293 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1294 vendor##device##hook, vendor, device, hook)
1295 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1296 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1297 vendor##device##hook, vendor, device, hook)
1298 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1299 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1300 vendor##device##hook, vendor, device, hook)
1301 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1302 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1303 vendor##device##hook, vendor, device, hook)
1304 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1305 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1306 resume##vendor##device##hook, vendor, device, hook)
1307 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \
1308 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1309 resume_early##vendor##device##hook, vendor, device, hook)
1310 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \
1311 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1312 suspend##vendor##device##hook, vendor, device, hook)
1314 #ifdef CONFIG_PCI_QUIRKS
1315 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1317 static inline void pci_fixup_device(enum pci_fixup_pass pass,
1318 struct pci_dev *dev) {}
1321 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1322 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1323 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1324 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
1325 int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask,
1327 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
1329 extern int pci_pci_problems;
1330 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1331 #define PCIPCI_TRITON 2
1332 #define PCIPCI_NATOMA 4
1333 #define PCIPCI_VIAETBF 8
1334 #define PCIPCI_VSFX 16
1335 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1336 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1338 extern unsigned long pci_cardbus_io_size;
1339 extern unsigned long pci_cardbus_mem_size;
1340 extern u8 __devinitdata pci_dfl_cache_line_size;
1341 extern u8 pci_cache_line_size;
1343 extern unsigned long pci_hotplug_io_size;
1344 extern unsigned long pci_hotplug_mem_size;
1346 int pcibios_add_platform_entries(struct pci_dev *dev);
1347 void pcibios_disable_device(struct pci_dev *dev);
1348 int pcibios_set_pcie_reset_state(struct pci_dev *dev,
1349 enum pcie_reset_state state);
1351 #ifdef CONFIG_PCI_MMCONFIG
1352 extern void __init pci_mmcfg_early_init(void);
1353 extern void __init pci_mmcfg_late_init(void);
1355 static inline void pci_mmcfg_early_init(void) { }
1356 static inline void pci_mmcfg_late_init(void) { }
1359 int pci_ext_cfg_avail(struct pci_dev *dev);
1361 void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar);
1363 #ifdef CONFIG_PCI_IOV
1364 extern int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);
1365 extern void pci_disable_sriov(struct pci_dev *dev);
1366 extern irqreturn_t pci_sriov_migration(struct pci_dev *dev);
1367 extern int pci_num_vf(struct pci_dev *dev);
1369 static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
1373 static inline void pci_disable_sriov(struct pci_dev *dev)
1376 static inline irqreturn_t pci_sriov_migration(struct pci_dev *dev)
1380 static inline int pci_num_vf(struct pci_dev *dev)
1386 #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE)
1387 extern void pci_hp_create_module_link(struct pci_slot *pci_slot);
1388 extern void pci_hp_remove_module_link(struct pci_slot *pci_slot);
1392 * pci_pcie_cap - get the saved PCIe capability offset
1395 * PCIe capability offset is calculated at PCI device initialization
1396 * time and saved in the data structure. This function returns saved
1397 * PCIe capability offset. Using this instead of pci_find_capability()
1398 * reduces unnecessary search in the PCI configuration space. If you
1399 * need to calculate PCIe capability offset from raw device for some
1400 * reasons, please use pci_find_capability() instead.
1402 static inline int pci_pcie_cap(struct pci_dev *dev)
1404 return dev->pcie_cap;
1408 * pci_is_pcie - check if the PCI device is PCI Express capable
1411 * Retrun true if the PCI device is PCI Express capable, false otherwise.
1413 static inline bool pci_is_pcie(struct pci_dev *dev)
1415 return !!pci_pcie_cap(dev);
1418 void pci_request_acs(void);
1421 #define PCI_VPD_LRDT 0x80 /* Large Resource Data Type */
1422 #define PCI_VPD_LRDT_ID(x) (x | PCI_VPD_LRDT)
1424 /* Large Resource Data Type Tag Item Names */
1425 #define PCI_VPD_LTIN_ID_STRING 0x02 /* Identifier String */
1426 #define PCI_VPD_LTIN_RO_DATA 0x10 /* Read-Only Data */
1427 #define PCI_VPD_LTIN_RW_DATA 0x11 /* Read-Write Data */
1429 #define PCI_VPD_LRDT_ID_STRING PCI_VPD_LRDT_ID(PCI_VPD_LTIN_ID_STRING)
1430 #define PCI_VPD_LRDT_RO_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RO_DATA)
1431 #define PCI_VPD_LRDT_RW_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RW_DATA)
1433 /* Small Resource Data Type Tag Item Names */
1434 #define PCI_VPD_STIN_END 0x78 /* End */
1436 #define PCI_VPD_SRDT_END PCI_VPD_STIN_END
1438 #define PCI_VPD_SRDT_TIN_MASK 0x78
1439 #define PCI_VPD_SRDT_LEN_MASK 0x07
1441 #define PCI_VPD_LRDT_TAG_SIZE 3
1442 #define PCI_VPD_SRDT_TAG_SIZE 1
1444 #define PCI_VPD_INFO_FLD_HDR_SIZE 3
1446 #define PCI_VPD_RO_KEYWORD_PARTNO "PN"
1447 #define PCI_VPD_RO_KEYWORD_MFR_ID "MN"
1448 #define PCI_VPD_RO_KEYWORD_VENDOR0 "V0"
1451 * pci_vpd_lrdt_size - Extracts the Large Resource Data Type length
1452 * @lrdt: Pointer to the beginning of the Large Resource Data Type tag
1454 * Returns the extracted Large Resource Data Type length.
1456 static inline u16 pci_vpd_lrdt_size(const u8 *lrdt)
1458 return (u16)lrdt[1] + ((u16)lrdt[2] << 8);
1462 * pci_vpd_srdt_size - Extracts the Small Resource Data Type length
1463 * @lrdt: Pointer to the beginning of the Small Resource Data Type tag
1465 * Returns the extracted Small Resource Data Type length.
1467 static inline u8 pci_vpd_srdt_size(const u8 *srdt)
1469 return (*srdt) & PCI_VPD_SRDT_LEN_MASK;
1473 * pci_vpd_info_field_size - Extracts the information field length
1474 * @lrdt: Pointer to the beginning of an information field header
1476 * Returns the extracted information field length.
1478 static inline u8 pci_vpd_info_field_size(const u8 *info_field)
1480 return info_field[2];
1484 * pci_vpd_find_tag - Locates the Resource Data Type tag provided
1485 * @buf: Pointer to buffered vpd data
1486 * @off: The offset into the buffer at which to begin the search
1487 * @len: The length of the vpd buffer
1488 * @rdt: The Resource Data Type to search for
1490 * Returns the index where the Resource Data Type was found or
1491 * -ENOENT otherwise.
1493 int pci_vpd_find_tag(const u8 *buf, unsigned int off, unsigned int len, u8 rdt);
1496 * pci_vpd_find_info_keyword - Locates an information field keyword in the VPD
1497 * @buf: Pointer to buffered vpd data
1498 * @off: The offset into the buffer at which to begin the search
1499 * @len: The length of the buffer area, relative to off, in which to search
1500 * @kw: The keyword to search for
1502 * Returns the index where the information field keyword was found or
1503 * -ENOENT otherwise.
1505 int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off,
1506 unsigned int len, const char *kw);
1508 #endif /* __KERNEL__ */
1509 #endif /* LINUX_PCI_H */