1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2014-2019 MediaTek Inc.
5 * Author: Tianping.Fang <tianping.fang@mediatek.com>
6 * Sean Wang <sean.wang@mediatek.com>
9 #ifndef _LINUX_MFD_MT6397_RTC_H_
10 #define _LINUX_MFD_MT6397_RTC_H_
12 #include <linux/jiffies.h>
13 #include <linux/mutex.h>
14 #include <linux/regmap.h>
15 #include <linux/rtc.h>
17 #define RTC_BBPU 0x0000
18 #define RTC_BBPU_CBUSY BIT(6)
19 #define RTC_BBPU_KEY (0x43 << 8)
21 #define RTC_WRTGR_MT6358 0x003a
22 #define RTC_WRTGR_MT6397 0x003c
23 #define RTC_WRTGR_MT6323 RTC_WRTGR_MT6397
25 #define RTC_IRQ_STA 0x0002
26 #define RTC_IRQ_STA_AL BIT(0)
27 #define RTC_IRQ_STA_LP BIT(3)
29 #define RTC_IRQ_EN 0x0004
30 #define RTC_IRQ_EN_AL BIT(0)
31 #define RTC_IRQ_EN_ONESHOT BIT(2)
32 #define RTC_IRQ_EN_LP BIT(3)
33 #define RTC_IRQ_EN_ONESHOT_AL (RTC_IRQ_EN_ONESHOT | RTC_IRQ_EN_AL)
35 #define RTC_AL_MASK 0x0008
36 #define RTC_AL_MASK_DOW BIT(4)
38 #define RTC_TC_SEC 0x000a
39 #define RTC_TC_MTH_MASK 0x000f
40 /* Min, Hour, Dom... register offset to RTC_TC_SEC */
41 #define RTC_OFFSET_SEC 0
42 #define RTC_OFFSET_MIN 1
43 #define RTC_OFFSET_HOUR 2
44 #define RTC_OFFSET_DOM 3
45 #define RTC_OFFSET_DOW 4
46 #define RTC_OFFSET_MTH 5
47 #define RTC_OFFSET_YEAR 6
48 #define RTC_OFFSET_COUNT 7
50 #define RTC_AL_SEC 0x0018
52 #define RTC_AL_SEC_MASK 0x003f
53 #define RTC_AL_MIN_MASK 0x003f
54 #define RTC_AL_HOU_MASK 0x001f
55 #define RTC_AL_DOM_MASK 0x001f
56 #define RTC_AL_DOW_MASK 0x0007
57 #define RTC_AL_MTH_MASK 0x000f
58 #define RTC_AL_YEA_MASK 0x007f
60 #define RTC_PDN2 0x002e
61 #define RTC_PDN2_PWRON_ALARM BIT(4)
63 #define RTC_MIN_YEAR 1968
64 #define RTC_BASE_YEAR 1900
65 #define RTC_NUM_YEARS 128
66 #define RTC_MIN_YEAR_OFFSET (RTC_MIN_YEAR - RTC_BASE_YEAR)
68 #define MTK_RTC_POLL_DELAY_US 10
69 #define MTK_RTC_POLL_TIMEOUT (jiffies_to_usecs(HZ))
76 struct rtc_device *rtc_dev;
78 /* Protect register access from multiple tasks */
80 struct regmap *regmap;
83 const struct mtk_rtc_data *data;
86 #endif /* _LINUX_MFD_MT6397_RTC_H_ */