Merge tag 'm68knommu-for-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6-microblaze.git] / include / linux / mfd / atc260x / atc2609a.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * ATC2609A PMIC register definitions
4  *
5  * Copyright (C) 2019 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
6  */
7
8 #ifndef __LINUX_MFD_ATC260X_ATC2609A_H
9 #define __LINUX_MFD_ATC260X_ATC2609A_H
10
11 enum atc2609a_irq_def {
12         ATC2609A_IRQ_AUDIO = 0,
13         ATC2609A_IRQ_OV,
14         ATC2609A_IRQ_OC,
15         ATC2609A_IRQ_OT,
16         ATC2609A_IRQ_UV,
17         ATC2609A_IRQ_ALARM,
18         ATC2609A_IRQ_ONOFF,
19         ATC2609A_IRQ_WKUP,
20         ATC2609A_IRQ_IR,
21         ATC2609A_IRQ_REMCON,
22         ATC2609A_IRQ_POWER_IN,
23 };
24
25 /* PMU Registers */
26 #define ATC2609A_PMU_SYS_CTL0                   0x00
27 #define ATC2609A_PMU_SYS_CTL1                   0x01
28 #define ATC2609A_PMU_SYS_CTL2                   0x02
29 #define ATC2609A_PMU_SYS_CTL3                   0x03
30 #define ATC2609A_PMU_SYS_CTL4                   0x04
31 #define ATC2609A_PMU_SYS_CTL5                   0x05
32 #define ATC2609A_PMU_SYS_CTL6                   0x06
33 #define ATC2609A_PMU_SYS_CTL7                   0x07
34 #define ATC2609A_PMU_SYS_CTL8                   0x08
35 #define ATC2609A_PMU_SYS_CTL9                   0x09
36 #define ATC2609A_PMU_BAT_CTL0                   0x0A
37 #define ATC2609A_PMU_BAT_CTL1                   0x0B
38 #define ATC2609A_PMU_VBUS_CTL0                  0x0C
39 #define ATC2609A_PMU_VBUS_CTL1                  0x0D
40 #define ATC2609A_PMU_WALL_CTL0                  0x0E
41 #define ATC2609A_PMU_WALL_CTL1                  0x0F
42 #define ATC2609A_PMU_SYS_PENDING                0x10
43 #define ATC2609A_PMU_APDS_CTL0                  0x11
44 #define ATC2609A_PMU_APDS_CTL1                  0x12
45 #define ATC2609A_PMU_APDS_CTL2                  0x13
46 #define ATC2609A_PMU_CHARGER_CTL                0x14
47 #define ATC2609A_PMU_BAKCHARGER_CTL             0x15
48 #define ATC2609A_PMU_SWCHG_CTL0                 0x16
49 #define ATC2609A_PMU_SWCHG_CTL1                 0x17
50 #define ATC2609A_PMU_SWCHG_CTL2                 0x18
51 #define ATC2609A_PMU_SWCHG_CTL3                 0x19
52 #define ATC2609A_PMU_SWCHG_CTL4                 0x1A
53 #define ATC2609A_PMU_DC_OSC                     0x1B
54 #define ATC2609A_PMU_DC0_CTL0                   0x1C
55 #define ATC2609A_PMU_DC0_CTL1                   0x1D
56 #define ATC2609A_PMU_DC0_CTL2                   0x1E
57 #define ATC2609A_PMU_DC0_CTL3                   0x1F
58 #define ATC2609A_PMU_DC0_CTL4                   0x20
59 #define ATC2609A_PMU_DC0_CTL5                   0x21
60 #define ATC2609A_PMU_DC0_CTL6                   0x22
61 #define ATC2609A_PMU_DC1_CTL0                   0x23
62 #define ATC2609A_PMU_DC1_CTL1                   0x24
63 #define ATC2609A_PMU_DC1_CTL2                   0x25
64 #define ATC2609A_PMU_DC1_CTL3                   0x26
65 #define ATC2609A_PMU_DC1_CTL4                   0x27
66 #define ATC2609A_PMU_DC1_CTL5                   0x28
67 #define ATC2609A_PMU_DC1_CTL6                   0x29
68 #define ATC2609A_PMU_DC2_CTL0                   0x2A
69 #define ATC2609A_PMU_DC2_CTL1                   0x2B
70 #define ATC2609A_PMU_DC2_CTL2                   0x2C
71 #define ATC2609A_PMU_DC2_CTL3                   0x2D
72 #define ATC2609A_PMU_DC2_CTL4                   0x2E
73 #define ATC2609A_PMU_DC2_CTL5                   0x2F
74 #define ATC2609A_PMU_DC2_CTL6                   0x30
75 #define ATC2609A_PMU_DC3_CTL0                   0x31
76 #define ATC2609A_PMU_DC3_CTL1                   0x32
77 #define ATC2609A_PMU_DC3_CTL2                   0x33
78 #define ATC2609A_PMU_DC3_CTL3                   0x34
79 #define ATC2609A_PMU_DC3_CTL4                   0x35
80 #define ATC2609A_PMU_DC3_CTL5                   0x36
81 #define ATC2609A_PMU_DC3_CTL6                   0x37
82 #define ATC2609A_PMU_DC_ZR                      0x38
83 #define ATC2609A_PMU_LDO0_CTL0                  0x39
84 #define ATC2609A_PMU_LDO0_CTL1                  0x3A
85 #define ATC2609A_PMU_LDO1_CTL0                  0x3B
86 #define ATC2609A_PMU_LDO1_CTL1                  0x3C
87 #define ATC2609A_PMU_LDO2_CTL0                  0x3D
88 #define ATC2609A_PMU_LDO2_CTL1                  0x3E
89 #define ATC2609A_PMU_LDO3_CTL0                  0x3F
90 #define ATC2609A_PMU_LDO3_CTL1                  0x40
91 #define ATC2609A_PMU_LDO4_CTL0                  0x41
92 #define ATC2609A_PMU_LDO4_CTL1                  0x42
93 #define ATC2609A_PMU_LDO5_CTL0                  0x43
94 #define ATC2609A_PMU_LDO5_CTL1                  0x44
95 #define ATC2609A_PMU_LDO6_CTL0                  0x45
96 #define ATC2609A_PMU_LDO6_CTL1                  0x46
97 #define ATC2609A_PMU_LDO7_CTL0                  0x47
98 #define ATC2609A_PMU_LDO7_CTL1                  0x48
99 #define ATC2609A_PMU_LDO8_CTL0                  0x49
100 #define ATC2609A_PMU_LDO8_CTL1                  0x4A
101 #define ATC2609A_PMU_LDO9_CTL                   0x4B
102 #define ATC2609A_PMU_OV_INT_EN                  0x4C
103 #define ATC2609A_PMU_OV_STATUS                  0x4D
104 #define ATC2609A_PMU_UV_INT_EN                  0x4E
105 #define ATC2609A_PMU_UV_STATUS                  0x4F
106 #define ATC2609A_PMU_OC_INT_EN                  0x50
107 #define ATC2609A_PMU_OC_STATUS                  0x51
108 #define ATC2609A_PMU_OT_CTL                     0x52
109 #define ATC2609A_PMU_CM_CTL0                    0x53
110 #define ATC2609A_PMU_FW_USE0                    0x54
111 #define ATC2609A_PMU_FW_USE1                    0x55
112 #define ATC2609A_PMU_ADC12B_I                   0x56
113 #define ATC2609A_PMU_ADC12B_V                   0x57
114 #define ATC2609A_PMU_ADC12B_DUMMY               0x58
115 #define ATC2609A_PMU_AUXADC_CTL0                0x59
116 #define ATC2609A_PMU_AUXADC_CTL1                0x5A
117 #define ATC2609A_PMU_BATVADC                    0x5B
118 #define ATC2609A_PMU_BATIADC                    0x5C
119 #define ATC2609A_PMU_WALLVADC                   0x5D
120 #define ATC2609A_PMU_WALLIADC                   0x5E
121 #define ATC2609A_PMU_VBUSVADC                   0x5F
122 #define ATC2609A_PMU_VBUSIADC                   0x60
123 #define ATC2609A_PMU_SYSPWRADC                  0x61
124 #define ATC2609A_PMU_REMCONADC                  0x62
125 #define ATC2609A_PMU_SVCCADC                    0x63
126 #define ATC2609A_PMU_CHGIADC                    0x64
127 #define ATC2609A_PMU_IREFADC                    0x65
128 #define ATC2609A_PMU_BAKBATADC                  0x66
129 #define ATC2609A_PMU_ICTEMPADC                  0x67
130 #define ATC2609A_PMU_AUXADC0                    0x68
131 #define ATC2609A_PMU_AUXADC1                    0x69
132 #define ATC2609A_PMU_AUXADC2                    0x6A
133 #define ATC2609A_PMU_AUXADC3                    0x6B
134 #define ATC2609A_PMU_ICTEMPADC_ADJ              0x6C
135 #define ATC2609A_PMU_BDG_CTL                    0x6D
136 #define ATC2609A_RTC_CTL                        0x6E
137 #define ATC2609A_RTC_MSALM                      0x6F
138 #define ATC2609A_RTC_HALM                       0x70
139 #define ATC2609A_RTC_YMDALM                     0x71
140 #define ATC2609A_RTC_MS                         0x72
141 #define ATC2609A_RTC_H                          0x73
142 #define ATC2609A_RTC_DC                         0x74
143 #define ATC2609A_RTC_YMD                        0x75
144 #define ATC2609A_EFUSE_DAT                      0x76
145 #define ATC2609A_EFUSECRTL1                     0x77
146 #define ATC2609A_EFUSECRTL2                     0x78
147 #define ATC2609A_PMU_DC4_CTL0                   0x79
148 #define ATC2609A_PMU_DC4_CTL1                   0x7A
149 #define ATC2609A_PMU_DC4_CTL2                   0x7B
150 #define ATC2609A_PMU_DC4_CTL3                   0x7C
151 #define ATC2609A_PMU_DC4_CTL4                   0x7D
152 #define ATC2609A_PMU_DC4_CTL5                   0x7E
153 #define ATC2609A_PMU_DC4_CTL6                   0x7F
154 #define ATC2609A_PMU_PWR_STATUS                 0x80
155 #define ATC2609A_PMU_S2_PWR                     0x81
156 #define ATC2609A_CLMT_CTL0                      0x82
157 #define ATC2609A_CLMT_DATA0                     0x83
158 #define ATC2609A_CLMT_DATA1                     0x84
159 #define ATC2609A_CLMT_DATA2                     0x85
160 #define ATC2609A_CLMT_DATA3                     0x86
161 #define ATC2609A_CLMT_ADD0                      0x87
162 #define ATC2609A_CLMT_ADD1                      0x88
163 #define ATC2609A_CLMT_OCV_TABLE                 0x89
164 #define ATC2609A_CLMT_R_TABLE                   0x8A
165 #define ATC2609A_PMU_PWRON_CTL0                 0x8D
166 #define ATC2609A_PMU_PWRON_CTL1                 0x8E
167 #define ATC2609A_PMU_PWRON_CTL2                 0x8F
168 #define ATC2609A_IRC_CTL                        0x90
169 #define ATC2609A_IRC_STAT                       0x91
170 #define ATC2609A_IRC_CC                         0x92
171 #define ATC2609A_IRC_KDC                        0x93
172 #define ATC2609A_IRC_WK                         0x94
173 #define ATC2609A_IRC_RCC                        0x95
174
175 /* AUDIO_OUT Registers */
176 #define ATC2609A_AUDIOINOUT_CTL                 0xA0
177 #define ATC2609A_AUDIO_DEBUGOUTCTL              0xA1
178 #define ATC2609A_DAC_DIGITALCTL                 0xA2
179 #define ATC2609A_DAC_VOLUMECTL0                 0xA3
180 #define ATC2609A_DAC_ANALOG0                    0xA4
181 #define ATC2609A_DAC_ANALOG1                    0xA5
182 #define ATC2609A_DAC_ANALOG2                    0xA6
183 #define ATC2609A_DAC_ANALOG3                    0xA7
184
185 /* AUDIO_IN Registers */
186 #define ATC2609A_ADC_DIGITALCTL                 0xA8
187 #define ATC2609A_ADC_HPFCTL                     0xA9
188 #define ATC2609A_ADC_CTL                        0xAA
189 #define ATC2609A_AGC_CTL0                       0xAB
190 #define ATC2609A_AGC_CTL1                       0xAC
191 #define ATC2609A_AGC_CTL2                       0xAD
192 #define ATC2609A_ADC_ANALOG0                    0xAE
193 #define ATC2609A_ADC_ANALOG1                    0xAF
194
195 /* PCM_IF Registers */
196 #define ATC2609A_PCM0_CTL                       0xB0
197 #define ATC2609A_PCM1_CTL                       0xB1
198 #define ATC2609A_PCM2_CTL                       0xB2
199 #define ATC2609A_PCMIF_CTL                      0xB3
200
201 /* CMU_CONTROL Registers */
202 #define ATC2609A_CMU_DEVRST                     0xC1
203
204 /* INTS Registers */
205 #define ATC2609A_INTS_PD                        0xC8
206 #define ATC2609A_INTS_MSK                       0xC9
207
208 /* MFP Registers */
209 #define ATC2609A_MFP_CTL                        0xD0
210 #define ATC2609A_PAD_VSEL                       0xD1
211 #define ATC2609A_GPIO_OUTEN                     0xD2
212 #define ATC2609A_GPIO_INEN                      0xD3
213 #define ATC2609A_GPIO_DAT                       0xD4
214 #define ATC2609A_PAD_DRV                        0xD5
215 #define ATC2609A_PAD_EN                         0xD6
216 #define ATC2609A_DEBUG_SEL                      0xD7
217 #define ATC2609A_DEBUG_IE                       0xD8
218 #define ATC2609A_DEBUG_OE                       0xD9
219 #define ATC2609A_CHIP_VER                       0xDC
220
221 /* PWSI Registers */
222 #define ATC2609A_PWSI_CTL                       0xF0
223 #define ATC2609A_PWSI_STATUS                    0xF1
224
225 /* TWSI Registers */
226 #define ATC2609A_SADDR                          0xFF
227
228 /* PMU_SYS_CTL0 Register Mask Bits */
229 #define ATC2609A_PMU_SYS_CTL0_IR_WK_EN                  BIT(5)
230 #define ATC2609A_PMU_SYS_CTL0_RESET_WK_EN               BIT(6)
231 #define ATC2609A_PMU_SYS_CTL0_HDSW_WK_EN                BIT(7)
232 #define ATC2609A_PMU_SYS_CTL0_ALARM_WK_EN               BIT(8)
233 #define ATC2609A_PMU_SYS_CTL0_REM_CON_WK_EN             BIT(9)
234 #define ATC2609A_PMU_SYS_CTL0_RESTART_EN                BIT(10)
235 #define ATC2609A_PMU_SYS_CTL0_WKIRQ_WK_EN               BIT(11)
236 #define ATC2609A_PMU_SYS_CTL0_ONOFF_SHORT_WK_EN         BIT(12)
237 #define ATC2609A_PMU_SYS_CTL0_ONOFF_LONG_WK_EN          BIT(13)
238 #define ATC2609A_PMU_SYS_CTL0_WALL_WK_EN                BIT(14)
239 #define ATC2609A_PMU_SYS_CTL0_USB_WK_EN                 BIT(15)
240 #define ATC2609A_PMU_SYS_CTL0_WK_ALL                    (GENMASK(15, 5) & (~BIT(10)))
241
242 /* PMU_SYS_CTL1 Register Mask Bits */
243 #define ATC2609A_PMU_SYS_CTL1_EN_S1                     BIT(0)
244 #define ATC2609A_PMU_SYS_CTL1_LB_S4_EN                  BIT(2)
245 #define ATC2609A_PMU_SYS_CTL1_LB_S4                     GENMASK(4, 3)
246 #define ATC2609A_PMU_SYS_CTL1_LB_S4_3_1V                BIT(4)
247 #define ATC2609A_PMU_SYS_CTL1_IR_WK_FLAG                BIT(5)
248 #define ATC2609A_PMU_SYS_CTL1_RESET_WK_FLAG             BIT(6)
249 #define ATC2609A_PMU_SYS_CTL1_HDSW_WK_FLAG              BIT(7)
250 #define ATC2609A_PMU_SYS_CTL1_ALARM_WK_FLAG             BIT(8)
251 #define ATC2609A_PMU_SYS_CTL1_REM_CON_WK_FLAG           BIT(9)
252 #define ATC2609A_PMU_SYS_CTL1_RESTART_WK_FLAG           BIT(10)
253 #define ATC2609A_PMU_SYS_CTL1_WKIRQ_WK_FLAG             BIT(11)
254 #define ATC2609A_PMU_SYS_CTL1_ONOFF_SHORT_WK_FLAG       BIT(12)
255 #define ATC2609A_PMU_SYS_CTL1_ONOFF_LONG_WK_FLAG        BIT(13)
256 #define ATC2609A_PMU_SYS_CTL1_WALL_WK_FLAG              BIT(14)
257 #define ATC2609A_PMU_SYS_CTL1_USB_WK_FLAG               BIT(15)
258
259 /* PMU_SYS_CTL2 Register Mask Bits */
260 #define ATC2609A_PMU_SYS_CTL2_PMU_A_EN                  BIT(0)
261 #define ATC2609A_PMU_SYS_CTL2_ONOFF_PRESS_INT_EN        BIT(1)
262 #define ATC2609A_PMU_SYS_CTL2_ONOFF_PRESS_PD            BIT(2)
263 #define ATC2609A_PMU_SYS_CTL2_S2TIMER                   GENMASK(5, 3)
264 #define ATC2609A_PMU_SYS_CTL2_S2_TIMER_EN               BIT(6)
265 #define ATC2609A_PMU_SYS_CTL2_ONOFF_RESET_TIME_SEL      GENMASK(8, 7)
266 #define ATC2609A_PMU_SYS_CTL2_ONOFF_RESET_EN            BIT(9)
267 #define ATC2609A_PMU_SYS_CTL2_ONOFF_PRESS_TIME          GENMASK(11, 10)
268 #define ATC2609A_PMU_SYS_CTL2_ONOFF_LSP_INT_EN          BIT(12)
269 #define ATC2609A_PMU_SYS_CTL2_ONOFF_LONG_PRESS          BIT(13)
270 #define ATC2609A_PMU_SYS_CTL2_ONOFF_SHORT_PRESS         BIT(14)
271 #define ATC2609A_PMU_SYS_CTL2_ONOFF_PRESS               BIT(15)
272
273 /* PMU_SYS_CTL3 Register Mask Bits */
274 #define ATC2609A_PMU_SYS_CTL3_S2S3TOS1_TIMER            GENMASK(8, 7)
275 #define ATC2609A_PMU_SYS_CTL3_S2S3TOS1_TIMER_EN         BIT(9)
276 #define ATC2609A_PMU_SYS_CTL3_S3_TIMER                  GENMASK(12, 10)
277 #define ATC2609A_PMU_SYS_CTL3_S3_TIMER_EN               BIT(13)
278 #define ATC2609A_PMU_SYS_CTL3_EN_S3                     BIT(14)
279 #define ATC2609A_PMU_SYS_CTL3_EN_S2                     BIT(15)
280
281 /* PMU_SYS_CTL5 Register Mask Bits */
282 #define ATC2609A_PMU_SYS_CTL5_WALLWKDTEN                BIT(7)
283 #define ATC2609A_PMU_SYS_CTL5_VBUSWKDTEN                BIT(8)
284 #define ATC2609A_PMU_SYS_CTL5_REMCON_DECT_EN            BIT(9)
285 #define ATC2609A_PMU_SYS_CTL5_ONOFF_8S_SEL              BIT(10)
286
287 /* INTS_MSK Register Mask Bits */
288 #define ATC2609A_INTS_MSK_AUDIO                         BIT(0)
289 #define ATC2609A_INTS_MSK_OV                            BIT(1)
290 #define ATC2609A_INTS_MSK_OC                            BIT(2)
291 #define ATC2609A_INTS_MSK_OT                            BIT(3)
292 #define ATC2609A_INTS_MSK_UV                            BIT(4)
293 #define ATC2609A_INTS_MSK_ALARM                         BIT(5)
294 #define ATC2609A_INTS_MSK_ONOFF                         BIT(6)
295 #define ATC2609A_INTS_MSK_WKUP                          BIT(7)
296 #define ATC2609A_INTS_MSK_IR                            BIT(8)
297 #define ATC2609A_INTS_MSK_REMCON                        BIT(9)
298 #define ATC2609A_INTS_MSK_POWERIN                       BIT(10)
299
300 /* CMU_DEVRST Register Mask Bits */
301 #define ATC2609A_CMU_DEVRST_AUDIO                       BIT(0)
302 #define ATC2609A_CMU_DEVRST_MFP                         BIT(1)
303 #define ATC2609A_CMU_DEVRST_INTS                        BIT(2)
304
305 /* PAD_EN Register Mask Bits */
306 #define ATC2609A_PAD_EN_EXTIRQ                          BIT(0)
307
308 #endif /* __LINUX_MFD_ATC260X_ATC2609A_H */