include/linux/dpll.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  *  Copyright (c) 2023 Meta Platforms, Inc. and affiliates
   4  *  Copyright (c) 2023 Intel and affiliates
   5  */
   6
   7 #ifndef __DPLL_H__
   8 #define __DPLL_H__
   9
  10 #include <uapi/linux/dpll.h>
  11 #include <linux/device.h>
  12 #include <linux/netlink.h>
  13 #include <linux/netdevice.h>
  14 #include <linux/rtnetlink.h>
  15
  16 struct dpll_device;
  17 struct dpll_pin;
  18
  19 struct dpll_device_ops {
  20         int (*mode_get)(const struct dpll_device *dpll, void *dpll_priv,
  21                         enum dpll_mode *mode, struct netlink_ext_ack *extack);
  22         int (*lock_status_get)(const struct dpll_device *dpll, void *dpll_priv,
  23                                enum dpll_lock_status *status,
  24                                struct netlink_ext_ack *extack);
  25         int (*temp_get)(const struct dpll_device *dpll, void *dpll_priv,
  26                         s32 *temp, struct netlink_ext_ack *extack);
  27 };
  28
  29 struct dpll_pin_ops {
  30         int (*frequency_set)(const struct dpll_pin *pin, void *pin_priv,
  31                              const struct dpll_device *dpll, void *dpll_priv,
  32                              const u64 frequency,
  33                              struct netlink_ext_ack *extack);
  34         int (*frequency_get)(const struct dpll_pin *pin, void *pin_priv,
  35                              const struct dpll_device *dpll, void *dpll_priv,
  36                              u64 *frequency, struct netlink_ext_ack *extack);
  37         int (*direction_set)(const struct dpll_pin *pin, void *pin_priv,
  38                              const struct dpll_device *dpll, void *dpll_priv,
  39                              const enum dpll_pin_direction direction,
  40                              struct netlink_ext_ack *extack);
  41         int (*direction_get)(const struct dpll_pin *pin, void *pin_priv,
  42                              const struct dpll_device *dpll, void *dpll_priv,
  43                              enum dpll_pin_direction *direction,
  44                              struct netlink_ext_ack *extack);
  45         int (*state_on_pin_get)(const struct dpll_pin *pin, void *pin_priv,
  46                                 const struct dpll_pin *parent_pin,
  47                                 void *parent_pin_priv,
  48                                 enum dpll_pin_state *state,
  49                                 struct netlink_ext_ack *extack);
  50         int (*state_on_dpll_get)(const struct dpll_pin *pin, void *pin_priv,
  51                                  const struct dpll_device *dpll,
  52                                  void *dpll_priv, enum dpll_pin_state *state,
  53                                  struct netlink_ext_ack *extack);
  54         int (*state_on_pin_set)(const struct dpll_pin *pin, void *pin_priv,
  55                                 const struct dpll_pin *parent_pin,
  56                                 void *parent_pin_priv,
  57                                 const enum dpll_pin_state state,
  58                                 struct netlink_ext_ack *extack);
  59         int (*state_on_dpll_set)(const struct dpll_pin *pin, void *pin_priv,
  60                                  const struct dpll_device *dpll,
  61                                  void *dpll_priv,
  62                                  const enum dpll_pin_state state,
  63                                  struct netlink_ext_ack *extack);
  64         int (*prio_get)(const struct dpll_pin *pin,  void *pin_priv,
  65                         const struct dpll_device *dpll,  void *dpll_priv,
  66                         u32 *prio, struct netlink_ext_ack *extack);
  67         int (*prio_set)(const struct dpll_pin *pin, void *pin_priv,
  68                         const struct dpll_device *dpll, void *dpll_priv,
  69                         const u32 prio, struct netlink_ext_ack *extack);
  70         int (*phase_offset_get)(const struct dpll_pin *pin, void *pin_priv,
  71                                 const struct dpll_device *dpll, void *dpll_priv,
  72                                 s64 *phase_offset,
  73                                 struct netlink_ext_ack *extack);
  74         int (*phase_adjust_get)(const struct dpll_pin *pin, void *pin_priv,
  75                                 const struct dpll_device *dpll, void *dpll_priv,
  76                                 s32 *phase_adjust,
  77                                 struct netlink_ext_ack *extack);
  78         int (*phase_adjust_set)(const struct dpll_pin *pin, void *pin_priv,
  79                                 const struct dpll_device *dpll, void *dpll_priv,
  80                                 const s32 phase_adjust,
  81                                 struct netlink_ext_ack *extack);
  82         int (*ffo_get)(const struct dpll_pin *pin, void *pin_priv,
  83                        const struct dpll_device *dpll, void *dpll_priv,
  84                        s64 *ffo, struct netlink_ext_ack *extack);
  85 };
  86
  87 struct dpll_pin_frequency {
  88         u64 min;
  89         u64 max;
  90 };
  91
  92 #define DPLL_PIN_FREQUENCY_RANGE(_min, _max)    \
  93         {                                       \
  94                 .min = _min,                    \
  95                 .max = _max,                    \
  96         }
  97
  98 #define DPLL_PIN_FREQUENCY(_val) DPLL_PIN_FREQUENCY_RANGE(_val, _val)
  99 #define DPLL_PIN_FREQUENCY_1PPS \
 100         DPLL_PIN_FREQUENCY(DPLL_PIN_FREQUENCY_1_HZ)
 101 #define DPLL_PIN_FREQUENCY_10MHZ \
 102         DPLL_PIN_FREQUENCY(DPLL_PIN_FREQUENCY_10_MHZ)
 103 #define DPLL_PIN_FREQUENCY_IRIG_B \
 104         DPLL_PIN_FREQUENCY(DPLL_PIN_FREQUENCY_10_KHZ)
 105 #define DPLL_PIN_FREQUENCY_DCF77 \
 106         DPLL_PIN_FREQUENCY(DPLL_PIN_FREQUENCY_77_5_KHZ)
 107
 108 struct dpll_pin_phase_adjust_range {
 109         s32 min;
 110         s32 max;
 111 };
 112
 113 struct dpll_pin_properties {
 114         const char *board_label;
 115         const char *panel_label;
 116         const char *package_label;
 117         enum dpll_pin_type type;
 118         unsigned long capabilities;
 119         u32 freq_supported_num;
 120         struct dpll_pin_frequency *freq_supported;
 121         struct dpll_pin_phase_adjust_range phase_range;
 122 };
 123
 124 #if IS_ENABLED(CONFIG_DPLL)
 125 size_t dpll_msg_pin_handle_size(struct dpll_pin *pin);
 126 int dpll_msg_add_pin_handle(struct sk_buff *msg, struct dpll_pin *pin);
 127 #else
 128 static inline size_t dpll_msg_pin_handle_size(struct dpll_pin *pin)
 129 {
 130         return 0;
 131 }
 132
 133 static inline int dpll_msg_add_pin_handle(struct sk_buff *msg, struct dpll_pin *pin)
 134 {
 135         return 0;
 136 }
 137 #endif
 138
 139 struct dpll_device *
 140 dpll_device_get(u64 clock_id, u32 dev_driver_id, struct module *module);
 141
 142 void dpll_device_put(struct dpll_device *dpll);
 143
 144 int dpll_device_register(struct dpll_device *dpll, enum dpll_type type,
 145                          const struct dpll_device_ops *ops, void *priv);
 146
 147 void dpll_device_unregister(struct dpll_device *dpll,
 148                             const struct dpll_device_ops *ops, void *priv);
 149
 150 struct dpll_pin *
 151 dpll_pin_get(u64 clock_id, u32 dev_driver_id, struct module *module,
 152              const struct dpll_pin_properties *prop);
 153
 154 int dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin,
 155                       const struct dpll_pin_ops *ops, void *priv);
 156
 157 void dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin,
 158                          const struct dpll_pin_ops *ops, void *priv);
 159
 160 void dpll_pin_put(struct dpll_pin *pin);
 161
 162 int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin,
 163                              const struct dpll_pin_ops *ops, void *priv);
 164
 165 void dpll_pin_on_pin_unregister(struct dpll_pin *parent, struct dpll_pin *pin,
 166                                 const struct dpll_pin_ops *ops, void *priv);
 167
 168 int dpll_device_change_ntf(struct dpll_device *dpll);
 169
 170 int dpll_pin_change_ntf(struct dpll_pin *pin);
 171
 172 static inline struct dpll_pin *netdev_dpll_pin(const struct net_device *dev)
 173 {
 174 #if IS_ENABLED(CONFIG_DPLL)
 175         return rcu_dereference_rtnl(dev->dpll_pin);
 176 #else
 177         return NULL;
 178 #endif
 179 }
 180
 181 #endif