1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _LINUX_DMA_MAPPING_H
3 #define _LINUX_DMA_MAPPING_H
5 #include <linux/sizes.h>
6 #include <linux/string.h>
7 #include <linux/device.h>
9 #include <linux/dma-debug.h>
10 #include <linux/dma-direction.h>
11 #include <linux/scatterlist.h>
12 #include <linux/bug.h>
13 #include <linux/mem_encrypt.h>
16 * List of possible attributes associated with a DMA mapping. The semantics
17 * of each attribute should be defined in Documentation/DMA-attributes.txt.
19 * DMA_ATTR_WRITE_BARRIER: DMA to a memory region with this attribute
20 * forces all pending DMA writes to complete.
22 #define DMA_ATTR_WRITE_BARRIER (1UL << 0)
24 * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping
25 * may be weakly ordered, that is that reads and writes may pass each other.
27 #define DMA_ATTR_WEAK_ORDERING (1UL << 1)
29 * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be
30 * buffered to improve performance.
32 #define DMA_ATTR_WRITE_COMBINE (1UL << 2)
34 * DMA_ATTR_NON_CONSISTENT: Lets the platform to choose to return either
35 * consistent or non-consistent memory as it sees fit.
37 #define DMA_ATTR_NON_CONSISTENT (1UL << 3)
39 * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel
40 * virtual mapping for the allocated buffer.
42 #define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4)
44 * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of
45 * the CPU cache for the given buffer assuming that it has been already
46 * transferred to 'device' domain.
48 #define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5)
50 * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer
53 #define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6)
55 * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem
56 * that it's probably not worth the time to try to allocate memory to in a way
57 * that gives better TLB efficiency.
59 #define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7)
61 * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress
62 * allocation failure reports (similarly to __GFP_NOWARN).
64 #define DMA_ATTR_NO_WARN (1UL << 8)
67 * DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully
68 * accessible at an elevated privilege level (and ideally inaccessible or
69 * at least read-only at lesser-privileged levels).
71 #define DMA_ATTR_PRIVILEGED (1UL << 9)
74 * A dma_addr_t can hold any valid DMA or bus address for the platform.
75 * It can be given to a device to use as a DMA source or target. A CPU cannot
76 * reference a dma_addr_t directly because there may be translation between
77 * its physical address space and the bus address space.
80 void* (*alloc)(struct device *dev, size_t size,
81 dma_addr_t *dma_handle, gfp_t gfp,
83 void (*free)(struct device *dev, size_t size,
84 void *vaddr, dma_addr_t dma_handle,
86 int (*mmap)(struct device *, struct vm_area_struct *,
87 void *, dma_addr_t, size_t,
90 int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *,
91 dma_addr_t, size_t, unsigned long attrs);
93 dma_addr_t (*map_page)(struct device *dev, struct page *page,
94 unsigned long offset, size_t size,
95 enum dma_data_direction dir,
97 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
98 size_t size, enum dma_data_direction dir,
101 * map_sg returns 0 on error and a value > 0 on success.
102 * It should never return a value < 0.
104 int (*map_sg)(struct device *dev, struct scatterlist *sg,
105 int nents, enum dma_data_direction dir,
106 unsigned long attrs);
107 void (*unmap_sg)(struct device *dev,
108 struct scatterlist *sg, int nents,
109 enum dma_data_direction dir,
110 unsigned long attrs);
111 dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr,
112 size_t size, enum dma_data_direction dir,
113 unsigned long attrs);
114 void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle,
115 size_t size, enum dma_data_direction dir,
116 unsigned long attrs);
117 void (*sync_single_for_cpu)(struct device *dev,
118 dma_addr_t dma_handle, size_t size,
119 enum dma_data_direction dir);
120 void (*sync_single_for_device)(struct device *dev,
121 dma_addr_t dma_handle, size_t size,
122 enum dma_data_direction dir);
123 void (*sync_sg_for_cpu)(struct device *dev,
124 struct scatterlist *sg, int nents,
125 enum dma_data_direction dir);
126 void (*sync_sg_for_device)(struct device *dev,
127 struct scatterlist *sg, int nents,
128 enum dma_data_direction dir);
129 void (*cache_sync)(struct device *dev, void *vaddr, size_t size,
130 enum dma_data_direction direction);
131 int (*mapping_error)(struct device *dev, dma_addr_t dma_addr);
132 int (*dma_supported)(struct device *dev, u64 mask);
133 #ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK
134 u64 (*get_required_mask)(struct device *dev);
139 extern const struct dma_map_ops dma_direct_ops;
140 extern const struct dma_map_ops dma_virt_ops;
142 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
144 #define DMA_MASK_NONE 0x0ULL
146 static inline int valid_dma_direction(int dma_direction)
148 return ((dma_direction == DMA_BIDIRECTIONAL) ||
149 (dma_direction == DMA_TO_DEVICE) ||
150 (dma_direction == DMA_FROM_DEVICE));
153 static inline int is_device_dma_capable(struct device *dev)
155 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
158 #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT
160 * These three functions are only for dma allocator.
161 * Don't use them in device drivers.
163 int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size,
164 dma_addr_t *dma_handle, void **ret);
165 int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr);
167 int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma,
168 void *cpu_addr, size_t size, int *ret);
170 void *dma_alloc_from_global_coherent(ssize_t size, dma_addr_t *dma_handle);
171 int dma_release_from_global_coherent(int order, void *vaddr);
172 int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr,
173 size_t size, int *ret);
176 #define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0)
177 #define dma_release_from_dev_coherent(dev, order, vaddr) (0)
178 #define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0)
180 static inline void *dma_alloc_from_global_coherent(ssize_t size,
181 dma_addr_t *dma_handle)
186 static inline int dma_release_from_global_coherent(int order, void *vaddr)
191 static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma,
192 void *cpu_addr, size_t size,
197 #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */
199 #ifdef CONFIG_HAS_DMA
200 #include <asm/dma-mapping.h>
201 static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
203 if (dev && dev->dma_ops)
205 return get_arch_dma_ops(dev ? dev->bus : NULL);
208 static inline void set_dma_ops(struct device *dev,
209 const struct dma_map_ops *dma_ops)
211 dev->dma_ops = dma_ops;
215 * Define the dma api to allow compilation but not linking of
216 * dma dependent code. Code that depends on the dma-mapping
217 * API needs to set 'depends on HAS_DMA' in its Kconfig
219 extern const struct dma_map_ops bad_dma_ops;
220 static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
226 static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr,
228 enum dma_data_direction dir,
231 const struct dma_map_ops *ops = get_dma_ops(dev);
234 BUG_ON(!valid_dma_direction(dir));
235 addr = ops->map_page(dev, virt_to_page(ptr),
236 offset_in_page(ptr), size,
238 debug_dma_map_page(dev, virt_to_page(ptr),
239 offset_in_page(ptr), size,
244 static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr,
246 enum dma_data_direction dir,
249 const struct dma_map_ops *ops = get_dma_ops(dev);
251 BUG_ON(!valid_dma_direction(dir));
253 ops->unmap_page(dev, addr, size, dir, attrs);
254 debug_dma_unmap_page(dev, addr, size, dir, true);
258 * dma_maps_sg_attrs returns 0 on error and > 0 on success.
259 * It should never return a value < 0.
261 static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
262 int nents, enum dma_data_direction dir,
265 const struct dma_map_ops *ops = get_dma_ops(dev);
268 BUG_ON(!valid_dma_direction(dir));
269 ents = ops->map_sg(dev, sg, nents, dir, attrs);
271 debug_dma_map_sg(dev, sg, nents, ents, dir);
276 static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
277 int nents, enum dma_data_direction dir,
280 const struct dma_map_ops *ops = get_dma_ops(dev);
282 BUG_ON(!valid_dma_direction(dir));
283 debug_dma_unmap_sg(dev, sg, nents, dir);
285 ops->unmap_sg(dev, sg, nents, dir, attrs);
288 static inline dma_addr_t dma_map_page_attrs(struct device *dev,
290 size_t offset, size_t size,
291 enum dma_data_direction dir,
294 const struct dma_map_ops *ops = get_dma_ops(dev);
297 BUG_ON(!valid_dma_direction(dir));
298 addr = ops->map_page(dev, page, offset, size, dir, attrs);
299 debug_dma_map_page(dev, page, offset, size, dir, addr, false);
304 static inline void dma_unmap_page_attrs(struct device *dev,
305 dma_addr_t addr, size_t size,
306 enum dma_data_direction dir,
309 const struct dma_map_ops *ops = get_dma_ops(dev);
311 BUG_ON(!valid_dma_direction(dir));
313 ops->unmap_page(dev, addr, size, dir, attrs);
314 debug_dma_unmap_page(dev, addr, size, dir, false);
317 static inline dma_addr_t dma_map_resource(struct device *dev,
318 phys_addr_t phys_addr,
320 enum dma_data_direction dir,
323 const struct dma_map_ops *ops = get_dma_ops(dev);
326 BUG_ON(!valid_dma_direction(dir));
328 /* Don't allow RAM to be mapped */
329 BUG_ON(pfn_valid(PHYS_PFN(phys_addr)));
332 if (ops->map_resource)
333 addr = ops->map_resource(dev, phys_addr, size, dir, attrs);
335 debug_dma_map_resource(dev, phys_addr, size, dir, addr);
340 static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr,
341 size_t size, enum dma_data_direction dir,
344 const struct dma_map_ops *ops = get_dma_ops(dev);
346 BUG_ON(!valid_dma_direction(dir));
347 if (ops->unmap_resource)
348 ops->unmap_resource(dev, addr, size, dir, attrs);
349 debug_dma_unmap_resource(dev, addr, size, dir);
352 static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
354 enum dma_data_direction dir)
356 const struct dma_map_ops *ops = get_dma_ops(dev);
358 BUG_ON(!valid_dma_direction(dir));
359 if (ops->sync_single_for_cpu)
360 ops->sync_single_for_cpu(dev, addr, size, dir);
361 debug_dma_sync_single_for_cpu(dev, addr, size, dir);
364 static inline void dma_sync_single_for_device(struct device *dev,
365 dma_addr_t addr, size_t size,
366 enum dma_data_direction dir)
368 const struct dma_map_ops *ops = get_dma_ops(dev);
370 BUG_ON(!valid_dma_direction(dir));
371 if (ops->sync_single_for_device)
372 ops->sync_single_for_device(dev, addr, size, dir);
373 debug_dma_sync_single_for_device(dev, addr, size, dir);
376 static inline void dma_sync_single_range_for_cpu(struct device *dev,
378 unsigned long offset,
380 enum dma_data_direction dir)
382 const struct dma_map_ops *ops = get_dma_ops(dev);
384 BUG_ON(!valid_dma_direction(dir));
385 if (ops->sync_single_for_cpu)
386 ops->sync_single_for_cpu(dev, addr + offset, size, dir);
387 debug_dma_sync_single_range_for_cpu(dev, addr, offset, size, dir);
390 static inline void dma_sync_single_range_for_device(struct device *dev,
392 unsigned long offset,
394 enum dma_data_direction dir)
396 const struct dma_map_ops *ops = get_dma_ops(dev);
398 BUG_ON(!valid_dma_direction(dir));
399 if (ops->sync_single_for_device)
400 ops->sync_single_for_device(dev, addr + offset, size, dir);
401 debug_dma_sync_single_range_for_device(dev, addr, offset, size, dir);
405 dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
406 int nelems, enum dma_data_direction dir)
408 const struct dma_map_ops *ops = get_dma_ops(dev);
410 BUG_ON(!valid_dma_direction(dir));
411 if (ops->sync_sg_for_cpu)
412 ops->sync_sg_for_cpu(dev, sg, nelems, dir);
413 debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
417 dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
418 int nelems, enum dma_data_direction dir)
420 const struct dma_map_ops *ops = get_dma_ops(dev);
422 BUG_ON(!valid_dma_direction(dir));
423 if (ops->sync_sg_for_device)
424 ops->sync_sg_for_device(dev, sg, nelems, dir);
425 debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
429 #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0)
430 #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0)
431 #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0)
432 #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0)
433 #define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0)
434 #define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0)
437 dma_cache_sync(struct device *dev, void *vaddr, size_t size,
438 enum dma_data_direction dir)
440 const struct dma_map_ops *ops = get_dma_ops(dev);
442 BUG_ON(!valid_dma_direction(dir));
444 ops->cache_sync(dev, vaddr, size, dir);
447 extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
448 void *cpu_addr, dma_addr_t dma_addr, size_t size);
450 void *dma_common_contiguous_remap(struct page *page, size_t size,
451 unsigned long vm_flags,
452 pgprot_t prot, const void *caller);
454 void *dma_common_pages_remap(struct page **pages, size_t size,
455 unsigned long vm_flags, pgprot_t prot,
457 void dma_common_free_remap(void *cpu_addr, size_t size, unsigned long vm_flags);
460 * dma_mmap_attrs - map a coherent DMA allocation into user space
461 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
462 * @vma: vm_area_struct describing requested user mapping
463 * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs
464 * @handle: device-view address returned from dma_alloc_attrs
465 * @size: size of memory originally requested in dma_alloc_attrs
466 * @attrs: attributes of mapping properties requested in dma_alloc_attrs
468 * Map a coherent DMA buffer previously allocated by dma_alloc_attrs
469 * into user space. The coherent DMA buffer must not be freed by the
470 * driver until the user space mapping has been released.
473 dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr,
474 dma_addr_t dma_addr, size_t size, unsigned long attrs)
476 const struct dma_map_ops *ops = get_dma_ops(dev);
479 return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
480 return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size);
483 #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0)
486 dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
487 void *cpu_addr, dma_addr_t dma_addr, size_t size);
490 dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr,
491 dma_addr_t dma_addr, size_t size,
494 const struct dma_map_ops *ops = get_dma_ops(dev);
496 if (ops->get_sgtable)
497 return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size,
499 return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size);
502 #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0)
504 #ifndef arch_dma_alloc_attrs
505 #define arch_dma_alloc_attrs(dev, flag) (true)
508 static inline void *dma_alloc_attrs(struct device *dev, size_t size,
509 dma_addr_t *dma_handle, gfp_t flag,
512 const struct dma_map_ops *ops = get_dma_ops(dev);
516 WARN_ON_ONCE(dev && !dev->coherent_dma_mask);
518 if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr))
521 /* let the implementation decide on the zone to allocate from: */
522 flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
524 if (!arch_dma_alloc_attrs(&dev, &flag))
529 cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
530 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
534 static inline void dma_free_attrs(struct device *dev, size_t size,
535 void *cpu_addr, dma_addr_t dma_handle,
538 const struct dma_map_ops *ops = get_dma_ops(dev);
541 WARN_ON(irqs_disabled());
543 if (dma_release_from_dev_coherent(dev, get_order(size), cpu_addr))
546 if (!ops->free || !cpu_addr)
549 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
550 ops->free(dev, size, cpu_addr, dma_handle, attrs);
553 static inline void *dma_alloc_coherent(struct device *dev, size_t size,
554 dma_addr_t *dma_handle, gfp_t flag)
556 return dma_alloc_attrs(dev, size, dma_handle, flag, 0);
559 static inline void dma_free_coherent(struct device *dev, size_t size,
560 void *cpu_addr, dma_addr_t dma_handle)
562 return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0);
565 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
567 const struct dma_map_ops *ops = get_dma_ops(dev);
569 debug_dma_mapping_error(dev, dma_addr);
570 if (ops->mapping_error)
571 return ops->mapping_error(dev, dma_addr);
576 * This is a hack for the legacy x86 forbid_dac and iommu_sac_force. Please
577 * don't use this in new code.
579 #ifndef arch_dma_supported
580 #define arch_dma_supported(dev, mask) (1)
583 static inline void dma_check_mask(struct device *dev, u64 mask)
585 if (sme_active() && (mask < (((u64)sme_get_me_mask() << 1) - 1)))
586 dev_warn(dev, "SME is active, device will require DMA bounce buffers\n");
589 static inline int dma_supported(struct device *dev, u64 mask)
591 const struct dma_map_ops *ops = get_dma_ops(dev);
595 if (!arch_dma_supported(dev, mask))
598 if (!ops->dma_supported)
600 return ops->dma_supported(dev, mask);
603 #ifndef HAVE_ARCH_DMA_SET_MASK
604 static inline int dma_set_mask(struct device *dev, u64 mask)
606 if (!dev->dma_mask || !dma_supported(dev, mask))
609 dma_check_mask(dev, mask);
611 *dev->dma_mask = mask;
616 static inline u64 dma_get_mask(struct device *dev)
618 if (dev && dev->dma_mask && *dev->dma_mask)
619 return *dev->dma_mask;
620 return DMA_BIT_MASK(32);
623 #ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK
624 int dma_set_coherent_mask(struct device *dev, u64 mask);
626 static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
628 if (!dma_supported(dev, mask))
631 dma_check_mask(dev, mask);
633 dev->coherent_dma_mask = mask;
639 * Set both the DMA mask and the coherent DMA mask to the same thing.
640 * Note that we don't check the return value from dma_set_coherent_mask()
641 * as the DMA API guarantees that the coherent DMA mask can be set to
642 * the same or smaller than the streaming DMA mask.
644 static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask)
646 int rc = dma_set_mask(dev, mask);
648 dma_set_coherent_mask(dev, mask);
653 * Similar to the above, except it deals with the case where the device
654 * does not have dev->dma_mask appropriately setup.
656 static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
658 dev->dma_mask = &dev->coherent_dma_mask;
659 return dma_set_mask_and_coherent(dev, mask);
662 extern u64 dma_get_required_mask(struct device *dev);
664 #ifndef arch_setup_dma_ops
665 static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
666 u64 size, const struct iommu_ops *iommu,
670 #ifndef arch_teardown_dma_ops
671 static inline void arch_teardown_dma_ops(struct device *dev) { }
674 static inline unsigned int dma_get_max_seg_size(struct device *dev)
676 if (dev->dma_parms && dev->dma_parms->max_segment_size)
677 return dev->dma_parms->max_segment_size;
681 static inline unsigned int dma_set_max_seg_size(struct device *dev,
684 if (dev->dma_parms) {
685 dev->dma_parms->max_segment_size = size;
691 static inline unsigned long dma_get_seg_boundary(struct device *dev)
693 if (dev->dma_parms && dev->dma_parms->segment_boundary_mask)
694 return dev->dma_parms->segment_boundary_mask;
695 return DMA_BIT_MASK(32);
698 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
700 if (dev->dma_parms) {
701 dev->dma_parms->segment_boundary_mask = mask;
708 static inline unsigned long dma_max_pfn(struct device *dev)
710 return (*dev->dma_mask >> PAGE_SHIFT) + dev->dma_pfn_offset;
714 static inline void *dma_zalloc_coherent(struct device *dev, size_t size,
715 dma_addr_t *dma_handle, gfp_t flag)
717 void *ret = dma_alloc_coherent(dev, size, dma_handle,
722 static inline int dma_get_cache_alignment(void)
724 #ifdef ARCH_DMA_MINALIGN
725 return ARCH_DMA_MINALIGN;
730 /* flags for the coherent memory api */
731 #define DMA_MEMORY_EXCLUSIVE 0x01
733 #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT
734 int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
735 dma_addr_t device_addr, size_t size, int flags);
736 void dma_release_declared_memory(struct device *dev);
737 void *dma_mark_declared_memory_occupied(struct device *dev,
738 dma_addr_t device_addr, size_t size);
741 dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
742 dma_addr_t device_addr, size_t size, int flags)
748 dma_release_declared_memory(struct device *dev)
753 dma_mark_declared_memory_occupied(struct device *dev,
754 dma_addr_t device_addr, size_t size)
756 return ERR_PTR(-EBUSY);
758 #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */
760 #ifdef CONFIG_HAS_DMA
761 int dma_configure(struct device *dev);
762 void dma_deconfigure(struct device *dev);
764 static inline int dma_configure(struct device *dev)
769 static inline void dma_deconfigure(struct device *dev) {}
775 extern void *dmam_alloc_coherent(struct device *dev, size_t size,
776 dma_addr_t *dma_handle, gfp_t gfp);
777 extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
778 dma_addr_t dma_handle);
779 extern void *dmam_alloc_attrs(struct device *dev, size_t size,
780 dma_addr_t *dma_handle, gfp_t gfp,
781 unsigned long attrs);
782 #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT
783 extern int dmam_declare_coherent_memory(struct device *dev,
784 phys_addr_t phys_addr,
785 dma_addr_t device_addr, size_t size,
787 extern void dmam_release_declared_memory(struct device *dev);
788 #else /* CONFIG_HAVE_GENERIC_DMA_COHERENT */
789 static inline int dmam_declare_coherent_memory(struct device *dev,
790 phys_addr_t phys_addr, dma_addr_t device_addr,
791 size_t size, gfp_t gfp)
796 static inline void dmam_release_declared_memory(struct device *dev)
799 #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */
801 static inline void *dma_alloc_wc(struct device *dev, size_t size,
802 dma_addr_t *dma_addr, gfp_t gfp)
804 return dma_alloc_attrs(dev, size, dma_addr, gfp,
805 DMA_ATTR_WRITE_COMBINE);
807 #ifndef dma_alloc_writecombine
808 #define dma_alloc_writecombine dma_alloc_wc
811 static inline void dma_free_wc(struct device *dev, size_t size,
812 void *cpu_addr, dma_addr_t dma_addr)
814 return dma_free_attrs(dev, size, cpu_addr, dma_addr,
815 DMA_ATTR_WRITE_COMBINE);
817 #ifndef dma_free_writecombine
818 #define dma_free_writecombine dma_free_wc
821 static inline int dma_mmap_wc(struct device *dev,
822 struct vm_area_struct *vma,
823 void *cpu_addr, dma_addr_t dma_addr,
826 return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size,
827 DMA_ATTR_WRITE_COMBINE);
829 #ifndef dma_mmap_writecombine
830 #define dma_mmap_writecombine dma_mmap_wc
833 #if defined(CONFIG_NEED_DMA_MAP_STATE) || defined(CONFIG_DMA_API_DEBUG)
834 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME
835 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME
836 #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
837 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
838 #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
839 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
841 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
842 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
843 #define dma_unmap_addr(PTR, ADDR_NAME) (0)
844 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
845 #define dma_unmap_len(PTR, LEN_NAME) (0)
846 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)