1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _LINUX_DMA_MAPPING_H
3 #define _LINUX_DMA_MAPPING_H
5 #include <linux/sizes.h>
6 #include <linux/string.h>
7 #include <linux/device.h>
9 #include <linux/dma-debug.h>
10 #include <linux/dma-direction.h>
11 #include <linux/scatterlist.h>
12 #include <linux/bug.h>
13 #include <linux/mem_encrypt.h>
16 * List of possible attributes associated with a DMA mapping. The semantics
17 * of each attribute should be defined in Documentation/DMA-attributes.txt.
19 * DMA_ATTR_WRITE_BARRIER: DMA to a memory region with this attribute
20 * forces all pending DMA writes to complete.
22 #define DMA_ATTR_WRITE_BARRIER (1UL << 0)
24 * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping
25 * may be weakly ordered, that is that reads and writes may pass each other.
27 #define DMA_ATTR_WEAK_ORDERING (1UL << 1)
29 * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be
30 * buffered to improve performance.
32 #define DMA_ATTR_WRITE_COMBINE (1UL << 2)
34 * DMA_ATTR_NON_CONSISTENT: Lets the platform to choose to return either
35 * consistent or non-consistent memory as it sees fit.
37 #define DMA_ATTR_NON_CONSISTENT (1UL << 3)
39 * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel
40 * virtual mapping for the allocated buffer.
42 #define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4)
44 * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of
45 * the CPU cache for the given buffer assuming that it has been already
46 * transferred to 'device' domain.
48 #define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5)
50 * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer
53 #define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6)
55 * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem
56 * that it's probably not worth the time to try to allocate memory to in a way
57 * that gives better TLB efficiency.
59 #define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7)
61 * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress
62 * allocation failure reports (similarly to __GFP_NOWARN).
64 #define DMA_ATTR_NO_WARN (1UL << 8)
67 * DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully
68 * accessible at an elevated privilege level (and ideally inaccessible or
69 * at least read-only at lesser-privileged levels).
71 #define DMA_ATTR_PRIVILEGED (1UL << 9)
74 * A dma_addr_t can hold any valid DMA or bus address for the platform.
75 * It can be given to a device to use as a DMA source or target. A CPU cannot
76 * reference a dma_addr_t directly because there may be translation between
77 * its physical address space and the bus address space.
80 void* (*alloc)(struct device *dev, size_t size,
81 dma_addr_t *dma_handle, gfp_t gfp,
83 void (*free)(struct device *dev, size_t size,
84 void *vaddr, dma_addr_t dma_handle,
86 int (*mmap)(struct device *, struct vm_area_struct *,
87 void *, dma_addr_t, size_t,
90 int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *,
91 dma_addr_t, size_t, unsigned long attrs);
93 dma_addr_t (*map_page)(struct device *dev, struct page *page,
94 unsigned long offset, size_t size,
95 enum dma_data_direction dir,
97 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
98 size_t size, enum dma_data_direction dir,
101 * map_sg returns 0 on error and a value > 0 on success.
102 * It should never return a value < 0.
104 int (*map_sg)(struct device *dev, struct scatterlist *sg,
105 int nents, enum dma_data_direction dir,
106 unsigned long attrs);
107 void (*unmap_sg)(struct device *dev,
108 struct scatterlist *sg, int nents,
109 enum dma_data_direction dir,
110 unsigned long attrs);
111 dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr,
112 size_t size, enum dma_data_direction dir,
113 unsigned long attrs);
114 void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle,
115 size_t size, enum dma_data_direction dir,
116 unsigned long attrs);
117 void (*sync_single_for_cpu)(struct device *dev,
118 dma_addr_t dma_handle, size_t size,
119 enum dma_data_direction dir);
120 void (*sync_single_for_device)(struct device *dev,
121 dma_addr_t dma_handle, size_t size,
122 enum dma_data_direction dir);
123 void (*sync_sg_for_cpu)(struct device *dev,
124 struct scatterlist *sg, int nents,
125 enum dma_data_direction dir);
126 void (*sync_sg_for_device)(struct device *dev,
127 struct scatterlist *sg, int nents,
128 enum dma_data_direction dir);
129 void (*cache_sync)(struct device *dev, void *vaddr, size_t size,
130 enum dma_data_direction direction);
131 int (*mapping_error)(struct device *dev, dma_addr_t dma_addr);
132 int (*dma_supported)(struct device *dev, u64 mask);
133 u64 (*get_required_mask)(struct device *dev);
136 extern const struct dma_map_ops dma_direct_ops;
137 extern const struct dma_map_ops dma_virt_ops;
139 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
141 #define DMA_MASK_NONE 0x0ULL
143 static inline int valid_dma_direction(int dma_direction)
145 return ((dma_direction == DMA_BIDIRECTIONAL) ||
146 (dma_direction == DMA_TO_DEVICE) ||
147 (dma_direction == DMA_FROM_DEVICE));
150 static inline int is_device_dma_capable(struct device *dev)
152 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
155 #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT
157 * These three functions are only for dma allocator.
158 * Don't use them in device drivers.
160 int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size,
161 dma_addr_t *dma_handle, void **ret);
162 int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr);
164 int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma,
165 void *cpu_addr, size_t size, int *ret);
167 void *dma_alloc_from_global_coherent(ssize_t size, dma_addr_t *dma_handle);
168 int dma_release_from_global_coherent(int order, void *vaddr);
169 int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr,
170 size_t size, int *ret);
173 #define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0)
174 #define dma_release_from_dev_coherent(dev, order, vaddr) (0)
175 #define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0)
177 static inline void *dma_alloc_from_global_coherent(ssize_t size,
178 dma_addr_t *dma_handle)
183 static inline int dma_release_from_global_coherent(int order, void *vaddr)
188 static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma,
189 void *cpu_addr, size_t size,
194 #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */
196 #ifdef CONFIG_HAS_DMA
197 #include <asm/dma-mapping.h>
198 static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
200 if (dev && dev->dma_ops)
202 return get_arch_dma_ops(dev ? dev->bus : NULL);
205 static inline void set_dma_ops(struct device *dev,
206 const struct dma_map_ops *dma_ops)
208 dev->dma_ops = dma_ops;
212 * Define the dma api to allow compilation of dma dependent code.
213 * Code that depends on the dma-mapping API needs to set 'depends on HAS_DMA'
214 * in its Kconfig, unless it already depends on <something> || COMPILE_TEST,
215 * where <something> guarantuees the availability of the dma-mapping API.
217 static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
223 static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr,
225 enum dma_data_direction dir,
228 const struct dma_map_ops *ops = get_dma_ops(dev);
231 BUG_ON(!valid_dma_direction(dir));
232 debug_dma_map_single(dev, ptr, size);
233 addr = ops->map_page(dev, virt_to_page(ptr),
234 offset_in_page(ptr), size,
236 debug_dma_map_page(dev, virt_to_page(ptr),
237 offset_in_page(ptr), size,
242 static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr,
244 enum dma_data_direction dir,
247 const struct dma_map_ops *ops = get_dma_ops(dev);
249 BUG_ON(!valid_dma_direction(dir));
251 ops->unmap_page(dev, addr, size, dir, attrs);
252 debug_dma_unmap_page(dev, addr, size, dir, true);
256 * dma_maps_sg_attrs returns 0 on error and > 0 on success.
257 * It should never return a value < 0.
259 static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
260 int nents, enum dma_data_direction dir,
263 const struct dma_map_ops *ops = get_dma_ops(dev);
266 BUG_ON(!valid_dma_direction(dir));
267 ents = ops->map_sg(dev, sg, nents, dir, attrs);
269 debug_dma_map_sg(dev, sg, nents, ents, dir);
274 static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
275 int nents, enum dma_data_direction dir,
278 const struct dma_map_ops *ops = get_dma_ops(dev);
280 BUG_ON(!valid_dma_direction(dir));
281 debug_dma_unmap_sg(dev, sg, nents, dir);
283 ops->unmap_sg(dev, sg, nents, dir, attrs);
286 static inline dma_addr_t dma_map_page_attrs(struct device *dev,
288 size_t offset, size_t size,
289 enum dma_data_direction dir,
292 const struct dma_map_ops *ops = get_dma_ops(dev);
295 BUG_ON(!valid_dma_direction(dir));
296 addr = ops->map_page(dev, page, offset, size, dir, attrs);
297 debug_dma_map_page(dev, page, offset, size, dir, addr, false);
302 static inline void dma_unmap_page_attrs(struct device *dev,
303 dma_addr_t addr, size_t size,
304 enum dma_data_direction dir,
307 const struct dma_map_ops *ops = get_dma_ops(dev);
309 BUG_ON(!valid_dma_direction(dir));
311 ops->unmap_page(dev, addr, size, dir, attrs);
312 debug_dma_unmap_page(dev, addr, size, dir, false);
315 static inline dma_addr_t dma_map_resource(struct device *dev,
316 phys_addr_t phys_addr,
318 enum dma_data_direction dir,
321 const struct dma_map_ops *ops = get_dma_ops(dev);
324 BUG_ON(!valid_dma_direction(dir));
326 /* Don't allow RAM to be mapped */
327 BUG_ON(pfn_valid(PHYS_PFN(phys_addr)));
330 if (ops->map_resource)
331 addr = ops->map_resource(dev, phys_addr, size, dir, attrs);
333 debug_dma_map_resource(dev, phys_addr, size, dir, addr);
338 static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr,
339 size_t size, enum dma_data_direction dir,
342 const struct dma_map_ops *ops = get_dma_ops(dev);
344 BUG_ON(!valid_dma_direction(dir));
345 if (ops->unmap_resource)
346 ops->unmap_resource(dev, addr, size, dir, attrs);
347 debug_dma_unmap_resource(dev, addr, size, dir);
350 static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
352 enum dma_data_direction dir)
354 const struct dma_map_ops *ops = get_dma_ops(dev);
356 BUG_ON(!valid_dma_direction(dir));
357 if (ops->sync_single_for_cpu)
358 ops->sync_single_for_cpu(dev, addr, size, dir);
359 debug_dma_sync_single_for_cpu(dev, addr, size, dir);
362 static inline void dma_sync_single_for_device(struct device *dev,
363 dma_addr_t addr, size_t size,
364 enum dma_data_direction dir)
366 const struct dma_map_ops *ops = get_dma_ops(dev);
368 BUG_ON(!valid_dma_direction(dir));
369 if (ops->sync_single_for_device)
370 ops->sync_single_for_device(dev, addr, size, dir);
371 debug_dma_sync_single_for_device(dev, addr, size, dir);
374 static inline void dma_sync_single_range_for_cpu(struct device *dev,
376 unsigned long offset,
378 enum dma_data_direction dir)
380 const struct dma_map_ops *ops = get_dma_ops(dev);
382 BUG_ON(!valid_dma_direction(dir));
383 if (ops->sync_single_for_cpu)
384 ops->sync_single_for_cpu(dev, addr + offset, size, dir);
385 debug_dma_sync_single_range_for_cpu(dev, addr, offset, size, dir);
388 static inline void dma_sync_single_range_for_device(struct device *dev,
390 unsigned long offset,
392 enum dma_data_direction dir)
394 const struct dma_map_ops *ops = get_dma_ops(dev);
396 BUG_ON(!valid_dma_direction(dir));
397 if (ops->sync_single_for_device)
398 ops->sync_single_for_device(dev, addr + offset, size, dir);
399 debug_dma_sync_single_range_for_device(dev, addr, offset, size, dir);
403 dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
404 int nelems, enum dma_data_direction dir)
406 const struct dma_map_ops *ops = get_dma_ops(dev);
408 BUG_ON(!valid_dma_direction(dir));
409 if (ops->sync_sg_for_cpu)
410 ops->sync_sg_for_cpu(dev, sg, nelems, dir);
411 debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
415 dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
416 int nelems, enum dma_data_direction dir)
418 const struct dma_map_ops *ops = get_dma_ops(dev);
420 BUG_ON(!valid_dma_direction(dir));
421 if (ops->sync_sg_for_device)
422 ops->sync_sg_for_device(dev, sg, nelems, dir);
423 debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
427 #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0)
428 #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0)
429 #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0)
430 #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0)
431 #define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0)
432 #define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0)
435 dma_cache_sync(struct device *dev, void *vaddr, size_t size,
436 enum dma_data_direction dir)
438 const struct dma_map_ops *ops = get_dma_ops(dev);
440 BUG_ON(!valid_dma_direction(dir));
442 ops->cache_sync(dev, vaddr, size, dir);
445 extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
446 void *cpu_addr, dma_addr_t dma_addr, size_t size,
447 unsigned long attrs);
449 void *dma_common_contiguous_remap(struct page *page, size_t size,
450 unsigned long vm_flags,
451 pgprot_t prot, const void *caller);
453 void *dma_common_pages_remap(struct page **pages, size_t size,
454 unsigned long vm_flags, pgprot_t prot,
456 void dma_common_free_remap(void *cpu_addr, size_t size, unsigned long vm_flags);
459 * dma_mmap_attrs - map a coherent DMA allocation into user space
460 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
461 * @vma: vm_area_struct describing requested user mapping
462 * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs
463 * @handle: device-view address returned from dma_alloc_attrs
464 * @size: size of memory originally requested in dma_alloc_attrs
465 * @attrs: attributes of mapping properties requested in dma_alloc_attrs
467 * Map a coherent DMA buffer previously allocated by dma_alloc_attrs
468 * into user space. The coherent DMA buffer must not be freed by the
469 * driver until the user space mapping has been released.
472 dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr,
473 dma_addr_t dma_addr, size_t size, unsigned long attrs)
475 const struct dma_map_ops *ops = get_dma_ops(dev);
478 return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
479 return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
482 #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0)
485 dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, void *cpu_addr,
486 dma_addr_t dma_addr, size_t size, unsigned long attrs);
489 dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr,
490 dma_addr_t dma_addr, size_t size,
493 const struct dma_map_ops *ops = get_dma_ops(dev);
495 if (ops->get_sgtable)
496 return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size,
498 return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size,
502 #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0)
504 #ifndef arch_dma_alloc_attrs
505 #define arch_dma_alloc_attrs(dev) (true)
508 static inline void *dma_alloc_attrs(struct device *dev, size_t size,
509 dma_addr_t *dma_handle, gfp_t flag,
512 const struct dma_map_ops *ops = get_dma_ops(dev);
516 WARN_ON_ONCE(dev && !dev->coherent_dma_mask);
518 if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr))
521 /* let the implementation decide on the zone to allocate from: */
522 flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
524 if (!arch_dma_alloc_attrs(&dev))
529 cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
530 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
534 static inline void dma_free_attrs(struct device *dev, size_t size,
535 void *cpu_addr, dma_addr_t dma_handle,
538 const struct dma_map_ops *ops = get_dma_ops(dev);
542 if (dma_release_from_dev_coherent(dev, get_order(size), cpu_addr))
545 * On non-coherent platforms which implement DMA-coherent buffers via
546 * non-cacheable remaps, ops->free() may call vunmap(). Thus getting
547 * this far in IRQ context is a) at risk of a BUG_ON() or trying to
548 * sleep on some machines, and b) an indication that the driver is
549 * probably misusing the coherent API anyway.
551 WARN_ON(irqs_disabled());
553 if (!ops->free || !cpu_addr)
556 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
557 ops->free(dev, size, cpu_addr, dma_handle, attrs);
560 static inline void *dma_alloc_coherent(struct device *dev, size_t size,
561 dma_addr_t *dma_handle, gfp_t gfp)
564 return dma_alloc_attrs(dev, size, dma_handle, gfp,
565 (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0);
568 static inline void dma_free_coherent(struct device *dev, size_t size,
569 void *cpu_addr, dma_addr_t dma_handle)
571 return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0);
574 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
576 const struct dma_map_ops *ops = get_dma_ops(dev);
578 debug_dma_mapping_error(dev, dma_addr);
579 if (ops->mapping_error)
580 return ops->mapping_error(dev, dma_addr);
584 static inline void dma_check_mask(struct device *dev, u64 mask)
586 if (sme_active() && (mask < (((u64)sme_get_me_mask() << 1) - 1)))
587 dev_warn(dev, "SME is active, device will require DMA bounce buffers\n");
590 static inline int dma_supported(struct device *dev, u64 mask)
592 const struct dma_map_ops *ops = get_dma_ops(dev);
596 if (!ops->dma_supported)
598 return ops->dma_supported(dev, mask);
601 #ifndef HAVE_ARCH_DMA_SET_MASK
602 static inline int dma_set_mask(struct device *dev, u64 mask)
604 if (!dev->dma_mask || !dma_supported(dev, mask))
607 dma_check_mask(dev, mask);
609 *dev->dma_mask = mask;
614 static inline u64 dma_get_mask(struct device *dev)
616 if (dev && dev->dma_mask && *dev->dma_mask)
617 return *dev->dma_mask;
618 return DMA_BIT_MASK(32);
621 #ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK
622 int dma_set_coherent_mask(struct device *dev, u64 mask);
624 static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
626 if (!dma_supported(dev, mask))
629 dma_check_mask(dev, mask);
631 dev->coherent_dma_mask = mask;
637 * Set both the DMA mask and the coherent DMA mask to the same thing.
638 * Note that we don't check the return value from dma_set_coherent_mask()
639 * as the DMA API guarantees that the coherent DMA mask can be set to
640 * the same or smaller than the streaming DMA mask.
642 static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask)
644 int rc = dma_set_mask(dev, mask);
646 dma_set_coherent_mask(dev, mask);
651 * Similar to the above, except it deals with the case where the device
652 * does not have dev->dma_mask appropriately setup.
654 static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
656 dev->dma_mask = &dev->coherent_dma_mask;
657 return dma_set_mask_and_coherent(dev, mask);
660 extern u64 dma_get_required_mask(struct device *dev);
662 #ifndef arch_setup_dma_ops
663 static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
664 u64 size, const struct iommu_ops *iommu,
668 #ifndef arch_teardown_dma_ops
669 static inline void arch_teardown_dma_ops(struct device *dev) { }
672 static inline unsigned int dma_get_max_seg_size(struct device *dev)
674 if (dev->dma_parms && dev->dma_parms->max_segment_size)
675 return dev->dma_parms->max_segment_size;
679 static inline unsigned int dma_set_max_seg_size(struct device *dev,
682 if (dev->dma_parms) {
683 dev->dma_parms->max_segment_size = size;
689 static inline unsigned long dma_get_seg_boundary(struct device *dev)
691 if (dev->dma_parms && dev->dma_parms->segment_boundary_mask)
692 return dev->dma_parms->segment_boundary_mask;
693 return DMA_BIT_MASK(32);
696 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
698 if (dev->dma_parms) {
699 dev->dma_parms->segment_boundary_mask = mask;
706 static inline unsigned long dma_max_pfn(struct device *dev)
708 return (*dev->dma_mask >> PAGE_SHIFT) + dev->dma_pfn_offset;
712 static inline void *dma_zalloc_coherent(struct device *dev, size_t size,
713 dma_addr_t *dma_handle, gfp_t flag)
715 void *ret = dma_alloc_coherent(dev, size, dma_handle,
720 static inline int dma_get_cache_alignment(void)
722 #ifdef ARCH_DMA_MINALIGN
723 return ARCH_DMA_MINALIGN;
728 /* flags for the coherent memory api */
729 #define DMA_MEMORY_EXCLUSIVE 0x01
731 #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT
732 int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
733 dma_addr_t device_addr, size_t size, int flags);
734 void dma_release_declared_memory(struct device *dev);
735 void *dma_mark_declared_memory_occupied(struct device *dev,
736 dma_addr_t device_addr, size_t size);
739 dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
740 dma_addr_t device_addr, size_t size, int flags)
746 dma_release_declared_memory(struct device *dev)
751 dma_mark_declared_memory_occupied(struct device *dev,
752 dma_addr_t device_addr, size_t size)
754 return ERR_PTR(-EBUSY);
756 #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */
761 #ifdef CONFIG_HAS_DMA
762 extern void *dmam_alloc_coherent(struct device *dev, size_t size,
763 dma_addr_t *dma_handle, gfp_t gfp);
764 extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
765 dma_addr_t dma_handle);
766 #else /* !CONFIG_HAS_DMA */
767 static inline void *dmam_alloc_coherent(struct device *dev, size_t size,
768 dma_addr_t *dma_handle, gfp_t gfp)
770 static inline void dmam_free_coherent(struct device *dev, size_t size,
771 void *vaddr, dma_addr_t dma_handle) { }
772 #endif /* !CONFIG_HAS_DMA */
774 extern void *dmam_alloc_attrs(struct device *dev, size_t size,
775 dma_addr_t *dma_handle, gfp_t gfp,
776 unsigned long attrs);
777 #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT
778 extern int dmam_declare_coherent_memory(struct device *dev,
779 phys_addr_t phys_addr,
780 dma_addr_t device_addr, size_t size,
782 extern void dmam_release_declared_memory(struct device *dev);
783 #else /* CONFIG_HAVE_GENERIC_DMA_COHERENT */
784 static inline int dmam_declare_coherent_memory(struct device *dev,
785 phys_addr_t phys_addr, dma_addr_t device_addr,
786 size_t size, gfp_t gfp)
791 static inline void dmam_release_declared_memory(struct device *dev)
794 #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */
796 static inline void *dma_alloc_wc(struct device *dev, size_t size,
797 dma_addr_t *dma_addr, gfp_t gfp)
799 unsigned long attrs = DMA_ATTR_WRITE_COMBINE;
801 if (gfp & __GFP_NOWARN)
802 attrs |= DMA_ATTR_NO_WARN;
804 return dma_alloc_attrs(dev, size, dma_addr, gfp, attrs);
806 #ifndef dma_alloc_writecombine
807 #define dma_alloc_writecombine dma_alloc_wc
810 static inline void dma_free_wc(struct device *dev, size_t size,
811 void *cpu_addr, dma_addr_t dma_addr)
813 return dma_free_attrs(dev, size, cpu_addr, dma_addr,
814 DMA_ATTR_WRITE_COMBINE);
816 #ifndef dma_free_writecombine
817 #define dma_free_writecombine dma_free_wc
820 static inline int dma_mmap_wc(struct device *dev,
821 struct vm_area_struct *vma,
822 void *cpu_addr, dma_addr_t dma_addr,
825 return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size,
826 DMA_ATTR_WRITE_COMBINE);
828 #ifndef dma_mmap_writecombine
829 #define dma_mmap_writecombine dma_mmap_wc
832 #ifdef CONFIG_NEED_DMA_MAP_STATE
833 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME
834 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME
835 #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
836 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
837 #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
838 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
840 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
841 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
842 #define dma_unmap_addr(PTR, ADDR_NAME) (0)
843 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
844 #define dma_unmap_len(PTR, LEN_NAME) (0)
845 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)