include/linux/arm-smccc.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (c) 2015, Linaro Limited
   4  */
   5 #ifndef __LINUX_ARM_SMCCC_H
   6 #define __LINUX_ARM_SMCCC_H
   7
   8 #include <linux/init.h>
   9 #include <uapi/linux/const.h>
  10
  11 /*
  12  * This file provides common defines for ARM SMC Calling Convention as
  13  * specified in
  14  * https://developer.arm.com/docs/den0028/latest
  15  *
  16  * This code is up-to-date with version DEN 0028 C
  17  */
  18
  19 #define ARM_SMCCC_STD_CALL              _AC(0,U)
  20 #define ARM_SMCCC_FAST_CALL             _AC(1,U)
  21 #define ARM_SMCCC_TYPE_SHIFT            31
  22
  23 #define ARM_SMCCC_SMC_32                0
  24 #define ARM_SMCCC_SMC_64                1
  25 #define ARM_SMCCC_CALL_CONV_SHIFT       30
  26
  27 #define ARM_SMCCC_OWNER_MASK            0x3F
  28 #define ARM_SMCCC_OWNER_SHIFT           24
  29
  30 #define ARM_SMCCC_FUNC_MASK             0xFFFF
  31
  32 #define ARM_SMCCC_IS_FAST_CALL(smc_val) \
  33         ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT))
  34 #define ARM_SMCCC_IS_64(smc_val) \
  35         ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT))
  36 #define ARM_SMCCC_FUNC_NUM(smc_val)     ((smc_val) & ARM_SMCCC_FUNC_MASK)
  37 #define ARM_SMCCC_OWNER_NUM(smc_val) \
  38         (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK)
  39
  40 #define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
  41         (((type) << ARM_SMCCC_TYPE_SHIFT) | \
  42         ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \
  43         (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \
  44         ((func_num) & ARM_SMCCC_FUNC_MASK))
  45
  46 #define ARM_SMCCC_OWNER_ARCH            0
  47 #define ARM_SMCCC_OWNER_CPU             1
  48 #define ARM_SMCCC_OWNER_SIP             2
  49 #define ARM_SMCCC_OWNER_OEM             3
  50 #define ARM_SMCCC_OWNER_STANDARD        4
  51 #define ARM_SMCCC_OWNER_STANDARD_HYP    5
  52 #define ARM_SMCCC_OWNER_TRUSTED_APP     48
  53 #define ARM_SMCCC_OWNER_TRUSTED_APP_END 49
  54 #define ARM_SMCCC_OWNER_TRUSTED_OS      50
  55 #define ARM_SMCCC_OWNER_TRUSTED_OS_END  63
  56
  57 #define ARM_SMCCC_QUIRK_NONE            0
  58 #define ARM_SMCCC_QUIRK_QCOM_A6         1 /* Save/restore register a6 */
  59
  60 #define ARM_SMCCC_VERSION_1_0           0x10000
  61 #define ARM_SMCCC_VERSION_1_1           0x10001
  62 #define ARM_SMCCC_VERSION_1_2           0x10002
  63
  64 #define ARM_SMCCC_VERSION_FUNC_ID                                       \
  65         ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,                         \
  66                            ARM_SMCCC_SMC_32,                            \
  67                            0, 0)
  68
  69 #define ARM_SMCCC_ARCH_FEATURES_FUNC_ID                                 \
  70         ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,                         \
  71                            ARM_SMCCC_SMC_32,                            \
  72                            0, 1)
  73
  74 #define ARM_SMCCC_ARCH_SOC_ID                                           \
  75         ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,                         \
  76                            ARM_SMCCC_SMC_32,                            \
  77                            0, 2)
  78
  79 #define ARM_SMCCC_ARCH_WORKAROUND_1                                     \
  80         ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,                         \
  81                            ARM_SMCCC_SMC_32,                            \
  82                            0, 0x8000)
  83
  84 #define ARM_SMCCC_ARCH_WORKAROUND_2                                     \
  85         ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,                         \
  86                            ARM_SMCCC_SMC_32,                            \
  87                            0, 0x7fff)
  88
  89 /* Paravirtualised time calls (defined by ARM DEN0057A) */
  90 #define ARM_SMCCC_HV_PV_TIME_FEATURES                           \
  91         ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,                 \
  92                            ARM_SMCCC_SMC_64,                    \
  93                            ARM_SMCCC_OWNER_STANDARD_HYP,        \
  94                            0x20)
  95
  96 #define ARM_SMCCC_HV_PV_TIME_ST                                 \
  97         ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,                 \
  98                            ARM_SMCCC_SMC_64,                    \
  99                            ARM_SMCCC_OWNER_STANDARD_HYP,        \
 100                            0x21)
 101
 102 /*
 103  * Return codes defined in ARM DEN 0070A
 104  * ARM DEN 0070A is now merged/consolidated into ARM DEN 0028 C
 105  */
 106 #define SMCCC_RET_SUCCESS                       0
 107 #define SMCCC_RET_NOT_SUPPORTED                 -1
 108 #define SMCCC_RET_NOT_REQUIRED                  -2
 109 #define SMCCC_RET_INVALID_PARAMETER             -3
 110
 111 #ifndef __ASSEMBLY__
 112
 113 #include <linux/linkage.h>
 114 #include <linux/types.h>
 115
 116 enum arm_smccc_conduit {
 117         SMCCC_CONDUIT_NONE,
 118         SMCCC_CONDUIT_SMC,
 119         SMCCC_CONDUIT_HVC,
 120 };
 121
 122 /**
 123  * arm_smccc_1_1_get_conduit()
 124  *
 125  * Returns the conduit to be used for SMCCCv1.1 or later.
 126  *
 127  * When SMCCCv1.1 is not present, returns SMCCC_CONDUIT_NONE.
 128  */
 129 enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void);
 130
 131 /**
 132  * arm_smccc_get_version()
 133  *
 134  * Returns the version to be used for SMCCCv1.1 or later.
 135  *
 136  * When SMCCCv1.1 or above is not present, returns SMCCCv1.0, but this
 137  * does not imply the presence of firmware or a valid conduit. Caller
 138  * handling SMCCCv1.0 must determine the conduit by other means.
 139  */
 140 u32 arm_smccc_get_version(void);
 141
 142 void __init arm_smccc_version_init(u32 version, enum arm_smccc_conduit conduit);
 143
 144 /**
 145  * struct arm_smccc_res - Result from SMC/HVC call
 146  * @a0-a3 result values from registers 0 to 3
 147  */
 148 struct arm_smccc_res {
 149         unsigned long a0;
 150         unsigned long a1;
 151         unsigned long a2;
 152         unsigned long a3;
 153 };
 154
 155 /**
 156  * struct arm_smccc_quirk - Contains quirk information
 157  * @id: quirk identification
 158  * @state: quirk specific information
 159  * @a6: Qualcomm quirk entry for returning post-smc call contents of a6
 160  */
 161 struct arm_smccc_quirk {
 162         int     id;
 163         union {
 164                 unsigned long a6;
 165         } state;
 166 };
 167
 168 /**
 169  * __arm_smccc_smc() - make SMC calls
 170  * @a0-a7: arguments passed in registers 0 to 7
 171  * @res: result values from registers 0 to 3
 172  * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
 173  *
 174  * This function is used to make SMC calls following SMC Calling Convention.
 175  * The content of the supplied param are copied to registers 0 to 7 prior
 176  * to the SMC instruction. The return values are updated with the content
 177  * from register 0 to 3 on return from the SMC instruction.  An optional
 178  * quirk structure provides vendor specific behavior.
 179  */
 180 asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1,
 181                         unsigned long a2, unsigned long a3, unsigned long a4,
 182                         unsigned long a5, unsigned long a6, unsigned long a7,
 183                         struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
 184
 185 /**
 186  * __arm_smccc_hvc() - make HVC calls
 187  * @a0-a7: arguments passed in registers 0 to 7
 188  * @res: result values from registers 0 to 3
 189  * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
 190  *
 191  * This function is used to make HVC calls following SMC Calling
 192  * Convention.  The content of the supplied param are copied to registers 0
 193  * to 7 prior to the HVC instruction. The return values are updated with
 194  * the content from register 0 to 3 on return from the HVC instruction.  An
 195  * optional quirk structure provides vendor specific behavior.
 196  */
 197 asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
 198                         unsigned long a2, unsigned long a3, unsigned long a4,
 199                         unsigned long a5, unsigned long a6, unsigned long a7,
 200                         struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
 201
 202 #define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL)
 203
 204 #define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__)
 205
 206 #define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL)
 207
 208 #define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__)
 209
 210 /* SMCCC v1.1 implementation madness follows */
 211 #ifdef CONFIG_ARM64
 212
 213 #define SMCCC_SMC_INST  "smc    #0"
 214 #define SMCCC_HVC_INST  "hvc    #0"
 215
 216 #elif defined(CONFIG_ARM)
 217 #include <asm/opcodes-sec.h>
 218 #include <asm/opcodes-virt.h>
 219
 220 #define SMCCC_SMC_INST  __SMC(0)
 221 #define SMCCC_HVC_INST  __HVC(0)
 222
 223 #endif
 224
 225 #define ___count_args(_0, _1, _2, _3, _4, _5, _6, _7, _8, x, ...) x
 226
 227 #define __count_args(...)                                               \
 228         ___count_args(__VA_ARGS__, 7, 6, 5, 4, 3, 2, 1, 0)
 229
 230 #define __constraint_write_0                                            \
 231         "+r" (r0), "=&r" (r1), "=&r" (r2), "=&r" (r3)
 232 #define __constraint_write_1                                            \
 233         "+r" (r0), "+r" (r1), "=&r" (r2), "=&r" (r3)
 234 #define __constraint_write_2                                            \
 235         "+r" (r0), "+r" (r1), "+r" (r2), "=&r" (r3)
 236 #define __constraint_write_3                                            \
 237         "+r" (r0), "+r" (r1), "+r" (r2), "+r" (r3)
 238 #define __constraint_write_4    __constraint_write_3
 239 #define __constraint_write_5    __constraint_write_4
 240 #define __constraint_write_6    __constraint_write_5
 241 #define __constraint_write_7    __constraint_write_6
 242
 243 #define __constraint_read_0
 244 #define __constraint_read_1
 245 #define __constraint_read_2
 246 #define __constraint_read_3
 247 #define __constraint_read_4     "r" (r4)
 248 #define __constraint_read_5     __constraint_read_4, "r" (r5)
 249 #define __constraint_read_6     __constraint_read_5, "r" (r6)
 250 #define __constraint_read_7     __constraint_read_6, "r" (r7)
 251
 252 #define __declare_arg_0(a0, res)                                        \
 253         struct arm_smccc_res   *___res = res;                           \
 254         register unsigned long r0 asm("r0") = (u32)a0;                  \
 255         register unsigned long r1 asm("r1");                            \
 256         register unsigned long r2 asm("r2");                            \
 257         register unsigned long r3 asm("r3")
 258
 259 #define __declare_arg_1(a0, a1, res)                                    \
 260         typeof(a1) __a1 = a1;                                           \
 261         struct arm_smccc_res   *___res = res;                           \
 262         register unsigned long r0 asm("r0") = (u32)a0;                  \
 263         register unsigned long r1 asm("r1") = __a1;                     \
 264         register unsigned long r2 asm("r2");                            \
 265         register unsigned long r3 asm("r3")
 266
 267 #define __declare_arg_2(a0, a1, a2, res)                                \
 268         typeof(a1) __a1 = a1;                                           \
 269         typeof(a2) __a2 = a2;                                           \
 270         struct arm_smccc_res   *___res = res;                           \
 271         register unsigned long r0 asm("r0") = (u32)a0;                  \
 272         register unsigned long r1 asm("r1") = __a1;                     \
 273         register unsigned long r2 asm("r2") = __a2;                     \
 274         register unsigned long r3 asm("r3")
 275
 276 #define __declare_arg_3(a0, a1, a2, a3, res)                            \
 277         typeof(a1) __a1 = a1;                                           \
 278         typeof(a2) __a2 = a2;                                           \
 279         typeof(a3) __a3 = a3;                                           \
 280         struct arm_smccc_res   *___res = res;                           \
 281         register unsigned long r0 asm("r0") = (u32)a0;                  \
 282         register unsigned long r1 asm("r1") = __a1;                     \
 283         register unsigned long r2 asm("r2") = __a2;                     \
 284         register unsigned long r3 asm("r3") = __a3
 285
 286 #define __declare_arg_4(a0, a1, a2, a3, a4, res)                        \
 287         typeof(a4) __a4 = a4;                                           \
 288         __declare_arg_3(a0, a1, a2, a3, res);                           \
 289         register unsigned long r4 asm("r4") = __a4
 290
 291 #define __declare_arg_5(a0, a1, a2, a3, a4, a5, res)                    \
 292         typeof(a5) __a5 = a5;                                           \
 293         __declare_arg_4(a0, a1, a2, a3, a4, res);                       \
 294         register unsigned long r5 asm("r5") = __a5
 295
 296 #define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res)                \
 297         typeof(a6) __a6 = a6;                                           \
 298         __declare_arg_5(a0, a1, a2, a3, a4, a5, res);                   \
 299         register unsigned long r6 asm("r6") = __a6
 300
 301 #define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res)            \
 302         typeof(a7) __a7 = a7;                                           \
 303         __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res);               \
 304         register unsigned long r7 asm("r7") = __a7
 305
 306 #define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__)
 307 #define __declare_args(count, ...)  ___declare_args(count, __VA_ARGS__)
 308
 309 #define ___constraints(count)                                           \
 310         : __constraint_write_ ## count                                  \
 311         : __constraint_read_ ## count                                   \
 312         : "memory"
 313 #define __constraints(count)    ___constraints(count)
 314
 315 /*
 316  * We have an output list that is not necessarily used, and GCC feels
 317  * entitled to optimise the whole sequence away. "volatile" is what
 318  * makes it stick.
 319  */
 320 #define __arm_smccc_1_1(inst, ...)                                      \
 321         do {                                                            \
 322                 __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \
 323                 asm volatile(inst "\n"                                  \
 324                              __constraints(__count_args(__VA_ARGS__))); \
 325                 if (___res)                                             \
 326                         *___res = (typeof(*___res)){r0, r1, r2, r3};    \
 327         } while (0)
 328
 329 /*
 330  * arm_smccc_1_1_smc() - make an SMCCC v1.1 compliant SMC call
 331  *
 332  * This is a variadic macro taking one to eight source arguments, and
 333  * an optional return structure.
 334  *
 335  * @a0-a7: arguments passed in registers 0 to 7
 336  * @res: result values from registers 0 to 3
 337  *
 338  * This macro is used to make SMC calls following SMC Calling Convention v1.1.
 339  * The content of the supplied param are copied to registers 0 to 7 prior
 340  * to the SMC instruction. The return values are updated with the content
 341  * from register 0 to 3 on return from the SMC instruction if not NULL.
 342  */
 343 #define arm_smccc_1_1_smc(...)  __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__)
 344
 345 /*
 346  * arm_smccc_1_1_hvc() - make an SMCCC v1.1 compliant HVC call
 347  *
 348  * This is a variadic macro taking one to eight source arguments, and
 349  * an optional return structure.
 350  *
 351  * @a0-a7: arguments passed in registers 0 to 7
 352  * @res: result values from registers 0 to 3
 353  *
 354  * This macro is used to make HVC calls following SMC Calling Convention v1.1.
 355  * The content of the supplied param are copied to registers 0 to 7 prior
 356  * to the HVC instruction. The return values are updated with the content
 357  * from register 0 to 3 on return from the HVC instruction if not NULL.
 358  */
 359 #define arm_smccc_1_1_hvc(...)  __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__)
 360
 361 /*
 362  * Like arm_smccc_1_1* but always returns SMCCC_RET_NOT_SUPPORTED.
 363  * Used when the SMCCC conduit is not defined. The empty asm statement
 364  * avoids compiler warnings about unused variables.
 365  */
 366 #define __fail_smccc_1_1(...)                                           \
 367         do {                                                            \
 368                 __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \
 369                 asm ("" __constraints(__count_args(__VA_ARGS__)));      \
 370                 if (___res)                                             \
 371                         ___res->a0 = SMCCC_RET_NOT_SUPPORTED;           \
 372         } while (0)
 373
 374 /*
 375  * arm_smccc_1_1_invoke() - make an SMCCC v1.1 compliant call
 376  *
 377  * This is a variadic macro taking one to eight source arguments, and
 378  * an optional return structure.
 379  *
 380  * @a0-a7: arguments passed in registers 0 to 7
 381  * @res: result values from registers 0 to 3
 382  *
 383  * This macro will make either an HVC call or an SMC call depending on the
 384  * current SMCCC conduit. If no valid conduit is available then -1
 385  * (SMCCC_RET_NOT_SUPPORTED) is returned in @res.a0 (if supplied).
 386  *
 387  * The return value also provides the conduit that was used.
 388  */
 389 #define arm_smccc_1_1_invoke(...) ({                                    \
 390                 int method = arm_smccc_1_1_get_conduit();               \
 391                 switch (method) {                                       \
 392                 case SMCCC_CONDUIT_HVC:                                 \
 393                         arm_smccc_1_1_hvc(__VA_ARGS__);                 \
 394                         break;                                          \
 395                 case SMCCC_CONDUIT_SMC:                                 \
 396                         arm_smccc_1_1_smc(__VA_ARGS__);                 \
 397                         break;                                          \
 398                 default:                                                \
 399                         __fail_smccc_1_1(__VA_ARGS__);                  \
 400                         method = SMCCC_CONDUIT_NONE;                    \
 401                         break;                                          \
 402                 }                                                       \
 403                 method;                                                 \
 404         })
 405
 406 #endif /*__ASSEMBLY__*/
 407 #endif /*__LINUX_ARM_SMCCC_H*/