1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2015 Linaro Ltd.
4 * Author: Shannon Zhao <shannon.zhao@linaro.org>
7 #ifndef __ASM_ARM_KVM_PMU_H
8 #define __ASM_ARM_KVM_PMU_H
10 #include <linux/perf_event.h>
11 #include <asm/perf_event.h>
13 #define ARMV8_PMU_CYCLE_IDX (ARMV8_PMU_MAX_COUNTERS - 1)
14 #define ARMV8_PMU_MAX_COUNTER_PAIRS ((ARMV8_PMU_MAX_COUNTERS + 1) >> 1)
16 #ifdef CONFIG_HW_PERF_EVENTS
19 u8 idx; /* index into the pmu->pmc array */
20 struct perf_event *perf_event;
25 struct kvm_pmc pmc[ARMV8_PMU_MAX_COUNTERS];
26 DECLARE_BITMAP(chained, ARMV8_PMU_MAX_COUNTER_PAIRS);
29 struct irq_work overflow_work;
32 DECLARE_STATIC_KEY_FALSE(kvm_arm_pmu_available);
34 static __always_inline bool kvm_arm_support_pmu_v3(void)
36 return static_branch_likely(&kvm_arm_pmu_available);
39 #define kvm_arm_pmu_irq_initialized(v) ((v)->arch.pmu.irq_num >= VGIC_NR_SGIS)
40 u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx);
41 void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val);
42 u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu);
43 u64 kvm_pmu_get_pmceid(struct kvm_vcpu *vcpu, bool pmceid1);
44 void kvm_pmu_vcpu_init(struct kvm_vcpu *vcpu);
45 void kvm_pmu_vcpu_reset(struct kvm_vcpu *vcpu);
46 void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu);
47 void kvm_pmu_disable_counter_mask(struct kvm_vcpu *vcpu, u64 val);
48 void kvm_pmu_enable_counter_mask(struct kvm_vcpu *vcpu, u64 val);
49 void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu);
50 void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu);
51 bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu);
52 void kvm_pmu_update_run(struct kvm_vcpu *vcpu);
53 void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val);
54 void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val);
55 void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data,
57 int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu,
58 struct kvm_device_attr *attr);
59 int kvm_arm_pmu_v3_get_attr(struct kvm_vcpu *vcpu,
60 struct kvm_device_attr *attr);
61 int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu,
62 struct kvm_device_attr *attr);
63 int kvm_arm_pmu_v3_enable(struct kvm_vcpu *vcpu);
68 static inline bool kvm_arm_support_pmu_v3(void)
73 #define kvm_arm_pmu_irq_initialized(v) (false)
74 static inline u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu,
79 static inline void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu,
80 u64 select_idx, u64 val) {}
81 static inline u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu)
85 static inline void kvm_pmu_vcpu_init(struct kvm_vcpu *vcpu) {}
86 static inline void kvm_pmu_vcpu_reset(struct kvm_vcpu *vcpu) {}
87 static inline void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu) {}
88 static inline void kvm_pmu_disable_counter_mask(struct kvm_vcpu *vcpu, u64 val) {}
89 static inline void kvm_pmu_enable_counter_mask(struct kvm_vcpu *vcpu, u64 val) {}
90 static inline void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu) {}
91 static inline void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu) {}
92 static inline bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu)
96 static inline void kvm_pmu_update_run(struct kvm_vcpu *vcpu) {}
97 static inline void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val) {}
98 static inline void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val) {}
99 static inline void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu,
100 u64 data, u64 select_idx) {}
101 static inline int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu,
102 struct kvm_device_attr *attr)
106 static inline int kvm_arm_pmu_v3_get_attr(struct kvm_vcpu *vcpu,
107 struct kvm_device_attr *attr)
111 static inline int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu,
112 struct kvm_device_attr *attr)
116 static inline int kvm_arm_pmu_v3_enable(struct kvm_vcpu *vcpu)
120 static inline u64 kvm_pmu_get_pmceid(struct kvm_vcpu *vcpu, bool pmceid1)