2 * Copyright (c) 2016 Rockchip Electronics Co. Ltd.
3 * Author: Shawn Lin <shawn.lin@rock-chips.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RV1108_H
17 #define _DT_BINDINGS_CLK_ROCKCHIP_RV1108_H
25 /* sclk gates (special clocks) */
37 #define SCLK_TIMER0 78
38 #define SCLK_TIMER1 79
40 #define SCLK_SDMMC_DRV 81
41 #define SCLK_SDIO_DRV 82
42 #define SCLK_EMMC_DRV 83
43 #define SCLK_SDMMC_SAMPLE 84
44 #define SCLK_SDIO_SAMPLE 85
45 #define SCLK_EMMC_SAMPLE 86
46 #define SCLK_VENC_CORE 87
47 #define SCLK_HEVC_CORE 88
48 #define SCLK_HEVC_CABAC 89
49 #define SCLK_PWM0_PMU 90
50 #define SCLK_I2C0_PMU 91
52 #define SCLK_CIFOUT 93
53 #define SCLK_MIPI_CSI_OUT 94
59 #define SCLK_DSP_IOP 100
60 #define SCLK_DSP_EPP 101
61 #define SCLK_DSP_EDP 102
62 #define SCLK_DSP_EDAP 103
63 #define SCLK_CVBS_HOST 104
64 #define SCLK_HDMI_SFR 105
65 #define SCLK_HDMI_CEC 106
66 #define SCLK_CRYPTO 107
68 #define SCLK_SARADC 109
69 #define SCLK_TSADC 110
70 #define SCLK_MACPHY_PRE 111
71 #define SCLK_MACPHY 112
72 #define SCLK_MACPHY_RX 113
73 #define SCLK_MAC_REF 114
74 #define SCLK_MAC_REFOUT 115
75 #define SCLK_DSP_PFM 116
82 #define SCLK_USBPHY 123
83 #define SCLK_I2S0_SRC 124
84 #define SCLK_I2S1_SRC 125
85 #define SCLK_I2S2_SRC 126
86 #define SCLK_UART0_SRC 127
87 #define SCLK_UART1_SRC 128
88 #define SCLK_UART2_SRC 129
90 #define DCLK_VOP_SRC 185
91 #define DCLK_HDMIPHY 186
98 #define ACLK_ENMCORE 195
99 #define ACLK_RKVENC 196
100 #define ACLK_RKVDEC 197
102 #define ACLK_CIF0 199
103 #define ACLK_VIO0 200
104 #define ACLK_VIO1 201
109 #define ACLK_CIF1 206
110 #define ACLK_CIF2 207
111 #define ACLK_CIF3 208
112 #define ACLK_PERI 209
115 #define PCLK_GPIO1 256
116 #define PCLK_GPIO2 257
117 #define PCLK_GPIO3 258
119 #define PCLK_I2C1 260
120 #define PCLK_I2C2 261
121 #define PCLK_I2C3 262
124 #define PCLK_UART0 265
125 #define PCLK_UART1 266
126 #define PCLK_UART2 267
127 #define PCLK_TSADC 268
129 #define PCLK_TIMER 270
130 #define PCLK_PERI 271
131 #define PCLK_GPIO0_PMU 272
132 #define PCLK_I2C0_PMU 273
133 #define PCLK_PWM0_PMU 274
136 #define PCLK_MIPI_DSI 277
137 #define PCLK_HDMI_CTRL 278
138 #define PCLK_SARADC 279
139 #define PCLK_DSP_CFG 280
141 #define PCLK_EFUSE0 282
142 #define PCLK_EFUSE1 283
146 #define HCLK_I2S0_8CH 320
147 #define HCLK_I2S1_2CH 321
148 #define HCLK_I2S2_2CH 322
149 #define HCLK_NANDC 323
150 #define HCLK_SDMMC 324
151 #define HCLK_SDIO 325
152 #define HCLK_EMMC 326
153 #define HCLK_PERI 327
155 #define HCLK_RKVENC 329
156 #define HCLK_RKVDEC 330
157 #define HCLK_CIF0 331
163 #define HCLK_CRYPTO_MST 337
164 #define HCLK_CRYPTO_SLV 338
165 #define HCLK_HOST0 339
167 #define HCLK_CIF1 341
168 #define HCLK_CIF2 342
169 #define HCLK_CIF3 343
173 #define CLK_NR_CLKS (HCLK_VPU + 1)
176 #define SRST_CORE_PO_AD 0
177 #define SRST_CORE_AD 1
179 #define SRST_CPU_NIU_AD 3
180 #define SRST_CORE_PO 4
183 #define SRST_CORE_DBG 8
186 #define PRST_DBG_NIU 11
187 #define ARST_STRC_SYS_AD 15
189 #define SRST_DDRPHY_CLKDIV 16
190 #define SRST_DDRPHY 17
191 #define PRST_DDRPHY 18
192 #define PRST_HDMIPHY 19
193 #define PRST_VDACPHY 20
194 #define PRST_VADCPHY 21
195 #define PRST_MIPI_CSI_PHY 22
196 #define PRST_MIPI_DSI_PHY 23
197 #define PRST_ACODEC 24
198 #define ARST_BUS_NIU 25
199 #define PRST_TOP_NIU 26
200 #define ARST_INTMEM 27
203 #define SRST_MSCH_NIU 30
204 #define PRST_MSCH_NIU 31
206 #define PRST_DDRUPCTL 32
207 #define NRST_DDRUPCTL 33
208 #define PRST_DDRMON 34
209 #define HRST_I2S0_8CH 35
210 #define MRST_I2S0_8CH 36
211 #define HRST_I2S1_2CH 37
212 #define MRST_IS21_2CH 38
213 #define HRST_I2S2_2CH 39
214 #define MRST_I2S2_2CH 40
215 #define HRST_CRYPTO 41
216 #define SRST_CRYPTO 42
219 #define PRST_UART0 45
220 #define PRST_UART1 46
221 #define PRST_UART2 47
223 #define SRST_UART0 48
224 #define SRST_UART1 49
225 #define SRST_UART2 50
235 #define PRST_GPIO1 62
236 #define PRST_GPIO2 63
238 #define PRST_GPIO3 64
240 #define PRST_EFUSE 66
241 #define PRST_EFUSE512 67
242 #define PRST_TIMER0 68
243 #define SRST_TIMER0 69
244 #define SRST_TIMER1 70
245 #define PRST_TSADC 71
246 #define SRST_TSADC 72
247 #define PRST_SARADC 73
248 #define SRST_SARADC 74
249 #define HRST_SYSBUS 75
250 #define PRST_USBGRF 76
252 #define ARST_PERIPH_NIU 80
253 #define HRST_PERIPH_NIU 81
254 #define PRST_PERIPH_NIU 82
255 #define HRST_PERIPH 83
256 #define HRST_SDMMC 84
259 #define HRST_NANDC 87
260 #define NRST_NANDC 88
266 #define SRST_OTG_ADP 94
267 #define HRST_HOST0 95
269 #define HRST_HOST0_AUX 96
270 #define HRST_HOST0_ARB 97
271 #define SRST_HOST0_EHCIPHY 98
272 #define SRST_HOST0_UTMI 99
273 #define SRST_USBPOR 100
274 #define SRST_UTMI0 101
275 #define SRST_UTMI1 102
277 #define ARST_VIO0_NIU 102
278 #define ARST_VIO1_NIU 103
279 #define HRST_VIO_NIU 104
280 #define PRST_VIO_NIU 105
289 #define PRST_CVBS 114
290 #define PRST_HDMI 115
291 #define SRST_HDMI 116
292 #define PRST_MIPI_DSI 117
294 #define ARST_ISP_NIU 118
295 #define HRST_ISP_NIU 119
298 #define ARST_VIP0 122
299 #define HRST_VIP0 123
300 #define PRST_VIP0 124
301 #define ARST_VIP1 125
302 #define HRST_VIP1 126
303 #define PRST_VIP1 127
304 #define ARST_VIP2 128
305 #define HRST_VIP2 129
306 #define PRST_VIP2 120
307 #define ARST_VIP3 121
308 #define HRST_VIP3 122
309 #define PRST_VIP4 123
311 #define PRST_CIF1TO4 124
312 #define SRST_CVBS_CLK 125
313 #define HRST_CVBS 126
315 #define ARST_VPU_NIU 140
316 #define HRST_VPU_NIU 141
319 #define ARST_RKVDEC_NIU 144
320 #define HRST_RKVDEC_NIU 145
321 #define ARST_RKVDEC 146
322 #define HRST_RKVDEC 147
323 #define SRST_RKVDEC_CABAC 148
324 #define SRST_RKVDEC_CORE 149
325 #define ARST_RKVENC_NIU 150
326 #define HRST_RKVENC_NIU 151
327 #define ARST_RKVENC 152
328 #define HRST_RKVENC 153
329 #define SRST_RKVENC_CORE 154
331 #define SRST_DSP_CORE 156
332 #define SRST_DSP_SYS 157
333 #define SRST_DSP_GLOBAL 158
334 #define SRST_DSP_OECM 159
335 #define PRST_DSP_IOP_NIU 160
336 #define ARST_DSP_EPP_NIU 161
337 #define ARST_DSP_EDP_NIU 162
338 #define PRST_DSP_DBG_NIU 163
339 #define PRST_DSP_CFG_NIU 164
340 #define PRST_DSP_GRF 165
341 #define PRST_DSP_MAILBOX 166
342 #define PRST_DSP_INTC 167
343 #define PRST_DSP_PFM_MON 169
344 #define SRST_DSP_PFM_MON 170
345 #define ARST_DSP_EDAP_NIU 171
348 #define SRST_PMU_I2C0 173
349 #define PRST_PMU_I2C0 174
350 #define PRST_PMU_GPIO0 175
351 #define PRST_PMU_INTMEM 176
352 #define PRST_PMU_PWM0 177
353 #define SRST_PMU_PWM0 178
354 #define PRST_PMU_GRF 179
355 #define SRST_PMU_NIU 180
356 #define SRST_PMU_PVTM 181
357 #define ARST_DSP_EDP_PERF 184
358 #define ARST_DSP_EPP_PERF 185
360 #endif /* _DT_BINDINGS_CLK_ROCKCHIP_RV1108_H */