1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
4 * Copyright (c) 2020 Western Digital Corporation or its affiliates.
10 * Arbitrary identifiers for clocks.
11 * The structure is: in0 -> pll0 -> aclk -> cpu
13 * Since we use the hardware defaults for now, set all these to the same clock.
15 #define K210_CLK_PLL0 0
16 #define K210_CLK_PLL1 0
17 #define K210_CLK_ACLK 0
18 #define K210_CLK_CPU 0
20 #endif /* K210_CLK_H */