2 * Copyright © 2007-2008 Intel Corporation
3 * Jesse Barnes <jesse.barnes@intel.com>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
23 #ifndef __DRM_EDID_H__
24 #define __DRM_EDID_H__
26 #include <linux/types.h>
27 #include <linux/hdmi.h>
28 #include <drm/drm_mode.h>
33 #define EDID_LENGTH 128
35 #define DDC_ADDR2 0x52 /* E-DDC 1.2 - where DisplayID can hide */
42 #define DISPLAYID_EXT 0x70
48 } __attribute__((packed));
50 /* 00=16:10, 01=4:3, 10=5:4, 11=16:9 */
51 #define EDID_TIMING_ASPECT_SHIFT 6
52 #define EDID_TIMING_ASPECT_MASK (0x3 << EDID_TIMING_ASPECT_SHIFT)
55 #define EDID_TIMING_VFREQ_SHIFT 0
56 #define EDID_TIMING_VFREQ_MASK (0x3f << EDID_TIMING_VFREQ_SHIFT)
59 u8 hsize; /* need to multiply by 8 then add 248 */
61 } __attribute__((packed));
63 #define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1)
64 #define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2)
65 #define DRM_EDID_PT_SEPARATE_SYNC (3 << 3)
66 #define DRM_EDID_PT_STEREO (1 << 5)
67 #define DRM_EDID_PT_INTERLACED (1 << 7)
69 /* If detailed data is pixel timing */
70 struct detailed_pixel_timing {
78 u8 hsync_pulse_width_lo;
79 u8 vsync_offset_pulse_width_lo;
80 u8 hsync_vsync_offset_pulse_width_hi;
83 u8 width_height_mm_hi;
87 } __attribute__((packed));
89 /* If it's not pixel timing, it'll be one of the below */
90 struct detailed_data_string {
92 } __attribute__((packed));
94 #define DRM_EDID_DEFAULT_GTF_SUPPORT_FLAG 0x00
95 #define DRM_EDID_RANGE_LIMITS_ONLY_FLAG 0x01
96 #define DRM_EDID_SECONDARY_GTF_SUPPORT_FLAG 0x02
97 #define DRM_EDID_CVT_SUPPORT_FLAG 0x04
99 struct detailed_data_monitor_range {
104 u8 pixel_clock_mhz; /* need to multiply by 10 */
109 u8 hfreq_start_khz; /* need to multiply by 2 */
110 u8 c; /* need to divide by 2 */
113 u8 j; /* need to divide by 2 */
114 } __attribute__((packed)) gtf2;
117 u8 data1; /* high 6 bits: extra clock resolution */
118 u8 data2; /* plus low 2 of above: max hactive */
119 u8 supported_aspects;
120 u8 flags; /* preferred aspect and blanking support */
121 u8 supported_scalings;
122 u8 preferred_refresh;
123 } __attribute__((packed)) cvt;
125 } __attribute__((packed));
127 struct detailed_data_wpindex {
128 u8 white_yx_lo; /* Lower 2 bits each */
131 u8 gamma; /* need to divide by 100 then add 1 */
132 } __attribute__((packed));
134 struct detailed_data_color_point {
139 } __attribute__((packed));
143 } __attribute__((packed));
145 struct detailed_non_pixel {
147 u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name
148 fb=color point data, fa=standard timing data,
149 f9=undefined, f8=mfg. reserved */
152 struct detailed_data_string str;
153 struct detailed_data_monitor_range range;
154 struct detailed_data_wpindex color;
155 struct std_timing timings[6];
156 struct cvt_timing cvt[4];
158 } __attribute__((packed));
160 #define EDID_DETAIL_EST_TIMINGS 0xf7
161 #define EDID_DETAIL_CVT_3BYTE 0xf8
162 #define EDID_DETAIL_COLOR_MGMT_DATA 0xf9
163 #define EDID_DETAIL_STD_MODES 0xfa
164 #define EDID_DETAIL_MONITOR_CPDATA 0xfb
165 #define EDID_DETAIL_MONITOR_NAME 0xfc
166 #define EDID_DETAIL_MONITOR_RANGE 0xfd
167 #define EDID_DETAIL_MONITOR_STRING 0xfe
168 #define EDID_DETAIL_MONITOR_SERIAL 0xff
170 struct detailed_timing {
171 __le16 pixel_clock; /* need to multiply by 10 KHz */
173 struct detailed_pixel_timing pixel_data;
174 struct detailed_non_pixel other_data;
176 } __attribute__((packed));
178 #define DRM_EDID_INPUT_SERRATION_VSYNC (1 << 0)
179 #define DRM_EDID_INPUT_SYNC_ON_GREEN (1 << 1)
180 #define DRM_EDID_INPUT_COMPOSITE_SYNC (1 << 2)
181 #define DRM_EDID_INPUT_SEPARATE_SYNCS (1 << 3)
182 #define DRM_EDID_INPUT_BLANK_TO_BLACK (1 << 4)
183 #define DRM_EDID_INPUT_VIDEO_LEVEL (3 << 5)
184 #define DRM_EDID_INPUT_DIGITAL (1 << 7)
185 #define DRM_EDID_DIGITAL_DEPTH_MASK (7 << 4) /* 1.4 */
186 #define DRM_EDID_DIGITAL_DEPTH_UNDEF (0 << 4) /* 1.4 */
187 #define DRM_EDID_DIGITAL_DEPTH_6 (1 << 4) /* 1.4 */
188 #define DRM_EDID_DIGITAL_DEPTH_8 (2 << 4) /* 1.4 */
189 #define DRM_EDID_DIGITAL_DEPTH_10 (3 << 4) /* 1.4 */
190 #define DRM_EDID_DIGITAL_DEPTH_12 (4 << 4) /* 1.4 */
191 #define DRM_EDID_DIGITAL_DEPTH_14 (5 << 4) /* 1.4 */
192 #define DRM_EDID_DIGITAL_DEPTH_16 (6 << 4) /* 1.4 */
193 #define DRM_EDID_DIGITAL_DEPTH_RSVD (7 << 4) /* 1.4 */
194 #define DRM_EDID_DIGITAL_TYPE_MASK (7 << 0) /* 1.4 */
195 #define DRM_EDID_DIGITAL_TYPE_UNDEF (0 << 0) /* 1.4 */
196 #define DRM_EDID_DIGITAL_TYPE_DVI (1 << 0) /* 1.4 */
197 #define DRM_EDID_DIGITAL_TYPE_HDMI_A (2 << 0) /* 1.4 */
198 #define DRM_EDID_DIGITAL_TYPE_HDMI_B (3 << 0) /* 1.4 */
199 #define DRM_EDID_DIGITAL_TYPE_MDDI (4 << 0) /* 1.4 */
200 #define DRM_EDID_DIGITAL_TYPE_DP (5 << 0) /* 1.4 */
201 #define DRM_EDID_DIGITAL_DFP_1_X (1 << 0) /* 1.3 */
203 #define DRM_EDID_FEATURE_DEFAULT_GTF (1 << 0)
204 #define DRM_EDID_FEATURE_PREFERRED_TIMING (1 << 1)
205 #define DRM_EDID_FEATURE_STANDARD_COLOR (1 << 2)
207 #define DRM_EDID_FEATURE_DISPLAY_TYPE (3 << 3) /* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */
209 #define DRM_EDID_FEATURE_COLOR_MASK (3 << 3)
210 #define DRM_EDID_FEATURE_RGB (0 << 3)
211 #define DRM_EDID_FEATURE_RGB_YCRCB444 (1 << 3)
212 #define DRM_EDID_FEATURE_RGB_YCRCB422 (2 << 3)
213 #define DRM_EDID_FEATURE_RGB_YCRCB (3 << 3) /* both 4:4:4 and 4:2:2 */
215 #define DRM_EDID_FEATURE_PM_ACTIVE_OFF (1 << 5)
216 #define DRM_EDID_FEATURE_PM_SUSPEND (1 << 6)
217 #define DRM_EDID_FEATURE_PM_STANDBY (1 << 7)
219 #define DRM_EDID_HDMI_DC_48 (1 << 6)
220 #define DRM_EDID_HDMI_DC_36 (1 << 5)
221 #define DRM_EDID_HDMI_DC_30 (1 << 4)
222 #define DRM_EDID_HDMI_DC_Y444 (1 << 3)
224 /* YCBCR 420 deep color modes */
225 #define DRM_EDID_YCBCR420_DC_48 (1 << 2)
226 #define DRM_EDID_YCBCR420_DC_36 (1 << 1)
227 #define DRM_EDID_YCBCR420_DC_30 (1 << 0)
228 #define DRM_EDID_YCBCR420_DC_MASK (DRM_EDID_YCBCR420_DC_48 | \
229 DRM_EDID_YCBCR420_DC_36 | \
230 DRM_EDID_YCBCR420_DC_30)
232 /* HDMI 2.1 additional fields */
233 #define DRM_EDID_MAX_FRL_RATE_MASK 0xf0
234 #define DRM_EDID_FAPA_START_LOCATION (1 << 0)
235 #define DRM_EDID_ALLM (1 << 1)
236 #define DRM_EDID_FVA (1 << 2)
238 /* Deep Color specific */
239 #define DRM_EDID_DC_30BIT_420 (1 << 0)
240 #define DRM_EDID_DC_36BIT_420 (1 << 1)
241 #define DRM_EDID_DC_48BIT_420 (1 << 2)
244 #define DRM_EDID_CNMVRR (1 << 3)
245 #define DRM_EDID_CINEMA_VRR (1 << 4)
246 #define DRM_EDID_MDELTA (1 << 5)
247 #define DRM_EDID_VRR_MAX_UPPER_MASK 0xc0
248 #define DRM_EDID_VRR_MAX_LOWER_MASK 0xff
249 #define DRM_EDID_VRR_MIN_MASK 0x3f
252 #define DRM_EDID_DSC_10BPC (1 << 0)
253 #define DRM_EDID_DSC_12BPC (1 << 1)
254 #define DRM_EDID_DSC_16BPC (1 << 2)
255 #define DRM_EDID_DSC_ALL_BPP (1 << 3)
256 #define DRM_EDID_DSC_NATIVE_420 (1 << 6)
257 #define DRM_EDID_DSC_1P2 (1 << 7)
258 #define DRM_EDID_DSC_MAX_FRL_RATE_MASK 0xf0
259 #define DRM_EDID_DSC_MAX_SLICES 0xf
260 #define DRM_EDID_DSC_TOTAL_CHUNK_KBYTES 0x3f
262 /* ELD Header Block */
263 #define DRM_ELD_HEADER_BLOCK_SIZE 4
265 #define DRM_ELD_VER 0
266 # define DRM_ELD_VER_SHIFT 3
267 # define DRM_ELD_VER_MASK (0x1f << 3)
268 # define DRM_ELD_VER_CEA861D (2 << 3) /* supports 861D or below */
269 # define DRM_ELD_VER_CANNED (0x1f << 3)
271 #define DRM_ELD_BASELINE_ELD_LEN 2 /* in dwords! */
273 /* ELD Baseline Block for ELD_Ver == 2 */
274 #define DRM_ELD_CEA_EDID_VER_MNL 4
275 # define DRM_ELD_CEA_EDID_VER_SHIFT 5
276 # define DRM_ELD_CEA_EDID_VER_MASK (7 << 5)
277 # define DRM_ELD_CEA_EDID_VER_NONE (0 << 5)
278 # define DRM_ELD_CEA_EDID_VER_CEA861 (1 << 5)
279 # define DRM_ELD_CEA_EDID_VER_CEA861A (2 << 5)
280 # define DRM_ELD_CEA_EDID_VER_CEA861BCD (3 << 5)
281 # define DRM_ELD_MNL_SHIFT 0
282 # define DRM_ELD_MNL_MASK (0x1f << 0)
284 #define DRM_ELD_SAD_COUNT_CONN_TYPE 5
285 # define DRM_ELD_SAD_COUNT_SHIFT 4
286 # define DRM_ELD_SAD_COUNT_MASK (0xf << 4)
287 # define DRM_ELD_CONN_TYPE_SHIFT 2
288 # define DRM_ELD_CONN_TYPE_MASK (3 << 2)
289 # define DRM_ELD_CONN_TYPE_HDMI (0 << 2)
290 # define DRM_ELD_CONN_TYPE_DP (1 << 2)
291 # define DRM_ELD_SUPPORTS_AI (1 << 1)
292 # define DRM_ELD_SUPPORTS_HDCP (1 << 0)
294 #define DRM_ELD_AUD_SYNCH_DELAY 6 /* in units of 2 ms */
295 # define DRM_ELD_AUD_SYNCH_DELAY_MAX 0xfa /* 500 ms */
297 #define DRM_ELD_SPEAKER 7
298 # define DRM_ELD_SPEAKER_MASK 0x7f
299 # define DRM_ELD_SPEAKER_RLRC (1 << 6)
300 # define DRM_ELD_SPEAKER_FLRC (1 << 5)
301 # define DRM_ELD_SPEAKER_RC (1 << 4)
302 # define DRM_ELD_SPEAKER_RLR (1 << 3)
303 # define DRM_ELD_SPEAKER_FC (1 << 2)
304 # define DRM_ELD_SPEAKER_LFE (1 << 1)
305 # define DRM_ELD_SPEAKER_FLR (1 << 0)
307 #define DRM_ELD_PORT_ID 8 /* offsets 8..15 inclusive */
308 # define DRM_ELD_PORT_ID_LEN 8
310 #define DRM_ELD_MANUFACTURER_NAME0 16
311 #define DRM_ELD_MANUFACTURER_NAME1 17
313 #define DRM_ELD_PRODUCT_CODE0 18
314 #define DRM_ELD_PRODUCT_CODE1 19
316 #define DRM_ELD_MONITOR_NAME_STRING 20 /* offsets 20..(20+mnl-1) inclusive */
318 #define DRM_ELD_CEA_SAD(mnl, sad) (20 + (mnl) + 3 * (sad))
322 /* Vendor & product info */
325 u32 serial; /* FIXME: byte order */
337 /* Color characteristics */
348 /* Est. timings and mfg rsvd timings*/
349 struct est_timings established_timings;
350 /* Standard timings 1-8*/
351 struct std_timing standard_timings[8];
352 /* Detailing timings 1-4 */
353 struct detailed_timing detailed_timings[4];
354 /* Number of 128 byte ext. blocks */
358 } __attribute__((packed));
360 #define EDID_PRODUCT_ID(e) ((e)->prod_code[0] | ((e)->prod_code[1] << 8))
362 /* Short Audio Descriptor */
365 u8 channels; /* max number of channels - 1 */
367 u8 byte2; /* meaning depends on format */
371 struct drm_connector;
372 struct drm_connector_state;
373 struct drm_display_mode;
375 int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads);
376 int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb);
377 int drm_av_sync_delay(struct drm_connector *connector,
378 const struct drm_display_mode *mode);
380 #ifdef CONFIG_DRM_LOAD_EDID_FIRMWARE
381 struct edid *drm_load_edid_firmware(struct drm_connector *connector);
382 int __drm_set_edid_firmware_path(const char *path);
383 int __drm_get_edid_firmware_path(char *buf, size_t bufsize);
385 static inline struct edid *
386 drm_load_edid_firmware(struct drm_connector *connector)
388 return ERR_PTR(-ENOENT);
392 bool drm_edid_are_equal(const struct edid *edid1, const struct edid *edid2);
395 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
396 const struct drm_connector *connector,
397 const struct drm_display_mode *mode);
399 drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
400 const struct drm_connector *connector,
401 const struct drm_display_mode *mode);
404 drm_hdmi_avi_infoframe_colorspace(struct hdmi_avi_infoframe *frame,
405 const struct drm_connector_state *conn_state);
408 drm_hdmi_avi_infoframe_bars(struct hdmi_avi_infoframe *frame,
409 const struct drm_connector_state *conn_state);
412 drm_hdmi_avi_infoframe_quant_range(struct hdmi_avi_infoframe *frame,
413 const struct drm_connector *connector,
414 const struct drm_display_mode *mode,
415 enum hdmi_quantization_range rgb_quant_range);
418 drm_hdmi_infoframe_set_hdr_metadata(struct hdmi_drm_infoframe *frame,
419 const struct drm_connector_state *conn_state);
422 * drm_eld_mnl - Get ELD monitor name length in bytes.
423 * @eld: pointer to an eld memory structure with mnl set
425 static inline int drm_eld_mnl(const uint8_t *eld)
427 return (eld[DRM_ELD_CEA_EDID_VER_MNL] & DRM_ELD_MNL_MASK) >> DRM_ELD_MNL_SHIFT;
431 * drm_eld_sad - Get ELD SAD structures.
432 * @eld: pointer to an eld memory structure with sad_count set
434 static inline const uint8_t *drm_eld_sad(const uint8_t *eld)
436 unsigned int ver, mnl;
438 ver = (eld[DRM_ELD_VER] & DRM_ELD_VER_MASK) >> DRM_ELD_VER_SHIFT;
439 if (ver != 2 && ver != 31)
442 mnl = drm_eld_mnl(eld);
446 return eld + DRM_ELD_CEA_SAD(mnl, 0);
450 * drm_eld_sad_count - Get ELD SAD count.
451 * @eld: pointer to an eld memory structure with sad_count set
453 static inline int drm_eld_sad_count(const uint8_t *eld)
455 return (eld[DRM_ELD_SAD_COUNT_CONN_TYPE] & DRM_ELD_SAD_COUNT_MASK) >>
456 DRM_ELD_SAD_COUNT_SHIFT;
460 * drm_eld_calc_baseline_block_size - Calculate baseline block size in bytes
461 * @eld: pointer to an eld memory structure with mnl and sad_count set
463 * This is a helper for determining the payload size of the baseline block, in
464 * bytes, for e.g. setting the Baseline_ELD_Len field in the ELD header block.
466 static inline int drm_eld_calc_baseline_block_size(const uint8_t *eld)
468 return DRM_ELD_MONITOR_NAME_STRING - DRM_ELD_HEADER_BLOCK_SIZE +
469 drm_eld_mnl(eld) + drm_eld_sad_count(eld) * 3;
473 * drm_eld_size - Get ELD size in bytes
474 * @eld: pointer to a complete eld memory structure
476 * The returned value does not include the vendor block. It's vendor specific,
477 * and comprises of the remaining bytes in the ELD memory buffer after
478 * drm_eld_size() bytes of header and baseline block.
480 * The returned value is guaranteed to be a multiple of 4.
482 static inline int drm_eld_size(const uint8_t *eld)
484 return DRM_ELD_HEADER_BLOCK_SIZE + eld[DRM_ELD_BASELINE_ELD_LEN] * 4;
488 * drm_eld_get_spk_alloc - Get speaker allocation
489 * @eld: pointer to an ELD memory structure
491 * The returned value is the speakers mask. User has to use %DRM_ELD_SPEAKER
492 * field definitions to identify speakers.
494 static inline u8 drm_eld_get_spk_alloc(const uint8_t *eld)
496 return eld[DRM_ELD_SPEAKER] & DRM_ELD_SPEAKER_MASK;
500 * drm_eld_get_conn_type - Get device type hdmi/dp connected
501 * @eld: pointer to an ELD memory structure
503 * The caller need to use %DRM_ELD_CONN_TYPE_HDMI or %DRM_ELD_CONN_TYPE_DP to
504 * identify the display type connected.
506 static inline u8 drm_eld_get_conn_type(const uint8_t *eld)
508 return eld[DRM_ELD_SAD_COUNT_CONN_TYPE] & DRM_ELD_CONN_TYPE_MASK;
511 bool drm_probe_ddc(struct i2c_adapter *adapter);
512 struct edid *drm_do_get_edid(struct drm_connector *connector,
513 int (*get_edid_block)(void *data, u8 *buf, unsigned int block,
516 struct edid *drm_get_edid(struct drm_connector *connector,
517 struct i2c_adapter *adapter);
518 struct edid *drm_get_edid_switcheroo(struct drm_connector *connector,
519 struct i2c_adapter *adapter);
520 struct edid *drm_edid_duplicate(const struct edid *edid);
521 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid);
522 int drm_add_override_edid_modes(struct drm_connector *connector);
524 u8 drm_match_cea_mode(const struct drm_display_mode *to_match);
525 bool drm_detect_hdmi_monitor(struct edid *edid);
526 bool drm_detect_monitor_audio(struct edid *edid);
527 enum hdmi_quantization_range
528 drm_default_rgb_quant_range(const struct drm_display_mode *mode);
529 int drm_add_modes_noedid(struct drm_connector *connector,
530 int hdisplay, int vdisplay);
531 void drm_set_preferred_mode(struct drm_connector *connector,
532 int hpref, int vpref);
534 int drm_edid_header_is_valid(const u8 *raw_edid);
535 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
537 bool drm_edid_is_valid(struct edid *edid);
538 void drm_edid_get_monitor_name(struct edid *edid, char *name,
540 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
541 int hsize, int vsize, int fresh,
543 struct drm_display_mode *
544 drm_display_mode_from_cea_vic(struct drm_device *dev,
546 const u8 *drm_find_edid_extension(const struct edid *edid,
547 int ext_id, int *ext_index);
550 #endif /* __DRM_EDID_H__ */