1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* include/asm-generic/tlb.h
4 * Generic TLB shootdown code
6 * Copyright 2001 Red Hat, Inc.
7 * Based on code from mm/memory.c Copyright Linus Torvalds and others.
9 * Copyright 2011 Red Hat, Inc., Peter Zijlstra
11 #ifndef _ASM_GENERIC__TLB_H
12 #define _ASM_GENERIC__TLB_H
14 #include <linux/mmu_notifier.h>
15 #include <linux/swap.h>
16 #include <linux/hugetlb_inline.h>
17 #include <asm/tlbflush.h>
18 #include <asm/cacheflush.h>
21 * Blindly accessing user memory from NMI context can be dangerous
22 * if we're in the middle of switching the current user task or switching
25 #ifndef nmi_uaccess_okay
26 # define nmi_uaccess_okay() true
32 * Generic MMU-gather implementation.
34 * The mmu_gather data structure is used by the mm code to implement the
35 * correct and efficient ordering of freeing pages and TLB invalidations.
37 * This correct ordering is:
40 * 2) TLB invalidate page
43 * That is, we must never free a page before we have ensured there are no live
44 * translations left to it. Otherwise it might be possible to observe (or
45 * worse, change) the page content after it has been reused.
47 * The mmu_gather API consists of:
49 * - tlb_gather_mmu() / tlb_gather_mmu_fullmm() / tlb_finish_mmu()
51 * start and finish a mmu_gather
53 * Finish in particular will issue a (final) TLB invalidate and free
54 * all (remaining) queued pages.
56 * - tlb_start_vma() / tlb_end_vma(); marks the start / end of a VMA
58 * Defaults to flushing at tlb_end_vma() to reset the range; helps when
59 * there's large holes between the VMAs.
61 * - tlb_remove_table()
63 * tlb_remove_table() is the basic primitive to free page-table directories
64 * (__p*_free_tlb()). In it's most primitive form it is an alias for
65 * tlb_remove_page() below, for when page directories are pages and have no
66 * additional constraints.
68 * See also MMU_GATHER_TABLE_FREE and MMU_GATHER_RCU_TABLE_FREE.
70 * - tlb_remove_page() / __tlb_remove_page()
71 * - tlb_remove_page_size() / __tlb_remove_page_size()
73 * __tlb_remove_page_size() is the basic primitive that queues a page for
74 * freeing. __tlb_remove_page() assumes PAGE_SIZE. Both will return a
75 * boolean indicating if the queue is (now) full and a call to
76 * tlb_flush_mmu() is required.
78 * tlb_remove_page() and tlb_remove_page_size() imply the call to
79 * tlb_flush_mmu() when required and has no return value.
81 * - tlb_change_page_size()
83 * call before __tlb_remove_page*() to set the current page-size; implies a
84 * possible tlb_flush_mmu() call.
86 * - tlb_flush_mmu() / tlb_flush_mmu_tlbonly()
88 * tlb_flush_mmu_tlbonly() - does the TLB invalidate (and resets
89 * related state, like the range)
91 * tlb_flush_mmu() - in addition to the above TLB invalidate, also frees
92 * whatever pages are still batched.
94 * - mmu_gather::fullmm
96 * A flag set by tlb_gather_mmu_fullmm() to indicate we're going to free
97 * the entire mm; this allows a number of optimizations.
99 * - We can ignore tlb_{start,end}_vma(); because we don't
100 * care about ranges. Everything will be shot down.
102 * - (RISC) architectures that use ASIDs can cycle to a new ASID
103 * and delay the invalidation until ASID space runs out.
105 * - mmu_gather::need_flush_all
107 * A flag that can be set by the arch code if it wants to force
108 * flush the entire TLB irrespective of the range. For instance
109 * x86-PAE needs this when changing top-level entries.
111 * And allows the architecture to provide and implement tlb_flush():
113 * tlb_flush() may, in addition to the above mentioned mmu_gather fields, make
116 * - mmu_gather::start / mmu_gather::end
118 * which provides the range that needs to be flushed to cover the pages to
121 * - mmu_gather::freed_tables
123 * set when we freed page table pages
125 * - tlb_get_unmap_shift() / tlb_get_unmap_size()
127 * returns the smallest TLB entry size unmapped in this range.
129 * If an architecture does not provide tlb_flush() a default implementation
130 * based on flush_tlb_range() will be used, unless MMU_GATHER_NO_RANGE is
131 * specified, in which case we'll default to flush_tlb_mm().
133 * Additionally there are a few opt-in features:
135 * MMU_GATHER_PAGE_SIZE
137 * This ensures we call tlb_flush() every time tlb_change_page_size() actually
138 * changes the size and provides mmu_gather::page_size to tlb_flush().
140 * This might be useful if your architecture has size specific TLB
141 * invalidation instructions.
143 * MMU_GATHER_TABLE_FREE
145 * This provides tlb_remove_table(), to be used instead of tlb_remove_page()
146 * for page directores (__p*_free_tlb()).
148 * Useful if your architecture has non-page page directories.
150 * When used, an architecture is expected to provide __tlb_remove_table()
151 * which does the actual freeing of these pages.
153 * MMU_GATHER_RCU_TABLE_FREE
155 * Like MMU_GATHER_TABLE_FREE, and adds semi-RCU semantics to the free (see
158 * Useful if your architecture doesn't use IPIs for remote TLB invalidates
159 * and therefore doesn't naturally serialize with software page-table walkers.
161 * MMU_GATHER_NO_FLUSH_CACHE
163 * Indicates the architecture has flush_cache_range() but it needs *NOT* be called
164 * before unmapping a VMA.
166 * NOTE: strictly speaking we shouldn't have this knob and instead rely on
167 * flush_cache_range() being a NOP, except Sparc64 seems to be
170 * MMU_GATHER_MERGE_VMAS
172 * Indicates the architecture wants to merge ranges over VMAs; typical when
173 * multiple range invalidates are more expensive than a full invalidate.
175 * MMU_GATHER_NO_RANGE
177 * Use this if your architecture lacks an efficient flush_tlb_range(). This
178 * option implies MMU_GATHER_MERGE_VMAS above.
180 * MMU_GATHER_NO_GATHER
182 * If the option is set the mmu_gather will not track individual pages for
183 * delayed page free anymore. A platform that enables the option needs to
184 * provide its own implementation of the __tlb_remove_page_size() function to
187 * This is useful if your architecture already flushes TLB entries in the
188 * various ptep_get_and_clear() functions.
191 #ifdef CONFIG_MMU_GATHER_TABLE_FREE
193 struct mmu_table_batch {
194 #ifdef CONFIG_MMU_GATHER_RCU_TABLE_FREE
201 #define MAX_TABLE_BATCH \
202 ((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *))
204 extern void tlb_remove_table(struct mmu_gather *tlb, void *table);
206 #else /* !CONFIG_MMU_GATHER_HAVE_TABLE_FREE */
209 * Without MMU_GATHER_TABLE_FREE the architecture is assumed to have page based
210 * page directories and we can use the normal page batching to free them.
212 #define tlb_remove_table(tlb, page) tlb_remove_page((tlb), (page))
214 #endif /* CONFIG_MMU_GATHER_TABLE_FREE */
216 #ifdef CONFIG_MMU_GATHER_RCU_TABLE_FREE
218 * This allows an architecture that does not use the linux page-tables for
219 * hardware to skip the TLBI when freeing page tables.
221 #ifndef tlb_needs_table_invalidate
222 #define tlb_needs_table_invalidate() (true)
225 void tlb_remove_table_sync_one(void);
229 #ifdef tlb_needs_table_invalidate
230 #error tlb_needs_table_invalidate() requires MMU_GATHER_RCU_TABLE_FREE
233 static inline void tlb_remove_table_sync_one(void) { }
235 #endif /* CONFIG_MMU_GATHER_RCU_TABLE_FREE */
238 #ifndef CONFIG_MMU_GATHER_NO_GATHER
240 * If we can't allocate a page to make a big batch of page pointers
241 * to work on, then just handle a few from the on-stack structure.
243 #define MMU_GATHER_BUNDLE 8
245 struct mmu_gather_batch {
246 struct mmu_gather_batch *next;
249 struct encoded_page *encoded_pages[];
252 #define MAX_GATHER_BATCH \
253 ((PAGE_SIZE - sizeof(struct mmu_gather_batch)) / sizeof(void *))
256 * Limit the maximum number of mmu_gather batches to reduce a risk of soft
257 * lockups for non-preemptible kernels on huge machines when a lot of memory
258 * is zapped during unmapping.
259 * 10K pages freed at once should be safe even without a preemption point.
261 #define MAX_GATHER_BATCH_COUNT (10000UL/MAX_GATHER_BATCH)
263 extern bool __tlb_remove_page_size(struct mmu_gather *tlb,
264 struct encoded_page *page,
269 * struct mmu_gather is an opaque type used by the mm code for passing around
270 * any data needed by arch specific code for tlb_remove_page.
273 struct mm_struct *mm;
275 #ifdef CONFIG_MMU_GATHER_TABLE_FREE
276 struct mmu_table_batch *batch;
282 * we are in the middle of an operation to clear
283 * a full mm and can make some optimizations
285 unsigned int fullmm : 1;
288 * we have performed an operation which
289 * requires a complete flush of the tlb
291 unsigned int need_flush_all : 1;
294 * we have removed page directories
296 unsigned int freed_tables : 1;
299 * at which levels have we cleared entries?
301 unsigned int cleared_ptes : 1;
302 unsigned int cleared_pmds : 1;
303 unsigned int cleared_puds : 1;
304 unsigned int cleared_p4ds : 1;
307 * tracks VM_EXEC | VM_HUGETLB in tlb_start_vma
309 unsigned int vma_exec : 1;
310 unsigned int vma_huge : 1;
311 unsigned int vma_pfn : 1;
313 unsigned int batch_count;
315 #ifndef CONFIG_MMU_GATHER_NO_GATHER
316 struct mmu_gather_batch *active;
317 struct mmu_gather_batch local;
318 struct page *__pages[MMU_GATHER_BUNDLE];
320 #ifdef CONFIG_MMU_GATHER_PAGE_SIZE
321 unsigned int page_size;
326 void tlb_flush_mmu(struct mmu_gather *tlb);
328 static inline void __tlb_adjust_range(struct mmu_gather *tlb,
329 unsigned long address,
330 unsigned int range_size)
332 tlb->start = min(tlb->start, address);
333 tlb->end = max(tlb->end, address + range_size);
336 static inline void __tlb_reset_range(struct mmu_gather *tlb)
339 tlb->start = tlb->end = ~0;
341 tlb->start = TASK_SIZE;
344 tlb->freed_tables = 0;
345 tlb->cleared_ptes = 0;
346 tlb->cleared_pmds = 0;
347 tlb->cleared_puds = 0;
348 tlb->cleared_p4ds = 0;
350 * Do not reset mmu_gather::vma_* fields here, we do not
351 * call into tlb_start_vma() again to set them if there is an
352 * intermediate flush.
356 #ifdef CONFIG_MMU_GATHER_NO_RANGE
358 #if defined(tlb_flush)
359 #error MMU_GATHER_NO_RANGE relies on default tlb_flush()
363 * When an architecture does not have efficient means of range flushing TLBs
364 * there is no point in doing intermediate flushes on tlb_end_vma() to keep the
365 * range small. We equally don't have to worry about page granularity or other
368 * All we need to do is issue a full flush for any !0 range.
370 static inline void tlb_flush(struct mmu_gather *tlb)
373 flush_tlb_mm(tlb->mm);
376 #else /* CONFIG_MMU_GATHER_NO_RANGE */
380 * When an architecture does not provide its own tlb_flush() implementation
381 * but does have a reasonably efficient flush_vma_range() implementation
384 static inline void tlb_flush(struct mmu_gather *tlb)
386 if (tlb->fullmm || tlb->need_flush_all) {
387 flush_tlb_mm(tlb->mm);
388 } else if (tlb->end) {
389 struct vm_area_struct vma = {
391 .vm_flags = (tlb->vma_exec ? VM_EXEC : 0) |
392 (tlb->vma_huge ? VM_HUGETLB : 0),
395 flush_tlb_range(&vma, tlb->start, tlb->end);
400 #endif /* CONFIG_MMU_GATHER_NO_RANGE */
403 tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma)
406 * flush_tlb_range() implementations that look at VM_HUGETLB (tile,
407 * mips-4k) flush only large pages.
409 * flush_tlb_range() implementations that flush I-TLB also flush D-TLB
410 * (tile, xtensa, arm), so it's ok to just add VM_EXEC to an existing
413 * We rely on tlb_end_vma() to issue a flush, such that when we reset
414 * these values the batch is empty.
416 tlb->vma_huge = is_vm_hugetlb_page(vma);
417 tlb->vma_exec = !!(vma->vm_flags & VM_EXEC);
418 tlb->vma_pfn = !!(vma->vm_flags & (VM_PFNMAP|VM_MIXEDMAP));
421 static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
424 * Anything calling __tlb_adjust_range() also sets at least one of
427 if (!(tlb->freed_tables || tlb->cleared_ptes || tlb->cleared_pmds ||
428 tlb->cleared_puds || tlb->cleared_p4ds))
432 mmu_notifier_invalidate_range(tlb->mm, tlb->start, tlb->end);
433 __tlb_reset_range(tlb);
436 static inline void tlb_remove_page_size(struct mmu_gather *tlb,
437 struct page *page, int page_size)
439 if (__tlb_remove_page_size(tlb, encode_page(page, 0), page_size))
443 static inline bool __tlb_remove_page(struct mmu_gather *tlb, struct page *page)
445 return __tlb_remove_page_size(tlb, encode_page(page, 0), PAGE_SIZE);
449 * Similar to __tlb_remove_page but will call tlb_flush_mmu() itself when
452 static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
454 return tlb_remove_page_size(tlb, page, PAGE_SIZE);
457 static inline void tlb_change_page_size(struct mmu_gather *tlb,
458 unsigned int page_size)
460 #ifdef CONFIG_MMU_GATHER_PAGE_SIZE
461 if (tlb->page_size && tlb->page_size != page_size) {
462 if (!tlb->fullmm && !tlb->need_flush_all)
466 tlb->page_size = page_size;
470 static inline unsigned long tlb_get_unmap_shift(struct mmu_gather *tlb)
472 if (tlb->cleared_ptes)
474 if (tlb->cleared_pmds)
476 if (tlb->cleared_puds)
478 if (tlb->cleared_p4ds)
484 static inline unsigned long tlb_get_unmap_size(struct mmu_gather *tlb)
486 return 1UL << tlb_get_unmap_shift(tlb);
490 * In the case of tlb vma handling, we can optimise these away in the
491 * case where we're doing a full MM flush. When we're doing a munmap,
492 * the vmas are adjusted to only cover the region to be torn down.
494 static inline void tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
499 tlb_update_vma_flags(tlb, vma);
500 #ifndef CONFIG_MMU_GATHER_NO_FLUSH_CACHE
501 flush_cache_range(vma, vma->vm_start, vma->vm_end);
505 static inline void tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
511 * VM_PFNMAP is more fragile because the core mm will not track the
512 * page mapcount -- there might not be page-frames for these PFNs after
513 * all. Force flush TLBs for such ranges to avoid munmap() vs
514 * unmap_mapping_range() races.
516 if (tlb->vma_pfn || !IS_ENABLED(CONFIG_MMU_GATHER_MERGE_VMAS)) {
518 * Do a TLB flush and reset the range at VMA boundaries; this avoids
519 * the ranges growing with the unused space between consecutive VMAs.
521 tlb_flush_mmu_tlbonly(tlb);
526 * tlb_flush_{pte|pmd|pud|p4d}_range() adjust the tlb->start and tlb->end,
527 * and set corresponding cleared_*.
529 static inline void tlb_flush_pte_range(struct mmu_gather *tlb,
530 unsigned long address, unsigned long size)
532 __tlb_adjust_range(tlb, address, size);
533 tlb->cleared_ptes = 1;
536 static inline void tlb_flush_pmd_range(struct mmu_gather *tlb,
537 unsigned long address, unsigned long size)
539 __tlb_adjust_range(tlb, address, size);
540 tlb->cleared_pmds = 1;
543 static inline void tlb_flush_pud_range(struct mmu_gather *tlb,
544 unsigned long address, unsigned long size)
546 __tlb_adjust_range(tlb, address, size);
547 tlb->cleared_puds = 1;
550 static inline void tlb_flush_p4d_range(struct mmu_gather *tlb,
551 unsigned long address, unsigned long size)
553 __tlb_adjust_range(tlb, address, size);
554 tlb->cleared_p4ds = 1;
557 #ifndef __tlb_remove_tlb_entry
558 #define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
562 * tlb_remove_tlb_entry - remember a pte unmapping for later tlb invalidation.
564 * Record the fact that pte's were really unmapped by updating the range,
565 * so we can later optimise away the tlb invalidate. This helps when
566 * userspace is unmapping already-unmapped pages, which happens quite a lot.
568 #define tlb_remove_tlb_entry(tlb, ptep, address) \
570 tlb_flush_pte_range(tlb, address, PAGE_SIZE); \
571 __tlb_remove_tlb_entry(tlb, ptep, address); \
574 #define tlb_remove_huge_tlb_entry(h, tlb, ptep, address) \
576 unsigned long _sz = huge_page_size(h); \
577 if (_sz >= P4D_SIZE) \
578 tlb_flush_p4d_range(tlb, address, _sz); \
579 else if (_sz >= PUD_SIZE) \
580 tlb_flush_pud_range(tlb, address, _sz); \
581 else if (_sz >= PMD_SIZE) \
582 tlb_flush_pmd_range(tlb, address, _sz); \
584 tlb_flush_pte_range(tlb, address, _sz); \
585 __tlb_remove_tlb_entry(tlb, ptep, address); \
589 * tlb_remove_pmd_tlb_entry - remember a pmd mapping for later tlb invalidation
590 * This is a nop so far, because only x86 needs it.
592 #ifndef __tlb_remove_pmd_tlb_entry
593 #define __tlb_remove_pmd_tlb_entry(tlb, pmdp, address) do {} while (0)
596 #define tlb_remove_pmd_tlb_entry(tlb, pmdp, address) \
598 tlb_flush_pmd_range(tlb, address, HPAGE_PMD_SIZE); \
599 __tlb_remove_pmd_tlb_entry(tlb, pmdp, address); \
603 * tlb_remove_pud_tlb_entry - remember a pud mapping for later tlb
604 * invalidation. This is a nop so far, because only x86 needs it.
606 #ifndef __tlb_remove_pud_tlb_entry
607 #define __tlb_remove_pud_tlb_entry(tlb, pudp, address) do {} while (0)
610 #define tlb_remove_pud_tlb_entry(tlb, pudp, address) \
612 tlb_flush_pud_range(tlb, address, HPAGE_PUD_SIZE); \
613 __tlb_remove_pud_tlb_entry(tlb, pudp, address); \
617 * For things like page tables caches (ie caching addresses "inside" the
618 * page tables, like x86 does), for legacy reasons, flushing an
619 * individual page had better flush the page table caches behind it. This
620 * is definitely how x86 works, for example. And if you have an
621 * architected non-legacy page table cache (which I'm not aware of
622 * anybody actually doing), you're going to have some architecturally
623 * explicit flushing for that, likely *separate* from a regular TLB entry
624 * flush, and thus you'd need more than just some range expansion..
626 * So if we ever find an architecture
627 * that would want something that odd, I think it is up to that
628 * architecture to do its own odd thing, not cause pain for others
629 * http://lkml.kernel.org/r/CA+55aFzBggoXtNXQeng5d_mRoDnaMBE5Y+URs+PHR67nUpMtaw@mail.gmail.com
631 * For now w.r.t page table cache, mark the range_size as PAGE_SIZE
635 #define pte_free_tlb(tlb, ptep, address) \
637 tlb_flush_pmd_range(tlb, address, PAGE_SIZE); \
638 tlb->freed_tables = 1; \
639 __pte_free_tlb(tlb, ptep, address); \
644 #define pmd_free_tlb(tlb, pmdp, address) \
646 tlb_flush_pud_range(tlb, address, PAGE_SIZE); \
647 tlb->freed_tables = 1; \
648 __pmd_free_tlb(tlb, pmdp, address); \
653 #define pud_free_tlb(tlb, pudp, address) \
655 tlb_flush_p4d_range(tlb, address, PAGE_SIZE); \
656 tlb->freed_tables = 1; \
657 __pud_free_tlb(tlb, pudp, address); \
662 #define p4d_free_tlb(tlb, pudp, address) \
664 __tlb_adjust_range(tlb, address, PAGE_SIZE); \
665 tlb->freed_tables = 1; \
666 __p4d_free_tlb(tlb, pudp, address); \
670 #ifndef pte_needs_flush
671 static inline bool pte_needs_flush(pte_t oldpte, pte_t newpte)
677 #ifndef huge_pmd_needs_flush
678 static inline bool huge_pmd_needs_flush(pmd_t oldpmd, pmd_t newpmd)
684 #endif /* CONFIG_MMU */
686 #endif /* _ASM_GENERIC__TLB_H */