1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_GENERIC_PGTABLE_H
3 #define _ASM_GENERIC_PGTABLE_H
10 #include <linux/mm_types.h>
11 #include <linux/bug.h>
12 #include <linux/errno.h>
13 #include <asm-generic/pgtable_uffd.h>
15 #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \
16 defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS
17 #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED
21 * On almost all architectures and configurations, 0 can be used as the
22 * upper ceiling to free_pgtables(): on many architectures it has the same
23 * effect as using TASK_SIZE. However, there is one configuration which
24 * must impose a more careful limit, to avoid freeing kernel pgtables.
26 #ifndef USER_PGTABLES_CEILING
27 #define USER_PGTABLES_CEILING 0UL
30 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
31 extern int ptep_set_access_flags(struct vm_area_struct *vma,
32 unsigned long address, pte_t *ptep,
33 pte_t entry, int dirty);
36 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
37 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
38 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
39 unsigned long address, pmd_t *pmdp,
40 pmd_t entry, int dirty);
41 extern int pudp_set_access_flags(struct vm_area_struct *vma,
42 unsigned long address, pud_t *pudp,
43 pud_t entry, int dirty);
45 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
46 unsigned long address, pmd_t *pmdp,
47 pmd_t entry, int dirty)
52 static inline int pudp_set_access_flags(struct vm_area_struct *vma,
53 unsigned long address, pud_t *pudp,
54 pud_t entry, int dirty)
59 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
62 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
63 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
64 unsigned long address,
72 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
77 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
78 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
79 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
80 unsigned long address,
88 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
92 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
93 unsigned long address,
99 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
102 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
103 int ptep_clear_flush_young(struct vm_area_struct *vma,
104 unsigned long address, pte_t *ptep);
107 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
108 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
109 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
110 unsigned long address, pmd_t *pmdp);
113 * Despite relevant to THP only, this API is called from generic rmap code
114 * under PageTransHuge(), hence needs a dummy implementation for !THP
116 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
117 unsigned long address, pmd_t *pmdp)
122 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
125 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
126 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
127 unsigned long address,
131 pte_clear(mm, address, ptep);
136 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
137 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
138 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
139 unsigned long address,
146 #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */
147 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
148 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
149 unsigned long address,
157 #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */
158 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
160 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
161 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
162 static inline pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma,
163 unsigned long address, pmd_t *pmdp,
166 return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp);
170 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL
171 static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm,
172 unsigned long address, pud_t *pudp,
175 return pudp_huge_get_and_clear(mm, address, pudp);
178 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
180 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
181 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
182 unsigned long address, pte_t *ptep,
186 pte = ptep_get_and_clear(mm, address, ptep);
193 * If two threads concurrently fault at the same page, the thread that
194 * won the race updates the PTE and its local TLB/Cache. The other thread
195 * gives up, simply does nothing, and continues; on architectures where
196 * software can update TLB, local TLB can be updated here to avoid next page
197 * fault. This function updates TLB only, do nothing with cache or others.
198 * It is the difference with function update_mmu_cache.
200 #ifndef __HAVE_ARCH_UPDATE_MMU_TLB
201 static inline void update_mmu_tlb(struct vm_area_struct *vma,
202 unsigned long address, pte_t *ptep)
205 #define __HAVE_ARCH_UPDATE_MMU_TLB
209 * Some architectures may be able to avoid expensive synchronization
210 * primitives when modifications are made to PTE's which are already
211 * not present, or in the process of an address space destruction.
213 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
214 static inline void pte_clear_not_present_full(struct mm_struct *mm,
215 unsigned long address,
219 pte_clear(mm, address, ptep);
223 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
224 extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
225 unsigned long address,
229 #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
230 extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,
231 unsigned long address,
233 extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma,
234 unsigned long address,
238 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
240 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
242 pte_t old_pte = *ptep;
243 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
248 * On some architectures hardware does not set page access bit when accessing
249 * memory page, it is responsibilty of software setting this bit. It brings
250 * out extra page fault penalty to track page access bit. For optimization page
251 * access bit can be set during all page fault flow on these arches.
252 * To be differentiate with macro pte_mkyoung, this macro is used on platforms
253 * where software maintains page access bit.
255 #ifndef pte_sw_mkyoung
256 static inline pte_t pte_sw_mkyoung(pte_t pte)
260 #define pte_sw_mkyoung pte_sw_mkyoung
263 #ifndef pte_savedwrite
264 #define pte_savedwrite pte_write
267 #ifndef pte_mk_savedwrite
268 #define pte_mk_savedwrite pte_mkwrite
271 #ifndef pte_clear_savedwrite
272 #define pte_clear_savedwrite pte_wrprotect
275 #ifndef pmd_savedwrite
276 #define pmd_savedwrite pmd_write
279 #ifndef pmd_mk_savedwrite
280 #define pmd_mk_savedwrite pmd_mkwrite
283 #ifndef pmd_clear_savedwrite
284 #define pmd_clear_savedwrite pmd_wrprotect
287 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
288 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
289 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
290 unsigned long address, pmd_t *pmdp)
292 pmd_t old_pmd = *pmdp;
293 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
296 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
297 unsigned long address, pmd_t *pmdp)
301 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
303 #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT
304 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
305 static inline void pudp_set_wrprotect(struct mm_struct *mm,
306 unsigned long address, pud_t *pudp)
308 pud_t old_pud = *pudp;
310 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud));
313 static inline void pudp_set_wrprotect(struct mm_struct *mm,
314 unsigned long address, pud_t *pudp)
318 #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */
321 #ifndef pmdp_collapse_flush
322 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
323 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
324 unsigned long address, pmd_t *pmdp);
326 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
327 unsigned long address,
333 #define pmdp_collapse_flush pmdp_collapse_flush
334 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
337 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
338 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
342 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
343 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
346 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
348 * This is an implementation of pmdp_establish() that is only suitable for an
349 * architecture that doesn't have hardware dirty/accessed bits. In this case we
350 * can't race with CPU which sets these bits and non-atomic aproach is fine.
352 static inline pmd_t generic_pmdp_establish(struct vm_area_struct *vma,
353 unsigned long address, pmd_t *pmdp, pmd_t pmd)
355 pmd_t old_pmd = *pmdp;
356 set_pmd_at(vma->vm_mm, address, pmdp, pmd);
361 #ifndef __HAVE_ARCH_PMDP_INVALIDATE
362 extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
366 #ifndef __HAVE_ARCH_PTE_SAME
367 static inline int pte_same(pte_t pte_a, pte_t pte_b)
369 return pte_val(pte_a) == pte_val(pte_b);
373 #ifndef __HAVE_ARCH_PTE_UNUSED
375 * Some architectures provide facilities to virtualization guests
376 * so that they can flag allocated pages as unused. This allows the
377 * host to transparently reclaim unused pages. This function returns
378 * whether the pte's page is unused.
380 static inline int pte_unused(pte_t pte)
386 #ifndef pte_access_permitted
387 #define pte_access_permitted(pte, write) \
388 (pte_present(pte) && (!(write) || pte_write(pte)))
391 #ifndef pmd_access_permitted
392 #define pmd_access_permitted(pmd, write) \
393 (pmd_present(pmd) && (!(write) || pmd_write(pmd)))
396 #ifndef pud_access_permitted
397 #define pud_access_permitted(pud, write) \
398 (pud_present(pud) && (!(write) || pud_write(pud)))
401 #ifndef p4d_access_permitted
402 #define p4d_access_permitted(p4d, write) \
403 (p4d_present(p4d) && (!(write) || p4d_write(p4d)))
406 #ifndef pgd_access_permitted
407 #define pgd_access_permitted(pgd, write) \
408 (pgd_present(pgd) && (!(write) || pgd_write(pgd)))
411 #ifndef __HAVE_ARCH_PMD_SAME
412 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
414 return pmd_val(pmd_a) == pmd_val(pmd_b);
417 static inline int pud_same(pud_t pud_a, pud_t pud_b)
419 return pud_val(pud_a) == pud_val(pud_b);
423 #ifndef __HAVE_ARCH_P4D_SAME
424 static inline int p4d_same(p4d_t p4d_a, p4d_t p4d_b)
426 return p4d_val(p4d_a) == p4d_val(p4d_b);
430 #ifndef __HAVE_ARCH_PGD_SAME
431 static inline int pgd_same(pgd_t pgd_a, pgd_t pgd_b)
433 return pgd_val(pgd_a) == pgd_val(pgd_b);
438 * Use set_p*_safe(), and elide TLB flushing, when confident that *no*
439 * TLB flush will be required as a result of the "set". For example, use
440 * in scenarios where it is known ahead of time that the routine is
441 * setting non-present entries, or re-setting an existing entry to the
442 * same value. Otherwise, use the typical "set" helpers and flush the
445 #define set_pte_safe(ptep, pte) \
447 WARN_ON_ONCE(pte_present(*ptep) && !pte_same(*ptep, pte)); \
448 set_pte(ptep, pte); \
451 #define set_pmd_safe(pmdp, pmd) \
453 WARN_ON_ONCE(pmd_present(*pmdp) && !pmd_same(*pmdp, pmd)); \
454 set_pmd(pmdp, pmd); \
457 #define set_pud_safe(pudp, pud) \
459 WARN_ON_ONCE(pud_present(*pudp) && !pud_same(*pudp, pud)); \
460 set_pud(pudp, pud); \
463 #define set_p4d_safe(p4dp, p4d) \
465 WARN_ON_ONCE(p4d_present(*p4dp) && !p4d_same(*p4dp, p4d)); \
466 set_p4d(p4dp, p4d); \
469 #define set_pgd_safe(pgdp, pgd) \
471 WARN_ON_ONCE(pgd_present(*pgdp) && !pgd_same(*pgdp, pgd)); \
472 set_pgd(pgdp, pgd); \
475 #ifndef __HAVE_ARCH_DO_SWAP_PAGE
477 * Some architectures support metadata associated with a page. When a
478 * page is being swapped out, this metadata must be saved so it can be
479 * restored when the page is swapped back in. SPARC M7 and newer
480 * processors support an ADI (Application Data Integrity) tag for the
481 * page as metadata for the page. arch_do_swap_page() can restore this
482 * metadata when a page is swapped back in.
484 static inline void arch_do_swap_page(struct mm_struct *mm,
485 struct vm_area_struct *vma,
487 pte_t pte, pte_t oldpte)
493 #ifndef __HAVE_ARCH_UNMAP_ONE
495 * Some architectures support metadata associated with a page. When a
496 * page is being swapped out, this metadata must be saved so it can be
497 * restored when the page is swapped back in. SPARC M7 and newer
498 * processors support an ADI (Application Data Integrity) tag for the
499 * page as metadata for the page. arch_unmap_one() can save this
500 * metadata on a swap-out of a page.
502 static inline int arch_unmap_one(struct mm_struct *mm,
503 struct vm_area_struct *vma,
511 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
512 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
515 #ifndef __HAVE_ARCH_MOVE_PTE
516 #define move_pte(pte, prot, old_addr, new_addr) (pte)
519 #ifndef pte_accessible
520 # define pte_accessible(mm, pte) ((void)(pte), 1)
523 #ifndef flush_tlb_fix_spurious_fault
524 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
528 #define pgprot_nx(prot) (prot)
531 #ifndef pgprot_noncached
532 #define pgprot_noncached(prot) (prot)
535 #ifndef pgprot_writecombine
536 #define pgprot_writecombine pgprot_noncached
539 #ifndef pgprot_writethrough
540 #define pgprot_writethrough pgprot_noncached
543 #ifndef pgprot_device
544 #define pgprot_device pgprot_noncached
547 #ifndef pgprot_modify
548 #define pgprot_modify pgprot_modify
549 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
551 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot)))
552 newprot = pgprot_noncached(newprot);
553 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot)))
554 newprot = pgprot_writecombine(newprot);
555 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot)))
556 newprot = pgprot_device(newprot);
562 * When walking page tables, get the address of the next boundary,
563 * or the end address of the range if that comes earlier. Although no
564 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
567 #define pgd_addr_end(addr, end) \
568 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
569 (__boundary - 1 < (end) - 1)? __boundary: (end); \
573 #define p4d_addr_end(addr, end) \
574 ({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \
575 (__boundary - 1 < (end) - 1)? __boundary: (end); \
580 #define pud_addr_end(addr, end) \
581 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
582 (__boundary - 1 < (end) - 1)? __boundary: (end); \
587 #define pmd_addr_end(addr, end) \
588 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
589 (__boundary - 1 < (end) - 1)? __boundary: (end); \
594 * When walking page tables, we usually want to skip any p?d_none entries;
595 * and any p?d_bad entries - reporting the error before resetting to none.
596 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
598 void pgd_clear_bad(pgd_t *);
600 #ifndef __PAGETABLE_P4D_FOLDED
601 void p4d_clear_bad(p4d_t *);
603 #define p4d_clear_bad(p4d) do { } while (0)
606 #ifndef __PAGETABLE_PUD_FOLDED
607 void pud_clear_bad(pud_t *);
609 #define pud_clear_bad(p4d) do { } while (0)
612 void pmd_clear_bad(pmd_t *);
614 static inline int pgd_none_or_clear_bad(pgd_t *pgd)
618 if (unlikely(pgd_bad(*pgd))) {
625 static inline int p4d_none_or_clear_bad(p4d_t *p4d)
629 if (unlikely(p4d_bad(*p4d))) {
636 static inline int pud_none_or_clear_bad(pud_t *pud)
640 if (unlikely(pud_bad(*pud))) {
647 static inline int pmd_none_or_clear_bad(pmd_t *pmd)
651 if (unlikely(pmd_bad(*pmd))) {
658 static inline pte_t __ptep_modify_prot_start(struct vm_area_struct *vma,
663 * Get the current pte state, but zero it out to make it
664 * non-present, preventing the hardware from asynchronously
667 return ptep_get_and_clear(vma->vm_mm, addr, ptep);
670 static inline void __ptep_modify_prot_commit(struct vm_area_struct *vma,
672 pte_t *ptep, pte_t pte)
675 * The pte is non-present, so there's no hardware state to
678 set_pte_at(vma->vm_mm, addr, ptep, pte);
681 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
683 * Start a pte protection read-modify-write transaction, which
684 * protects against asynchronous hardware modifications to the pte.
685 * The intention is not to prevent the hardware from making pte
686 * updates, but to prevent any updates it may make from being lost.
688 * This does not protect against other software modifications of the
689 * pte; the appropriate pte lock must be held over the transation.
691 * Note that this interface is intended to be batchable, meaning that
692 * ptep_modify_prot_commit may not actually update the pte, but merely
693 * queue the update to be done at some later time. The update must be
694 * actually committed before the pte lock is released, however.
696 static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma,
700 return __ptep_modify_prot_start(vma, addr, ptep);
704 * Commit an update to a pte, leaving any hardware-controlled bits in
705 * the PTE unmodified.
707 static inline void ptep_modify_prot_commit(struct vm_area_struct *vma,
709 pte_t *ptep, pte_t old_pte, pte_t pte)
711 __ptep_modify_prot_commit(vma, addr, ptep, pte);
713 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
714 #endif /* CONFIG_MMU */
717 * No-op macros that just return the current protection value. Defined here
718 * because these macros can be used used even if CONFIG_MMU is not defined.
720 #ifndef pgprot_encrypted
721 #define pgprot_encrypted(prot) (prot)
724 #ifndef pgprot_decrypted
725 #define pgprot_decrypted(prot) (prot)
729 * A facility to provide lazy MMU batching. This allows PTE updates and
730 * page invalidations to be delayed until a call to leave lazy MMU mode
731 * is issued. Some architectures may benefit from doing this, and it is
732 * beneficial for both shadow and direct mode hypervisors, which may batch
733 * the PTE updates which happen during this window. Note that using this
734 * interface requires that read hazards be removed from the code. A read
735 * hazard could result in the direct mode hypervisor case, since the actual
736 * write to the page tables may not yet have taken place, so reads though
737 * a raw PTE pointer after it has been modified are not guaranteed to be
738 * up to date. This mode can only be entered and left under the protection of
739 * the page table locks for all page tables which may be modified. In the UP
740 * case, this is required so that preemption is disabled, and in the SMP case,
741 * it must synchronize the delayed page table writes properly on other CPUs.
743 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
744 #define arch_enter_lazy_mmu_mode() do {} while (0)
745 #define arch_leave_lazy_mmu_mode() do {} while (0)
746 #define arch_flush_lazy_mmu_mode() do {} while (0)
750 * A facility to provide batching of the reload of page tables and
751 * other process state with the actual context switch code for
752 * paravirtualized guests. By convention, only one of the batched
753 * update (lazy) modes (CPU, MMU) should be active at any given time,
754 * entry should never be nested, and entry and exits should always be
755 * paired. This is for sanity of maintaining and reasoning about the
756 * kernel code. In this case, the exit (end of the context switch) is
757 * in architecture-specific code, and so doesn't need a generic
760 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
761 #define arch_start_context_switch(prev) do {} while (0)
764 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
765 #ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION
766 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
771 static inline int pmd_swp_soft_dirty(pmd_t pmd)
776 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
781 #else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */
782 static inline int pte_soft_dirty(pte_t pte)
787 static inline int pmd_soft_dirty(pmd_t pmd)
792 static inline pte_t pte_mksoft_dirty(pte_t pte)
797 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
802 static inline pte_t pte_clear_soft_dirty(pte_t pte)
807 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
812 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
817 static inline int pte_swp_soft_dirty(pte_t pte)
822 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
827 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
832 static inline int pmd_swp_soft_dirty(pmd_t pmd)
837 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
843 #ifndef __HAVE_PFNMAP_TRACKING
845 * Interfaces that can be used by architecture code to keep track of
846 * memory type of pfn mappings specified by the remap_pfn_range,
851 * track_pfn_remap is called when a _new_ pfn mapping is being established
852 * by remap_pfn_range() for physical range indicated by pfn and size.
854 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
855 unsigned long pfn, unsigned long addr,
862 * track_pfn_insert is called when a _new_ single pfn is established
863 * by vmf_insert_pfn().
865 static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
871 * track_pfn_copy is called when vma that is covering the pfnmap gets
872 * copied through copy_page_range().
874 static inline int track_pfn_copy(struct vm_area_struct *vma)
880 * untrack_pfn is called while unmapping a pfnmap for a region.
881 * untrack can be called for a specific region indicated by pfn and size or
882 * can be for the entire vma (in which case pfn, size are zero).
884 static inline void untrack_pfn(struct vm_area_struct *vma,
885 unsigned long pfn, unsigned long size)
890 * untrack_pfn_moved is called while mremapping a pfnmap for a new region.
892 static inline void untrack_pfn_moved(struct vm_area_struct *vma)
896 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
897 unsigned long pfn, unsigned long addr,
899 extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
901 extern int track_pfn_copy(struct vm_area_struct *vma);
902 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
904 extern void untrack_pfn_moved(struct vm_area_struct *vma);
907 #ifdef __HAVE_COLOR_ZERO_PAGE
908 static inline int is_zero_pfn(unsigned long pfn)
910 extern unsigned long zero_pfn;
911 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
912 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
915 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
918 static inline int is_zero_pfn(unsigned long pfn)
920 extern unsigned long zero_pfn;
921 return pfn == zero_pfn;
924 static inline unsigned long my_zero_pfn(unsigned long addr)
926 extern unsigned long zero_pfn;
933 #ifndef CONFIG_TRANSPARENT_HUGEPAGE
934 static inline int pmd_trans_huge(pmd_t pmd)
939 static inline int pmd_write(pmd_t pmd)
944 #endif /* pmd_write */
945 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
948 static inline int pud_write(pud_t pud)
953 #endif /* pud_write */
955 #if !defined(CONFIG_ARCH_HAS_PTE_DEVMAP) || !defined(CONFIG_TRANSPARENT_HUGEPAGE)
956 static inline int pmd_devmap(pmd_t pmd)
960 static inline int pud_devmap(pud_t pud)
964 static inline int pgd_devmap(pgd_t pgd)
970 #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \
971 (defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
972 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD))
973 static inline int pud_trans_huge(pud_t pud)
979 /* See pmd_none_or_trans_huge_or_clear_bad for discussion. */
980 static inline int pud_none_or_trans_huge_or_dev_or_clear_bad(pud_t *pud)
982 pud_t pudval = READ_ONCE(*pud);
984 if (pud_none(pudval) || pud_trans_huge(pudval) || pud_devmap(pudval))
986 if (unlikely(pud_bad(pudval))) {
993 /* See pmd_trans_unstable for discussion. */
994 static inline int pud_trans_unstable(pud_t *pud)
996 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
997 defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)
998 return pud_none_or_trans_huge_or_dev_or_clear_bad(pud);
1004 #ifndef pmd_read_atomic
1005 static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
1008 * Depend on compiler for an atomic pmd read. NOTE: this is
1009 * only going to work, if the pmdval_t isn't larger than
1016 #ifndef arch_needs_pgtable_deposit
1017 #define arch_needs_pgtable_deposit() (false)
1020 * This function is meant to be used by sites walking pagetables with
1021 * the mmap_sem hold in read mode to protect against MADV_DONTNEED and
1022 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
1023 * into a null pmd and the transhuge page fault can convert a null pmd
1024 * into an hugepmd or into a regular pmd (if the hugepage allocation
1025 * fails). While holding the mmap_sem in read mode the pmd becomes
1026 * stable and stops changing under us only if it's not null and not a
1027 * transhuge pmd. When those races occurs and this function makes a
1028 * difference vs the standard pmd_none_or_clear_bad, the result is
1029 * undefined so behaving like if the pmd was none is safe (because it
1030 * can return none anyway). The compiler level barrier() is critically
1031 * important to compute the two checks atomically on the same pmdval.
1033 * For 32bit kernels with a 64bit large pmd_t this automatically takes
1034 * care of reading the pmd atomically to avoid SMP race conditions
1035 * against pmd_populate() when the mmap_sem is hold for reading by the
1036 * caller (a special atomic read not done by "gcc" as in the generic
1037 * version above, is also needed when THP is disabled because the page
1038 * fault can populate the pmd from under us).
1040 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
1042 pmd_t pmdval = pmd_read_atomic(pmd);
1044 * The barrier will stabilize the pmdval in a register or on
1045 * the stack so that it will stop changing under the code.
1047 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
1048 * pmd_read_atomic is allowed to return a not atomic pmdval
1049 * (for example pointing to an hugepage that has never been
1050 * mapped in the pmd). The below checks will only care about
1051 * the low part of the pmd with 32bit PAE x86 anyway, with the
1052 * exception of pmd_none(). So the important thing is that if
1053 * the low part of the pmd is found null, the high part will
1054 * be also null or the pmd_none() check below would be
1057 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1061 * !pmd_present() checks for pmd migration entries
1063 * The complete check uses is_pmd_migration_entry() in linux/swapops.h
1064 * But using that requires moving current function and pmd_trans_unstable()
1065 * to linux/swapops.h to resovle dependency, which is too much code move.
1067 * !pmd_present() is equivalent to is_pmd_migration_entry() currently,
1068 * because !pmd_present() pages can only be under migration not swapped
1071 * pmd_none() is preseved for future condition checks on pmd migration
1072 * entries and not confusing with this function name, although it is
1073 * redundant with !pmd_present().
1075 if (pmd_none(pmdval) || pmd_trans_huge(pmdval) ||
1076 (IS_ENABLED(CONFIG_ARCH_ENABLE_THP_MIGRATION) && !pmd_present(pmdval)))
1078 if (unlikely(pmd_bad(pmdval))) {
1086 * This is a noop if Transparent Hugepage Support is not built into
1087 * the kernel. Otherwise it is equivalent to
1088 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
1089 * places that already verified the pmd is not none and they want to
1090 * walk ptes while holding the mmap sem in read mode (write mode don't
1091 * need this). If THP is not enabled, the pmd can't go away under the
1092 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
1093 * run a pmd_trans_unstable before walking the ptes after
1094 * split_huge_pmd returns (because it may have run when the pmd become
1095 * null, but then a page fault can map in a THP and not a regular page).
1097 static inline int pmd_trans_unstable(pmd_t *pmd)
1099 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1100 return pmd_none_or_trans_huge_or_clear_bad(pmd);
1106 #ifndef CONFIG_NUMA_BALANCING
1108 * Technically a PTE can be PROTNONE even when not doing NUMA balancing but
1109 * the only case the kernel cares is for NUMA balancing and is only ever set
1110 * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked
1111 * _PAGE_PROTNONE so by by default, implement the helper as "always no". It
1112 * is the responsibility of the caller to distinguish between PROT_NONE
1113 * protections and NUMA hinting fault protections.
1115 static inline int pte_protnone(pte_t pte)
1120 static inline int pmd_protnone(pmd_t pmd)
1124 #endif /* CONFIG_NUMA_BALANCING */
1126 #endif /* CONFIG_MMU */
1128 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
1130 #ifndef __PAGETABLE_P4D_FOLDED
1131 int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot);
1132 int p4d_clear_huge(p4d_t *p4d);
1134 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1138 static inline int p4d_clear_huge(p4d_t *p4d)
1142 #endif /* !__PAGETABLE_P4D_FOLDED */
1144 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot);
1145 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot);
1146 int pud_clear_huge(pud_t *pud);
1147 int pmd_clear_huge(pmd_t *pmd);
1148 int p4d_free_pud_page(p4d_t *p4d, unsigned long addr);
1149 int pud_free_pmd_page(pud_t *pud, unsigned long addr);
1150 int pmd_free_pte_page(pmd_t *pmd, unsigned long addr);
1151 #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */
1152 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1156 static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
1160 static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
1164 static inline int p4d_clear_huge(p4d_t *p4d)
1168 static inline int pud_clear_huge(pud_t *pud)
1172 static inline int pmd_clear_huge(pmd_t *pmd)
1176 static inline int p4d_free_pud_page(p4d_t *p4d, unsigned long addr)
1180 static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr)
1184 static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
1188 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
1190 #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
1191 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1193 * ARCHes with special requirements for evicting THP backing TLB entries can
1194 * implement this. Otherwise also, it can help optimize normal TLB flush in
1195 * THP regime. stock flush_tlb_range() typically has optimization to nuke the
1196 * entire TLB TLB if flush span is greater than a threshold, which will
1197 * likely be true for a single huge page. Thus a single thp flush will
1198 * invalidate the entire TLB which is not desitable.
1199 * e.g. see arch/arc: flush_pmd_tlb_range
1201 #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1202 #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1204 #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG()
1205 #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG()
1210 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
1211 unsigned long size, pgprot_t *vma_prot);
1213 #ifndef CONFIG_X86_ESPFIX64
1214 static inline void init_espfix_bsp(void) { }
1217 extern void __init pgtable_cache_init(void);
1219 #ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED
1220 static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot)
1225 static inline bool arch_has_pfn_modify_check(void)
1229 #endif /* !_HAVE_ARCH_PFN_MODIFY_ALLOWED */
1232 * Architecture PAGE_KERNEL_* fallbacks
1234 * Some architectures don't define certain PAGE_KERNEL_* flags. This is either
1235 * because they really don't support them, or the port needs to be updated to
1236 * reflect the required functionality. Below are a set of relatively safe
1237 * fallbacks, as best effort, which we can count on in lieu of the architectures
1238 * not defining them on their own yet.
1241 #ifndef PAGE_KERNEL_RO
1242 # define PAGE_KERNEL_RO PAGE_KERNEL
1245 #ifndef PAGE_KERNEL_EXEC
1246 # define PAGE_KERNEL_EXEC PAGE_KERNEL
1250 * Page Table Modification bits for pgtbl_mod_mask.
1252 * These are used by the p?d_alloc_track*() set of functions an in the generic
1253 * vmalloc/ioremap code to track at which page-table levels entries have been
1254 * modified. Based on that the code can better decide when vmalloc and ioremap
1255 * mapping changes need to be synchronized to other page-tables in the system.
1257 #define __PGTBL_PGD_MODIFIED 0
1258 #define __PGTBL_P4D_MODIFIED 1
1259 #define __PGTBL_PUD_MODIFIED 2
1260 #define __PGTBL_PMD_MODIFIED 3
1261 #define __PGTBL_PTE_MODIFIED 4
1263 #define PGTBL_PGD_MODIFIED BIT(__PGTBL_PGD_MODIFIED)
1264 #define PGTBL_P4D_MODIFIED BIT(__PGTBL_P4D_MODIFIED)
1265 #define PGTBL_PUD_MODIFIED BIT(__PGTBL_PUD_MODIFIED)
1266 #define PGTBL_PMD_MODIFIED BIT(__PGTBL_PMD_MODIFIED)
1267 #define PGTBL_PTE_MODIFIED BIT(__PGTBL_PTE_MODIFIED)
1269 /* Page-Table Modification Mask */
1270 typedef unsigned int pgtbl_mod_mask;
1272 #endif /* !__ASSEMBLY__ */
1274 #ifndef io_remap_pfn_range
1275 #define io_remap_pfn_range remap_pfn_range
1278 #ifndef has_transparent_hugepage
1279 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1280 #define has_transparent_hugepage() 1
1282 #define has_transparent_hugepage() 0
1287 * On some architectures it depends on the mm if the p4d/pud or pmd
1288 * layer of the page table hierarchy is folded or not.
1290 #ifndef mm_p4d_folded
1291 #define mm_p4d_folded(mm) __is_defined(__PAGETABLE_P4D_FOLDED)
1294 #ifndef mm_pud_folded
1295 #define mm_pud_folded(mm) __is_defined(__PAGETABLE_PUD_FOLDED)
1298 #ifndef mm_pmd_folded
1299 #define mm_pmd_folded(mm) __is_defined(__PAGETABLE_PMD_FOLDED)
1303 * p?d_leaf() - true if this entry is a final mapping to a physical address.
1304 * This differs from p?d_huge() by the fact that they are always available (if
1305 * the architecture supports large pages at the appropriate level) even
1306 * if CONFIG_HUGETLB_PAGE is not defined.
1307 * Only meaningful when called on a valid entry.
1310 #define pgd_leaf(x) 0
1313 #define p4d_leaf(x) 0
1316 #define pud_leaf(x) 0
1319 #define pmd_leaf(x) 0
1322 #endif /* _ASM_GENERIC_PGTABLE_H */