1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2 /******************************************************************************
4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
6 * Copyright (C) 2000 - 2023, Intel Corp.
8 *****************************************************************************/
13 /*******************************************************************************
15 * Additional ACPI Tables (2)
17 * These tables are not consumed directly by the ACPICA subsystem, but are
18 * included here to support device drivers and the AML disassembler.
20 ******************************************************************************/
23 * Values for description table header signatures for tables defined in this
24 * file. Useful because they make it more difficult to inadvertently type in
25 * the wrong signature.
27 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */
28 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */
29 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */
30 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */
31 #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */
32 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
33 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
34 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
35 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
36 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
37 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
38 #define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */
39 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
40 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
41 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
42 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */
43 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
44 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
45 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */
46 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
47 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
48 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */
49 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */
50 #define ACPI_SIG_RAS2 "RAS2" /* RAS2 Feature table */
51 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */
52 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */
53 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
54 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
55 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
56 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */
57 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */
60 * All tables must be byte-packed to match the ACPI specification, since
61 * the tables are provided by the system BIOS.
66 * Note: C bitfields are not used for this reason:
68 * "Bitfields are great and easy to read, but unfortunately the C language
69 * does not specify the layout of bitfields in memory, which means they are
70 * essentially useless for dealing with packed data in on-disk formats or
71 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
72 * this decision was a design error in C. Ritchie could have picked an order
73 * and stuck with it." Norman Ramsey.
74 * See http://stackoverflow.com/a/1053662/41661
77 /*******************************************************************************
79 * AEST - Arm Error Source Table
81 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1(Sep 2020) and
82 * 2.0(May 2023) Platform Design Document.
84 ******************************************************************************/
86 struct acpi_table_aest {
87 struct acpi_table_header header;
90 /* Common Subtable header - one per Node Structure (Subtable) */
92 struct acpi_aest_hdr {
96 u32 node_specific_offset;
97 u32 node_interface_offset;
98 u32 node_interrupt_offset;
99 u32 node_interrupt_count;
102 u64 error_injection_rate;
105 /* Values for Type above */
107 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0
108 #define ACPI_AEST_MEMORY_ERROR_NODE 1
109 #define ACPI_AEST_SMMU_ERROR_NODE 2
110 #define ACPI_AEST_VENDOR_ERROR_NODE 3
111 #define ACPI_AEST_GIC_ERROR_NODE 4
112 #define ACPI_AEST_PCIE_ERROR_NODE 5
113 #define ACPI_AEST_PROXY_ERROR_NODE 6
114 #define ACPI_AEST_NODE_TYPE_RESERVED 7 /* 7 and above are reserved */
117 * AEST subtables (Error nodes)
120 /* 0: Processor Error */
122 typedef struct acpi_aest_processor {
128 u64 processor_affinity;
130 } acpi_aest_processor;
132 /* Values for resource_type above, related structs below */
134 #define ACPI_AEST_CACHE_RESOURCE 0
135 #define ACPI_AEST_TLB_RESOURCE 1
136 #define ACPI_AEST_GENERIC_RESOURCE 2
137 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */
139 /* 0R: Processor Cache Resource Substructure */
141 typedef struct acpi_aest_processor_cache {
145 } acpi_aest_processor_cache;
147 /* Values for cache_type above */
149 #define ACPI_AEST_CACHE_DATA 0
150 #define ACPI_AEST_CACHE_INSTRUCTION 1
151 #define ACPI_AEST_CACHE_UNIFIED 2
152 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */
154 /* 1R: Processor TLB Resource Substructure */
156 typedef struct acpi_aest_processor_tlb {
160 } acpi_aest_processor_tlb;
162 /* 2R: Processor Generic Resource Substructure */
164 typedef struct acpi_aest_processor_generic {
167 } acpi_aest_processor_generic;
169 /* 1: Memory Error */
171 typedef struct acpi_aest_memory {
172 u32 srat_proximity_domain;
178 typedef struct acpi_aest_smmu {
179 u32 iort_node_reference;
180 u32 subcomponent_reference;
184 /* 3: Vendor Defined */
186 typedef struct acpi_aest_vendor {
189 u8 vendor_specific_data[16];
193 struct acpi_aest_vendor_v2 {
196 u8 vendor_specific_data[16];
201 typedef struct acpi_aest_gic {
207 /* Values for interface_type above */
209 #define ACPI_AEST_GIC_CPU 0
210 #define ACPI_AEST_GIC_DISTRIBUTOR 1
211 #define ACPI_AEST_GIC_REDISTRIBUTOR 2
212 #define ACPI_AEST_GIC_ITS 3
213 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */
217 struct acpi_aest_pcie {
218 u32 iort_node_reference;
223 struct acpi_aest_proxy {
227 /* Node Interface Structure */
229 typedef struct acpi_aest_node_interface {
234 u32 error_record_index;
235 u32 error_record_count;
236 u64 error_record_implemented;
237 u64 error_status_reporting;
240 } acpi_aest_node_interface;
242 /* Node Interface Structure V2 */
244 struct acpi_aest_node_interface_header {
250 u32 error_record_index;
251 u32 error_record_count;
254 #define ACPI_AEST_NODE_GROUP_FORMAT_4K 0
255 #define ACPI_AEST_NODE_GROUP_FORMAT_16K 1
256 #define ACPI_AEST_NODE_GROUP_FORMAT_64K 2
258 struct acpi_aest_node_interface_common {
259 u32 error_node_device;
260 u32 processor_affinity;
261 u64 error_group_register_base;
262 u64 fault_inject_register_base;
263 u64 interrupt_config_register_base;
266 struct acpi_aest_node_interface_4k {
267 u64 error_record_implemented;
268 u64 error_status_reporting;
270 struct acpi_aest_node_interface_common common;
273 struct acpi_aest_node_interface_16k {
274 u64 error_record_implemented[4];
275 u64 error_status_reporting[4];
276 u64 addressing_mode[4];
277 struct acpi_aest_node_interface_common common;
280 struct acpi_aest_node_interface_64k {
281 u64 error_record_implemented[14];
282 u64 error_status_reporting[14];
283 u64 addressing_mode[14];
284 struct acpi_aest_node_interface_common common;
287 /* Values for Type field above */
289 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0
290 #define ACPI_AEST_NODE_MEMORY_MAPPED 1
291 #define ACPI_AEST_NODE_SINGLE_RECORD_MEMORY_MAPPED 2
292 #define ACPI_AEST_XFACE_RESERVED 3 /* 2 and above are reserved */
294 /* Node Interrupt Structure */
296 typedef struct acpi_aest_node_interrupt {
304 } acpi_aest_node_interrupt;
306 /* Node Interrupt Structure V2 */
308 struct acpi_aest_node_interrupt_v2 {
316 /* Values for Type field above */
318 #define ACPI_AEST_NODE_FAULT_HANDLING 0
319 #define ACPI_AEST_NODE_ERROR_RECOVERY 1
320 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */
322 /*******************************************************************************
323 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface
325 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document"
328 ******************************************************************************/
329 struct acpi_table_agdi {
330 struct acpi_table_header header; /* Common ACPI table header */
337 /* Mask for Flags field above */
339 #define ACPI_AGDI_SIGNALING_MODE (1)
341 /*******************************************************************************
343 * APMT - ARM Performance Monitoring Unit Table
346 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document
347 * ARM DEN0117 v1.0 November 25, 2021
349 ******************************************************************************/
351 struct acpi_table_apmt {
352 struct acpi_table_header header; /* Common ACPI table header */
355 #define ACPI_APMT_NODE_ID_LENGTH 4
360 struct acpi_apmt_node {
376 /* Masks for Flags field above */
378 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0)
379 #define ACPI_APMT_FLAGS_AFFINITY (1<<1)
380 #define ACPI_APMT_FLAGS_ATOMIC (1<<2)
382 /* Values for Flags dual page field above */
384 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0)
385 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0)
387 /* Values for Flags processor affinity field above */
388 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1)
389 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1)
391 /* Values for Flags 64-bit atomic field above */
392 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2)
393 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2)
395 /* Values for Type field above */
397 enum acpi_apmt_node_type {
398 ACPI_APMT_NODE_TYPE_MC = 0x00,
399 ACPI_APMT_NODE_TYPE_SMMU = 0x01,
400 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02,
401 ACPI_APMT_NODE_TYPE_ACPI = 0x03,
402 ACPI_APMT_NODE_TYPE_CACHE = 0x04,
403 ACPI_APMT_NODE_TYPE_COUNT
406 /* Masks for ovflw_irq_flags field above */
408 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0)
409 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1)
411 /* Values for ovflw_irq_flags mode field above */
413 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0)
414 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0)
416 /* Values for ovflw_irq_flags type field above */
418 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1)
420 /*******************************************************************************
422 * BDAT - BIOS Data ACPI Table
424 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5
427 ******************************************************************************/
429 struct acpi_table_bdat {
430 struct acpi_table_header header;
431 struct acpi_generic_address gas;
434 /*******************************************************************************
436 * CCEL - CC-Event Log
437 * From: "Guest-Host-Communication Interface (GHCI) for Intel
438 * Trust Domain Extensions (Intel TDX)". Feb 2022
440 ******************************************************************************/
442 struct acpi_table_ccel {
443 struct acpi_table_header header; /* Common ACPI table header */
447 u64 log_area_minimum_length;
448 u64 log_area_start_address;
451 /*******************************************************************************
453 * IORT - IO Remapping Table
455 * Conforms to "IO Remapping Table System Software on ARM Platforms",
456 * Document number: ARM DEN 0049E.e, Sep 2022
458 ******************************************************************************/
460 struct acpi_table_iort {
461 struct acpi_table_header header;
470 struct acpi_iort_node {
480 /* Values for subtable Type above */
482 enum acpi_iort_node_type {
483 ACPI_IORT_NODE_ITS_GROUP = 0x00,
484 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
485 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
486 ACPI_IORT_NODE_SMMU = 0x03,
487 ACPI_IORT_NODE_SMMU_V3 = 0x04,
488 ACPI_IORT_NODE_PMCG = 0x05,
489 ACPI_IORT_NODE_RMR = 0x06,
492 struct acpi_iort_id_mapping {
493 u32 input_base; /* Lowest value in input range */
494 u32 id_count; /* Number of IDs */
495 u32 output_base; /* Lowest value in output range */
496 u32 output_reference; /* A reference to the output node */
500 /* Masks for Flags field above for IORT subtable */
502 #define ACPI_IORT_ID_SINGLE_MAPPING (1)
504 struct acpi_iort_memory_access {
511 /* Values for cache_coherency field above */
513 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
514 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
516 /* Masks for Hints field above */
518 #define ACPI_IORT_HT_TRANSIENT (1)
519 #define ACPI_IORT_HT_WRITE (1<<1)
520 #define ACPI_IORT_HT_READ (1<<2)
521 #define ACPI_IORT_HT_OVERRIDE (1<<3)
523 /* Masks for memory_flags field above */
525 #define ACPI_IORT_MF_COHERENCY (1)
526 #define ACPI_IORT_MF_ATTRIBUTES (1<<1)
529 * IORT node specific subtables
531 struct acpi_iort_its_group {
533 u32 identifiers[]; /* GIC ITS identifier array */
536 struct acpi_iort_named_component {
538 u64 memory_properties; /* Memory access properties */
539 u8 memory_address_limit; /* Memory address size limit */
540 char device_name[]; /* Path of namespace object */
543 /* Masks for Flags field above */
545 #define ACPI_IORT_NC_STALL_SUPPORTED (1)
546 #define ACPI_IORT_NC_PASID_BITS (31<<1)
548 struct acpi_iort_root_complex {
549 u64 memory_properties; /* Memory access properties */
551 u32 pci_segment_number;
552 u8 memory_address_limit; /* Memory address size limit */
553 u16 pasid_capabilities; /* PASID Capabilities */
554 u8 reserved[]; /* Reserved, must be zero */
557 /* Masks for ats_attribute field above */
559 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */
560 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */
561 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */
563 /* Masks for pasid_capabilities field above */
564 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */
566 struct acpi_iort_smmu {
567 u64 base_address; /* SMMU base address */
568 u64 span; /* Length of memory range */
571 u32 global_interrupt_offset;
572 u32 context_interrupt_count;
573 u32 context_interrupt_offset;
574 u32 pmu_interrupt_count;
575 u32 pmu_interrupt_offset;
576 u64 interrupts[]; /* Interrupt array */
579 /* Values for Model field above */
581 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
582 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
583 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
584 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
585 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
586 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */
588 /* Masks for Flags field above */
590 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
591 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
593 /* Global interrupt format */
595 struct acpi_iort_smmu_gsi {
599 u32 nsg_cfg_irpt_flags;
602 struct acpi_iort_smmu_v3 {
603 u64 base_address; /* SMMUv3 base address */
613 u32 id_mapping_index;
616 /* Values for Model field above */
618 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
619 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */
620 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
622 /* Masks for Flags field above */
624 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
625 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
626 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
627 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4)
629 struct acpi_iort_pmcg {
630 u64 page0_base_address;
633 u64 page1_base_address;
636 struct acpi_iort_rmr {
642 /* Masks for Flags field above */
643 #define ACPI_IORT_RMR_REMAP_PERMITTED (1)
644 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1)
647 * Macro to access the Access Attributes in flags field above:
648 * Access Attributes is encoded in bits 9:2
650 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF)
652 /* Values for above Access Attributes */
654 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00
655 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01
656 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02
657 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03
658 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04
659 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05
661 struct acpi_iort_rmr_desc {
667 /*******************************************************************************
669 * IVRS - I/O Virtualization Reporting Structure
672 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
673 * Revision 1.26, February 2009.
675 ******************************************************************************/
677 struct acpi_table_ivrs {
678 struct acpi_table_header header; /* Common ACPI table header */
679 u32 info; /* Common virtualization info */
683 /* Values for Info field above */
685 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
686 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
687 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
689 /* IVRS subtable header */
691 struct acpi_ivrs_header {
692 u8 type; /* Subtable type */
694 u16 length; /* Subtable length */
695 u16 device_id; /* ID of IOMMU */
698 /* Values for subtable Type above */
700 enum acpi_ivrs_type {
701 ACPI_IVRS_TYPE_HARDWARE1 = 0x10,
702 ACPI_IVRS_TYPE_HARDWARE2 = 0x11,
703 ACPI_IVRS_TYPE_HARDWARE3 = 0x40,
704 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
705 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
706 ACPI_IVRS_TYPE_MEMORY3 = 0x22
709 /* Masks for Flags field above for IVHD subtable */
711 #define ACPI_IVHD_TT_ENABLE (1)
712 #define ACPI_IVHD_PASS_PW (1<<1)
713 #define ACPI_IVHD_RES_PASS_PW (1<<2)
714 #define ACPI_IVHD_ISOC (1<<3)
715 #define ACPI_IVHD_IOTLB (1<<4)
717 /* Masks for Flags field above for IVMD subtable */
719 #define ACPI_IVMD_UNITY (1)
720 #define ACPI_IVMD_READ (1<<1)
721 #define ACPI_IVMD_WRITE (1<<2)
722 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
725 * IVRS subtables, correspond to Type in struct acpi_ivrs_header
728 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
730 struct acpi_ivrs_hardware_10 {
731 struct acpi_ivrs_header header;
732 u16 capability_offset; /* Offset for IOMMU control fields */
733 u64 base_address; /* IOMMU control registers */
734 u16 pci_segment_group;
735 u16 info; /* MSI number and unit ID */
736 u32 feature_reporting;
739 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */
741 struct acpi_ivrs_hardware_11 {
742 struct acpi_ivrs_header header;
743 u16 capability_offset; /* Offset for IOMMU control fields */
744 u64 base_address; /* IOMMU control registers */
745 u16 pci_segment_group;
746 u16 info; /* MSI number and unit ID */
748 u64 efr_register_image;
752 /* Masks for Info field above */
754 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
755 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */
758 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
759 * Upper two bits of the Type field are the (encoded) length of the structure.
760 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
761 * are reserved for future use but not defined.
763 struct acpi_ivrs_de_header {
769 /* Length of device entry is in the top two bits of Type field above */
771 #define ACPI_IVHD_ENTRY_LENGTH 0xC0
773 /* Values for device entry Type field above */
775 enum acpi_ivrs_device_entry_type {
776 /* 4-byte device entries, all use struct acpi_ivrs_device4 */
778 ACPI_IVRS_TYPE_PAD4 = 0,
779 ACPI_IVRS_TYPE_ALL = 1,
780 ACPI_IVRS_TYPE_SELECT = 2,
781 ACPI_IVRS_TYPE_START = 3,
782 ACPI_IVRS_TYPE_END = 4,
784 /* 8-byte device entries */
786 ACPI_IVRS_TYPE_PAD8 = 64,
787 ACPI_IVRS_TYPE_NOT_USED = 65,
788 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */
789 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */
790 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */
791 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */
792 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */
794 /* Variable-length device entries */
796 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */
799 /* Values for Data field above */
801 #define ACPI_IVHD_INIT_PASS (1)
802 #define ACPI_IVHD_EINT_PASS (1<<1)
803 #define ACPI_IVHD_NMI_PASS (1<<2)
804 #define ACPI_IVHD_SYSTEM_MGMT (3<<4)
805 #define ACPI_IVHD_LINT0_PASS (1<<6)
806 #define ACPI_IVHD_LINT1_PASS (1<<7)
808 /* Types 0-4: 4-byte device entry */
810 struct acpi_ivrs_device4 {
811 struct acpi_ivrs_de_header header;
814 /* Types 66-67: 8-byte device entry */
816 struct acpi_ivrs_device8a {
817 struct acpi_ivrs_de_header header;
823 /* Types 70-71: 8-byte device entry */
825 struct acpi_ivrs_device8b {
826 struct acpi_ivrs_de_header header;
830 /* Values for extended_data above */
832 #define ACPI_IVHD_ATS_DISABLED (1<<31)
834 /* Type 72: 8-byte device entry */
836 struct acpi_ivrs_device8c {
837 struct acpi_ivrs_de_header header;
843 /* Values for Variety field above */
845 #define ACPI_IVHD_IOAPIC 1
846 #define ACPI_IVHD_HPET 2
848 /* Type 240: variable-length device entry */
850 struct acpi_ivrs_device_hid {
851 struct acpi_ivrs_de_header header;
858 /* Values for uid_type above */
860 #define ACPI_IVRS_UID_NOT_PRESENT 0
861 #define ACPI_IVRS_UID_IS_INTEGER 1
862 #define ACPI_IVRS_UID_IS_STRING 2
864 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
866 struct acpi_ivrs_memory {
867 struct acpi_ivrs_header header;
874 /*******************************************************************************
876 * LPIT - Low Power Idle Table
878 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
880 ******************************************************************************/
882 struct acpi_table_lpit {
883 struct acpi_table_header header; /* Common ACPI table header */
886 /* LPIT subtable header */
888 struct acpi_lpit_header {
889 u32 type; /* Subtable type */
890 u32 length; /* Subtable length */
896 /* Values for subtable Type above */
898 enum acpi_lpit_type {
899 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
900 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
903 /* Masks for Flags field above */
905 #define ACPI_LPIT_STATE_DISABLED (1)
906 #define ACPI_LPIT_NO_COUNTER (1<<1)
909 * LPIT subtables, correspond to Type in struct acpi_lpit_header
912 /* 0x00: Native C-state instruction based LPI structure */
914 struct acpi_lpit_native {
915 struct acpi_lpit_header header;
916 struct acpi_generic_address entry_trigger;
919 struct acpi_generic_address residency_counter;
920 u64 counter_frequency;
923 /*******************************************************************************
925 * MADT - Multiple APIC Description Table
928 ******************************************************************************/
930 struct acpi_table_madt {
931 struct acpi_table_header header; /* Common ACPI table header */
932 u32 address; /* Physical address of local APIC */
936 /* Masks for Flags field above */
938 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
940 /* Values for PCATCompat flag */
942 #define ACPI_MADT_DUAL_PIC 1
943 #define ACPI_MADT_MULTIPLE_APIC 0
945 /* Values for MADT subtable type in struct acpi_subtable_header */
947 enum acpi_madt_type {
948 ACPI_MADT_TYPE_LOCAL_APIC = 0,
949 ACPI_MADT_TYPE_IO_APIC = 1,
950 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
951 ACPI_MADT_TYPE_NMI_SOURCE = 3,
952 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
953 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
954 ACPI_MADT_TYPE_IO_SAPIC = 6,
955 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
956 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
957 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
958 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
959 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
960 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
961 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
962 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
963 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
964 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16,
965 ACPI_MADT_TYPE_CORE_PIC = 17,
966 ACPI_MADT_TYPE_LIO_PIC = 18,
967 ACPI_MADT_TYPE_HT_PIC = 19,
968 ACPI_MADT_TYPE_EIO_PIC = 20,
969 ACPI_MADT_TYPE_MSI_PIC = 21,
970 ACPI_MADT_TYPE_BIO_PIC = 22,
971 ACPI_MADT_TYPE_LPC_PIC = 23,
972 ACPI_MADT_TYPE_RINTC = 24,
973 ACPI_MADT_TYPE_IMSIC = 25,
974 ACPI_MADT_TYPE_APLIC = 26,
975 ACPI_MADT_TYPE_PLIC = 27,
976 ACPI_MADT_TYPE_RESERVED = 28, /* 28 to 0x7F are reserved */
977 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */
981 * MADT Subtables, correspond to Type in struct acpi_subtable_header
984 /* 0: Processor Local APIC */
986 struct acpi_madt_local_apic {
987 struct acpi_subtable_header header;
988 u8 processor_id; /* ACPI processor id */
989 u8 id; /* Processor's local APIC id */
995 struct acpi_madt_io_apic {
996 struct acpi_subtable_header header;
997 u8 id; /* I/O APIC ID */
998 u8 reserved; /* reserved - must be zero */
999 u32 address; /* APIC physical address */
1000 u32 global_irq_base; /* Global system interrupt where INTI lines start */
1003 /* 2: Interrupt Override */
1005 struct acpi_madt_interrupt_override {
1006 struct acpi_subtable_header header;
1007 u8 bus; /* 0 - ISA */
1008 u8 source_irq; /* Interrupt source (IRQ) */
1009 u32 global_irq; /* Global system interrupt */
1015 struct acpi_madt_nmi_source {
1016 struct acpi_subtable_header header;
1018 u32 global_irq; /* Global system interrupt */
1021 /* 4: Local APIC NMI */
1023 struct acpi_madt_local_apic_nmi {
1024 struct acpi_subtable_header header;
1025 u8 processor_id; /* ACPI processor id */
1027 u8 lint; /* LINTn to which NMI is connected */
1030 /* 5: Address Override */
1032 struct acpi_madt_local_apic_override {
1033 struct acpi_subtable_header header;
1034 u16 reserved; /* Reserved, must be zero */
1035 u64 address; /* APIC physical address */
1040 struct acpi_madt_io_sapic {
1041 struct acpi_subtable_header header;
1042 u8 id; /* I/O SAPIC ID */
1043 u8 reserved; /* Reserved, must be zero */
1044 u32 global_irq_base; /* Global interrupt for SAPIC start */
1045 u64 address; /* SAPIC physical address */
1048 /* 7: Local Sapic */
1050 struct acpi_madt_local_sapic {
1051 struct acpi_subtable_header header;
1052 u8 processor_id; /* ACPI processor id */
1053 u8 id; /* SAPIC ID */
1054 u8 eid; /* SAPIC EID */
1055 u8 reserved[3]; /* Reserved, must be zero */
1057 u32 uid; /* Numeric UID - ACPI 3.0 */
1058 char uid_string[]; /* String UID - ACPI 3.0 */
1061 /* 8: Platform Interrupt Source */
1063 struct acpi_madt_interrupt_source {
1064 struct acpi_subtable_header header;
1066 u8 type; /* 1=PMI, 2=INIT, 3=corrected */
1067 u8 id; /* Processor ID */
1068 u8 eid; /* Processor EID */
1069 u8 io_sapic_vector; /* Vector value for PMI interrupts */
1070 u32 global_irq; /* Global system interrupt */
1071 u32 flags; /* Interrupt Source Flags */
1074 /* Masks for Flags field above */
1076 #define ACPI_MADT_CPEI_OVERRIDE (1)
1078 /* 9: Processor Local X2APIC (ACPI 4.0) */
1080 struct acpi_madt_local_x2apic {
1081 struct acpi_subtable_header header;
1082 u16 reserved; /* reserved - must be zero */
1083 u32 local_apic_id; /* Processor x2APIC ID */
1085 u32 uid; /* ACPI processor UID */
1088 /* 10: Local X2APIC NMI (ACPI 4.0) */
1090 struct acpi_madt_local_x2apic_nmi {
1091 struct acpi_subtable_header header;
1093 u32 uid; /* ACPI processor UID */
1094 u8 lint; /* LINTn to which NMI is connected */
1095 u8 reserved[3]; /* reserved - must be zero */
1098 /* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */
1100 struct acpi_madt_generic_interrupt {
1101 struct acpi_subtable_header header;
1102 u16 reserved; /* reserved - must be zero */
1103 u32 cpu_interface_number;
1106 u32 parking_version;
1107 u32 performance_interrupt;
1110 u64 gicv_base_address;
1111 u64 gich_base_address;
1113 u64 gicr_base_address;
1115 u8 efficiency_class;
1117 u16 spe_interrupt; /* ACPI 6.3 */
1118 u16 trbe_interrupt; /* ACPI 6.5 */
1121 /* Masks for Flags field above */
1123 /* ACPI_MADT_ENABLED (1) Processor is usable if set */
1124 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
1125 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
1126 #define ACPI_MADT_GICC_ONLINE_CAPABLE (1<<3) /* 03: Processor is online capable */
1127 #define ACPI_MADT_GICC_NON_COHERENT (1<<4) /* 04: GIC redistributor is not coherent */
1129 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
1131 struct acpi_madt_generic_distributor {
1132 struct acpi_subtable_header header;
1133 u16 reserved; /* reserved - must be zero */
1136 u32 global_irq_base;
1138 u8 reserved2[3]; /* reserved - must be zero */
1141 /* Values for Version field above */
1143 enum acpi_madt_gic_version {
1144 ACPI_MADT_GIC_VERSION_NONE = 0,
1145 ACPI_MADT_GIC_VERSION_V1 = 1,
1146 ACPI_MADT_GIC_VERSION_V2 = 2,
1147 ACPI_MADT_GIC_VERSION_V3 = 3,
1148 ACPI_MADT_GIC_VERSION_V4 = 4,
1149 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
1152 /* 13: Generic MSI Frame (ACPI 5.1) */
1154 struct acpi_madt_generic_msi_frame {
1155 struct acpi_subtable_header header;
1156 u16 reserved; /* reserved - must be zero */
1164 /* Masks for Flags field above */
1166 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
1168 /* 14: Generic Redistributor (ACPI 5.1) */
1170 struct acpi_madt_generic_redistributor {
1171 struct acpi_subtable_header header;
1173 u8 reserved; /* reserved - must be zero */
1178 #define ACPI_MADT_GICR_NON_COHERENT (1)
1180 /* 15: Generic Translator (ACPI 6.0) */
1182 struct acpi_madt_generic_translator {
1183 struct acpi_subtable_header header;
1185 u8 reserved; /* reserved - must be zero */
1191 #define ACPI_MADT_ITS_NON_COHERENT (1)
1193 /* 16: Multiprocessor wakeup (ACPI 6.4) */
1195 struct acpi_madt_multiproc_wakeup {
1196 struct acpi_subtable_header header;
1198 u32 reserved; /* reserved - must be zero */
1199 u64 mailbox_address;
1203 /* Values for Version field above */
1205 enum acpi_madt_multiproc_wakeup_version {
1206 ACPI_MADT_MP_WAKEUP_VERSION_NONE = 0,
1207 ACPI_MADT_MP_WAKEUP_VERSION_V1 = 1,
1208 ACPI_MADT_MP_WAKEUP_VERSION_RESERVED = 2, /* 2 and greater are reserved */
1211 #define ACPI_MADT_MP_WAKEUP_SIZE_V0 16
1212 #define ACPI_MADT_MP_WAKEUP_SIZE_V1 24
1214 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032
1215 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048
1217 struct acpi_madt_multiproc_wakeup_mailbox {
1219 u16 reserved; /* reserved - must be zero */
1222 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */
1223 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */
1226 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1
1227 #define ACPI_MP_WAKE_COMMAND_TEST 2
1229 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */
1231 struct acpi_madt_core_pic {
1232 struct acpi_subtable_header header;
1239 /* Values for Version field above */
1241 enum acpi_madt_core_pic_version {
1242 ACPI_MADT_CORE_PIC_VERSION_NONE = 0,
1243 ACPI_MADT_CORE_PIC_VERSION_V1 = 1,
1244 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1247 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */
1249 struct acpi_madt_lio_pic {
1250 struct acpi_subtable_header header;
1258 /* Values for Version field above */
1260 enum acpi_madt_lio_pic_version {
1261 ACPI_MADT_LIO_PIC_VERSION_NONE = 0,
1262 ACPI_MADT_LIO_PIC_VERSION_V1 = 1,
1263 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1266 /* 19: HT Interrupt Controller (ACPI 6.5) */
1268 struct acpi_madt_ht_pic {
1269 struct acpi_subtable_header header;
1276 /* Values for Version field above */
1278 enum acpi_madt_ht_pic_version {
1279 ACPI_MADT_HT_PIC_VERSION_NONE = 0,
1280 ACPI_MADT_HT_PIC_VERSION_V1 = 1,
1281 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1284 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */
1286 struct acpi_madt_eio_pic {
1287 struct acpi_subtable_header header;
1294 /* Values for Version field above */
1296 enum acpi_madt_eio_pic_version {
1297 ACPI_MADT_EIO_PIC_VERSION_NONE = 0,
1298 ACPI_MADT_EIO_PIC_VERSION_V1 = 1,
1299 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1302 /* 21: MSI Interrupt Controller (ACPI 6.5) */
1304 struct acpi_madt_msi_pic {
1305 struct acpi_subtable_header header;
1312 /* Values for Version field above */
1314 enum acpi_madt_msi_pic_version {
1315 ACPI_MADT_MSI_PIC_VERSION_NONE = 0,
1316 ACPI_MADT_MSI_PIC_VERSION_V1 = 1,
1317 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1320 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */
1322 struct acpi_madt_bio_pic {
1323 struct acpi_subtable_header header;
1331 /* Values for Version field above */
1333 enum acpi_madt_bio_pic_version {
1334 ACPI_MADT_BIO_PIC_VERSION_NONE = 0,
1335 ACPI_MADT_BIO_PIC_VERSION_V1 = 1,
1336 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1339 /* 23: LPC Interrupt Controller (ACPI 6.5) */
1341 struct acpi_madt_lpc_pic {
1342 struct acpi_subtable_header header;
1349 /* Values for Version field above */
1351 enum acpi_madt_lpc_pic_version {
1352 ACPI_MADT_LPC_PIC_VERSION_NONE = 0,
1353 ACPI_MADT_LPC_PIC_VERSION_V1 = 1,
1354 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1357 /* 24: RISC-V INTC */
1358 struct acpi_madt_rintc {
1359 struct acpi_subtable_header header;
1364 u32 uid; /* ACPI processor UID */
1365 u32 ext_intc_id; /* External INTC Id */
1366 u64 imsic_addr; /* IMSIC base address */
1367 u32 imsic_size; /* IMSIC size */
1370 /* Values for RISC-V INTC Version field above */
1372 enum acpi_madt_rintc_version {
1373 ACPI_MADT_RINTC_VERSION_NONE = 0,
1374 ACPI_MADT_RINTC_VERSION_V1 = 1,
1375 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1378 /* 25: RISC-V IMSIC */
1379 struct acpi_madt_imsic {
1380 struct acpi_subtable_header header;
1386 u8 guest_index_bits;
1388 u8 group_index_bits;
1389 u8 group_index_shift;
1392 /* 26: RISC-V APLIC */
1393 struct acpi_madt_aplic {
1394 struct acpi_subtable_header header;
1406 /* 27: RISC-V PLIC */
1407 struct acpi_madt_plic {
1408 struct acpi_subtable_header header;
1422 struct acpi_madt_oem_data {
1423 ACPI_FLEX_ARRAY(u8, oem_data);
1427 * Common flags fields for MADT subtables
1430 /* MADT Local APIC flags */
1432 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
1433 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */
1435 /* MADT MPS INTI flags (inti_flags) */
1437 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
1438 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
1440 /* Values for MPS INTI flags */
1442 #define ACPI_MADT_POLARITY_CONFORMS 0
1443 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
1444 #define ACPI_MADT_POLARITY_RESERVED 2
1445 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3
1447 #define ACPI_MADT_TRIGGER_CONFORMS (0)
1448 #define ACPI_MADT_TRIGGER_EDGE (1<<2)
1449 #define ACPI_MADT_TRIGGER_RESERVED (2<<2)
1450 #define ACPI_MADT_TRIGGER_LEVEL (3<<2)
1452 /*******************************************************************************
1454 * MCFG - PCI Memory Mapped Configuration table and subtable
1457 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
1459 ******************************************************************************/
1461 struct acpi_table_mcfg {
1462 struct acpi_table_header header; /* Common ACPI table header */
1468 struct acpi_mcfg_allocation {
1469 u64 address; /* Base address, processor-relative */
1470 u16 pci_segment; /* PCI segment group number */
1471 u8 start_bus_number; /* Starting PCI Bus number */
1472 u8 end_bus_number; /* Final PCI Bus number */
1476 /*******************************************************************************
1478 * MCHI - Management Controller Host Interface Table
1481 * Conforms to "Management Component Transport Protocol (MCTP) Host
1482 * Interface Specification", Revision 1.0.0a, October 13, 2009
1484 ******************************************************************************/
1486 struct acpi_table_mchi {
1487 struct acpi_table_header header; /* Common ACPI table header */
1494 u32 global_interrupt;
1495 struct acpi_generic_address control_register;
1502 /*******************************************************************************
1504 * MPAM - Memory System Resource Partitioning and Monitoring
1506 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0"
1507 * Document number: ARM DEN 0065, December, 2022.
1509 ******************************************************************************/
1511 /* MPAM RIS locator types. Table 11, Location types */
1512 enum acpi_mpam_locator_type {
1513 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0,
1514 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1,
1515 ACPI_MPAM_LOCATION_TYPE_SMMU = 2,
1516 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3,
1517 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4,
1518 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5,
1519 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF
1522 /* MPAM Functional dependency descriptor. Table 10 */
1523 struct acpi_mpam_func_deps {
1528 /* MPAM Processor cache locator descriptor. Table 13 */
1529 struct acpi_mpam_resource_cache_locator {
1530 u64 cache_reference;
1534 /* MPAM Memory locator descriptor. Table 14 */
1535 struct acpi_mpam_resource_memory_locator {
1536 u64 proximity_domain;
1540 /* MPAM SMMU locator descriptor. Table 15 */
1541 struct acpi_mpam_resource_smmu_locator {
1546 /* MPAM Memory-side cache locator descriptor. Table 16 */
1547 struct acpi_mpam_resource_memcache_locator {
1553 /* MPAM ACPI device locator descriptor. Table 17 */
1554 struct acpi_mpam_resource_acpi_locator {
1559 /* MPAM Interconnect locator descriptor. Table 18 */
1560 struct acpi_mpam_resource_interconnect_locator {
1561 u64 inter_connect_desc_tbl_off;
1565 /* MPAM Locator structure. Table 12 */
1566 struct acpi_mpam_resource_generic_locator {
1571 union acpi_mpam_resource_locator {
1572 struct acpi_mpam_resource_cache_locator cache_locator;
1573 struct acpi_mpam_resource_memory_locator memory_locator;
1574 struct acpi_mpam_resource_smmu_locator smmu_locator;
1575 struct acpi_mpam_resource_memcache_locator mem_cache_locator;
1576 struct acpi_mpam_resource_acpi_locator acpi_locator;
1577 struct acpi_mpam_resource_interconnect_locator interconnect_ifc_locator;
1578 struct acpi_mpam_resource_generic_locator generic_locator;
1581 /* Memory System Component Resource Node Structure Table 9 */
1582 struct acpi_mpam_resource_node {
1587 union acpi_mpam_resource_locator locator;
1588 u32 num_functional_deps;
1591 /* Memory System Component (MSC) Node Structure. Table 4 */
1592 struct acpi_mpam_msc_node {
1599 u32 overflow_interrupt;
1600 u32 overflow_interrupt_flags;
1602 u32 overflow_interrupt_affinity;
1603 u32 error_interrupt;
1604 u32 error_interrupt_flags;
1606 u32 error_interrupt_affinity;
1608 u64 hardware_id_linked_device;
1609 u32 instance_id_linked_device;
1610 u32 num_resource_nodes;
1613 struct acpi_table_mpam {
1614 struct acpi_table_header header; /* Common ACPI table header */
1617 /*******************************************************************************
1619 * MPST - Memory Power State Table (ACPI 5.0)
1622 ******************************************************************************/
1624 #define ACPI_MPST_CHANNEL_INFO \
1627 u16 power_node_count; \
1632 struct acpi_table_mpst {
1633 struct acpi_table_header header; /* Common ACPI table header */
1634 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1637 /* Memory Platform Communication Channel Info */
1639 struct acpi_mpst_channel {
1640 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1643 /* Memory Power Node Structure */
1645 struct acpi_mpst_power_node {
1652 u32 num_power_states;
1653 u32 num_physical_components;
1656 /* Values for Flags field above */
1658 #define ACPI_MPST_ENABLED 1
1659 #define ACPI_MPST_POWER_MANAGED 2
1660 #define ACPI_MPST_HOT_PLUG_CAPABLE 4
1662 /* Memory Power State Structure (follows POWER_NODE above) */
1664 struct acpi_mpst_power_state {
1669 /* Physical Component ID Structure (follows POWER_STATE above) */
1671 struct acpi_mpst_component {
1675 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
1677 struct acpi_mpst_data_hdr {
1678 u16 characteristics_count;
1682 struct acpi_mpst_power_data {
1692 /* Values for Flags field above */
1694 #define ACPI_MPST_PRESERVE 1
1695 #define ACPI_MPST_AUTOENTRY 2
1696 #define ACPI_MPST_AUTOEXIT 4
1698 /* Shared Memory Region (not part of an ACPI table) */
1700 struct acpi_mpst_shared {
1704 u32 command_register;
1705 u32 status_register;
1708 u64 energy_consumed;
1712 /*******************************************************************************
1714 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
1717 ******************************************************************************/
1719 struct acpi_table_msct {
1720 struct acpi_table_header header; /* Common ACPI table header */
1721 u32 proximity_offset; /* Location of proximity info struct(s) */
1722 u32 max_proximity_domains; /* Max number of proximity domains */
1723 u32 max_clock_domains; /* Max number of clock domains */
1724 u64 max_address; /* Max physical address in system */
1727 /* subtable - Maximum Proximity Domain Information. Version 1 */
1729 struct acpi_msct_proximity {
1732 u32 range_start; /* Start of domain range */
1733 u32 range_end; /* End of domain range */
1734 u32 processor_capacity;
1735 u64 memory_capacity; /* In bytes */
1738 /*******************************************************************************
1740 * MSDM - Microsoft Data Management table
1742 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
1743 * November 29, 2011. Copyright 2011 Microsoft
1745 ******************************************************************************/
1747 /* Basic MSDM table is only the common ACPI header */
1749 struct acpi_table_msdm {
1750 struct acpi_table_header header; /* Common ACPI table header */
1753 /*******************************************************************************
1755 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
1758 ******************************************************************************/
1760 struct acpi_table_nfit {
1761 struct acpi_table_header header; /* Common ACPI table header */
1762 u32 reserved; /* Reserved, must be zero */
1765 /* Subtable header for NFIT */
1767 struct acpi_nfit_header {
1772 /* Values for subtable type in struct acpi_nfit_header */
1774 enum acpi_nfit_type {
1775 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
1776 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
1777 ACPI_NFIT_TYPE_INTERLEAVE = 2,
1778 ACPI_NFIT_TYPE_SMBIOS = 3,
1779 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
1780 ACPI_NFIT_TYPE_DATA_REGION = 5,
1781 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
1782 ACPI_NFIT_TYPE_CAPABILITIES = 7,
1783 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
1790 /* 0: System Physical Address Range Structure */
1792 struct acpi_nfit_system_address {
1793 struct acpi_nfit_header header;
1796 u32 reserved; /* Reserved, must be zero */
1797 u32 proximity_domain;
1802 u64 location_cookie; /* ACPI 6.4 */
1807 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
1808 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
1809 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */
1811 /* Range Type GUIDs appear in the include/acuuid.h file */
1813 /* 1: Memory Device to System Address Range Map Structure */
1815 struct acpi_nfit_memory_map {
1816 struct acpi_nfit_header header;
1825 u16 interleave_index;
1826 u16 interleave_ways;
1828 u16 reserved; /* Reserved, must be zero */
1833 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
1834 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
1835 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
1836 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
1837 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
1838 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
1839 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
1841 /* 2: Interleave Structure */
1843 struct acpi_nfit_interleave {
1844 struct acpi_nfit_header header;
1845 u16 interleave_index;
1846 u16 reserved; /* Reserved, must be zero */
1849 u32 line_offset[]; /* Variable length */
1852 /* 3: SMBIOS Management Information Structure */
1854 struct acpi_nfit_smbios {
1855 struct acpi_nfit_header header;
1856 u32 reserved; /* Reserved, must be zero */
1857 u8 data[]; /* Variable length */
1860 /* 4: NVDIMM Control Region Structure */
1862 struct acpi_nfit_control_region {
1863 struct acpi_nfit_header header;
1868 u16 subsystem_vendor_id;
1869 u16 subsystem_device_id;
1870 u16 subsystem_revision_id;
1872 u8 manufacturing_location;
1873 u16 manufacturing_date;
1874 u8 reserved[2]; /* Reserved, must be zero */
1884 u8 reserved1[6]; /* Reserved, must be zero */
1889 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
1891 /* valid_fields bits */
1893 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
1895 /* 5: NVDIMM Block Data Window Region Structure */
1897 struct acpi_nfit_data_region {
1898 struct acpi_nfit_header header;
1907 /* 6: Flush Hint Address Structure */
1909 struct acpi_nfit_flush_address {
1910 struct acpi_nfit_header header;
1913 u8 reserved[6]; /* Reserved, must be zero */
1914 u64 hint_address[]; /* Variable length */
1917 /* 7: Platform Capabilities Structure */
1919 struct acpi_nfit_capabilities {
1920 struct acpi_nfit_header header;
1921 u8 highest_capability;
1922 u8 reserved[3]; /* Reserved, must be zero */
1927 /* Capabilities Flags */
1929 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
1930 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
1931 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
1934 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
1936 struct nfit_device_handle {
1940 /* Device handle construction and extraction macros */
1942 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
1943 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
1944 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
1945 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
1946 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
1948 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
1949 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
1950 #define ACPI_NFIT_MEMORY_ID_OFFSET 8
1951 #define ACPI_NFIT_SOCKET_ID_OFFSET 12
1952 #define ACPI_NFIT_NODE_ID_OFFSET 16
1954 /* Macro to construct a NFIT/NVDIMM device handle */
1956 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
1958 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
1959 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
1960 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
1961 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
1963 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */
1965 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
1966 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
1968 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
1969 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
1971 #define ACPI_NFIT_GET_MEMORY_ID(handle) \
1972 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
1974 #define ACPI_NFIT_GET_SOCKET_ID(handle) \
1975 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
1977 #define ACPI_NFIT_GET_NODE_ID(handle) \
1978 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
1980 /*******************************************************************************
1982 * NHLT - Non HDAudio Link Table
1985 ******************************************************************************/
1987 struct acpi_table_nhlt {
1988 struct acpi_table_header header; /* Common ACPI table header */
1991 * struct acpi_nhlt_endpoint endpoints[];
1992 * struct acpi_nhlt_config oed_config;
1996 struct acpi_nhlt_endpoint {
2008 * struct acpi_nhlt_config device_config;
2009 * struct acpi_nhlt_formats_config formats_config;
2010 * struct acpi_nhlt_devices_info devices_info;
2015 * Values for link_type field above
2017 * Only types PDM and SSP are used
2019 #define ACPI_NHLT_LINKTYPE_HDA 0
2020 #define ACPI_NHLT_LINKTYPE_DSP 1
2021 #define ACPI_NHLT_LINKTYPE_PDM 2
2022 #define ACPI_NHLT_LINKTYPE_SSP 3
2023 #define ACPI_NHLT_LINKTYPE_SLIMBUS 4
2024 #define ACPI_NHLT_LINKTYPE_SDW 5
2025 #define ACPI_NHLT_LINKTYPE_UAOL 6
2027 /* Values for device_id field above */
2029 #define ACPI_NHLT_DEVICEID_DMIC 0xAE20
2030 #define ACPI_NHLT_DEVICEID_BT 0xAE30
2031 #define ACPI_NHLT_DEVICEID_I2S 0xAE34
2033 /* Values for device_type field above */
2036 * Device types unique to endpoint of link_type=PDM
2038 * Type PDM used for all SKL+ platforms
2040 #define ACPI_NHLT_DEVICETYPE_PDM 0
2041 #define ACPI_NHLT_DEVICETYPE_PDM_SKL 1
2042 /* Device types unique to endpoint of link_type=SSP */
2043 #define ACPI_NHLT_DEVICETYPE_BT 0
2044 #define ACPI_NHLT_DEVICETYPE_FM 1
2045 #define ACPI_NHLT_DEVICETYPE_MODEM 2
2046 #define ACPI_NHLT_DEVICETYPE_CODEC 4
2048 /* Values for Direction field above */
2050 #define ACPI_NHLT_DIR_RENDER 0
2051 #define ACPI_NHLT_DIR_CAPTURE 1
2053 struct acpi_nhlt_config {
2054 u32 capabilities_size;
2058 struct acpi_nhlt_gendevice_config {
2063 /* Values for config_type field above */
2065 #define ACPI_NHLT_CONFIGTYPE_GENERIC 0
2066 #define ACPI_NHLT_CONFIGTYPE_MICARRAY 1
2068 struct acpi_nhlt_micdevice_config {
2074 /* Values for array_type field above */
2076 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_SMALL 0xA
2077 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_BIG 0xB
2078 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO1 0xC
2079 #define ACPI_NHLT_ARRAYTYPE_PLANAR4_LSHAPED 0xD
2080 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO2 0xE
2081 #define ACPI_NHLT_ARRAYTYPE_VENDOR 0xF
2083 struct acpi_nhlt_vendor_mic_config {
2086 u16 speaker_position_distance; /* mm */
2087 u16 horizontal_offset; /* mm */
2088 u16 vertical_offset; /* mm */
2089 u8 frequency_low_band; /* 5*Hz */
2090 u8 frequency_high_band; /* 500*Hz */
2091 u16 direction_angle; /* -180 - +180 */
2092 u16 elevation_angle; /* -180 - +180 */
2093 u16 work_vertical_angle_begin; /* -180 - +180 with 2 deg step */
2094 u16 work_vertical_angle_end; /* -180 - +180 with 2 deg step */
2095 u16 work_horizontal_angle_begin; /* -180 - +180 with 2 deg step */
2096 u16 work_horizontal_angle_end; /* -180 - +180 with 2 deg step */
2099 /* Values for Type field above */
2101 #define ACPI_NHLT_MICTYPE_OMNIDIRECTIONAL 0
2102 #define ACPI_NHLT_MICTYPE_SUBCARDIOID 1
2103 #define ACPI_NHLT_MICTYPE_CARDIOID 2
2104 #define ACPI_NHLT_MICTYPE_SUPERCARDIOID 3
2105 #define ACPI_NHLT_MICTYPE_HYPERCARDIOID 4
2106 #define ACPI_NHLT_MICTYPE_8SHAPED 5
2107 #define ACPI_NHLT_MICTYPE_RESERVED 6
2108 #define ACPI_NHLT_MICTYPE_VENDORDEFINED 7
2110 /* Values for Panel field above */
2112 #define ACPI_NHLT_MICLOCATION_TOP 0
2113 #define ACPI_NHLT_MICLOCATION_BOTTOM 1
2114 #define ACPI_NHLT_MICLOCATION_LEFT 2
2115 #define ACPI_NHLT_MICLOCATION_RIGHT 3
2116 #define ACPI_NHLT_MICLOCATION_FRONT 4
2117 #define ACPI_NHLT_MICLOCATION_REAR 5
2119 struct acpi_nhlt_vendor_micdevice_config {
2124 struct acpi_nhlt_vendor_mic_config mics[];
2127 union acpi_nhlt_device_config {
2129 struct acpi_nhlt_gendevice_config gen;
2130 struct acpi_nhlt_micdevice_config mic;
2131 struct acpi_nhlt_vendor_micdevice_config vendor_mic;
2134 /* Inherited from Microsoft's WAVEFORMATEXTENSIBLE. */
2135 struct acpi_nhlt_wave_formatext {
2138 u32 samples_per_sec;
2139 u32 avg_bytes_per_sec;
2141 u16 bits_per_sample;
2142 u16 extra_format_size;
2143 u16 valid_bits_per_sample;
2148 struct acpi_nhlt_format_config {
2149 struct acpi_nhlt_wave_formatext format;
2150 struct acpi_nhlt_config config;
2153 struct acpi_nhlt_formats_config {
2155 struct acpi_nhlt_format_config formats[];
2158 struct acpi_nhlt_device_info {
2164 struct acpi_nhlt_devices_info {
2166 struct acpi_nhlt_device_info devices[];
2169 /*******************************************************************************
2171 * PCCT - Platform Communications Channel Table (ACPI 5.0)
2172 * Version 2 (ACPI 6.2)
2174 ******************************************************************************/
2176 struct acpi_table_pcct {
2177 struct acpi_table_header header; /* Common ACPI table header */
2182 /* Values for Flags field above */
2184 #define ACPI_PCCT_DOORBELL 1
2186 /* Values for subtable type in struct acpi_subtable_header */
2188 enum acpi_pcct_type {
2189 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
2190 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
2191 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
2192 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
2193 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
2194 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */
2195 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */
2199 * PCCT Subtables, correspond to Type in struct acpi_subtable_header
2202 /* 0: Generic Communications Subspace */
2204 struct acpi_pcct_subspace {
2205 struct acpi_subtable_header header;
2209 struct acpi_generic_address doorbell_register;
2213 u32 max_access_rate;
2214 u16 min_turnaround_time;
2217 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */
2219 struct acpi_pcct_hw_reduced {
2220 struct acpi_subtable_header header;
2221 u32 platform_interrupt;
2226 struct acpi_generic_address doorbell_register;
2230 u32 max_access_rate;
2231 u16 min_turnaround_time;
2234 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
2236 struct acpi_pcct_hw_reduced_type2 {
2237 struct acpi_subtable_header header;
2238 u32 platform_interrupt;
2243 struct acpi_generic_address doorbell_register;
2247 u32 max_access_rate;
2248 u16 min_turnaround_time;
2249 struct acpi_generic_address platform_ack_register;
2250 u64 ack_preserve_mask;
2254 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
2256 struct acpi_pcct_ext_pcc_master {
2257 struct acpi_subtable_header header;
2258 u32 platform_interrupt;
2263 struct acpi_generic_address doorbell_register;
2267 u32 max_access_rate;
2268 u32 min_turnaround_time;
2269 struct acpi_generic_address platform_ack_register;
2270 u64 ack_preserve_mask;
2273 struct acpi_generic_address cmd_complete_register;
2274 u64 cmd_complete_mask;
2275 struct acpi_generic_address cmd_update_register;
2276 u64 cmd_update_preserve_mask;
2277 u64 cmd_update_set_mask;
2278 struct acpi_generic_address error_status_register;
2279 u64 error_status_mask;
2282 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
2284 struct acpi_pcct_ext_pcc_slave {
2285 struct acpi_subtable_header header;
2286 u32 platform_interrupt;
2291 struct acpi_generic_address doorbell_register;
2295 u32 max_access_rate;
2296 u32 min_turnaround_time;
2297 struct acpi_generic_address platform_ack_register;
2298 u64 ack_preserve_mask;
2301 struct acpi_generic_address cmd_complete_register;
2302 u64 cmd_complete_mask;
2303 struct acpi_generic_address cmd_update_register;
2304 u64 cmd_update_preserve_mask;
2305 u64 cmd_update_set_mask;
2306 struct acpi_generic_address error_status_register;
2307 u64 error_status_mask;
2310 /* 5: HW Registers based Communications Subspace */
2312 struct acpi_pcct_hw_reg {
2313 struct acpi_subtable_header header;
2317 struct acpi_generic_address doorbell_register;
2318 u64 doorbell_preserve;
2320 struct acpi_generic_address cmd_complete_register;
2321 u64 cmd_complete_mask;
2322 struct acpi_generic_address error_status_register;
2323 u64 error_status_mask;
2324 u32 nominal_latency;
2325 u32 min_turnaround_time;
2328 /* Values for doorbell flags above */
2330 #define ACPI_PCCT_INTERRUPT_POLARITY (1)
2331 #define ACPI_PCCT_INTERRUPT_MODE (1<<1)
2334 * PCC memory structures (not part of the ACPI table)
2337 /* Shared Memory Region */
2339 struct acpi_pcct_shared_memory {
2345 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
2347 struct acpi_pcct_ext_pcc_shared_memory {
2354 /*******************************************************************************
2356 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
2359 ******************************************************************************/
2361 struct acpi_table_pdtt {
2362 struct acpi_table_header header; /* Common ACPI table header */
2369 * PDTT Communication Channel Identifier Structure.
2370 * The number of these structures is defined by trigger_count above,
2371 * starting at array_offset.
2373 struct acpi_pdtt_channel {
2378 /* Flags for above */
2380 #define ACPI_PDTT_RUNTIME_TRIGGER (1)
2381 #define ACPI_PDTT_WAIT_COMPLETION (1<<1)
2382 #define ACPI_PDTT_TRIGGER_ORDER (1<<2)
2384 /*******************************************************************************
2386 * PHAT - Platform Health Assessment Table (ACPI 6.4)
2389 ******************************************************************************/
2391 struct acpi_table_phat {
2392 struct acpi_table_header header; /* Common ACPI table header */
2395 /* Common header for PHAT subtables that follow main table */
2397 struct acpi_phat_header {
2403 /* Values for Type field above */
2405 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0
2406 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1
2407 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */
2410 * PHAT subtables, correspond to Type in struct acpi_phat_header
2413 /* 0: Firmware Version Data Record */
2415 struct acpi_phat_version_data {
2416 struct acpi_phat_header header;
2421 struct acpi_phat_version_element {
2427 /* 1: Firmware Health Data Record */
2429 struct acpi_phat_health_data {
2430 struct acpi_phat_header header;
2434 u32 device_specific_offset; /* Zero if no Device-specific data */
2437 /* Values for Health field above */
2439 #define ACPI_PHAT_ERRORS_FOUND 0
2440 #define ACPI_PHAT_NO_ERRORS 1
2441 #define ACPI_PHAT_UNKNOWN_ERRORS 2
2442 #define ACPI_PHAT_ADVISORY 3
2444 /*******************************************************************************
2446 * PMTT - Platform Memory Topology Table (ACPI 5.0)
2449 ******************************************************************************/
2451 struct acpi_table_pmtt {
2452 struct acpi_table_header header; /* Common ACPI table header */
2453 u32 memory_device_count;
2455 * Immediately followed by:
2456 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2460 /* Common header for PMTT subtables that follow main table */
2462 struct acpi_pmtt_header {
2468 u32 memory_device_count; /* Zero means no memory device structs follow */
2470 * Immediately followed by:
2471 * u8 type_specific_data[]
2472 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2476 /* Values for Type field above */
2478 #define ACPI_PMTT_TYPE_SOCKET 0
2479 #define ACPI_PMTT_TYPE_CONTROLLER 1
2480 #define ACPI_PMTT_TYPE_DIMM 2
2481 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */
2482 #define ACPI_PMTT_TYPE_VENDOR 0xFF
2484 /* Values for Flags field above */
2486 #define ACPI_PMTT_TOP_LEVEL 0x0001
2487 #define ACPI_PMTT_PHYSICAL 0x0002
2488 #define ACPI_PMTT_MEMORY_TYPE 0x000C
2491 * PMTT subtables, correspond to Type in struct acpi_pmtt_header
2494 /* 0: Socket Structure */
2496 struct acpi_pmtt_socket {
2497 struct acpi_pmtt_header header;
2502 * Immediately followed by:
2503 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2506 /* 1: Memory Controller subtable */
2508 struct acpi_pmtt_controller {
2509 struct acpi_pmtt_header header;
2514 * Immediately followed by:
2515 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2518 /* 2: Physical Component Identifier (DIMM) */
2520 struct acpi_pmtt_physical_component {
2521 struct acpi_pmtt_header header;
2525 /* 0xFF: Vendor Specific Data */
2527 struct acpi_pmtt_vendor_specific {
2528 struct acpi_pmtt_header header;
2532 * Immediately followed by:
2533 * u8 vendor_specific_data[];
2534 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2538 /*******************************************************************************
2540 * PPTT - Processor Properties Topology Table (ACPI 6.2)
2543 ******************************************************************************/
2545 struct acpi_table_pptt {
2546 struct acpi_table_header header; /* Common ACPI table header */
2549 /* Values for Type field above */
2551 enum acpi_pptt_type {
2552 ACPI_PPTT_TYPE_PROCESSOR = 0,
2553 ACPI_PPTT_TYPE_CACHE = 1,
2554 ACPI_PPTT_TYPE_ID = 2,
2555 ACPI_PPTT_TYPE_RESERVED = 3
2558 /* 0: Processor Hierarchy Node Structure */
2560 struct acpi_pptt_processor {
2561 struct acpi_subtable_header header;
2565 u32 acpi_processor_id;
2566 u32 number_of_priv_resources;
2571 #define ACPI_PPTT_PHYSICAL_PACKAGE (1)
2572 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
2573 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
2574 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
2575 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
2577 /* 1: Cache Type Structure */
2579 struct acpi_pptt_cache {
2580 struct acpi_subtable_header header;
2583 u32 next_level_of_cache;
2591 /* 1: Cache Type Structure for PPTT version 3 */
2593 struct acpi_pptt_cache_v1 {
2599 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
2600 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
2601 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
2602 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
2603 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
2604 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
2605 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
2606 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */
2608 /* Masks for Attributes */
2610 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
2611 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
2612 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
2614 /* Attributes describing cache */
2615 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
2616 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
2617 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
2618 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
2620 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
2621 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
2622 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
2623 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
2625 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
2626 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
2628 /* 2: ID Structure */
2630 struct acpi_pptt_id {
2631 struct acpi_subtable_header header;
2641 /*******************************************************************************
2643 * PRMT - Platform Runtime Mechanism Table
2646 ******************************************************************************/
2648 struct acpi_table_prmt {
2649 struct acpi_table_header header; /* Common ACPI table header */
2652 struct acpi_table_prmt_header {
2653 u8 platform_guid[16];
2654 u32 module_info_offset;
2655 u32 module_info_count;
2658 struct acpi_prmt_module_header {
2663 struct acpi_prmt_module_info {
2669 u16 handler_info_count;
2670 u32 handler_info_offset;
2671 u64 mmio_list_pointer;
2674 struct acpi_prmt_handler_info {
2677 u8 handler_guid[16];
2678 u64 handler_address;
2679 u64 static_data_buffer_address;
2680 u64 acpi_param_buffer_address;
2683 /*******************************************************************************
2685 * RASF - RAS Feature Table (ACPI 5.0)
2688 ******************************************************************************/
2690 struct acpi_table_rasf {
2691 struct acpi_table_header header; /* Common ACPI table header */
2695 /* RASF Platform Communication Channel Shared Memory Region */
2697 struct acpi_rasf_shared_memory {
2702 u8 capabilities[16];
2703 u8 set_capabilities[16];
2704 u16 num_parameter_blocks;
2705 u32 set_capabilities_status;
2708 /* RASF Parameter Block Structure Header */
2710 struct acpi_rasf_parameter_block {
2716 /* RASF Parameter Block Structure for PATROL_SCRUB */
2718 struct acpi_rasf_patrol_scrub_parameter {
2719 struct acpi_rasf_parameter_block header;
2720 u16 patrol_scrub_command;
2721 u64 requested_address_range[2];
2722 u64 actual_address_range[2];
2727 /* Masks for Flags and Speed fields above */
2729 #define ACPI_RASF_SCRUBBER_RUNNING 1
2730 #define ACPI_RASF_SPEED (7<<1)
2731 #define ACPI_RASF_SPEED_SLOW (0<<1)
2732 #define ACPI_RASF_SPEED_MEDIUM (4<<1)
2733 #define ACPI_RASF_SPEED_FAST (7<<1)
2735 /* Channel Commands */
2737 enum acpi_rasf_commands {
2738 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
2741 /* Platform RAS Capabilities */
2743 enum acpi_rasf_capabiliities {
2744 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
2745 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
2748 /* Patrol Scrub Commands */
2750 enum acpi_rasf_patrol_scrub_commands {
2751 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
2752 ACPI_RASF_START_PATROL_SCRUBBER = 2,
2753 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
2756 /* Channel Command flags */
2758 #define ACPI_RASF_GENERATE_SCI (1<<15)
2762 enum acpi_rasf_status {
2763 ACPI_RASF_SUCCESS = 0,
2764 ACPI_RASF_NOT_VALID = 1,
2765 ACPI_RASF_NOT_SUPPORTED = 2,
2767 ACPI_RASF_FAILED = 4,
2768 ACPI_RASF_ABORTED = 5,
2769 ACPI_RASF_INVALID_DATA = 6
2774 #define ACPI_RASF_COMMAND_COMPLETE (1)
2775 #define ACPI_RASF_SCI_DOORBELL (1<<1)
2776 #define ACPI_RASF_ERROR (1<<2)
2777 #define ACPI_RASF_STATUS (0x1F<<3)
2779 /*******************************************************************************
2781 * RAS2 - RAS2 Feature Table (ACPI 6.5)
2785 ******************************************************************************/
2787 struct acpi_table_ras2 {
2788 struct acpi_table_header header; /* Common ACPI table header */
2793 /* RAS2 Platform Communication Channel Descriptor */
2795 struct acpi_ras2_pcc_desc {
2802 /* RAS2 Platform Communication Channel Shared Memory Region */
2804 struct acpi_ras2_shared_memory {
2810 u8 set_capabilities[16];
2811 u16 num_parameter_blocks;
2812 u32 set_capabilities_status;
2815 /* RAS2 Parameter Block Structure for PATROL_SCRUB */
2817 struct acpi_ras2_parameter_block {
2823 /* RAS2 Parameter Block Structure for PATROL_SCRUB */
2825 struct acpi_ras2_patrol_scrub_parameter {
2826 struct acpi_ras2_parameter_block header;
2827 u16 patrol_scrub_command;
2828 u64 requested_address_range[2];
2829 u64 actual_address_range[2];
2831 u32 scrub_params_out;
2832 u32 scrub_params_in;
2835 /* Masks for Flags field above */
2837 #define ACPI_RAS2_SCRUBBER_RUNNING 1
2839 /* RAS2 Parameter Block Structure for LA2PA_TRANSLATION */
2841 struct acpi_ras2_la2pa_translation_parameter {
2842 struct acpi_ras2_parameter_block header;
2843 u16 addr_translation_command;
2845 u64 logical_address;
2846 u64 physical_address;
2850 /* Channel Commands */
2852 enum acpi_ras2_commands {
2853 ACPI_RAS2_EXECUTE_RAS2_COMMAND = 1
2856 /* Platform RAS2 Features */
2858 enum acpi_ras2_features {
2859 ACPI_RAS2_PATROL_SCRUB_SUPPORTED = 0,
2860 ACPI_RAS2_LA2PA_TRANSLATION = 1
2863 /* RAS2 Patrol Scrub Commands */
2865 enum acpi_ras2_patrol_scrub_commands {
2866 ACPI_RAS2_GET_PATROL_PARAMETERS = 1,
2867 ACPI_RAS2_START_PATROL_SCRUBBER = 2,
2868 ACPI_RAS2_STOP_PATROL_SCRUBBER = 3
2871 /* RAS2 LA2PA Translation Commands */
2873 enum acpi_ras2_la2_pa_translation_commands {
2874 ACPI_RAS2_GET_LA2PA_TRANSLATION = 1,
2877 /* RAS2 LA2PA Translation Status values */
2879 enum acpi_ras2_la2_pa_translation_status {
2880 ACPI_RAS2_LA2PA_TRANSLATION_SUCCESS = 0,
2881 ACPI_RAS2_LA2PA_TRANSLATION_FAIL = 1,
2884 /* Channel Command flags */
2886 #define ACPI_RAS2_GENERATE_SCI (1<<15)
2890 enum acpi_ras2_status {
2891 ACPI_RAS2_SUCCESS = 0,
2892 ACPI_RAS2_NOT_VALID = 1,
2893 ACPI_RAS2_NOT_SUPPORTED = 2,
2895 ACPI_RAS2_FAILED = 4,
2896 ACPI_RAS2_ABORTED = 5,
2897 ACPI_RAS2_INVALID_DATA = 6
2902 #define ACPI_RAS2_COMMAND_COMPLETE (1)
2903 #define ACPI_RAS2_SCI_DOORBELL (1<<1)
2904 #define ACPI_RAS2_ERROR (1<<2)
2905 #define ACPI_RAS2_STATUS (0x1F<<3)
2907 /*******************************************************************************
2909 * RGRT - Regulatory Graphics Resource Table
2912 * Conforms to "ACPI RGRT" available at:
2913 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/
2915 ******************************************************************************/
2917 struct acpi_table_rgrt {
2918 struct acpi_table_header header; /* Common ACPI table header */
2925 /* image_type values */
2927 enum acpi_rgrt_image_type {
2928 ACPI_RGRT_TYPE_RESERVED0 = 0,
2929 ACPI_RGRT_IMAGE_TYPE_PNG = 1,
2930 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
2933 /*******************************************************************************
2935 * RHCT - RISC-V Hart Capabilities Table
2938 ******************************************************************************/
2940 struct acpi_table_rhct {
2941 struct acpi_table_header header; /* Common ACPI table header */
2942 u32 flags; /* RHCT flags */
2950 #define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU (1)
2954 struct acpi_rhct_node_header {
2960 /* Values for RHCT subtable Type above */
2962 enum acpi_rhct_node_type {
2963 ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000,
2964 ACPI_RHCT_NODE_TYPE_CMO = 0x0001,
2965 ACPI_RHCT_NODE_TYPE_MMU = 0x0002,
2966 ACPI_RHCT_NODE_TYPE_RESERVED = 0x0003,
2967 ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF,
2971 * RHCT node specific subtables
2974 /* ISA string node structure */
2975 struct acpi_rhct_isa_string {
2980 struct acpi_rhct_cmo_node {
2981 u8 reserved; /* Must be zero */
2982 u8 cbom_size; /* CBOM size in powerof 2 */
2983 u8 cbop_size; /* CBOP size in powerof 2 */
2984 u8 cboz_size; /* CBOZ size in powerof 2 */
2987 struct acpi_rhct_mmu_node {
2988 u8 reserved; /* Must be zero */
2989 u8 mmu_type; /* Virtual Address Scheme */
2992 enum acpi_rhct_mmu_type {
2993 ACPI_RHCT_MMU_TYPE_SV39 = 0,
2994 ACPI_RHCT_MMU_TYPE_SV48 = 1,
2995 ACPI_RHCT_MMU_TYPE_SV57 = 2
2998 /* Hart Info node structure */
2999 struct acpi_rhct_hart_info {
3001 u32 uid; /* ACPI processor UID */
3004 /*******************************************************************************
3006 * SBST - Smart Battery Specification Table
3009 ******************************************************************************/
3011 struct acpi_table_sbst {
3012 struct acpi_table_header header; /* Common ACPI table header */
3018 /*******************************************************************************
3020 * SDEI - Software Delegated Exception Interface Descriptor Table
3022 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
3023 * May 8th, 2017. Copyright 2017 ARM Ltd.
3025 ******************************************************************************/
3027 struct acpi_table_sdei {
3028 struct acpi_table_header header; /* Common ACPI table header */
3031 /*******************************************************************************
3033 * SDEV - Secure Devices Table (ACPI 6.2)
3036 ******************************************************************************/
3038 struct acpi_table_sdev {
3039 struct acpi_table_header header; /* Common ACPI table header */
3042 struct acpi_sdev_header {
3048 /* Values for subtable type above */
3050 enum acpi_sdev_type {
3051 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
3052 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
3053 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
3056 /* Values for flags above */
3058 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
3059 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1)
3065 /* 0: Namespace Device Based Secure Device Structure */
3067 struct acpi_sdev_namespace {
3068 struct acpi_sdev_header header;
3069 u16 device_id_offset;
3070 u16 device_id_length;
3071 u16 vendor_data_offset;
3072 u16 vendor_data_length;
3075 struct acpi_sdev_secure_component {
3076 u16 secure_component_offset;
3077 u16 secure_component_length;
3081 * SDEV sub-subtables ("Components") for above
3083 struct acpi_sdev_component {
3084 struct acpi_sdev_header header;
3087 /* Values for sub-subtable type above */
3089 enum acpi_sac_type {
3090 ACPI_SDEV_TYPE_ID_COMPONENT = 0,
3091 ACPI_SDEV_TYPE_MEM_COMPONENT = 1
3094 struct acpi_sdev_id_component {
3095 struct acpi_sdev_header header;
3096 u16 hardware_id_offset;
3097 u16 hardware_id_length;
3098 u16 subsystem_id_offset;
3099 u16 subsystem_id_length;
3100 u16 hardware_revision;
3101 u8 hardware_rev_present;
3102 u8 class_code_present;
3105 u8 pci_programming_xface;
3108 struct acpi_sdev_mem_component {
3109 struct acpi_sdev_header header;
3111 u64 memory_base_address;
3115 /* 1: PCIe Endpoint Device Based Device Structure */
3117 struct acpi_sdev_pcie {
3118 struct acpi_sdev_header header;
3123 u16 vendor_data_offset;
3124 u16 vendor_data_length;
3127 /* 1a: PCIe Endpoint path entry */
3129 struct acpi_sdev_pcie_path {
3134 /*******************************************************************************
3136 * SVKL - Storage Volume Key Location Table (ACPI 6.4)
3137 * From: "Guest-Host-Communication Interface (GHCI) for Intel
3138 * Trust Domain Extensions (Intel TDX)".
3141 ******************************************************************************/
3143 struct acpi_table_svkl {
3144 struct acpi_table_header header; /* Common ACPI table header */
3148 struct acpi_svkl_key {
3155 enum acpi_svkl_type {
3156 ACPI_SVKL_TYPE_MAIN_STORAGE = 0,
3157 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */
3160 enum acpi_svkl_format {
3161 ACPI_SVKL_FORMAT_RAW_BINARY = 0,
3162 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */
3165 /*******************************************************************************
3167 * TDEL - TD-Event Log
3168 * From: "Guest-Host-Communication Interface (GHCI) for Intel
3169 * Trust Domain Extensions (Intel TDX)".
3172 ******************************************************************************/
3174 struct acpi_table_tdel {
3175 struct acpi_table_header header; /* Common ACPI table header */
3177 u64 log_area_minimum_length;
3178 u64 log_area_start_address;
3181 /* Reset to default packing */
3185 #endif /* __ACTBL2_H__ */