1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2 /******************************************************************************
4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
6 * Copyright (C) 2000 - 2021, Intel Corp.
8 *****************************************************************************/
13 /*******************************************************************************
15 * Additional ACPI Tables (2)
17 * These tables are not consumed directly by the ACPICA subsystem, but are
18 * included here to support device drivers and the AML disassembler.
20 ******************************************************************************/
23 * Values for description table header signatures for tables defined in this
24 * file. Useful because they make it more difficult to inadvertently type in
25 * the wrong signature.
27 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */
28 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
29 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
30 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
31 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
32 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
33 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
34 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
35 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
36 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
37 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
38 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */
39 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
40 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
41 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */
42 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
43 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
44 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */
45 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */
46 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */
47 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
48 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
49 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
50 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */
53 * All tables must be byte-packed to match the ACPI specification, since
54 * the tables are provided by the system BIOS.
59 * Note: C bitfields are not used for this reason:
61 * "Bitfields are great and easy to read, but unfortunately the C language
62 * does not specify the layout of bitfields in memory, which means they are
63 * essentially useless for dealing with packed data in on-disk formats or
64 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
65 * this decision was a design error in C. Ritchie could have picked an order
66 * and stuck with it." Norman Ramsey.
67 * See http://stackoverflow.com/a/1053662/41661
70 /*******************************************************************************
72 * AEST - Arm Error Source Table
74 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document
77 ******************************************************************************/
79 struct acpi_table_aest {
80 struct acpi_table_header header;
84 /* Common Subtable header - one per Node Structure (Subtable) */
86 struct acpi_aest_hdr {
90 u32 node_specific_offset;
91 u32 node_interface_offset;
92 u32 node_interrupt_offset;
93 u32 node_interrupt_count;
96 u64 error_injection_rate;
99 /* Values for Type above */
101 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0
102 #define ACPI_AEST_MEMORY_ERROR_NODE 1
103 #define ACPI_AEST_SMMU_ERROR_NODE 2
104 #define ACPI_AEST_VENDOR_ERROR_NODE 3
105 #define ACPI_AEST_GIC_ERROR_NODE 4
106 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */
109 * AEST subtables (Error nodes)
112 /* 0: Processor Error */
114 typedef struct acpi_aest_processor {
120 u64 processor_affinity;
122 } acpi_aest_processor;
124 /* Values for resource_type above, related structs below */
126 #define ACPI_AEST_CACHE_RESOURCE 0
127 #define ACPI_AEST_TLB_RESOURCE 1
128 #define ACPI_AEST_GENERIC_RESOURCE 2
129 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */
131 /* 0R: Processor Cache Resource Substructure */
133 typedef struct acpi_aest_processor_cache {
137 } acpi_aest_processor_cache;
139 /* Values for cache_type above */
141 #define ACPI_AEST_CACHE_DATA 0
142 #define ACPI_AEST_CACHE_INSTRUCTION 1
143 #define ACPI_AEST_CACHE_UNIFIED 2
144 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */
146 /* 1R: Processor TLB Resource Substructure */
148 typedef struct acpi_aest_processor_tlb {
152 } acpi_aest_processor_tlb;
154 /* 2R: Processor Generic Resource Substructure */
156 typedef struct acpi_aest_processor_generic {
159 } acpi_aest_processor_generic;
161 /* 1: Memory Error */
163 typedef struct acpi_aest_memory {
164 u32 srat_proximity_domain;
170 typedef struct acpi_aest_smmu {
171 u32 iort_node_reference;
172 u32 subcomponent_reference;
176 /* 3: Vendor Defined */
178 typedef struct acpi_aest_vendor {
181 u8 vendor_specific_data[16];
187 typedef struct acpi_aest_gic {
193 /* Values for interface_type above */
195 #define ACPI_AEST_GIC_CPU 0
196 #define ACPI_AEST_GIC_DISTRIBUTOR 1
197 #define ACPI_AEST_GIC_REDISTRIBUTOR 2
198 #define ACPI_AEST_GIC_ITS 3
199 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */
201 /* Node Interface Structure */
203 typedef struct acpi_aest_node_interface {
208 u32 error_record_index;
209 u32 error_record_count;
210 u64 error_record_implemented;
211 u64 error_status_reporting;
214 } acpi_aest_node_interface;
216 /* Values for Type field above */
218 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0
219 #define ACPI_AEST_NODE_MEMORY_MAPPED 1
220 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */
222 /* Node Interrupt Structure */
224 typedef struct acpi_aest_node_interrupt {
232 } acpi_aest_node_interrupt;
234 /* Values for Type field above */
236 #define ACPI_AEST_NODE_FAULT_HANDLING 0
237 #define ACPI_AEST_NODE_ERROR_RECOVERY 1
238 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */
240 /*******************************************************************************
242 * BDAT - BIOS Data ACPI Table
244 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5
247 ******************************************************************************/
249 struct acpi_table_bdat {
250 struct acpi_table_header header;
251 struct acpi_generic_address gas;
254 /*******************************************************************************
256 * IORT - IO Remapping Table
258 * Conforms to "IO Remapping Table System Software on ARM Platforms",
259 * Document number: ARM DEN 0049E.b, Feb 2021
261 ******************************************************************************/
263 struct acpi_table_iort {
264 struct acpi_table_header header;
273 struct acpi_iort_node {
283 /* Values for subtable Type above */
285 enum acpi_iort_node_type {
286 ACPI_IORT_NODE_ITS_GROUP = 0x00,
287 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
288 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
289 ACPI_IORT_NODE_SMMU = 0x03,
290 ACPI_IORT_NODE_SMMU_V3 = 0x04,
291 ACPI_IORT_NODE_PMCG = 0x05,
292 ACPI_IORT_NODE_RMR = 0x06,
295 struct acpi_iort_id_mapping {
296 u32 input_base; /* Lowest value in input range */
297 u32 id_count; /* Number of IDs */
298 u32 output_base; /* Lowest value in output range */
299 u32 output_reference; /* A reference to the output node */
303 /* Masks for Flags field above for IORT subtable */
305 #define ACPI_IORT_ID_SINGLE_MAPPING (1)
307 struct acpi_iort_memory_access {
314 /* Values for cache_coherency field above */
316 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
317 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
319 /* Masks for Hints field above */
321 #define ACPI_IORT_HT_TRANSIENT (1)
322 #define ACPI_IORT_HT_WRITE (1<<1)
323 #define ACPI_IORT_HT_READ (1<<2)
324 #define ACPI_IORT_HT_OVERRIDE (1<<3)
326 /* Masks for memory_flags field above */
328 #define ACPI_IORT_MF_COHERENCY (1)
329 #define ACPI_IORT_MF_ATTRIBUTES (1<<1)
332 * IORT node specific subtables
334 struct acpi_iort_its_group {
336 u32 identifiers[1]; /* GIC ITS identifier array */
339 struct acpi_iort_named_component {
341 u64 memory_properties; /* Memory access properties */
342 u8 memory_address_limit; /* Memory address size limit */
343 char device_name[1]; /* Path of namespace object */
346 /* Masks for Flags field above */
348 #define ACPI_IORT_NC_STALL_SUPPORTED (1)
349 #define ACPI_IORT_NC_PASID_BITS (31<<1)
351 struct acpi_iort_root_complex {
352 u64 memory_properties; /* Memory access properties */
354 u32 pci_segment_number;
355 u8 memory_address_limit; /* Memory address size limit */
356 u8 reserved[3]; /* Reserved, must be zero */
359 /* Masks for ats_attribute field above */
361 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */
362 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */
363 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */
365 struct acpi_iort_smmu {
366 u64 base_address; /* SMMU base address */
367 u64 span; /* Length of memory range */
370 u32 global_interrupt_offset;
371 u32 context_interrupt_count;
372 u32 context_interrupt_offset;
373 u32 pmu_interrupt_count;
374 u32 pmu_interrupt_offset;
375 u64 interrupts[1]; /* Interrupt array */
378 /* Values for Model field above */
380 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
381 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
382 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
383 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
384 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
385 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */
387 /* Masks for Flags field above */
389 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
390 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
392 /* Global interrupt format */
394 struct acpi_iort_smmu_gsi {
398 u32 nsg_cfg_irpt_flags;
401 struct acpi_iort_smmu_v3 {
402 u64 base_address; /* SMMUv3 base address */
412 u32 id_mapping_index;
415 /* Values for Model field above */
417 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
418 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */
419 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
421 /* Masks for Flags field above */
423 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
424 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
425 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
427 struct acpi_iort_pmcg {
428 u64 page0_base_address;
431 u64 page1_base_address;
434 struct acpi_iort_rmr {
440 struct acpi_iort_rmr_desc {
446 /*******************************************************************************
448 * IVRS - I/O Virtualization Reporting Structure
451 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
452 * Revision 1.26, February 2009.
454 ******************************************************************************/
456 struct acpi_table_ivrs {
457 struct acpi_table_header header; /* Common ACPI table header */
458 u32 info; /* Common virtualization info */
462 /* Values for Info field above */
464 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
465 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
466 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
468 /* IVRS subtable header */
470 struct acpi_ivrs_header {
471 u8 type; /* Subtable type */
473 u16 length; /* Subtable length */
474 u16 device_id; /* ID of IOMMU */
477 /* Values for subtable Type above */
479 enum acpi_ivrs_type {
480 ACPI_IVRS_TYPE_HARDWARE1 = 0x10,
481 ACPI_IVRS_TYPE_HARDWARE2 = 0x11,
482 ACPI_IVRS_TYPE_HARDWARE3 = 0x40,
483 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
484 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
485 ACPI_IVRS_TYPE_MEMORY3 = 0x22
488 /* Masks for Flags field above for IVHD subtable */
490 #define ACPI_IVHD_TT_ENABLE (1)
491 #define ACPI_IVHD_PASS_PW (1<<1)
492 #define ACPI_IVHD_RES_PASS_PW (1<<2)
493 #define ACPI_IVHD_ISOC (1<<3)
494 #define ACPI_IVHD_IOTLB (1<<4)
496 /* Masks for Flags field above for IVMD subtable */
498 #define ACPI_IVMD_UNITY (1)
499 #define ACPI_IVMD_READ (1<<1)
500 #define ACPI_IVMD_WRITE (1<<2)
501 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
504 * IVRS subtables, correspond to Type in struct acpi_ivrs_header
507 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
509 struct acpi_ivrs_hardware_10 {
510 struct acpi_ivrs_header header;
511 u16 capability_offset; /* Offset for IOMMU control fields */
512 u64 base_address; /* IOMMU control registers */
513 u16 pci_segment_group;
514 u16 info; /* MSI number and unit ID */
515 u32 feature_reporting;
518 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */
520 struct acpi_ivrs_hardware_11 {
521 struct acpi_ivrs_header header;
522 u16 capability_offset; /* Offset for IOMMU control fields */
523 u64 base_address; /* IOMMU control registers */
524 u16 pci_segment_group;
525 u16 info; /* MSI number and unit ID */
527 u64 efr_register_image;
531 /* Masks for Info field above */
533 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
534 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */
537 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
538 * Upper two bits of the Type field are the (encoded) length of the structure.
539 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
540 * are reserved for future use but not defined.
542 struct acpi_ivrs_de_header {
548 /* Length of device entry is in the top two bits of Type field above */
550 #define ACPI_IVHD_ENTRY_LENGTH 0xC0
552 /* Values for device entry Type field above */
554 enum acpi_ivrs_device_entry_type {
555 /* 4-byte device entries, all use struct acpi_ivrs_device4 */
557 ACPI_IVRS_TYPE_PAD4 = 0,
558 ACPI_IVRS_TYPE_ALL = 1,
559 ACPI_IVRS_TYPE_SELECT = 2,
560 ACPI_IVRS_TYPE_START = 3,
561 ACPI_IVRS_TYPE_END = 4,
563 /* 8-byte device entries */
565 ACPI_IVRS_TYPE_PAD8 = 64,
566 ACPI_IVRS_TYPE_NOT_USED = 65,
567 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */
568 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */
569 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */
570 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */
571 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */
573 /* Variable-length device entries */
575 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */
578 /* Values for Data field above */
580 #define ACPI_IVHD_INIT_PASS (1)
581 #define ACPI_IVHD_EINT_PASS (1<<1)
582 #define ACPI_IVHD_NMI_PASS (1<<2)
583 #define ACPI_IVHD_SYSTEM_MGMT (3<<4)
584 #define ACPI_IVHD_LINT0_PASS (1<<6)
585 #define ACPI_IVHD_LINT1_PASS (1<<7)
587 /* Types 0-4: 4-byte device entry */
589 struct acpi_ivrs_device4 {
590 struct acpi_ivrs_de_header header;
593 /* Types 66-67: 8-byte device entry */
595 struct acpi_ivrs_device8a {
596 struct acpi_ivrs_de_header header;
602 /* Types 70-71: 8-byte device entry */
604 struct acpi_ivrs_device8b {
605 struct acpi_ivrs_de_header header;
609 /* Values for extended_data above */
611 #define ACPI_IVHD_ATS_DISABLED (1<<31)
613 /* Type 72: 8-byte device entry */
615 struct acpi_ivrs_device8c {
616 struct acpi_ivrs_de_header header;
622 /* Values for Variety field above */
624 #define ACPI_IVHD_IOAPIC 1
625 #define ACPI_IVHD_HPET 2
627 /* Type 240: variable-length device entry */
629 struct acpi_ivrs_device_hid {
630 struct acpi_ivrs_de_header header;
637 /* Values for uid_type above */
639 #define ACPI_IVRS_UID_NOT_PRESENT 0
640 #define ACPI_IVRS_UID_IS_INTEGER 1
641 #define ACPI_IVRS_UID_IS_STRING 2
643 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
645 struct acpi_ivrs_memory {
646 struct acpi_ivrs_header header;
653 /*******************************************************************************
655 * LPIT - Low Power Idle Table
657 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
659 ******************************************************************************/
661 struct acpi_table_lpit {
662 struct acpi_table_header header; /* Common ACPI table header */
665 /* LPIT subtable header */
667 struct acpi_lpit_header {
668 u32 type; /* Subtable type */
669 u32 length; /* Subtable length */
675 /* Values for subtable Type above */
677 enum acpi_lpit_type {
678 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
679 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
682 /* Masks for Flags field above */
684 #define ACPI_LPIT_STATE_DISABLED (1)
685 #define ACPI_LPIT_NO_COUNTER (1<<1)
688 * LPIT subtables, correspond to Type in struct acpi_lpit_header
691 /* 0x00: Native C-state instruction based LPI structure */
693 struct acpi_lpit_native {
694 struct acpi_lpit_header header;
695 struct acpi_generic_address entry_trigger;
698 struct acpi_generic_address residency_counter;
699 u64 counter_frequency;
702 /*******************************************************************************
704 * MADT - Multiple APIC Description Table
707 ******************************************************************************/
709 struct acpi_table_madt {
710 struct acpi_table_header header; /* Common ACPI table header */
711 u32 address; /* Physical address of local APIC */
715 /* Masks for Flags field above */
717 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
719 /* Values for PCATCompat flag */
721 #define ACPI_MADT_DUAL_PIC 1
722 #define ACPI_MADT_MULTIPLE_APIC 0
724 /* Values for MADT subtable type in struct acpi_subtable_header */
726 enum acpi_madt_type {
727 ACPI_MADT_TYPE_LOCAL_APIC = 0,
728 ACPI_MADT_TYPE_IO_APIC = 1,
729 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
730 ACPI_MADT_TYPE_NMI_SOURCE = 3,
731 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
732 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
733 ACPI_MADT_TYPE_IO_SAPIC = 6,
734 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
735 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
736 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
737 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
738 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
739 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
740 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
741 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
742 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
743 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16,
744 ACPI_MADT_TYPE_RESERVED = 17 /* 17 and greater are reserved */
748 * MADT Subtables, correspond to Type in struct acpi_subtable_header
751 /* 0: Processor Local APIC */
753 struct acpi_madt_local_apic {
754 struct acpi_subtable_header header;
755 u8 processor_id; /* ACPI processor id */
756 u8 id; /* Processor's local APIC id */
762 struct acpi_madt_io_apic {
763 struct acpi_subtable_header header;
764 u8 id; /* I/O APIC ID */
765 u8 reserved; /* reserved - must be zero */
766 u32 address; /* APIC physical address */
767 u32 global_irq_base; /* Global system interrupt where INTI lines start */
770 /* 2: Interrupt Override */
772 struct acpi_madt_interrupt_override {
773 struct acpi_subtable_header header;
774 u8 bus; /* 0 - ISA */
775 u8 source_irq; /* Interrupt source (IRQ) */
776 u32 global_irq; /* Global system interrupt */
782 struct acpi_madt_nmi_source {
783 struct acpi_subtable_header header;
785 u32 global_irq; /* Global system interrupt */
788 /* 4: Local APIC NMI */
790 struct acpi_madt_local_apic_nmi {
791 struct acpi_subtable_header header;
792 u8 processor_id; /* ACPI processor id */
794 u8 lint; /* LINTn to which NMI is connected */
797 /* 5: Address Override */
799 struct acpi_madt_local_apic_override {
800 struct acpi_subtable_header header;
801 u16 reserved; /* Reserved, must be zero */
802 u64 address; /* APIC physical address */
807 struct acpi_madt_io_sapic {
808 struct acpi_subtable_header header;
809 u8 id; /* I/O SAPIC ID */
810 u8 reserved; /* Reserved, must be zero */
811 u32 global_irq_base; /* Global interrupt for SAPIC start */
812 u64 address; /* SAPIC physical address */
817 struct acpi_madt_local_sapic {
818 struct acpi_subtable_header header;
819 u8 processor_id; /* ACPI processor id */
820 u8 id; /* SAPIC ID */
821 u8 eid; /* SAPIC EID */
822 u8 reserved[3]; /* Reserved, must be zero */
824 u32 uid; /* Numeric UID - ACPI 3.0 */
825 char uid_string[1]; /* String UID - ACPI 3.0 */
828 /* 8: Platform Interrupt Source */
830 struct acpi_madt_interrupt_source {
831 struct acpi_subtable_header header;
833 u8 type; /* 1=PMI, 2=INIT, 3=corrected */
834 u8 id; /* Processor ID */
835 u8 eid; /* Processor EID */
836 u8 io_sapic_vector; /* Vector value for PMI interrupts */
837 u32 global_irq; /* Global system interrupt */
838 u32 flags; /* Interrupt Source Flags */
841 /* Masks for Flags field above */
843 #define ACPI_MADT_CPEI_OVERRIDE (1)
845 /* 9: Processor Local X2APIC (ACPI 4.0) */
847 struct acpi_madt_local_x2apic {
848 struct acpi_subtable_header header;
849 u16 reserved; /* reserved - must be zero */
850 u32 local_apic_id; /* Processor x2APIC ID */
852 u32 uid; /* ACPI processor UID */
855 /* 10: Local X2APIC NMI (ACPI 4.0) */
857 struct acpi_madt_local_x2apic_nmi {
858 struct acpi_subtable_header header;
860 u32 uid; /* ACPI processor UID */
861 u8 lint; /* LINTn to which NMI is connected */
862 u8 reserved[3]; /* reserved - must be zero */
865 /* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */
867 struct acpi_madt_generic_interrupt {
868 struct acpi_subtable_header header;
869 u16 reserved; /* reserved - must be zero */
870 u32 cpu_interface_number;
874 u32 performance_interrupt;
877 u64 gicv_base_address;
878 u64 gich_base_address;
880 u64 gicr_base_address;
884 u16 spe_interrupt; /* ACPI 6.3 */
887 /* Masks for Flags field above */
889 /* ACPI_MADT_ENABLED (1) Processor is usable if set */
890 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
891 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
893 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
895 struct acpi_madt_generic_distributor {
896 struct acpi_subtable_header header;
897 u16 reserved; /* reserved - must be zero */
902 u8 reserved2[3]; /* reserved - must be zero */
905 /* Values for Version field above */
907 enum acpi_madt_gic_version {
908 ACPI_MADT_GIC_VERSION_NONE = 0,
909 ACPI_MADT_GIC_VERSION_V1 = 1,
910 ACPI_MADT_GIC_VERSION_V2 = 2,
911 ACPI_MADT_GIC_VERSION_V3 = 3,
912 ACPI_MADT_GIC_VERSION_V4 = 4,
913 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
916 /* 13: Generic MSI Frame (ACPI 5.1) */
918 struct acpi_madt_generic_msi_frame {
919 struct acpi_subtable_header header;
920 u16 reserved; /* reserved - must be zero */
928 /* Masks for Flags field above */
930 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
932 /* 14: Generic Redistributor (ACPI 5.1) */
934 struct acpi_madt_generic_redistributor {
935 struct acpi_subtable_header header;
936 u16 reserved; /* reserved - must be zero */
941 /* 15: Generic Translator (ACPI 6.0) */
943 struct acpi_madt_generic_translator {
944 struct acpi_subtable_header header;
945 u16 reserved; /* reserved - must be zero */
951 /* 16: Multiprocessor wakeup (ACPI 6.4) */
953 struct acpi_madt_multiproc_wakeup {
954 struct acpi_subtable_header header;
956 u32 reserved; /* reserved - must be zero */
960 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032
961 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048
963 struct acpi_madt_multiproc_wakeup_mailbox {
965 u16 reserved; /* reserved - must be zero */
968 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */
969 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */
972 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1
975 * Common flags fields for MADT subtables
978 /* MADT Local APIC flags */
980 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
981 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */
983 /* MADT MPS INTI flags (inti_flags) */
985 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
986 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
988 /* Values for MPS INTI flags */
990 #define ACPI_MADT_POLARITY_CONFORMS 0
991 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
992 #define ACPI_MADT_POLARITY_RESERVED 2
993 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3
995 #define ACPI_MADT_TRIGGER_CONFORMS (0)
996 #define ACPI_MADT_TRIGGER_EDGE (1<<2)
997 #define ACPI_MADT_TRIGGER_RESERVED (2<<2)
998 #define ACPI_MADT_TRIGGER_LEVEL (3<<2)
1000 /*******************************************************************************
1002 * MCFG - PCI Memory Mapped Configuration table and subtable
1005 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
1007 ******************************************************************************/
1009 struct acpi_table_mcfg {
1010 struct acpi_table_header header; /* Common ACPI table header */
1016 struct acpi_mcfg_allocation {
1017 u64 address; /* Base address, processor-relative */
1018 u16 pci_segment; /* PCI segment group number */
1019 u8 start_bus_number; /* Starting PCI Bus number */
1020 u8 end_bus_number; /* Final PCI Bus number */
1024 /*******************************************************************************
1026 * MCHI - Management Controller Host Interface Table
1029 * Conforms to "Management Component Transport Protocol (MCTP) Host
1030 * Interface Specification", Revision 1.0.0a, October 13, 2009
1032 ******************************************************************************/
1034 struct acpi_table_mchi {
1035 struct acpi_table_header header; /* Common ACPI table header */
1042 u32 global_interrupt;
1043 struct acpi_generic_address control_register;
1050 /*******************************************************************************
1052 * MPST - Memory Power State Table (ACPI 5.0)
1055 ******************************************************************************/
1057 #define ACPI_MPST_CHANNEL_INFO \
1060 u16 power_node_count; \
1065 struct acpi_table_mpst {
1066 struct acpi_table_header header; /* Common ACPI table header */
1067 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1070 /* Memory Platform Communication Channel Info */
1072 struct acpi_mpst_channel {
1073 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1076 /* Memory Power Node Structure */
1078 struct acpi_mpst_power_node {
1085 u32 num_power_states;
1086 u32 num_physical_components;
1089 /* Values for Flags field above */
1091 #define ACPI_MPST_ENABLED 1
1092 #define ACPI_MPST_POWER_MANAGED 2
1093 #define ACPI_MPST_HOT_PLUG_CAPABLE 4
1095 /* Memory Power State Structure (follows POWER_NODE above) */
1097 struct acpi_mpst_power_state {
1102 /* Physical Component ID Structure (follows POWER_STATE above) */
1104 struct acpi_mpst_component {
1108 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
1110 struct acpi_mpst_data_hdr {
1111 u16 characteristics_count;
1115 struct acpi_mpst_power_data {
1125 /* Values for Flags field above */
1127 #define ACPI_MPST_PRESERVE 1
1128 #define ACPI_MPST_AUTOENTRY 2
1129 #define ACPI_MPST_AUTOEXIT 4
1131 /* Shared Memory Region (not part of an ACPI table) */
1133 struct acpi_mpst_shared {
1137 u32 command_register;
1138 u32 status_register;
1141 u64 energy_consumed;
1145 /*******************************************************************************
1147 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
1150 ******************************************************************************/
1152 struct acpi_table_msct {
1153 struct acpi_table_header header; /* Common ACPI table header */
1154 u32 proximity_offset; /* Location of proximity info struct(s) */
1155 u32 max_proximity_domains; /* Max number of proximity domains */
1156 u32 max_clock_domains; /* Max number of clock domains */
1157 u64 max_address; /* Max physical address in system */
1160 /* subtable - Maximum Proximity Domain Information. Version 1 */
1162 struct acpi_msct_proximity {
1165 u32 range_start; /* Start of domain range */
1166 u32 range_end; /* End of domain range */
1167 u32 processor_capacity;
1168 u64 memory_capacity; /* In bytes */
1171 /*******************************************************************************
1173 * MSDM - Microsoft Data Management table
1175 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
1176 * November 29, 2011. Copyright 2011 Microsoft
1178 ******************************************************************************/
1180 /* Basic MSDM table is only the common ACPI header */
1182 struct acpi_table_msdm {
1183 struct acpi_table_header header; /* Common ACPI table header */
1186 /*******************************************************************************
1188 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
1191 ******************************************************************************/
1193 struct acpi_table_nfit {
1194 struct acpi_table_header header; /* Common ACPI table header */
1195 u32 reserved; /* Reserved, must be zero */
1198 /* Subtable header for NFIT */
1200 struct acpi_nfit_header {
1205 /* Values for subtable type in struct acpi_nfit_header */
1207 enum acpi_nfit_type {
1208 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
1209 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
1210 ACPI_NFIT_TYPE_INTERLEAVE = 2,
1211 ACPI_NFIT_TYPE_SMBIOS = 3,
1212 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
1213 ACPI_NFIT_TYPE_DATA_REGION = 5,
1214 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
1215 ACPI_NFIT_TYPE_CAPABILITIES = 7,
1216 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
1223 /* 0: System Physical Address Range Structure */
1225 struct acpi_nfit_system_address {
1226 struct acpi_nfit_header header;
1229 u32 reserved; /* Reserved, must be zero */
1230 u32 proximity_domain;
1235 u64 location_cookie; /* ACPI 6.4 */
1240 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
1241 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
1242 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */
1244 /* Range Type GUIDs appear in the include/acuuid.h file */
1246 /* 1: Memory Device to System Address Range Map Structure */
1248 struct acpi_nfit_memory_map {
1249 struct acpi_nfit_header header;
1258 u16 interleave_index;
1259 u16 interleave_ways;
1261 u16 reserved; /* Reserved, must be zero */
1266 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
1267 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
1268 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
1269 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
1270 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
1271 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
1272 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
1274 /* 2: Interleave Structure */
1276 struct acpi_nfit_interleave {
1277 struct acpi_nfit_header header;
1278 u16 interleave_index;
1279 u16 reserved; /* Reserved, must be zero */
1282 u32 line_offset[1]; /* Variable length */
1285 /* 3: SMBIOS Management Information Structure */
1287 struct acpi_nfit_smbios {
1288 struct acpi_nfit_header header;
1289 u32 reserved; /* Reserved, must be zero */
1290 u8 data[1]; /* Variable length */
1293 /* 4: NVDIMM Control Region Structure */
1295 struct acpi_nfit_control_region {
1296 struct acpi_nfit_header header;
1301 u16 subsystem_vendor_id;
1302 u16 subsystem_device_id;
1303 u16 subsystem_revision_id;
1305 u8 manufacturing_location;
1306 u16 manufacturing_date;
1307 u8 reserved[2]; /* Reserved, must be zero */
1317 u8 reserved1[6]; /* Reserved, must be zero */
1322 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
1324 /* valid_fields bits */
1326 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
1328 /* 5: NVDIMM Block Data Window Region Structure */
1330 struct acpi_nfit_data_region {
1331 struct acpi_nfit_header header;
1340 /* 6: Flush Hint Address Structure */
1342 struct acpi_nfit_flush_address {
1343 struct acpi_nfit_header header;
1346 u8 reserved[6]; /* Reserved, must be zero */
1347 u64 hint_address[1]; /* Variable length */
1350 /* 7: Platform Capabilities Structure */
1352 struct acpi_nfit_capabilities {
1353 struct acpi_nfit_header header;
1354 u8 highest_capability;
1355 u8 reserved[3]; /* Reserved, must be zero */
1360 /* Capabilities Flags */
1362 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
1363 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
1364 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
1367 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
1369 struct nfit_device_handle {
1373 /* Device handle construction and extraction macros */
1375 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
1376 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
1377 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
1378 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
1379 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
1381 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
1382 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
1383 #define ACPI_NFIT_MEMORY_ID_OFFSET 8
1384 #define ACPI_NFIT_SOCKET_ID_OFFSET 12
1385 #define ACPI_NFIT_NODE_ID_OFFSET 16
1387 /* Macro to construct a NFIT/NVDIMM device handle */
1389 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
1391 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
1392 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
1393 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
1394 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
1396 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */
1398 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
1399 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
1401 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
1402 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
1404 #define ACPI_NFIT_GET_MEMORY_ID(handle) \
1405 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
1407 #define ACPI_NFIT_GET_SOCKET_ID(handle) \
1408 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
1410 #define ACPI_NFIT_GET_NODE_ID(handle) \
1411 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
1413 /*******************************************************************************
1415 * NHLT - Non HD Audio Link Table
1417 * Conforms to: Intel Smart Sound Technology NHLT Specification
1418 * Version 0.8.1, January 2020.
1420 ******************************************************************************/
1424 struct acpi_table_nhlt {
1425 struct acpi_table_header header; /* Common ACPI table header */
1429 struct acpi_nhlt_endpoint {
1430 u32 descriptor_length;
1442 /* Types for link_type field above */
1444 #define ACPI_NHLT_RESERVED_HD_AUDIO 0
1445 #define ACPI_NHLT_RESERVED_DSP 1
1446 #define ACPI_NHLT_PDM 2
1447 #define ACPI_NHLT_SSP 3
1448 #define ACPI_NHLT_RESERVED_SLIMBUS 4
1449 #define ACPI_NHLT_RESERVED_SOUNDWIRE 5
1450 #define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */
1452 /* All other values above are reserved */
1454 /* Values for device_id field above */
1456 #define ACPI_NHLT_PDM_DMIC 0xAE20
1457 #define ACPI_NHLT_BT_SIDEBAND 0xAE30
1458 #define ACPI_NHLT_I2S_TDM_CODECS 0xAE23
1460 /* Values for device_type field above */
1464 #define ACPI_NHLT_LINK_BT_SIDEBAND 0
1465 #define ACPI_NHLT_LINK_FM 1
1466 #define ACPI_NHLT_LINK_MODEM 2
1468 #define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4
1472 #define ACPI_NHLT_PDM_ON_CAVS_1P8 0
1473 #define ACPI_NHLT_PDM_ON_CAVS_1P5 1
1475 /* Values for Direction field above */
1477 #define ACPI_NHLT_DIR_RENDER 0
1478 #define ACPI_NHLT_DIR_CAPTURE 1
1479 #define ACPI_NHLT_DIR_RENDER_LOOPBACK 2
1480 #define ACPI_NHLT_DIR_RENDER_FEEDBACK 3
1481 #define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */
1483 struct acpi_nhlt_device_specific_config {
1484 u32 capabilities_size;
1489 struct acpi_nhlt_device_specific_config_a {
1490 u32 capabilities_size;
1496 /* Values for Config Type above */
1498 #define ACPI_NHLT_TYPE_MIC_ARRAY 0x01
1499 #define ACPI_NHLT_TYPE_GENERIC 0x00
1501 /* Mask for Extension field of array_type */
1503 #define ACPI_NHLT_ARRAY_TYPE_MASK 0x10
1505 struct acpi_nhlt_device_specific_config_b {
1506 u32 capabilities_size;
1509 struct acpi_nhlt_device_specific_config_c {
1510 u32 capabilities_size;
1514 struct acpi_nhlt_wave_extensible {
1517 u32 samples_per_sec;
1518 u32 avg_bytes_per_sec;
1520 u16 bits_per_sample;
1521 u16 extra_format_size;
1522 u16 valid_bits_per_sample;
1524 u8 sub_format_guid[16];
1527 /* Values for channel_mask above */
1529 #define ACPI_NHLT_SPKR_FRONT_LEFT 0x1
1530 #define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2
1531 #define ACPI_NHLT_SPKR_FRONT_CENTER 0x4
1532 #define ACPI_NHLT_SPKR_LOW_FREQ 0x8
1533 #define ACPI_NHLT_SPKR_BACK_LEFT 0x10
1534 #define ACPI_NHLT_SPKR_BACK_RIGHT 0x20
1535 #define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40
1536 #define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80
1537 #define ACPI_NHLT_SPKR_BACK_CENTER 0x100
1538 #define ACPI_NHLT_SPKR_SIDE_LEFT 0x200
1539 #define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400
1540 #define ACPI_NHLT_SPKR_TOP_CENTER 0x800
1541 #define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000
1542 #define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000
1543 #define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000
1544 #define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000
1545 #define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000
1546 #define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000
1548 struct acpi_nhlt_format_config {
1549 struct acpi_nhlt_wave_extensible format;
1550 u32 capability_size;
1554 struct acpi_nhlt_formats_config {
1558 struct acpi_nhlt_device_specific_hdr {
1563 /* Types for config_type above */
1565 #define ACPI_NHLT_GENERIC 0
1566 #define ACPI_NHLT_MIC 1
1567 #define ACPI_NHLT_RENDER 3
1569 struct acpi_nhlt_mic_device_specific_config {
1570 struct acpi_nhlt_device_specific_hdr device_config;
1574 /* Values for array_type_ext above */
1576 #define SMALL_LINEAR_2ELEMENT 0x0A
1577 #define BIG_LINEAR_2ELEMENT 0x0B
1578 #define FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C
1579 #define PLANAR_LSHAPED_4ELEMENT 0x0D
1580 #define SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E
1581 #define VENDOR_DEFINED 0x0F
1582 #define ARRAY_TYPE_MASK 0x0F
1583 #define ARRAY_TYPE_EXT_MASK 0x10
1585 #define NO_EXTENSION 0x0
1586 #define MIC_SNR_SENSITIVITY_EXT 0x1
1588 struct acpi_nhlt_vendor_mic_config {
1591 u16 speaker_position_distance; // mm
1592 u16 horizontal_offset; // mm
1593 u16 vertical_offset; // mm
1594 u8 frequency_low_band; // 5*hz
1595 u8 frequency_high_band; // 500*hz
1596 u16 direction_angle; // -180 - + 180
1597 u16 elevation_angle; // -180 - + 180
1598 u16 work_vertical_angle_begin; // -180 - + 180 with 2 deg step
1599 u16 work_vertical_angle_end; // -180 - + 180 with 2 deg step
1600 u16 work_horizontal_angle_begin; // -180 - + 180 with 2 deg step
1601 u16 work_horizontal_angle_end; // -180 - + 180 with 2 deg step
1604 /* Values for Type field above */
1606 #define MIC_OMNIDIRECTIONAL 0
1607 #define MIC_SUBCARDIOID 1
1608 #define MIC_CARDIOID 2
1609 #define MIC_SUPER_CARDIOID 3
1610 #define MIC_HYPER_CARDIOID 4
1611 #define MIC_8_SHAPED 5
1612 #define MIC_VENDOR_DEFINED 7
1614 /* Values for Panel field above */
1617 #define MIC_BOTTOM 1
1623 struct acpi_nhlt_vendor_mic_device_specific_config {
1624 struct acpi_nhlt_mic_device_specific_config mic_array_device_config;
1625 u8 number_of_microphones;
1626 struct acpi_nhlt_vendor_mic_config mic_config[]; // indexed by number_of_microphones
1629 /* Microphone SNR and Sensitivity extension */
1631 struct acpi_nhlt_mic_snr_sensitivity_extension {
1636 struct acpi_nhlt_render_feedback_device_specific_config {
1637 struct acpi_nhlt_device_specific_config device_config;
1638 u8 feedback_virtual_slot; // render slot in case of capture
1639 u16 feedback_channels; // informative only
1640 u16 feedback_valid_bits_per_sample;
1643 /* Linux-specific structures */
1645 struct acpi_nhlt_linux_specific_count {
1649 struct acpi_nhlt_linux_specific_data {
1651 u8 device_instance_id;
1656 struct acpi_nhlt_table_terminator {
1657 u32 terminator_value;
1658 u32 terminator_signature;
1661 /*******************************************************************************
1663 * PCCT - Platform Communications Channel Table (ACPI 5.0)
1664 * Version 2 (ACPI 6.2)
1666 ******************************************************************************/
1668 struct acpi_table_pcct {
1669 struct acpi_table_header header; /* Common ACPI table header */
1674 /* Values for Flags field above */
1676 #define ACPI_PCCT_DOORBELL 1
1678 /* Values for subtable type in struct acpi_subtable_header */
1680 enum acpi_pcct_type {
1681 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
1682 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
1683 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
1684 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
1685 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
1686 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */
1687 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */
1691 * PCCT Subtables, correspond to Type in struct acpi_subtable_header
1694 /* 0: Generic Communications Subspace */
1696 struct acpi_pcct_subspace {
1697 struct acpi_subtable_header header;
1701 struct acpi_generic_address doorbell_register;
1705 u32 max_access_rate;
1706 u16 min_turnaround_time;
1709 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */
1711 struct acpi_pcct_hw_reduced {
1712 struct acpi_subtable_header header;
1713 u32 platform_interrupt;
1718 struct acpi_generic_address doorbell_register;
1722 u32 max_access_rate;
1723 u16 min_turnaround_time;
1726 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
1728 struct acpi_pcct_hw_reduced_type2 {
1729 struct acpi_subtable_header header;
1730 u32 platform_interrupt;
1735 struct acpi_generic_address doorbell_register;
1739 u32 max_access_rate;
1740 u16 min_turnaround_time;
1741 struct acpi_generic_address platform_ack_register;
1742 u64 ack_preserve_mask;
1746 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
1748 struct acpi_pcct_ext_pcc_master {
1749 struct acpi_subtable_header header;
1750 u32 platform_interrupt;
1755 struct acpi_generic_address doorbell_register;
1759 u32 max_access_rate;
1760 u32 min_turnaround_time;
1761 struct acpi_generic_address platform_ack_register;
1762 u64 ack_preserve_mask;
1765 struct acpi_generic_address cmd_complete_register;
1766 u64 cmd_complete_mask;
1767 struct acpi_generic_address cmd_update_register;
1768 u64 cmd_update_preserve_mask;
1769 u64 cmd_update_set_mask;
1770 struct acpi_generic_address error_status_register;
1771 u64 error_status_mask;
1774 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
1776 struct acpi_pcct_ext_pcc_slave {
1777 struct acpi_subtable_header header;
1778 u32 platform_interrupt;
1783 struct acpi_generic_address doorbell_register;
1787 u32 max_access_rate;
1788 u32 min_turnaround_time;
1789 struct acpi_generic_address platform_ack_register;
1790 u64 ack_preserve_mask;
1793 struct acpi_generic_address cmd_complete_register;
1794 u64 cmd_complete_mask;
1795 struct acpi_generic_address cmd_update_register;
1796 u64 cmd_update_preserve_mask;
1797 u64 cmd_update_set_mask;
1798 struct acpi_generic_address error_status_register;
1799 u64 error_status_mask;
1802 /* 5: HW Registers based Communications Subspace */
1804 struct acpi_pcct_hw_reg {
1805 struct acpi_subtable_header header;
1809 struct acpi_generic_address doorbell_register;
1810 u64 doorbell_preserve;
1812 struct acpi_generic_address cmd_complete_register;
1813 u64 cmd_complete_mask;
1814 struct acpi_generic_address error_status_register;
1815 u64 error_status_mask;
1816 u32 nominal_latency;
1817 u32 min_turnaround_time;
1820 /* Values for doorbell flags above */
1822 #define ACPI_PCCT_INTERRUPT_POLARITY (1)
1823 #define ACPI_PCCT_INTERRUPT_MODE (1<<1)
1826 * PCC memory structures (not part of the ACPI table)
1829 /* Shared Memory Region */
1831 struct acpi_pcct_shared_memory {
1837 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
1839 struct acpi_pcct_ext_pcc_shared_memory {
1846 /*******************************************************************************
1848 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
1851 ******************************************************************************/
1853 struct acpi_table_pdtt {
1854 struct acpi_table_header header; /* Common ACPI table header */
1861 * PDTT Communication Channel Identifier Structure.
1862 * The number of these structures is defined by trigger_count above,
1863 * starting at array_offset.
1865 struct acpi_pdtt_channel {
1870 /* Flags for above */
1872 #define ACPI_PDTT_RUNTIME_TRIGGER (1)
1873 #define ACPI_PDTT_WAIT_COMPLETION (1<<1)
1874 #define ACPI_PDTT_TRIGGER_ORDER (1<<2)
1876 /*******************************************************************************
1878 * PHAT - Platform Health Assessment Table (ACPI 6.4)
1881 ******************************************************************************/
1883 struct acpi_table_phat {
1884 struct acpi_table_header header; /* Common ACPI table header */
1887 /* Common header for PHAT subtables that follow main table */
1889 struct acpi_phat_header {
1895 /* Values for Type field above */
1897 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0
1898 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1
1899 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */
1902 * PHAT subtables, correspond to Type in struct acpi_phat_header
1905 /* 0: Firmware Version Data Record */
1907 struct acpi_phat_version_data {
1908 struct acpi_phat_header header;
1913 struct acpi_phat_version_element {
1919 /* 1: Firmware Health Data Record */
1921 struct acpi_phat_health_data {
1922 struct acpi_phat_header header;
1926 u32 device_specific_offset; /* Zero if no Device-specific data */
1929 /* Values for Health field above */
1931 #define ACPI_PHAT_ERRORS_FOUND 0
1932 #define ACPI_PHAT_NO_ERRORS 1
1933 #define ACPI_PHAT_UNKNOWN_ERRORS 2
1934 #define ACPI_PHAT_ADVISORY 3
1936 /*******************************************************************************
1938 * PMTT - Platform Memory Topology Table (ACPI 5.0)
1941 ******************************************************************************/
1943 struct acpi_table_pmtt {
1944 struct acpi_table_header header; /* Common ACPI table header */
1945 u32 memory_device_count;
1947 * Immediately followed by:
1948 * MEMORY_DEVICE memory_device_struct[memory_device_count];
1952 /* Common header for PMTT subtables that follow main table */
1954 struct acpi_pmtt_header {
1960 u32 memory_device_count; /* Zero means no memory device structs follow */
1962 * Immediately followed by:
1963 * u8 type_specific_data[]
1964 * MEMORY_DEVICE memory_device_struct[memory_device_count];
1968 /* Values for Type field above */
1970 #define ACPI_PMTT_TYPE_SOCKET 0
1971 #define ACPI_PMTT_TYPE_CONTROLLER 1
1972 #define ACPI_PMTT_TYPE_DIMM 2
1973 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */
1974 #define ACPI_PMTT_TYPE_VENDOR 0xFF
1976 /* Values for Flags field above */
1978 #define ACPI_PMTT_TOP_LEVEL 0x0001
1979 #define ACPI_PMTT_PHYSICAL 0x0002
1980 #define ACPI_PMTT_MEMORY_TYPE 0x000C
1983 * PMTT subtables, correspond to Type in struct acpi_pmtt_header
1986 /* 0: Socket Structure */
1988 struct acpi_pmtt_socket {
1989 struct acpi_pmtt_header header;
1994 * Immediately followed by:
1995 * MEMORY_DEVICE memory_device_struct[memory_device_count];
1998 /* 1: Memory Controller subtable */
2000 struct acpi_pmtt_controller {
2001 struct acpi_pmtt_header header;
2006 * Immediately followed by:
2007 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2010 /* 2: Physical Component Identifier (DIMM) */
2012 struct acpi_pmtt_physical_component {
2013 struct acpi_pmtt_header header;
2017 /* 0xFF: Vendor Specific Data */
2019 struct acpi_pmtt_vendor_specific {
2020 struct acpi_pmtt_header header;
2024 * Immediately followed by:
2025 * u8 vendor_specific_data[];
2026 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2030 /*******************************************************************************
2032 * PPTT - Processor Properties Topology Table (ACPI 6.2)
2035 ******************************************************************************/
2037 struct acpi_table_pptt {
2038 struct acpi_table_header header; /* Common ACPI table header */
2041 /* Values for Type field above */
2043 enum acpi_pptt_type {
2044 ACPI_PPTT_TYPE_PROCESSOR = 0,
2045 ACPI_PPTT_TYPE_CACHE = 1,
2046 ACPI_PPTT_TYPE_ID = 2,
2047 ACPI_PPTT_TYPE_RESERVED = 3
2050 /* 0: Processor Hierarchy Node Structure */
2052 struct acpi_pptt_processor {
2053 struct acpi_subtable_header header;
2057 u32 acpi_processor_id;
2058 u32 number_of_priv_resources;
2063 #define ACPI_PPTT_PHYSICAL_PACKAGE (1)
2064 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
2065 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
2066 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
2067 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
2069 /* 1: Cache Type Structure */
2071 struct acpi_pptt_cache {
2072 struct acpi_subtable_header header;
2075 u32 next_level_of_cache;
2083 /* 1: Cache Type Structure for PPTT version 3 */
2085 struct acpi_pptt_cache_v1 {
2091 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
2092 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
2093 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
2094 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
2095 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
2096 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
2097 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
2098 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */
2100 /* Masks for Attributes */
2102 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
2103 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
2104 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
2106 /* Attributes describing cache */
2107 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
2108 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
2109 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
2110 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
2112 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
2113 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
2114 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
2115 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
2117 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
2118 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
2120 /* 2: ID Structure */
2122 struct acpi_pptt_id {
2123 struct acpi_subtable_header header;
2133 /*******************************************************************************
2135 * PRMT - Platform Runtime Mechanism Table
2138 ******************************************************************************/
2140 struct acpi_table_prmt {
2141 struct acpi_table_header header; /* Common ACPI table header */
2144 struct acpi_table_prmt_header {
2145 u8 platform_guid[16];
2146 u32 module_info_offset;
2147 u32 module_info_count;
2150 struct acpi_prmt_module_header {
2155 struct acpi_prmt_module_info {
2161 u16 handler_info_count;
2162 u32 handler_info_offset;
2163 u64 mmio_list_pointer;
2166 struct acpi_prmt_handler_info {
2169 u8 handler_guid[16];
2170 u64 handler_address;
2171 u64 static_data_buffer_address;
2172 u64 acpi_param_buffer_address;
2175 /*******************************************************************************
2177 * RASF - RAS Feature Table (ACPI 5.0)
2180 ******************************************************************************/
2182 struct acpi_table_rasf {
2183 struct acpi_table_header header; /* Common ACPI table header */
2187 /* RASF Platform Communication Channel Shared Memory Region */
2189 struct acpi_rasf_shared_memory {
2194 u8 capabilities[16];
2195 u8 set_capabilities[16];
2196 u16 num_parameter_blocks;
2197 u32 set_capabilities_status;
2200 /* RASF Parameter Block Structure Header */
2202 struct acpi_rasf_parameter_block {
2208 /* RASF Parameter Block Structure for PATROL_SCRUB */
2210 struct acpi_rasf_patrol_scrub_parameter {
2211 struct acpi_rasf_parameter_block header;
2212 u16 patrol_scrub_command;
2213 u64 requested_address_range[2];
2214 u64 actual_address_range[2];
2219 /* Masks for Flags and Speed fields above */
2221 #define ACPI_RASF_SCRUBBER_RUNNING 1
2222 #define ACPI_RASF_SPEED (7<<1)
2223 #define ACPI_RASF_SPEED_SLOW (0<<1)
2224 #define ACPI_RASF_SPEED_MEDIUM (4<<1)
2225 #define ACPI_RASF_SPEED_FAST (7<<1)
2227 /* Channel Commands */
2229 enum acpi_rasf_commands {
2230 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
2233 /* Platform RAS Capabilities */
2235 enum acpi_rasf_capabiliities {
2236 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
2237 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
2240 /* Patrol Scrub Commands */
2242 enum acpi_rasf_patrol_scrub_commands {
2243 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
2244 ACPI_RASF_START_PATROL_SCRUBBER = 2,
2245 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
2248 /* Channel Command flags */
2250 #define ACPI_RASF_GENERATE_SCI (1<<15)
2254 enum acpi_rasf_status {
2255 ACPI_RASF_SUCCESS = 0,
2256 ACPI_RASF_NOT_VALID = 1,
2257 ACPI_RASF_NOT_SUPPORTED = 2,
2259 ACPI_RASF_FAILED = 4,
2260 ACPI_RASF_ABORTED = 5,
2261 ACPI_RASF_INVALID_DATA = 6
2266 #define ACPI_RASF_COMMAND_COMPLETE (1)
2267 #define ACPI_RASF_SCI_DOORBELL (1<<1)
2268 #define ACPI_RASF_ERROR (1<<2)
2269 #define ACPI_RASF_STATUS (0x1F<<3)
2271 /*******************************************************************************
2273 * RGRT - Regulatory Graphics Resource Table
2276 * Conforms to "ACPI RGRT" available at:
2277 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/
2279 ******************************************************************************/
2281 struct acpi_table_rgrt {
2282 struct acpi_table_header header; /* Common ACPI table header */
2289 /* image_type values */
2291 enum acpi_rgrt_image_type {
2292 ACPI_RGRT_TYPE_RESERVED0 = 0,
2293 ACPI_RGRT_IMAGE_TYPE_PNG = 1,
2294 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
2297 /*******************************************************************************
2299 * SBST - Smart Battery Specification Table
2302 ******************************************************************************/
2304 struct acpi_table_sbst {
2305 struct acpi_table_header header; /* Common ACPI table header */
2311 /*******************************************************************************
2313 * SDEI - Software Delegated Exception Interface Descriptor Table
2315 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
2316 * May 8th, 2017. Copyright 2017 ARM Ltd.
2318 ******************************************************************************/
2320 struct acpi_table_sdei {
2321 struct acpi_table_header header; /* Common ACPI table header */
2324 /*******************************************************************************
2326 * SDEV - Secure Devices Table (ACPI 6.2)
2329 ******************************************************************************/
2331 struct acpi_table_sdev {
2332 struct acpi_table_header header; /* Common ACPI table header */
2335 struct acpi_sdev_header {
2341 /* Values for subtable type above */
2343 enum acpi_sdev_type {
2344 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
2345 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
2346 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
2349 /* Values for flags above */
2351 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
2352 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1)
2358 /* 0: Namespace Device Based Secure Device Structure */
2360 struct acpi_sdev_namespace {
2361 struct acpi_sdev_header header;
2362 u16 device_id_offset;
2363 u16 device_id_length;
2364 u16 vendor_data_offset;
2365 u16 vendor_data_length;
2368 struct acpi_sdev_secure_component {
2369 u16 secure_component_offset;
2370 u16 secure_component_length;
2374 * SDEV sub-subtables ("Components") for above
2376 struct acpi_sdev_component {
2377 struct acpi_sdev_header header;
2380 /* Values for sub-subtable type above */
2382 enum acpi_sac_type {
2383 ACPI_SDEV_TYPE_ID_COMPONENT = 0,
2384 ACPI_SDEV_TYPE_MEM_COMPONENT = 1
2387 struct acpi_sdev_id_component {
2388 struct acpi_sdev_header header;
2389 u16 hardware_id_offset;
2390 u16 hardware_id_length;
2391 u16 subsystem_id_offset;
2392 u16 subsystem_id_length;
2393 u16 hardware_revision;
2394 u8 hardware_rev_present;
2395 u8 class_code_present;
2398 u8 pci_programming_xface;
2401 struct acpi_sdev_mem_component {
2402 struct acpi_sdev_header header;
2404 u64 memory_base_address;
2408 /* 1: PCIe Endpoint Device Based Device Structure */
2410 struct acpi_sdev_pcie {
2411 struct acpi_sdev_header header;
2416 u16 vendor_data_offset;
2417 u16 vendor_data_length;
2420 /* 1a: PCIe Endpoint path entry */
2422 struct acpi_sdev_pcie_path {
2427 /*******************************************************************************
2429 * SVKL - Storage Volume Key Location Table (ACPI 6.4)
2430 * From: "Guest-Host-Communication Interface (GHCI) for Intel
2431 * Trust Domain Extensions (Intel TDX)".
2434 ******************************************************************************/
2436 struct acpi_table_svkl {
2437 struct acpi_table_header header; /* Common ACPI table header */
2441 struct acpi_svkl_key {
2448 enum acpi_svkl_type {
2449 ACPI_SVKL_TYPE_MAIN_STORAGE = 0,
2450 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */
2453 enum acpi_svkl_format {
2454 ACPI_SVKL_FORMAT_RAW_BINARY = 0,
2455 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */
2458 /* Reset to default packing */
2462 #endif /* __ACTBL2_H__ */