1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2 /******************************************************************************
4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
6 * Copyright (C) 2000 - 2021, Intel Corp.
8 *****************************************************************************/
13 /*******************************************************************************
15 * Additional ACPI Tables (2)
17 * These tables are not consumed directly by the ACPICA subsystem, but are
18 * included here to support device drivers and the AML disassembler.
20 ******************************************************************************/
23 * Values for description table header signatures for tables defined in this
24 * file. Useful because they make it more difficult to inadvertently type in
25 * the wrong signature.
27 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */
28 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */
29 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
30 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
31 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
32 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
33 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
34 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
35 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
36 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
37 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
38 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
39 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */
40 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
41 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
42 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */
43 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
44 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
45 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */
46 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */
47 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */
48 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
49 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
50 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
51 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */
52 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */
55 * All tables must be byte-packed to match the ACPI specification, since
56 * the tables are provided by the system BIOS.
61 * Note: C bitfields are not used for this reason:
63 * "Bitfields are great and easy to read, but unfortunately the C language
64 * does not specify the layout of bitfields in memory, which means they are
65 * essentially useless for dealing with packed data in on-disk formats or
66 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
67 * this decision was a design error in C. Ritchie could have picked an order
68 * and stuck with it." Norman Ramsey.
69 * See http://stackoverflow.com/a/1053662/41661
72 /*******************************************************************************
74 * AEST - Arm Error Source Table
76 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document
79 ******************************************************************************/
81 struct acpi_table_aest {
82 struct acpi_table_header header;
86 /* Common Subtable header - one per Node Structure (Subtable) */
88 struct acpi_aest_hdr {
92 u32 node_specific_offset;
93 u32 node_interface_offset;
94 u32 node_interrupt_offset;
95 u32 node_interrupt_count;
98 u64 error_injection_rate;
101 /* Values for Type above */
103 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0
104 #define ACPI_AEST_MEMORY_ERROR_NODE 1
105 #define ACPI_AEST_SMMU_ERROR_NODE 2
106 #define ACPI_AEST_VENDOR_ERROR_NODE 3
107 #define ACPI_AEST_GIC_ERROR_NODE 4
108 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */
111 * AEST subtables (Error nodes)
114 /* 0: Processor Error */
116 typedef struct acpi_aest_processor {
122 u64 processor_affinity;
124 } acpi_aest_processor;
126 /* Values for resource_type above, related structs below */
128 #define ACPI_AEST_CACHE_RESOURCE 0
129 #define ACPI_AEST_TLB_RESOURCE 1
130 #define ACPI_AEST_GENERIC_RESOURCE 2
131 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */
133 /* 0R: Processor Cache Resource Substructure */
135 typedef struct acpi_aest_processor_cache {
139 } acpi_aest_processor_cache;
141 /* Values for cache_type above */
143 #define ACPI_AEST_CACHE_DATA 0
144 #define ACPI_AEST_CACHE_INSTRUCTION 1
145 #define ACPI_AEST_CACHE_UNIFIED 2
146 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */
148 /* 1R: Processor TLB Resource Substructure */
150 typedef struct acpi_aest_processor_tlb {
154 } acpi_aest_processor_tlb;
156 /* 2R: Processor Generic Resource Substructure */
158 typedef struct acpi_aest_processor_generic {
161 } acpi_aest_processor_generic;
163 /* 1: Memory Error */
165 typedef struct acpi_aest_memory {
166 u32 srat_proximity_domain;
172 typedef struct acpi_aest_smmu {
173 u32 iort_node_reference;
174 u32 subcomponent_reference;
178 /* 3: Vendor Defined */
180 typedef struct acpi_aest_vendor {
183 u8 vendor_specific_data[16];
189 typedef struct acpi_aest_gic {
195 /* Values for interface_type above */
197 #define ACPI_AEST_GIC_CPU 0
198 #define ACPI_AEST_GIC_DISTRIBUTOR 1
199 #define ACPI_AEST_GIC_REDISTRIBUTOR 2
200 #define ACPI_AEST_GIC_ITS 3
201 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */
203 /* Node Interface Structure */
205 typedef struct acpi_aest_node_interface {
210 u32 error_record_index;
211 u32 error_record_count;
212 u64 error_record_implemented;
213 u64 error_status_reporting;
216 } acpi_aest_node_interface;
218 /* Values for Type field above */
220 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0
221 #define ACPI_AEST_NODE_MEMORY_MAPPED 1
222 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */
224 /* Node Interrupt Structure */
226 typedef struct acpi_aest_node_interrupt {
234 } acpi_aest_node_interrupt;
236 /* Values for Type field above */
238 #define ACPI_AEST_NODE_FAULT_HANDLING 0
239 #define ACPI_AEST_NODE_ERROR_RECOVERY 1
240 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */
242 /*******************************************************************************
243 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface
245 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document"
248 ******************************************************************************/
249 struct acpi_table_agdi {
250 struct acpi_table_header header; /* Common ACPI table header */
257 /* Mask for Flags field above */
259 #define ACPI_AGDI_SIGNALING_MODE (1)
261 /*******************************************************************************
263 * BDAT - BIOS Data ACPI Table
265 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5
268 ******************************************************************************/
270 struct acpi_table_bdat {
271 struct acpi_table_header header;
272 struct acpi_generic_address gas;
275 /*******************************************************************************
277 * IORT - IO Remapping Table
279 * Conforms to "IO Remapping Table System Software on ARM Platforms",
280 * Document number: ARM DEN 0049E.b, Feb 2021
282 ******************************************************************************/
284 struct acpi_table_iort {
285 struct acpi_table_header header;
294 struct acpi_iort_node {
304 /* Values for subtable Type above */
306 enum acpi_iort_node_type {
307 ACPI_IORT_NODE_ITS_GROUP = 0x00,
308 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
309 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
310 ACPI_IORT_NODE_SMMU = 0x03,
311 ACPI_IORT_NODE_SMMU_V3 = 0x04,
312 ACPI_IORT_NODE_PMCG = 0x05,
313 ACPI_IORT_NODE_RMR = 0x06,
316 struct acpi_iort_id_mapping {
317 u32 input_base; /* Lowest value in input range */
318 u32 id_count; /* Number of IDs */
319 u32 output_base; /* Lowest value in output range */
320 u32 output_reference; /* A reference to the output node */
324 /* Masks for Flags field above for IORT subtable */
326 #define ACPI_IORT_ID_SINGLE_MAPPING (1)
328 struct acpi_iort_memory_access {
335 /* Values for cache_coherency field above */
337 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
338 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
340 /* Masks for Hints field above */
342 #define ACPI_IORT_HT_TRANSIENT (1)
343 #define ACPI_IORT_HT_WRITE (1<<1)
344 #define ACPI_IORT_HT_READ (1<<2)
345 #define ACPI_IORT_HT_OVERRIDE (1<<3)
347 /* Masks for memory_flags field above */
349 #define ACPI_IORT_MF_COHERENCY (1)
350 #define ACPI_IORT_MF_ATTRIBUTES (1<<1)
353 * IORT node specific subtables
355 struct acpi_iort_its_group {
357 u32 identifiers[1]; /* GIC ITS identifier array */
360 struct acpi_iort_named_component {
362 u64 memory_properties; /* Memory access properties */
363 u8 memory_address_limit; /* Memory address size limit */
364 char device_name[1]; /* Path of namespace object */
367 /* Masks for Flags field above */
369 #define ACPI_IORT_NC_STALL_SUPPORTED (1)
370 #define ACPI_IORT_NC_PASID_BITS (31<<1)
372 struct acpi_iort_root_complex {
373 u64 memory_properties; /* Memory access properties */
375 u32 pci_segment_number;
376 u8 memory_address_limit; /* Memory address size limit */
377 u8 reserved[3]; /* Reserved, must be zero */
380 /* Masks for ats_attribute field above */
382 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */
383 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */
384 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */
386 struct acpi_iort_smmu {
387 u64 base_address; /* SMMU base address */
388 u64 span; /* Length of memory range */
391 u32 global_interrupt_offset;
392 u32 context_interrupt_count;
393 u32 context_interrupt_offset;
394 u32 pmu_interrupt_count;
395 u32 pmu_interrupt_offset;
396 u64 interrupts[1]; /* Interrupt array */
399 /* Values for Model field above */
401 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
402 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
403 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
404 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
405 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
406 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */
408 /* Masks for Flags field above */
410 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
411 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
413 /* Global interrupt format */
415 struct acpi_iort_smmu_gsi {
419 u32 nsg_cfg_irpt_flags;
422 struct acpi_iort_smmu_v3 {
423 u64 base_address; /* SMMUv3 base address */
433 u32 id_mapping_index;
436 /* Values for Model field above */
438 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
439 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */
440 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
442 /* Masks for Flags field above */
444 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
445 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
446 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
448 struct acpi_iort_pmcg {
449 u64 page0_base_address;
452 u64 page1_base_address;
455 struct acpi_iort_rmr {
461 struct acpi_iort_rmr_desc {
467 /*******************************************************************************
469 * IVRS - I/O Virtualization Reporting Structure
472 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
473 * Revision 1.26, February 2009.
475 ******************************************************************************/
477 struct acpi_table_ivrs {
478 struct acpi_table_header header; /* Common ACPI table header */
479 u32 info; /* Common virtualization info */
483 /* Values for Info field above */
485 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
486 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
487 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
489 /* IVRS subtable header */
491 struct acpi_ivrs_header {
492 u8 type; /* Subtable type */
494 u16 length; /* Subtable length */
495 u16 device_id; /* ID of IOMMU */
498 /* Values for subtable Type above */
500 enum acpi_ivrs_type {
501 ACPI_IVRS_TYPE_HARDWARE1 = 0x10,
502 ACPI_IVRS_TYPE_HARDWARE2 = 0x11,
503 ACPI_IVRS_TYPE_HARDWARE3 = 0x40,
504 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
505 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
506 ACPI_IVRS_TYPE_MEMORY3 = 0x22
509 /* Masks for Flags field above for IVHD subtable */
511 #define ACPI_IVHD_TT_ENABLE (1)
512 #define ACPI_IVHD_PASS_PW (1<<1)
513 #define ACPI_IVHD_RES_PASS_PW (1<<2)
514 #define ACPI_IVHD_ISOC (1<<3)
515 #define ACPI_IVHD_IOTLB (1<<4)
517 /* Masks for Flags field above for IVMD subtable */
519 #define ACPI_IVMD_UNITY (1)
520 #define ACPI_IVMD_READ (1<<1)
521 #define ACPI_IVMD_WRITE (1<<2)
522 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
525 * IVRS subtables, correspond to Type in struct acpi_ivrs_header
528 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
530 struct acpi_ivrs_hardware_10 {
531 struct acpi_ivrs_header header;
532 u16 capability_offset; /* Offset for IOMMU control fields */
533 u64 base_address; /* IOMMU control registers */
534 u16 pci_segment_group;
535 u16 info; /* MSI number and unit ID */
536 u32 feature_reporting;
539 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */
541 struct acpi_ivrs_hardware_11 {
542 struct acpi_ivrs_header header;
543 u16 capability_offset; /* Offset for IOMMU control fields */
544 u64 base_address; /* IOMMU control registers */
545 u16 pci_segment_group;
546 u16 info; /* MSI number and unit ID */
548 u64 efr_register_image;
552 /* Masks for Info field above */
554 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
555 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */
558 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
559 * Upper two bits of the Type field are the (encoded) length of the structure.
560 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
561 * are reserved for future use but not defined.
563 struct acpi_ivrs_de_header {
569 /* Length of device entry is in the top two bits of Type field above */
571 #define ACPI_IVHD_ENTRY_LENGTH 0xC0
573 /* Values for device entry Type field above */
575 enum acpi_ivrs_device_entry_type {
576 /* 4-byte device entries, all use struct acpi_ivrs_device4 */
578 ACPI_IVRS_TYPE_PAD4 = 0,
579 ACPI_IVRS_TYPE_ALL = 1,
580 ACPI_IVRS_TYPE_SELECT = 2,
581 ACPI_IVRS_TYPE_START = 3,
582 ACPI_IVRS_TYPE_END = 4,
584 /* 8-byte device entries */
586 ACPI_IVRS_TYPE_PAD8 = 64,
587 ACPI_IVRS_TYPE_NOT_USED = 65,
588 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */
589 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */
590 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */
591 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */
592 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */
594 /* Variable-length device entries */
596 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */
599 /* Values for Data field above */
601 #define ACPI_IVHD_INIT_PASS (1)
602 #define ACPI_IVHD_EINT_PASS (1<<1)
603 #define ACPI_IVHD_NMI_PASS (1<<2)
604 #define ACPI_IVHD_SYSTEM_MGMT (3<<4)
605 #define ACPI_IVHD_LINT0_PASS (1<<6)
606 #define ACPI_IVHD_LINT1_PASS (1<<7)
608 /* Types 0-4: 4-byte device entry */
610 struct acpi_ivrs_device4 {
611 struct acpi_ivrs_de_header header;
614 /* Types 66-67: 8-byte device entry */
616 struct acpi_ivrs_device8a {
617 struct acpi_ivrs_de_header header;
623 /* Types 70-71: 8-byte device entry */
625 struct acpi_ivrs_device8b {
626 struct acpi_ivrs_de_header header;
630 /* Values for extended_data above */
632 #define ACPI_IVHD_ATS_DISABLED (1<<31)
634 /* Type 72: 8-byte device entry */
636 struct acpi_ivrs_device8c {
637 struct acpi_ivrs_de_header header;
643 /* Values for Variety field above */
645 #define ACPI_IVHD_IOAPIC 1
646 #define ACPI_IVHD_HPET 2
648 /* Type 240: variable-length device entry */
650 struct acpi_ivrs_device_hid {
651 struct acpi_ivrs_de_header header;
658 /* Values for uid_type above */
660 #define ACPI_IVRS_UID_NOT_PRESENT 0
661 #define ACPI_IVRS_UID_IS_INTEGER 1
662 #define ACPI_IVRS_UID_IS_STRING 2
664 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
666 struct acpi_ivrs_memory {
667 struct acpi_ivrs_header header;
674 /*******************************************************************************
676 * LPIT - Low Power Idle Table
678 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
680 ******************************************************************************/
682 struct acpi_table_lpit {
683 struct acpi_table_header header; /* Common ACPI table header */
686 /* LPIT subtable header */
688 struct acpi_lpit_header {
689 u32 type; /* Subtable type */
690 u32 length; /* Subtable length */
696 /* Values for subtable Type above */
698 enum acpi_lpit_type {
699 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
700 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
703 /* Masks for Flags field above */
705 #define ACPI_LPIT_STATE_DISABLED (1)
706 #define ACPI_LPIT_NO_COUNTER (1<<1)
709 * LPIT subtables, correspond to Type in struct acpi_lpit_header
712 /* 0x00: Native C-state instruction based LPI structure */
714 struct acpi_lpit_native {
715 struct acpi_lpit_header header;
716 struct acpi_generic_address entry_trigger;
719 struct acpi_generic_address residency_counter;
720 u64 counter_frequency;
723 /*******************************************************************************
725 * MADT - Multiple APIC Description Table
728 ******************************************************************************/
730 struct acpi_table_madt {
731 struct acpi_table_header header; /* Common ACPI table header */
732 u32 address; /* Physical address of local APIC */
736 /* Masks for Flags field above */
738 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
740 /* Values for PCATCompat flag */
742 #define ACPI_MADT_DUAL_PIC 1
743 #define ACPI_MADT_MULTIPLE_APIC 0
745 /* Values for MADT subtable type in struct acpi_subtable_header */
747 enum acpi_madt_type {
748 ACPI_MADT_TYPE_LOCAL_APIC = 0,
749 ACPI_MADT_TYPE_IO_APIC = 1,
750 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
751 ACPI_MADT_TYPE_NMI_SOURCE = 3,
752 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
753 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
754 ACPI_MADT_TYPE_IO_SAPIC = 6,
755 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
756 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
757 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
758 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
759 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
760 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
761 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
762 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
763 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
764 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16,
765 ACPI_MADT_TYPE_RESERVED = 17 /* 17 and greater are reserved */
769 * MADT Subtables, correspond to Type in struct acpi_subtable_header
772 /* 0: Processor Local APIC */
774 struct acpi_madt_local_apic {
775 struct acpi_subtable_header header;
776 u8 processor_id; /* ACPI processor id */
777 u8 id; /* Processor's local APIC id */
783 struct acpi_madt_io_apic {
784 struct acpi_subtable_header header;
785 u8 id; /* I/O APIC ID */
786 u8 reserved; /* reserved - must be zero */
787 u32 address; /* APIC physical address */
788 u32 global_irq_base; /* Global system interrupt where INTI lines start */
791 /* 2: Interrupt Override */
793 struct acpi_madt_interrupt_override {
794 struct acpi_subtable_header header;
795 u8 bus; /* 0 - ISA */
796 u8 source_irq; /* Interrupt source (IRQ) */
797 u32 global_irq; /* Global system interrupt */
803 struct acpi_madt_nmi_source {
804 struct acpi_subtable_header header;
806 u32 global_irq; /* Global system interrupt */
809 /* 4: Local APIC NMI */
811 struct acpi_madt_local_apic_nmi {
812 struct acpi_subtable_header header;
813 u8 processor_id; /* ACPI processor id */
815 u8 lint; /* LINTn to which NMI is connected */
818 /* 5: Address Override */
820 struct acpi_madt_local_apic_override {
821 struct acpi_subtable_header header;
822 u16 reserved; /* Reserved, must be zero */
823 u64 address; /* APIC physical address */
828 struct acpi_madt_io_sapic {
829 struct acpi_subtable_header header;
830 u8 id; /* I/O SAPIC ID */
831 u8 reserved; /* Reserved, must be zero */
832 u32 global_irq_base; /* Global interrupt for SAPIC start */
833 u64 address; /* SAPIC physical address */
838 struct acpi_madt_local_sapic {
839 struct acpi_subtable_header header;
840 u8 processor_id; /* ACPI processor id */
841 u8 id; /* SAPIC ID */
842 u8 eid; /* SAPIC EID */
843 u8 reserved[3]; /* Reserved, must be zero */
845 u32 uid; /* Numeric UID - ACPI 3.0 */
846 char uid_string[1]; /* String UID - ACPI 3.0 */
849 /* 8: Platform Interrupt Source */
851 struct acpi_madt_interrupt_source {
852 struct acpi_subtable_header header;
854 u8 type; /* 1=PMI, 2=INIT, 3=corrected */
855 u8 id; /* Processor ID */
856 u8 eid; /* Processor EID */
857 u8 io_sapic_vector; /* Vector value for PMI interrupts */
858 u32 global_irq; /* Global system interrupt */
859 u32 flags; /* Interrupt Source Flags */
862 /* Masks for Flags field above */
864 #define ACPI_MADT_CPEI_OVERRIDE (1)
866 /* 9: Processor Local X2APIC (ACPI 4.0) */
868 struct acpi_madt_local_x2apic {
869 struct acpi_subtable_header header;
870 u16 reserved; /* reserved - must be zero */
871 u32 local_apic_id; /* Processor x2APIC ID */
873 u32 uid; /* ACPI processor UID */
876 /* 10: Local X2APIC NMI (ACPI 4.0) */
878 struct acpi_madt_local_x2apic_nmi {
879 struct acpi_subtable_header header;
881 u32 uid; /* ACPI processor UID */
882 u8 lint; /* LINTn to which NMI is connected */
883 u8 reserved[3]; /* reserved - must be zero */
886 /* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */
888 struct acpi_madt_generic_interrupt {
889 struct acpi_subtable_header header;
890 u16 reserved; /* reserved - must be zero */
891 u32 cpu_interface_number;
895 u32 performance_interrupt;
898 u64 gicv_base_address;
899 u64 gich_base_address;
901 u64 gicr_base_address;
905 u16 spe_interrupt; /* ACPI 6.3 */
908 /* Masks for Flags field above */
910 /* ACPI_MADT_ENABLED (1) Processor is usable if set */
911 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
912 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
914 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
916 struct acpi_madt_generic_distributor {
917 struct acpi_subtable_header header;
918 u16 reserved; /* reserved - must be zero */
923 u8 reserved2[3]; /* reserved - must be zero */
926 /* Values for Version field above */
928 enum acpi_madt_gic_version {
929 ACPI_MADT_GIC_VERSION_NONE = 0,
930 ACPI_MADT_GIC_VERSION_V1 = 1,
931 ACPI_MADT_GIC_VERSION_V2 = 2,
932 ACPI_MADT_GIC_VERSION_V3 = 3,
933 ACPI_MADT_GIC_VERSION_V4 = 4,
934 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
937 /* 13: Generic MSI Frame (ACPI 5.1) */
939 struct acpi_madt_generic_msi_frame {
940 struct acpi_subtable_header header;
941 u16 reserved; /* reserved - must be zero */
949 /* Masks for Flags field above */
951 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
953 /* 14: Generic Redistributor (ACPI 5.1) */
955 struct acpi_madt_generic_redistributor {
956 struct acpi_subtable_header header;
957 u16 reserved; /* reserved - must be zero */
962 /* 15: Generic Translator (ACPI 6.0) */
964 struct acpi_madt_generic_translator {
965 struct acpi_subtable_header header;
966 u16 reserved; /* reserved - must be zero */
972 /* 16: Multiprocessor wakeup (ACPI 6.4) */
974 struct acpi_madt_multiproc_wakeup {
975 struct acpi_subtable_header header;
977 u32 reserved; /* reserved - must be zero */
981 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032
982 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048
984 struct acpi_madt_multiproc_wakeup_mailbox {
986 u16 reserved; /* reserved - must be zero */
989 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */
990 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */
993 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1
996 * Common flags fields for MADT subtables
999 /* MADT Local APIC flags */
1001 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
1002 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */
1004 /* MADT MPS INTI flags (inti_flags) */
1006 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
1007 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
1009 /* Values for MPS INTI flags */
1011 #define ACPI_MADT_POLARITY_CONFORMS 0
1012 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
1013 #define ACPI_MADT_POLARITY_RESERVED 2
1014 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3
1016 #define ACPI_MADT_TRIGGER_CONFORMS (0)
1017 #define ACPI_MADT_TRIGGER_EDGE (1<<2)
1018 #define ACPI_MADT_TRIGGER_RESERVED (2<<2)
1019 #define ACPI_MADT_TRIGGER_LEVEL (3<<2)
1021 /*******************************************************************************
1023 * MCFG - PCI Memory Mapped Configuration table and subtable
1026 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
1028 ******************************************************************************/
1030 struct acpi_table_mcfg {
1031 struct acpi_table_header header; /* Common ACPI table header */
1037 struct acpi_mcfg_allocation {
1038 u64 address; /* Base address, processor-relative */
1039 u16 pci_segment; /* PCI segment group number */
1040 u8 start_bus_number; /* Starting PCI Bus number */
1041 u8 end_bus_number; /* Final PCI Bus number */
1045 /*******************************************************************************
1047 * MCHI - Management Controller Host Interface Table
1050 * Conforms to "Management Component Transport Protocol (MCTP) Host
1051 * Interface Specification", Revision 1.0.0a, October 13, 2009
1053 ******************************************************************************/
1055 struct acpi_table_mchi {
1056 struct acpi_table_header header; /* Common ACPI table header */
1063 u32 global_interrupt;
1064 struct acpi_generic_address control_register;
1071 /*******************************************************************************
1073 * MPST - Memory Power State Table (ACPI 5.0)
1076 ******************************************************************************/
1078 #define ACPI_MPST_CHANNEL_INFO \
1081 u16 power_node_count; \
1086 struct acpi_table_mpst {
1087 struct acpi_table_header header; /* Common ACPI table header */
1088 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1091 /* Memory Platform Communication Channel Info */
1093 struct acpi_mpst_channel {
1094 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1097 /* Memory Power Node Structure */
1099 struct acpi_mpst_power_node {
1106 u32 num_power_states;
1107 u32 num_physical_components;
1110 /* Values for Flags field above */
1112 #define ACPI_MPST_ENABLED 1
1113 #define ACPI_MPST_POWER_MANAGED 2
1114 #define ACPI_MPST_HOT_PLUG_CAPABLE 4
1116 /* Memory Power State Structure (follows POWER_NODE above) */
1118 struct acpi_mpst_power_state {
1123 /* Physical Component ID Structure (follows POWER_STATE above) */
1125 struct acpi_mpst_component {
1129 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
1131 struct acpi_mpst_data_hdr {
1132 u16 characteristics_count;
1136 struct acpi_mpst_power_data {
1146 /* Values for Flags field above */
1148 #define ACPI_MPST_PRESERVE 1
1149 #define ACPI_MPST_AUTOENTRY 2
1150 #define ACPI_MPST_AUTOEXIT 4
1152 /* Shared Memory Region (not part of an ACPI table) */
1154 struct acpi_mpst_shared {
1158 u32 command_register;
1159 u32 status_register;
1162 u64 energy_consumed;
1166 /*******************************************************************************
1168 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
1171 ******************************************************************************/
1173 struct acpi_table_msct {
1174 struct acpi_table_header header; /* Common ACPI table header */
1175 u32 proximity_offset; /* Location of proximity info struct(s) */
1176 u32 max_proximity_domains; /* Max number of proximity domains */
1177 u32 max_clock_domains; /* Max number of clock domains */
1178 u64 max_address; /* Max physical address in system */
1181 /* subtable - Maximum Proximity Domain Information. Version 1 */
1183 struct acpi_msct_proximity {
1186 u32 range_start; /* Start of domain range */
1187 u32 range_end; /* End of domain range */
1188 u32 processor_capacity;
1189 u64 memory_capacity; /* In bytes */
1192 /*******************************************************************************
1194 * MSDM - Microsoft Data Management table
1196 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
1197 * November 29, 2011. Copyright 2011 Microsoft
1199 ******************************************************************************/
1201 /* Basic MSDM table is only the common ACPI header */
1203 struct acpi_table_msdm {
1204 struct acpi_table_header header; /* Common ACPI table header */
1207 /*******************************************************************************
1209 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
1212 ******************************************************************************/
1214 struct acpi_table_nfit {
1215 struct acpi_table_header header; /* Common ACPI table header */
1216 u32 reserved; /* Reserved, must be zero */
1219 /* Subtable header for NFIT */
1221 struct acpi_nfit_header {
1226 /* Values for subtable type in struct acpi_nfit_header */
1228 enum acpi_nfit_type {
1229 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
1230 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
1231 ACPI_NFIT_TYPE_INTERLEAVE = 2,
1232 ACPI_NFIT_TYPE_SMBIOS = 3,
1233 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
1234 ACPI_NFIT_TYPE_DATA_REGION = 5,
1235 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
1236 ACPI_NFIT_TYPE_CAPABILITIES = 7,
1237 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
1244 /* 0: System Physical Address Range Structure */
1246 struct acpi_nfit_system_address {
1247 struct acpi_nfit_header header;
1250 u32 reserved; /* Reserved, must be zero */
1251 u32 proximity_domain;
1256 u64 location_cookie; /* ACPI 6.4 */
1261 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
1262 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
1263 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */
1265 /* Range Type GUIDs appear in the include/acuuid.h file */
1267 /* 1: Memory Device to System Address Range Map Structure */
1269 struct acpi_nfit_memory_map {
1270 struct acpi_nfit_header header;
1279 u16 interleave_index;
1280 u16 interleave_ways;
1282 u16 reserved; /* Reserved, must be zero */
1287 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
1288 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
1289 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
1290 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
1291 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
1292 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
1293 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
1295 /* 2: Interleave Structure */
1297 struct acpi_nfit_interleave {
1298 struct acpi_nfit_header header;
1299 u16 interleave_index;
1300 u16 reserved; /* Reserved, must be zero */
1303 u32 line_offset[1]; /* Variable length */
1306 /* 3: SMBIOS Management Information Structure */
1308 struct acpi_nfit_smbios {
1309 struct acpi_nfit_header header;
1310 u32 reserved; /* Reserved, must be zero */
1311 u8 data[1]; /* Variable length */
1314 /* 4: NVDIMM Control Region Structure */
1316 struct acpi_nfit_control_region {
1317 struct acpi_nfit_header header;
1322 u16 subsystem_vendor_id;
1323 u16 subsystem_device_id;
1324 u16 subsystem_revision_id;
1326 u8 manufacturing_location;
1327 u16 manufacturing_date;
1328 u8 reserved[2]; /* Reserved, must be zero */
1338 u8 reserved1[6]; /* Reserved, must be zero */
1343 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
1345 /* valid_fields bits */
1347 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
1349 /* 5: NVDIMM Block Data Window Region Structure */
1351 struct acpi_nfit_data_region {
1352 struct acpi_nfit_header header;
1361 /* 6: Flush Hint Address Structure */
1363 struct acpi_nfit_flush_address {
1364 struct acpi_nfit_header header;
1367 u8 reserved[6]; /* Reserved, must be zero */
1368 u64 hint_address[1]; /* Variable length */
1371 /* 7: Platform Capabilities Structure */
1373 struct acpi_nfit_capabilities {
1374 struct acpi_nfit_header header;
1375 u8 highest_capability;
1376 u8 reserved[3]; /* Reserved, must be zero */
1381 /* Capabilities Flags */
1383 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
1384 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
1385 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
1388 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
1390 struct nfit_device_handle {
1394 /* Device handle construction and extraction macros */
1396 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
1397 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
1398 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
1399 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
1400 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
1402 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
1403 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
1404 #define ACPI_NFIT_MEMORY_ID_OFFSET 8
1405 #define ACPI_NFIT_SOCKET_ID_OFFSET 12
1406 #define ACPI_NFIT_NODE_ID_OFFSET 16
1408 /* Macro to construct a NFIT/NVDIMM device handle */
1410 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
1412 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
1413 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
1414 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
1415 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
1417 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */
1419 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
1420 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
1422 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
1423 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
1425 #define ACPI_NFIT_GET_MEMORY_ID(handle) \
1426 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
1428 #define ACPI_NFIT_GET_SOCKET_ID(handle) \
1429 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
1431 #define ACPI_NFIT_GET_NODE_ID(handle) \
1432 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
1434 /*******************************************************************************
1436 * NHLT - Non HD Audio Link Table
1438 * Conforms to: Intel Smart Sound Technology NHLT Specification
1439 * Version 0.8.1, January 2020.
1441 ******************************************************************************/
1445 struct acpi_table_nhlt {
1446 struct acpi_table_header header; /* Common ACPI table header */
1450 struct acpi_nhlt_endpoint {
1451 u32 descriptor_length;
1463 /* Types for link_type field above */
1465 #define ACPI_NHLT_RESERVED_HD_AUDIO 0
1466 #define ACPI_NHLT_RESERVED_DSP 1
1467 #define ACPI_NHLT_PDM 2
1468 #define ACPI_NHLT_SSP 3
1469 #define ACPI_NHLT_RESERVED_SLIMBUS 4
1470 #define ACPI_NHLT_RESERVED_SOUNDWIRE 5
1471 #define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */
1473 /* All other values above are reserved */
1475 /* Values for device_id field above */
1477 #define ACPI_NHLT_PDM_DMIC 0xAE20
1478 #define ACPI_NHLT_BT_SIDEBAND 0xAE30
1479 #define ACPI_NHLT_I2S_TDM_CODECS 0xAE23
1481 /* Values for device_type field above */
1485 #define ACPI_NHLT_LINK_BT_SIDEBAND 0
1486 #define ACPI_NHLT_LINK_FM 1
1487 #define ACPI_NHLT_LINK_MODEM 2
1489 #define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4
1493 #define ACPI_NHLT_PDM_ON_CAVS_1P8 0
1494 #define ACPI_NHLT_PDM_ON_CAVS_1P5 1
1496 /* Values for Direction field above */
1498 #define ACPI_NHLT_DIR_RENDER 0
1499 #define ACPI_NHLT_DIR_CAPTURE 1
1500 #define ACPI_NHLT_DIR_RENDER_LOOPBACK 2
1501 #define ACPI_NHLT_DIR_RENDER_FEEDBACK 3
1502 #define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */
1504 struct acpi_nhlt_device_specific_config {
1505 u32 capabilities_size;
1510 struct acpi_nhlt_device_specific_config_a {
1511 u32 capabilities_size;
1517 /* Values for Config Type above */
1519 #define ACPI_NHLT_CONFIG_TYPE_GENERIC 0x00
1520 #define ACPI_NHLT_CONFIG_TYPE_MIC_ARRAY 0x01
1521 #define ACPI_NHLT_CONFIG_TYPE_RENDER_FEEDBACK 0x03
1522 #define ACPI_NHLT_CONFIG_TYPE_RESERVED 0x04 /* 4 and above are reserved */
1524 struct acpi_nhlt_device_specific_config_b {
1525 u32 capabilities_size;
1528 struct acpi_nhlt_device_specific_config_c {
1529 u32 capabilities_size;
1533 struct acpi_nhlt_render_device_specific_config {
1534 u32 capabilities_size;
1538 struct acpi_nhlt_wave_extensible {
1541 u32 samples_per_sec;
1542 u32 avg_bytes_per_sec;
1544 u16 bits_per_sample;
1545 u16 extra_format_size;
1546 u16 valid_bits_per_sample;
1548 u8 sub_format_guid[16];
1551 /* Values for channel_mask above */
1553 #define ACPI_NHLT_SPKR_FRONT_LEFT 0x1
1554 #define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2
1555 #define ACPI_NHLT_SPKR_FRONT_CENTER 0x4
1556 #define ACPI_NHLT_SPKR_LOW_FREQ 0x8
1557 #define ACPI_NHLT_SPKR_BACK_LEFT 0x10
1558 #define ACPI_NHLT_SPKR_BACK_RIGHT 0x20
1559 #define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40
1560 #define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80
1561 #define ACPI_NHLT_SPKR_BACK_CENTER 0x100
1562 #define ACPI_NHLT_SPKR_SIDE_LEFT 0x200
1563 #define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400
1564 #define ACPI_NHLT_SPKR_TOP_CENTER 0x800
1565 #define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000
1566 #define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000
1567 #define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000
1568 #define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000
1569 #define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000
1570 #define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000
1572 struct acpi_nhlt_format_config {
1573 struct acpi_nhlt_wave_extensible format;
1574 u32 capability_size;
1578 struct acpi_nhlt_formats_config {
1582 struct acpi_nhlt_device_specific_hdr {
1587 /* Types for config_type above */
1589 #define ACPI_NHLT_GENERIC 0
1590 #define ACPI_NHLT_MIC 1
1591 #define ACPI_NHLT_RENDER 3
1593 struct acpi_nhlt_mic_device_specific_config {
1594 struct acpi_nhlt_device_specific_hdr device_config;
1598 /* Values for array_type_ext above */
1600 #define ACPI_NHLT_ARRAY_TYPE_RESERVED 0x09 // 9 and below are reserved
1601 #define ACPI_NHLT_SMALL_LINEAR_2ELEMENT 0x0A
1602 #define ACPI_NHLT_BIG_LINEAR_2ELEMENT 0x0B
1603 #define ACPI_NHLT_FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C
1604 #define ACPI_NHLT_PLANAR_LSHAPED_4ELEMENT 0x0D
1605 #define ACPI_NHLT_SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E
1606 #define ACPI_NHLT_VENDOR_DEFINED 0x0F
1607 #define ACPI_NHLT_ARRAY_TYPE_MASK 0x0F
1608 #define ACPI_NHLT_ARRAY_TYPE_EXT_MASK 0x10
1610 #define ACPI_NHLT_NO_EXTENSION 0x0
1611 #define ACPI_NHLT_MIC_SNR_SENSITIVITY_EXT (1<<4)
1613 struct acpi_nhlt_vendor_mic_count {
1614 u8 microphone_count;
1617 struct acpi_nhlt_vendor_mic_config {
1620 u16 speaker_position_distance; // mm
1621 u16 horizontal_offset; // mm
1622 u16 vertical_offset; // mm
1623 u8 frequency_low_band; // 5*hz
1624 u8 frequency_high_band; // 500*hz
1625 u16 direction_angle; // -180 - + 180
1626 u16 elevation_angle; // -180 - + 180
1627 u16 work_vertical_angle_begin; // -180 - + 180 with 2 deg step
1628 u16 work_vertical_angle_end; // -180 - + 180 with 2 deg step
1629 u16 work_horizontal_angle_begin; // -180 - + 180 with 2 deg step
1630 u16 work_horizontal_angle_end; // -180 - + 180 with 2 deg step
1633 /* Values for Type field above */
1635 #define ACPI_NHLT_MIC_OMNIDIRECTIONAL 0
1636 #define ACPI_NHLT_MIC_SUBCARDIOID 1
1637 #define ACPI_NHLT_MIC_CARDIOID 2
1638 #define ACPI_NHLT_MIC_SUPER_CARDIOID 3
1639 #define ACPI_NHLT_MIC_HYPER_CARDIOID 4
1640 #define ACPI_NHLT_MIC_8_SHAPED 5
1641 #define ACPI_NHLT_MIC_RESERVED6 6 // 6 is reserved
1642 #define ACPI_NHLT_MIC_VENDOR_DEFINED 7
1643 #define ACPI_NHLT_MIC_RESERVED 8 // 8 and above are reserved
1645 /* Values for Panel field above */
1647 #define ACPI_NHLT_MIC_POSITION_TOP 0
1648 #define ACPI_NHLT_MIC_POSITION_BOTTOM 1
1649 #define ACPI_NHLT_MIC_POSITION_LEFT 2
1650 #define ACPI_NHLT_MIC_POSITION_RIGHT 3
1651 #define ACPI_NHLT_MIC_POSITION_FRONT 4
1652 #define ACPI_NHLT_MIC_POSITION_BACK 5
1653 #define ACPI_NHLT_MIC_POSITION_RESERVED 6 // 6 and above are reserved
1655 struct acpi_nhlt_vendor_mic_device_specific_config {
1656 struct acpi_nhlt_mic_device_specific_config mic_array_device_config;
1657 u8 number_of_microphones;
1658 struct acpi_nhlt_vendor_mic_config mic_config[]; // indexed by number_of_microphones
1661 /* Microphone SNR and Sensitivity extension */
1663 struct acpi_nhlt_mic_snr_sensitivity_extension {
1668 /* Render device with feedback */
1670 struct acpi_nhlt_render_feedback_device_specific_config {
1671 u8 feedback_virtual_slot; // render slot in case of capture
1672 u16 feedback_channels; // informative only
1673 u16 feedback_valid_bits_per_sample;
1676 /* Linux-specific structures */
1678 struct acpi_nhlt_linux_specific_count {
1682 struct acpi_nhlt_linux_specific_data {
1684 u8 device_instance_id;
1688 struct acpi_nhlt_linux_specific_data_b {
1689 u8 specific_data[18];
1692 struct acpi_nhlt_table_terminator {
1693 u32 terminator_value;
1694 u32 terminator_signature;
1697 /*******************************************************************************
1699 * PCCT - Platform Communications Channel Table (ACPI 5.0)
1700 * Version 2 (ACPI 6.2)
1702 ******************************************************************************/
1704 struct acpi_table_pcct {
1705 struct acpi_table_header header; /* Common ACPI table header */
1710 /* Values for Flags field above */
1712 #define ACPI_PCCT_DOORBELL 1
1714 /* Values for subtable type in struct acpi_subtable_header */
1716 enum acpi_pcct_type {
1717 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
1718 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
1719 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
1720 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
1721 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
1722 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */
1723 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */
1727 * PCCT Subtables, correspond to Type in struct acpi_subtable_header
1730 /* 0: Generic Communications Subspace */
1732 struct acpi_pcct_subspace {
1733 struct acpi_subtable_header header;
1737 struct acpi_generic_address doorbell_register;
1741 u32 max_access_rate;
1742 u16 min_turnaround_time;
1745 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */
1747 struct acpi_pcct_hw_reduced {
1748 struct acpi_subtable_header header;
1749 u32 platform_interrupt;
1754 struct acpi_generic_address doorbell_register;
1758 u32 max_access_rate;
1759 u16 min_turnaround_time;
1762 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
1764 struct acpi_pcct_hw_reduced_type2 {
1765 struct acpi_subtable_header header;
1766 u32 platform_interrupt;
1771 struct acpi_generic_address doorbell_register;
1775 u32 max_access_rate;
1776 u16 min_turnaround_time;
1777 struct acpi_generic_address platform_ack_register;
1778 u64 ack_preserve_mask;
1782 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
1784 struct acpi_pcct_ext_pcc_master {
1785 struct acpi_subtable_header header;
1786 u32 platform_interrupt;
1791 struct acpi_generic_address doorbell_register;
1795 u32 max_access_rate;
1796 u32 min_turnaround_time;
1797 struct acpi_generic_address platform_ack_register;
1798 u64 ack_preserve_mask;
1801 struct acpi_generic_address cmd_complete_register;
1802 u64 cmd_complete_mask;
1803 struct acpi_generic_address cmd_update_register;
1804 u64 cmd_update_preserve_mask;
1805 u64 cmd_update_set_mask;
1806 struct acpi_generic_address error_status_register;
1807 u64 error_status_mask;
1810 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
1812 struct acpi_pcct_ext_pcc_slave {
1813 struct acpi_subtable_header header;
1814 u32 platform_interrupt;
1819 struct acpi_generic_address doorbell_register;
1823 u32 max_access_rate;
1824 u32 min_turnaround_time;
1825 struct acpi_generic_address platform_ack_register;
1826 u64 ack_preserve_mask;
1829 struct acpi_generic_address cmd_complete_register;
1830 u64 cmd_complete_mask;
1831 struct acpi_generic_address cmd_update_register;
1832 u64 cmd_update_preserve_mask;
1833 u64 cmd_update_set_mask;
1834 struct acpi_generic_address error_status_register;
1835 u64 error_status_mask;
1838 /* 5: HW Registers based Communications Subspace */
1840 struct acpi_pcct_hw_reg {
1841 struct acpi_subtable_header header;
1845 struct acpi_generic_address doorbell_register;
1846 u64 doorbell_preserve;
1848 struct acpi_generic_address cmd_complete_register;
1849 u64 cmd_complete_mask;
1850 struct acpi_generic_address error_status_register;
1851 u64 error_status_mask;
1852 u32 nominal_latency;
1853 u32 min_turnaround_time;
1856 /* Values for doorbell flags above */
1858 #define ACPI_PCCT_INTERRUPT_POLARITY (1)
1859 #define ACPI_PCCT_INTERRUPT_MODE (1<<1)
1862 * PCC memory structures (not part of the ACPI table)
1865 /* Shared Memory Region */
1867 struct acpi_pcct_shared_memory {
1873 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
1875 struct acpi_pcct_ext_pcc_shared_memory {
1882 /*******************************************************************************
1884 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
1887 ******************************************************************************/
1889 struct acpi_table_pdtt {
1890 struct acpi_table_header header; /* Common ACPI table header */
1897 * PDTT Communication Channel Identifier Structure.
1898 * The number of these structures is defined by trigger_count above,
1899 * starting at array_offset.
1901 struct acpi_pdtt_channel {
1906 /* Flags for above */
1908 #define ACPI_PDTT_RUNTIME_TRIGGER (1)
1909 #define ACPI_PDTT_WAIT_COMPLETION (1<<1)
1910 #define ACPI_PDTT_TRIGGER_ORDER (1<<2)
1912 /*******************************************************************************
1914 * PHAT - Platform Health Assessment Table (ACPI 6.4)
1917 ******************************************************************************/
1919 struct acpi_table_phat {
1920 struct acpi_table_header header; /* Common ACPI table header */
1923 /* Common header for PHAT subtables that follow main table */
1925 struct acpi_phat_header {
1931 /* Values for Type field above */
1933 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0
1934 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1
1935 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */
1938 * PHAT subtables, correspond to Type in struct acpi_phat_header
1941 /* 0: Firmware Version Data Record */
1943 struct acpi_phat_version_data {
1944 struct acpi_phat_header header;
1949 struct acpi_phat_version_element {
1955 /* 1: Firmware Health Data Record */
1957 struct acpi_phat_health_data {
1958 struct acpi_phat_header header;
1962 u32 device_specific_offset; /* Zero if no Device-specific data */
1965 /* Values for Health field above */
1967 #define ACPI_PHAT_ERRORS_FOUND 0
1968 #define ACPI_PHAT_NO_ERRORS 1
1969 #define ACPI_PHAT_UNKNOWN_ERRORS 2
1970 #define ACPI_PHAT_ADVISORY 3
1972 /*******************************************************************************
1974 * PMTT - Platform Memory Topology Table (ACPI 5.0)
1977 ******************************************************************************/
1979 struct acpi_table_pmtt {
1980 struct acpi_table_header header; /* Common ACPI table header */
1981 u32 memory_device_count;
1983 * Immediately followed by:
1984 * MEMORY_DEVICE memory_device_struct[memory_device_count];
1988 /* Common header for PMTT subtables that follow main table */
1990 struct acpi_pmtt_header {
1996 u32 memory_device_count; /* Zero means no memory device structs follow */
1998 * Immediately followed by:
1999 * u8 type_specific_data[]
2000 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2004 /* Values for Type field above */
2006 #define ACPI_PMTT_TYPE_SOCKET 0
2007 #define ACPI_PMTT_TYPE_CONTROLLER 1
2008 #define ACPI_PMTT_TYPE_DIMM 2
2009 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */
2010 #define ACPI_PMTT_TYPE_VENDOR 0xFF
2012 /* Values for Flags field above */
2014 #define ACPI_PMTT_TOP_LEVEL 0x0001
2015 #define ACPI_PMTT_PHYSICAL 0x0002
2016 #define ACPI_PMTT_MEMORY_TYPE 0x000C
2019 * PMTT subtables, correspond to Type in struct acpi_pmtt_header
2022 /* 0: Socket Structure */
2024 struct acpi_pmtt_socket {
2025 struct acpi_pmtt_header header;
2030 * Immediately followed by:
2031 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2034 /* 1: Memory Controller subtable */
2036 struct acpi_pmtt_controller {
2037 struct acpi_pmtt_header header;
2042 * Immediately followed by:
2043 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2046 /* 2: Physical Component Identifier (DIMM) */
2048 struct acpi_pmtt_physical_component {
2049 struct acpi_pmtt_header header;
2053 /* 0xFF: Vendor Specific Data */
2055 struct acpi_pmtt_vendor_specific {
2056 struct acpi_pmtt_header header;
2060 * Immediately followed by:
2061 * u8 vendor_specific_data[];
2062 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2066 /*******************************************************************************
2068 * PPTT - Processor Properties Topology Table (ACPI 6.2)
2071 ******************************************************************************/
2073 struct acpi_table_pptt {
2074 struct acpi_table_header header; /* Common ACPI table header */
2077 /* Values for Type field above */
2079 enum acpi_pptt_type {
2080 ACPI_PPTT_TYPE_PROCESSOR = 0,
2081 ACPI_PPTT_TYPE_CACHE = 1,
2082 ACPI_PPTT_TYPE_ID = 2,
2083 ACPI_PPTT_TYPE_RESERVED = 3
2086 /* 0: Processor Hierarchy Node Structure */
2088 struct acpi_pptt_processor {
2089 struct acpi_subtable_header header;
2093 u32 acpi_processor_id;
2094 u32 number_of_priv_resources;
2099 #define ACPI_PPTT_PHYSICAL_PACKAGE (1)
2100 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
2101 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
2102 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
2103 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
2105 /* 1: Cache Type Structure */
2107 struct acpi_pptt_cache {
2108 struct acpi_subtable_header header;
2111 u32 next_level_of_cache;
2119 /* 1: Cache Type Structure for PPTT version 3 */
2121 struct acpi_pptt_cache_v1 {
2127 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
2128 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
2129 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
2130 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
2131 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
2132 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
2133 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
2134 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */
2136 /* Masks for Attributes */
2138 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
2139 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
2140 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
2142 /* Attributes describing cache */
2143 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
2144 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
2145 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
2146 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
2148 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
2149 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
2150 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
2151 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
2153 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
2154 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
2156 /* 2: ID Structure */
2158 struct acpi_pptt_id {
2159 struct acpi_subtable_header header;
2169 /*******************************************************************************
2171 * PRMT - Platform Runtime Mechanism Table
2174 ******************************************************************************/
2176 struct acpi_table_prmt {
2177 struct acpi_table_header header; /* Common ACPI table header */
2180 struct acpi_table_prmt_header {
2181 u8 platform_guid[16];
2182 u32 module_info_offset;
2183 u32 module_info_count;
2186 struct acpi_prmt_module_header {
2191 struct acpi_prmt_module_info {
2197 u16 handler_info_count;
2198 u32 handler_info_offset;
2199 u64 mmio_list_pointer;
2202 struct acpi_prmt_handler_info {
2205 u8 handler_guid[16];
2206 u64 handler_address;
2207 u64 static_data_buffer_address;
2208 u64 acpi_param_buffer_address;
2211 /*******************************************************************************
2213 * RASF - RAS Feature Table (ACPI 5.0)
2216 ******************************************************************************/
2218 struct acpi_table_rasf {
2219 struct acpi_table_header header; /* Common ACPI table header */
2223 /* RASF Platform Communication Channel Shared Memory Region */
2225 struct acpi_rasf_shared_memory {
2230 u8 capabilities[16];
2231 u8 set_capabilities[16];
2232 u16 num_parameter_blocks;
2233 u32 set_capabilities_status;
2236 /* RASF Parameter Block Structure Header */
2238 struct acpi_rasf_parameter_block {
2244 /* RASF Parameter Block Structure for PATROL_SCRUB */
2246 struct acpi_rasf_patrol_scrub_parameter {
2247 struct acpi_rasf_parameter_block header;
2248 u16 patrol_scrub_command;
2249 u64 requested_address_range[2];
2250 u64 actual_address_range[2];
2255 /* Masks for Flags and Speed fields above */
2257 #define ACPI_RASF_SCRUBBER_RUNNING 1
2258 #define ACPI_RASF_SPEED (7<<1)
2259 #define ACPI_RASF_SPEED_SLOW (0<<1)
2260 #define ACPI_RASF_SPEED_MEDIUM (4<<1)
2261 #define ACPI_RASF_SPEED_FAST (7<<1)
2263 /* Channel Commands */
2265 enum acpi_rasf_commands {
2266 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
2269 /* Platform RAS Capabilities */
2271 enum acpi_rasf_capabiliities {
2272 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
2273 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
2276 /* Patrol Scrub Commands */
2278 enum acpi_rasf_patrol_scrub_commands {
2279 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
2280 ACPI_RASF_START_PATROL_SCRUBBER = 2,
2281 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
2284 /* Channel Command flags */
2286 #define ACPI_RASF_GENERATE_SCI (1<<15)
2290 enum acpi_rasf_status {
2291 ACPI_RASF_SUCCESS = 0,
2292 ACPI_RASF_NOT_VALID = 1,
2293 ACPI_RASF_NOT_SUPPORTED = 2,
2295 ACPI_RASF_FAILED = 4,
2296 ACPI_RASF_ABORTED = 5,
2297 ACPI_RASF_INVALID_DATA = 6
2302 #define ACPI_RASF_COMMAND_COMPLETE (1)
2303 #define ACPI_RASF_SCI_DOORBELL (1<<1)
2304 #define ACPI_RASF_ERROR (1<<2)
2305 #define ACPI_RASF_STATUS (0x1F<<3)
2307 /*******************************************************************************
2309 * RGRT - Regulatory Graphics Resource Table
2312 * Conforms to "ACPI RGRT" available at:
2313 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/
2315 ******************************************************************************/
2317 struct acpi_table_rgrt {
2318 struct acpi_table_header header; /* Common ACPI table header */
2325 /* image_type values */
2327 enum acpi_rgrt_image_type {
2328 ACPI_RGRT_TYPE_RESERVED0 = 0,
2329 ACPI_RGRT_IMAGE_TYPE_PNG = 1,
2330 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
2333 /*******************************************************************************
2335 * SBST - Smart Battery Specification Table
2338 ******************************************************************************/
2340 struct acpi_table_sbst {
2341 struct acpi_table_header header; /* Common ACPI table header */
2347 /*******************************************************************************
2349 * SDEI - Software Delegated Exception Interface Descriptor Table
2351 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
2352 * May 8th, 2017. Copyright 2017 ARM Ltd.
2354 ******************************************************************************/
2356 struct acpi_table_sdei {
2357 struct acpi_table_header header; /* Common ACPI table header */
2360 /*******************************************************************************
2362 * SDEV - Secure Devices Table (ACPI 6.2)
2365 ******************************************************************************/
2367 struct acpi_table_sdev {
2368 struct acpi_table_header header; /* Common ACPI table header */
2371 struct acpi_sdev_header {
2377 /* Values for subtable type above */
2379 enum acpi_sdev_type {
2380 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
2381 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
2382 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
2385 /* Values for flags above */
2387 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
2388 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1)
2394 /* 0: Namespace Device Based Secure Device Structure */
2396 struct acpi_sdev_namespace {
2397 struct acpi_sdev_header header;
2398 u16 device_id_offset;
2399 u16 device_id_length;
2400 u16 vendor_data_offset;
2401 u16 vendor_data_length;
2404 struct acpi_sdev_secure_component {
2405 u16 secure_component_offset;
2406 u16 secure_component_length;
2410 * SDEV sub-subtables ("Components") for above
2412 struct acpi_sdev_component {
2413 struct acpi_sdev_header header;
2416 /* Values for sub-subtable type above */
2418 enum acpi_sac_type {
2419 ACPI_SDEV_TYPE_ID_COMPONENT = 0,
2420 ACPI_SDEV_TYPE_MEM_COMPONENT = 1
2423 struct acpi_sdev_id_component {
2424 struct acpi_sdev_header header;
2425 u16 hardware_id_offset;
2426 u16 hardware_id_length;
2427 u16 subsystem_id_offset;
2428 u16 subsystem_id_length;
2429 u16 hardware_revision;
2430 u8 hardware_rev_present;
2431 u8 class_code_present;
2434 u8 pci_programming_xface;
2437 struct acpi_sdev_mem_component {
2438 struct acpi_sdev_header header;
2440 u64 memory_base_address;
2444 /* 1: PCIe Endpoint Device Based Device Structure */
2446 struct acpi_sdev_pcie {
2447 struct acpi_sdev_header header;
2452 u16 vendor_data_offset;
2453 u16 vendor_data_length;
2456 /* 1a: PCIe Endpoint path entry */
2458 struct acpi_sdev_pcie_path {
2463 /*******************************************************************************
2465 * SVKL - Storage Volume Key Location Table (ACPI 6.4)
2466 * From: "Guest-Host-Communication Interface (GHCI) for Intel
2467 * Trust Domain Extensions (Intel TDX)".
2470 ******************************************************************************/
2472 struct acpi_table_svkl {
2473 struct acpi_table_header header; /* Common ACPI table header */
2477 struct acpi_svkl_key {
2484 enum acpi_svkl_type {
2485 ACPI_SVKL_TYPE_MAIN_STORAGE = 0,
2486 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */
2489 enum acpi_svkl_format {
2490 ACPI_SVKL_FORMAT_RAW_BINARY = 0,
2491 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */
2494 /*******************************************************************************
2496 * TDEL - TD-Event Log
2497 * From: "Guest-Host-Communication Interface (GHCI) for Intel
2498 * Trust Domain Extensions (Intel TDX)".
2501 ******************************************************************************/
2503 struct acpi_table_tdel {
2504 struct acpi_table_header header; /* Common ACPI table header */
2506 u64 log_area_minimum_length;
2507 u64 log_area_start_address;
2510 /* Reset to default packing */
2514 #endif /* __ACTBL2_H__ */