1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2 /******************************************************************************
4 * Name: actbl1.h - Additional ACPI table definitions
6 * Copyright (C) 2000 - 2022, Intel Corp.
8 *****************************************************************************/
13 /*******************************************************************************
15 * Additional ACPI Tables
17 * These tables are not consumed directly by the ACPICA subsystem, but are
18 * included here to support device drivers and the AML disassembler.
20 ******************************************************************************/
23 * Values for description table header signatures for tables defined in this
24 * file. Useful because they make it more difficult to inadvertently type in
25 * the wrong signature.
27 #define ACPI_SIG_AEST "AEST" /* Arm Error Source Table */
28 #define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */
29 #define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */
30 #define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */
31 #define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */
32 #define ACPI_SIG_CEDT "CEDT" /* CXL Early Discovery Table */
33 #define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */
34 #define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */
35 #define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */
36 #define ACPI_SIG_DBGP "DBGP" /* Debug Port table */
37 #define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */
38 #define ACPI_SIG_DRTM "DRTM" /* Dynamic Root of Trust for Measurement table */
39 #define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */
40 #define ACPI_SIG_EINJ "EINJ" /* Error Injection table */
41 #define ACPI_SIG_ERST "ERST" /* Error Record Serialization Table */
42 #define ACPI_SIG_FPDT "FPDT" /* Firmware Performance Data Table */
43 #define ACPI_SIG_GTDT "GTDT" /* Generic Timer Description Table */
44 #define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */
45 #define ACPI_SIG_HMAT "HMAT" /* Heterogeneous Memory Attributes Table */
46 #define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */
47 #define ACPI_SIG_IBFT "IBFT" /* iSCSI Boot Firmware Table */
48 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
50 #define ACPI_SIG_S3PT "S3PT" /* S3 Performance (sub)Table */
51 #define ACPI_SIG_PCCS "PCC" /* PCC Shared Memory Region */
53 #define ACPI_SIG_NBFT "NBFT" /* NVMe Boot Firmware Table */
55 /* Reserved table signatures */
57 #define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */
58 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
61 * These tables have been seen in the field, but no definition has been found
63 #ifdef ACPI_UNDEFINED_TABLES
64 #define ACPI_SIG_ATKG "ATKG"
65 #define ACPI_SIG_GSCI "GSCI" /* GMCH SCI table */
66 #define ACPI_SIG_IEIT "IEIT"
70 * All tables must be byte-packed to match the ACPI specification, since
71 * the tables are provided by the system BIOS.
76 * Note: C bitfields are not used for this reason:
78 * "Bitfields are great and easy to read, but unfortunately the C language
79 * does not specify the layout of bitfields in memory, which means they are
80 * essentially useless for dealing with packed data in on-disk formats or
81 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
82 * this decision was a design error in C. Ritchie could have picked an order
83 * and stuck with it." Norman Ramsey.
84 * See http://stackoverflow.com/a/1053662/41661
87 /*******************************************************************************
89 * Common subtable headers
91 ******************************************************************************/
93 /* Generic subtable header (used in MADT, SRAT, etc.) */
95 struct acpi_subtable_header {
100 /* Subtable header for WHEA tables (EINJ, ERST, WDAT) */
102 struct acpi_whea_header {
107 struct acpi_generic_address register_region;
108 u64 value; /* Value used with Read/Write register */
109 u64 mask; /* Bitmask required for this register instruction */
112 /*******************************************************************************
114 * ASF - Alert Standard Format table (Signature "ASF!")
117 * Conforms to the Alert Standard Format Specification V2.0, 23 April 2003
119 ******************************************************************************/
121 struct acpi_table_asf {
122 struct acpi_table_header header; /* Common ACPI table header */
125 /* ASF subtable header */
127 struct acpi_asf_header {
133 /* Values for Type field above */
136 ACPI_ASF_TYPE_INFO = 0,
137 ACPI_ASF_TYPE_ALERT = 1,
138 ACPI_ASF_TYPE_CONTROL = 2,
139 ACPI_ASF_TYPE_BOOT = 3,
140 ACPI_ASF_TYPE_ADDRESS = 4,
141 ACPI_ASF_TYPE_RESERVED = 5
148 /* 0: ASF Information */
150 struct acpi_asf_info {
151 struct acpi_asf_header header;
153 u8 min_poll_interval;
160 /* Masks for Flags field above */
162 #define ACPI_ASF_SMBUS_PROTOCOLS (1)
166 struct acpi_asf_alert {
167 struct acpi_asf_header header;
174 struct acpi_asf_alert_data {
189 /* 2: ASF Remote Control */
191 struct acpi_asf_remote {
192 struct acpi_asf_header header;
198 struct acpi_asf_control_data {
205 /* 3: ASF RMCP Boot Options */
207 struct acpi_asf_rmcp {
208 struct acpi_asf_header header;
220 struct acpi_asf_address {
221 struct acpi_asf_header header;
226 /*******************************************************************************
228 * BERT - Boot Error Record Table (ACPI 4.0)
231 ******************************************************************************/
233 struct acpi_table_bert {
234 struct acpi_table_header header; /* Common ACPI table header */
235 u32 region_length; /* Length of the boot error region */
236 u64 address; /* Physical address of the error region */
239 /* Boot Error Region (not a subtable, pointed to by Address field above) */
241 struct acpi_bert_region {
242 u32 block_status; /* Type of error information */
243 u32 raw_data_offset; /* Offset to raw error data */
244 u32 raw_data_length; /* Length of raw error data */
245 u32 data_length; /* Length of generic error data */
246 u32 error_severity; /* Severity code */
249 /* Values for block_status flags above */
251 #define ACPI_BERT_UNCORRECTABLE (1)
252 #define ACPI_BERT_CORRECTABLE (1<<1)
253 #define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2)
254 #define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3)
255 #define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */
257 /* Values for error_severity above */
259 enum acpi_bert_error_severity {
260 ACPI_BERT_ERROR_CORRECTABLE = 0,
261 ACPI_BERT_ERROR_FATAL = 1,
262 ACPI_BERT_ERROR_CORRECTED = 2,
263 ACPI_BERT_ERROR_NONE = 3,
264 ACPI_BERT_ERROR_RESERVED = 4 /* 4 and greater are reserved */
268 * Note: The generic error data that follows the error_severity field above
269 * uses the struct acpi_hest_generic_data defined under the HEST table below
272 /*******************************************************************************
274 * BGRT - Boot Graphics Resource Table (ACPI 5.0)
277 ******************************************************************************/
279 struct acpi_table_bgrt {
280 struct acpi_table_header header; /* Common ACPI table header */
289 /* Flags for Status field above */
291 #define ACPI_BGRT_DISPLAYED (1)
292 #define ACPI_BGRT_ORIENTATION_OFFSET (3 << 1)
294 /*******************************************************************************
296 * BOOT - Simple Boot Flag Table
299 * Conforms to the "Simple Boot Flag Specification", Version 2.1
301 ******************************************************************************/
303 struct acpi_table_boot {
304 struct acpi_table_header header; /* Common ACPI table header */
305 u8 cmos_index; /* Index in CMOS RAM for the boot register */
309 /*******************************************************************************
311 * CDAT - Coherent Device Attribute Table
314 * Conforms to the "Coherent Device Attribute Table (CDAT) Specification
315 " (Revision 1.01, October 2020.)
317 ******************************************************************************/
319 struct acpi_table_cdat {
320 u32 length; /* Length of table in bytes, including this header */
321 u8 revision; /* ACPI Specification minor version number */
322 u8 checksum; /* To make sum of entire table == 0 */
324 u32 sequence; /* Used to detect runtime CDAT table changes */
327 /* CDAT common subtable header */
329 struct acpi_cdat_header {
335 /* Values for Type field above */
337 enum acpi_cdat_type {
338 ACPI_CDAT_TYPE_DSMAS = 0,
339 ACPI_CDAT_TYPE_DSLBIS = 1,
340 ACPI_CDAT_TYPE_DSMSCIS = 2,
341 ACPI_CDAT_TYPE_DSIS = 3,
342 ACPI_CDAT_TYPE_DSEMTS = 4,
343 ACPI_CDAT_TYPE_SSLBIS = 5,
344 ACPI_CDAT_TYPE_RESERVED = 6 /* 6 through 0xFF are reserved */
347 /* Subtable 0: Device Scoped Memory Affinity Structure (DSMAS) */
349 struct acpi_cdat_dsmas {
353 u64 dpa_base_address;
357 /* Flags for subtable above */
359 #define ACPI_CEDT_DSMAS_NON_VOLATILE (1 << 2)
361 /* Subtable 1: Device scoped Latency and Bandwidth Information Structure (DSLBIS) */
363 struct acpi_cdat_dslbis {
365 u8 flags; /* If Handle matches a DSMAS handle, the definition of this field matches
366 * Flags field in HMAT System Locality Latency */
374 /* Subtable 2: Device Scoped Memory Side Cache Information Structure (DSMSCIS) */
376 struct acpi_cdat_dsmscis {
380 u32 cache_attributes;
383 /* Subtable 3: Device Scoped Initiator Structure (DSIS) */
385 struct acpi_cdat_dsis {
391 /* Flags for above subtable */
393 #define ACPI_CDAT_DSIS_MEM_ATTACHED (1 << 0)
395 /* Subtable 4: Device Scoped EFI Memory Type Structure (DSEMTS) */
397 struct acpi_cdat_dsemts {
405 /* Subtable 5: Switch Scoped Latency and Bandwidth Information Structure (SSLBIS) */
407 struct acpi_cdat_sslbis {
413 /* Sub-subtable for above, sslbe_entries field */
415 struct acpi_cdat_sslbe {
418 u16 latency_or_bandwidth;
422 /*******************************************************************************
424 * CEDT - CXL Early Discovery Table
427 * Conforms to the "CXL Early Discovery Table" (CXL 2.0, October 2020)
429 ******************************************************************************/
431 struct acpi_table_cedt {
432 struct acpi_table_header header; /* Common ACPI table header */
435 /* CEDT subtable header (Performance Record Structure) */
437 struct acpi_cedt_header {
443 /* Values for Type field above */
445 enum acpi_cedt_type {
446 ACPI_CEDT_TYPE_CHBS = 0,
447 ACPI_CEDT_TYPE_CFMWS = 1,
448 ACPI_CEDT_TYPE_CXIMS = 2,
449 ACPI_CEDT_TYPE_RDPAS = 3,
450 ACPI_CEDT_TYPE_RESERVED = 4,
453 /* Values for version field above */
455 #define ACPI_CEDT_CHBS_VERSION_CXL11 (0)
456 #define ACPI_CEDT_CHBS_VERSION_CXL20 (1)
458 /* Values for length field above */
460 #define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000)
461 #define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x10000)
467 /* 0: CXL Host Bridge Structure */
469 struct acpi_cedt_chbs {
470 struct acpi_cedt_header header;
478 /* 1: CXL Fixed Memory Window Structure */
480 struct acpi_cedt_cfmws {
481 struct acpi_cedt_header header;
486 u8 interleave_arithmetic;
491 u32 interleave_targets[];
494 struct acpi_cedt_cfmws_target_element {
495 u32 interleave_target;
498 /* Values for Interleave Arithmetic field above */
500 #define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0)
501 #define ACPI_CEDT_CFMWS_ARITHMETIC_XOR (1)
503 /* Values for Restrictions field above */
505 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE2 (1)
506 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE3 (1<<1)
507 #define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE (1<<2)
508 #define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1<<3)
509 #define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1<<4)
511 /* 2: CXL XOR Interleave Math Structure */
513 struct acpi_cedt_cxims {
514 struct acpi_cedt_header header;
521 /* 3: CXL RCEC Downstream Port Association Structure */
523 struct acpi_cedt_rdpas {
524 struct acpi_cedt_header header;
533 /* Masks for bdf field above */
534 #define ACPI_CEDT_RDPAS_BUS_MASK 0xff00
535 #define ACPI_CEDT_RDPAS_DEVICE_MASK 0x00f8
536 #define ACPI_CEDT_RDPAS_FUNCTION_MASK 0x0007
538 #define ACPI_CEDT_RDPAS_PROTOCOL_IO (0)
539 #define ACPI_CEDT_RDPAS_PROTOCOL_CACHEMEM (1)
541 /*******************************************************************************
543 * CPEP - Corrected Platform Error Polling table (ACPI 4.0)
546 ******************************************************************************/
548 struct acpi_table_cpep {
549 struct acpi_table_header header; /* Common ACPI table header */
555 struct acpi_cpep_polling {
556 struct acpi_subtable_header header;
557 u8 id; /* Processor ID */
558 u8 eid; /* Processor EID */
559 u32 interval; /* Polling interval (msec) */
562 /*******************************************************************************
564 * CSRT - Core System Resource Table
567 * Conforms to the "Core System Resource Table (CSRT)", November 14, 2011
569 ******************************************************************************/
571 struct acpi_table_csrt {
572 struct acpi_table_header header; /* Common ACPI table header */
575 /* Resource Group subtable */
577 struct acpi_csrt_group {
585 u32 shared_info_length;
587 /* Shared data immediately follows (Length = shared_info_length) */
590 /* Shared Info subtable */
592 struct acpi_csrt_shared_info {
598 u8 interrupt_polarity;
601 u8 dma_address_width;
602 u16 base_request_line;
603 u16 num_handshake_signals;
606 /* Resource descriptors immediately follow (Length = Group length - shared_info_length) */
609 /* Resource Descriptor subtable */
611 struct acpi_csrt_descriptor {
617 /* Resource-specific information immediately follows */
622 #define ACPI_CSRT_TYPE_INTERRUPT 0x0001
623 #define ACPI_CSRT_TYPE_TIMER 0x0002
624 #define ACPI_CSRT_TYPE_DMA 0x0003
626 /* Resource Subtypes */
628 #define ACPI_CSRT_XRUPT_LINE 0x0000
629 #define ACPI_CSRT_XRUPT_CONTROLLER 0x0001
630 #define ACPI_CSRT_TIMER 0x0000
631 #define ACPI_CSRT_DMA_CHANNEL 0x0000
632 #define ACPI_CSRT_DMA_CONTROLLER 0x0001
634 /*******************************************************************************
636 * DBG2 - Debug Port Table 2
637 * Version 0 (Both main table and subtables)
639 * Conforms to "Microsoft Debug Port Table 2 (DBG2)", September 21, 2020
641 ******************************************************************************/
643 struct acpi_table_dbg2 {
644 struct acpi_table_header header; /* Common ACPI table header */
649 struct acpi_dbg2_header {
654 /* Debug Device Information Subtable */
656 struct acpi_dbg2_device {
659 u8 register_count; /* Number of base_address registers */
667 u16 base_address_offset;
668 u16 address_size_offset;
671 * base_address (required) - Each in 12-byte Generic Address Structure format.
672 * address_size (required) - Array of u32 sizes corresponding to each base_address register.
673 * Namepath (required) - Null terminated string. Single dot if not supported.
674 * oem_data (optional) - Length is oem_data_length.
678 /* Types for port_type field above */
680 #define ACPI_DBG2_SERIAL_PORT 0x8000
681 #define ACPI_DBG2_1394_PORT 0x8001
682 #define ACPI_DBG2_USB_PORT 0x8002
683 #define ACPI_DBG2_NET_PORT 0x8003
685 /* Subtypes for port_subtype field above */
687 #define ACPI_DBG2_16550_COMPATIBLE 0x0000
688 #define ACPI_DBG2_16550_SUBSET 0x0001
689 #define ACPI_DBG2_MAX311XE_SPI 0x0002
690 #define ACPI_DBG2_ARM_PL011 0x0003
691 #define ACPI_DBG2_MSM8X60 0x0004
692 #define ACPI_DBG2_16550_NVIDIA 0x0005
693 #define ACPI_DBG2_TI_OMAP 0x0006
694 #define ACPI_DBG2_APM88XXXX 0x0008
695 #define ACPI_DBG2_MSM8974 0x0009
696 #define ACPI_DBG2_SAM5250 0x000A
697 #define ACPI_DBG2_INTEL_USIF 0x000B
698 #define ACPI_DBG2_IMX6 0x000C
699 #define ACPI_DBG2_ARM_SBSA_32BIT 0x000D
700 #define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E
701 #define ACPI_DBG2_ARM_DCC 0x000F
702 #define ACPI_DBG2_BCM2835 0x0010
703 #define ACPI_DBG2_SDM845_1_8432MHZ 0x0011
704 #define ACPI_DBG2_16550_WITH_GAS 0x0012
705 #define ACPI_DBG2_SDM845_7_372MHZ 0x0013
706 #define ACPI_DBG2_INTEL_LPSS 0x0014
708 #define ACPI_DBG2_1394_STANDARD 0x0000
710 #define ACPI_DBG2_USB_XHCI 0x0000
711 #define ACPI_DBG2_USB_EHCI 0x0001
713 /*******************************************************************************
715 * DBGP - Debug Port table
718 * Conforms to the "Debug Port Specification", Version 1.00, 2/9/2000
720 ******************************************************************************/
722 struct acpi_table_dbgp {
723 struct acpi_table_header header; /* Common ACPI table header */
724 u8 type; /* 0=full 16550, 1=subset of 16550 */
726 struct acpi_generic_address debug_port;
729 /*******************************************************************************
731 * DMAR - DMA Remapping table
734 * Conforms to "Intel Virtualization Technology for Directed I/O",
735 * Version 2.3, October 2014
737 ******************************************************************************/
739 struct acpi_table_dmar {
740 struct acpi_table_header header; /* Common ACPI table header */
741 u8 width; /* Host Address Width */
746 /* Masks for Flags field above */
748 #define ACPI_DMAR_INTR_REMAP (1)
749 #define ACPI_DMAR_X2APIC_OPT_OUT (1<<1)
750 #define ACPI_DMAR_X2APIC_MODE (1<<2)
752 /* DMAR subtable header */
754 struct acpi_dmar_header {
759 /* Values for subtable type in struct acpi_dmar_header */
761 enum acpi_dmar_type {
762 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0,
763 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1,
764 ACPI_DMAR_TYPE_ROOT_ATS = 2,
765 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3,
766 ACPI_DMAR_TYPE_NAMESPACE = 4,
767 ACPI_DMAR_TYPE_SATC = 5,
768 ACPI_DMAR_TYPE_RESERVED = 6 /* 6 and greater are reserved */
771 /* DMAR Device Scope structure */
773 struct acpi_dmar_device_scope {
781 /* Values for entry_type in struct acpi_dmar_device_scope - device types */
783 enum acpi_dmar_scope_type {
784 ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0,
785 ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1,
786 ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2,
787 ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3,
788 ACPI_DMAR_SCOPE_TYPE_HPET = 4,
789 ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5,
790 ACPI_DMAR_SCOPE_TYPE_RESERVED = 6 /* 6 and greater are reserved */
793 struct acpi_dmar_pci_path {
799 * DMAR Subtables, correspond to Type in struct acpi_dmar_header
802 /* 0: Hardware Unit Definition */
804 struct acpi_dmar_hardware_unit {
805 struct acpi_dmar_header header;
807 u8 size; /* Size of the register set */
809 u64 address; /* Register Base Address */
812 /* Masks for Flags field above */
814 #define ACPI_DMAR_INCLUDE_ALL (1)
816 /* 1: Reserved Memory Definition */
818 struct acpi_dmar_reserved_memory {
819 struct acpi_dmar_header header;
822 u64 base_address; /* 4K aligned base address */
823 u64 end_address; /* 4K aligned limit address */
826 /* Masks for Flags field above */
828 #define ACPI_DMAR_ALLOW_ALL (1)
830 /* 2: Root Port ATS Capability Reporting Structure */
832 struct acpi_dmar_atsr {
833 struct acpi_dmar_header header;
839 /* Masks for Flags field above */
841 #define ACPI_DMAR_ALL_PORTS (1)
843 /* 3: Remapping Hardware Static Affinity Structure */
845 struct acpi_dmar_rhsa {
846 struct acpi_dmar_header header;
849 u32 proximity_domain;
852 /* 4: ACPI Namespace Device Declaration Structure */
854 struct acpi_dmar_andd {
855 struct acpi_dmar_header header;
861 /* 5: SOC Integrated Address Translation Cache Reporting Structure */
863 struct acpi_dmar_satc {
864 struct acpi_dmar_header header;
869 /*******************************************************************************
871 * DRTM - Dynamic Root of Trust for Measurement table
872 * Conforms to "TCG D-RTM Architecture" June 17 2013, Version 1.0.0
875 ******************************************************************************/
877 struct acpi_table_drtm {
878 struct acpi_table_header header; /* Common ACPI table header */
879 u64 entry_base_address;
884 u64 log_area_address;
886 u64 arch_dependent_address;
890 /* Flag Definitions for above */
892 #define ACPI_DRTM_ACCESS_ALLOWED (1)
893 #define ACPI_DRTM_ENABLE_GAP_CODE (1<<1)
894 #define ACPI_DRTM_INCOMPLETE_MEASUREMENTS (1<<2)
895 #define ACPI_DRTM_AUTHORITY_ORDER (1<<3)
897 /* 1) Validated Tables List (64-bit addresses) */
899 struct acpi_drtm_vtable_list {
900 u32 validated_table_count;
901 u64 validated_tables[1];
904 /* 2) Resources List (of Resource Descriptors) */
906 /* Resource Descriptor */
908 struct acpi_drtm_resource {
914 struct acpi_drtm_resource_list {
916 struct acpi_drtm_resource resources[1];
919 /* 3) Platform-specific Identifiers List */
921 struct acpi_drtm_dps_id {
926 /*******************************************************************************
928 * ECDT - Embedded Controller Boot Resources Table
931 ******************************************************************************/
933 struct acpi_table_ecdt {
934 struct acpi_table_header header; /* Common ACPI table header */
935 struct acpi_generic_address control; /* Address of EC command/status register */
936 struct acpi_generic_address data; /* Address of EC data register */
937 u32 uid; /* Unique ID - must be same as the EC _UID method */
938 u8 gpe; /* The GPE for the EC */
939 u8 id[1]; /* Full namepath of the EC in the ACPI namespace */
942 /*******************************************************************************
944 * EINJ - Error Injection Table (ACPI 4.0)
947 ******************************************************************************/
949 struct acpi_table_einj {
950 struct acpi_table_header header; /* Common ACPI table header */
957 /* EINJ Injection Instruction Entries (actions) */
959 struct acpi_einj_entry {
960 struct acpi_whea_header whea_header; /* Common header for WHEA tables */
963 /* Masks for Flags field above */
965 #define ACPI_EINJ_PRESERVE (1)
967 /* Values for Action field above */
969 enum acpi_einj_actions {
970 ACPI_EINJ_BEGIN_OPERATION = 0,
971 ACPI_EINJ_GET_TRIGGER_TABLE = 1,
972 ACPI_EINJ_SET_ERROR_TYPE = 2,
973 ACPI_EINJ_GET_ERROR_TYPE = 3,
974 ACPI_EINJ_END_OPERATION = 4,
975 ACPI_EINJ_EXECUTE_OPERATION = 5,
976 ACPI_EINJ_CHECK_BUSY_STATUS = 6,
977 ACPI_EINJ_GET_COMMAND_STATUS = 7,
978 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 8,
979 ACPI_EINJ_GET_EXECUTE_TIMINGS = 9,
980 ACPI_EINJ_ACTION_RESERVED = 10, /* 10 and greater are reserved */
981 ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */
984 /* Values for Instruction field above */
986 enum acpi_einj_instructions {
987 ACPI_EINJ_READ_REGISTER = 0,
988 ACPI_EINJ_READ_REGISTER_VALUE = 1,
989 ACPI_EINJ_WRITE_REGISTER = 2,
990 ACPI_EINJ_WRITE_REGISTER_VALUE = 3,
992 ACPI_EINJ_FLUSH_CACHELINE = 5,
993 ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */
996 struct acpi_einj_error_type_with_addr {
998 u32 vendor_struct_offset;
1006 struct acpi_einj_vendor {
1015 /* EINJ Trigger Error Action Table */
1017 struct acpi_einj_trigger {
1024 /* Command status return values */
1026 enum acpi_einj_command_status {
1027 ACPI_EINJ_SUCCESS = 0,
1028 ACPI_EINJ_FAILURE = 1,
1029 ACPI_EINJ_INVALID_ACCESS = 2,
1030 ACPI_EINJ_STATUS_RESERVED = 3 /* 3 and greater are reserved */
1033 /* Error types returned from ACPI_EINJ_GET_ERROR_TYPE (bitfield) */
1035 #define ACPI_EINJ_PROCESSOR_CORRECTABLE (1)
1036 #define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1)
1037 #define ACPI_EINJ_PROCESSOR_FATAL (1<<2)
1038 #define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3)
1039 #define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4)
1040 #define ACPI_EINJ_MEMORY_FATAL (1<<5)
1041 #define ACPI_EINJ_PCIX_CORRECTABLE (1<<6)
1042 #define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7)
1043 #define ACPI_EINJ_PCIX_FATAL (1<<8)
1044 #define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9)
1045 #define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10)
1046 #define ACPI_EINJ_PLATFORM_FATAL (1<<11)
1047 #define ACPI_EINJ_VENDOR_DEFINED (1<<31)
1049 /*******************************************************************************
1051 * ERST - Error Record Serialization Table (ACPI 4.0)
1054 ******************************************************************************/
1056 struct acpi_table_erst {
1057 struct acpi_table_header header; /* Common ACPI table header */
1063 /* ERST Serialization Entries (actions) */
1065 struct acpi_erst_entry {
1066 struct acpi_whea_header whea_header; /* Common header for WHEA tables */
1069 /* Masks for Flags field above */
1071 #define ACPI_ERST_PRESERVE (1)
1073 /* Values for Action field above */
1075 enum acpi_erst_actions {
1076 ACPI_ERST_BEGIN_WRITE = 0,
1077 ACPI_ERST_BEGIN_READ = 1,
1078 ACPI_ERST_BEGIN_CLEAR = 2,
1080 ACPI_ERST_SET_RECORD_OFFSET = 4,
1081 ACPI_ERST_EXECUTE_OPERATION = 5,
1082 ACPI_ERST_CHECK_BUSY_STATUS = 6,
1083 ACPI_ERST_GET_COMMAND_STATUS = 7,
1084 ACPI_ERST_GET_RECORD_ID = 8,
1085 ACPI_ERST_SET_RECORD_ID = 9,
1086 ACPI_ERST_GET_RECORD_COUNT = 10,
1087 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11,
1088 ACPI_ERST_NOT_USED = 12,
1089 ACPI_ERST_GET_ERROR_RANGE = 13,
1090 ACPI_ERST_GET_ERROR_LENGTH = 14,
1091 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15,
1092 ACPI_ERST_EXECUTE_TIMINGS = 16,
1093 ACPI_ERST_ACTION_RESERVED = 17 /* 17 and greater are reserved */
1096 /* Values for Instruction field above */
1098 enum acpi_erst_instructions {
1099 ACPI_ERST_READ_REGISTER = 0,
1100 ACPI_ERST_READ_REGISTER_VALUE = 1,
1101 ACPI_ERST_WRITE_REGISTER = 2,
1102 ACPI_ERST_WRITE_REGISTER_VALUE = 3,
1104 ACPI_ERST_LOAD_VAR1 = 5,
1105 ACPI_ERST_LOAD_VAR2 = 6,
1106 ACPI_ERST_STORE_VAR1 = 7,
1108 ACPI_ERST_SUBTRACT = 9,
1109 ACPI_ERST_ADD_VALUE = 10,
1110 ACPI_ERST_SUBTRACT_VALUE = 11,
1111 ACPI_ERST_STALL = 12,
1112 ACPI_ERST_STALL_WHILE_TRUE = 13,
1113 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14,
1114 ACPI_ERST_GOTO = 15,
1115 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16,
1116 ACPI_ERST_SET_DST_ADDRESS_BASE = 17,
1117 ACPI_ERST_MOVE_DATA = 18,
1118 ACPI_ERST_INSTRUCTION_RESERVED = 19 /* 19 and greater are reserved */
1121 /* Command status return values */
1123 enum acpi_erst_command_status {
1124 ACPI_ERST_SUCCESS = 0,
1125 ACPI_ERST_NO_SPACE = 1,
1126 ACPI_ERST_NOT_AVAILABLE = 2,
1127 ACPI_ERST_FAILURE = 3,
1128 ACPI_ERST_RECORD_EMPTY = 4,
1129 ACPI_ERST_NOT_FOUND = 5,
1130 ACPI_ERST_STATUS_RESERVED = 6 /* 6 and greater are reserved */
1133 /* Error Record Serialization Information */
1135 struct acpi_erst_info {
1136 u16 signature; /* Should be "ER" */
1140 /*******************************************************************************
1142 * FPDT - Firmware Performance Data Table (ACPI 5.0)
1145 ******************************************************************************/
1147 struct acpi_table_fpdt {
1148 struct acpi_table_header header; /* Common ACPI table header */
1151 /* FPDT subtable header (Performance Record Structure) */
1153 struct acpi_fpdt_header {
1159 /* Values for Type field above */
1161 enum acpi_fpdt_type {
1162 ACPI_FPDT_TYPE_BOOT = 0,
1163 ACPI_FPDT_TYPE_S3PERF = 1
1170 /* 0: Firmware Basic Boot Performance Record */
1172 struct acpi_fpdt_boot_pointer {
1173 struct acpi_fpdt_header header;
1178 /* 1: S3 Performance Table Pointer Record */
1180 struct acpi_fpdt_s3pt_pointer {
1181 struct acpi_fpdt_header header;
1187 * S3PT - S3 Performance Table. This table is pointed to by the
1188 * S3 Pointer Record above.
1190 struct acpi_table_s3pt {
1191 u8 signature[4]; /* "S3PT" */
1196 * S3PT Subtables (Not part of the actual FPDT)
1199 /* Values for Type field in S3PT header */
1201 enum acpi_s3pt_type {
1202 ACPI_S3PT_TYPE_RESUME = 0,
1203 ACPI_S3PT_TYPE_SUSPEND = 1,
1204 ACPI_FPDT_BOOT_PERFORMANCE = 2
1207 struct acpi_s3pt_resume {
1208 struct acpi_fpdt_header header;
1214 struct acpi_s3pt_suspend {
1215 struct acpi_fpdt_header header;
1221 * FPDT Boot Performance Record (Not part of the actual FPDT)
1223 struct acpi_fpdt_boot {
1224 struct acpi_fpdt_header header;
1229 u64 exit_services_entry;
1230 u64 exit_services_exit;
1233 /*******************************************************************************
1235 * GTDT - Generic Timer Description Table (ACPI 5.1)
1238 ******************************************************************************/
1240 struct acpi_table_gtdt {
1241 struct acpi_table_header header; /* Common ACPI table header */
1242 u64 counter_block_addresss;
1244 u32 secure_el1_interrupt;
1245 u32 secure_el1_flags;
1246 u32 non_secure_el1_interrupt;
1247 u32 non_secure_el1_flags;
1248 u32 virtual_timer_interrupt;
1249 u32 virtual_timer_flags;
1250 u32 non_secure_el2_interrupt;
1251 u32 non_secure_el2_flags;
1252 u64 counter_read_block_address;
1253 u32 platform_timer_count;
1254 u32 platform_timer_offset;
1257 /* Flag Definitions: Timer Block Physical Timers and Virtual timers */
1259 #define ACPI_GTDT_INTERRUPT_MODE (1)
1260 #define ACPI_GTDT_INTERRUPT_POLARITY (1<<1)
1261 #define ACPI_GTDT_ALWAYS_ON (1<<2)
1263 struct acpi_gtdt_el2 {
1264 u32 virtual_el2_timer_gsiv;
1265 u32 virtual_el2_timer_flags;
1268 /* Common GTDT subtable header */
1270 struct acpi_gtdt_header {
1275 /* Values for GTDT subtable type above */
1277 enum acpi_gtdt_type {
1278 ACPI_GTDT_TYPE_TIMER_BLOCK = 0,
1279 ACPI_GTDT_TYPE_WATCHDOG = 1,
1280 ACPI_GTDT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
1283 /* GTDT Subtables, correspond to Type in struct acpi_gtdt_header */
1285 /* 0: Generic Timer Block */
1287 struct acpi_gtdt_timer_block {
1288 struct acpi_gtdt_header header;
1295 /* Timer Sub-Structure, one per timer */
1297 struct acpi_gtdt_timer_entry {
1301 u64 el0_base_address;
1302 u32 timer_interrupt;
1304 u32 virtual_timer_interrupt;
1305 u32 virtual_timer_flags;
1309 /* Flag Definitions: timer_flags and virtual_timer_flags above */
1311 #define ACPI_GTDT_GT_IRQ_MODE (1)
1312 #define ACPI_GTDT_GT_IRQ_POLARITY (1<<1)
1314 /* Flag Definitions: common_flags above */
1316 #define ACPI_GTDT_GT_IS_SECURE_TIMER (1)
1317 #define ACPI_GTDT_GT_ALWAYS_ON (1<<1)
1319 /* 1: SBSA Generic Watchdog Structure */
1321 struct acpi_gtdt_watchdog {
1322 struct acpi_gtdt_header header;
1324 u64 refresh_frame_address;
1325 u64 control_frame_address;
1326 u32 timer_interrupt;
1330 /* Flag Definitions: timer_flags above */
1332 #define ACPI_GTDT_WATCHDOG_IRQ_MODE (1)
1333 #define ACPI_GTDT_WATCHDOG_IRQ_POLARITY (1<<1)
1334 #define ACPI_GTDT_WATCHDOG_SECURE (1<<2)
1336 /*******************************************************************************
1338 * HEST - Hardware Error Source Table (ACPI 4.0)
1341 ******************************************************************************/
1343 struct acpi_table_hest {
1344 struct acpi_table_header header; /* Common ACPI table header */
1345 u32 error_source_count;
1348 /* HEST subtable header */
1350 struct acpi_hest_header {
1355 /* Values for Type field above for subtables */
1357 enum acpi_hest_types {
1358 ACPI_HEST_TYPE_IA32_CHECK = 0,
1359 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1,
1360 ACPI_HEST_TYPE_IA32_NMI = 2,
1361 ACPI_HEST_TYPE_NOT_USED3 = 3,
1362 ACPI_HEST_TYPE_NOT_USED4 = 4,
1363 ACPI_HEST_TYPE_NOT_USED5 = 5,
1364 ACPI_HEST_TYPE_AER_ROOT_PORT = 6,
1365 ACPI_HEST_TYPE_AER_ENDPOINT = 7,
1366 ACPI_HEST_TYPE_AER_BRIDGE = 8,
1367 ACPI_HEST_TYPE_GENERIC_ERROR = 9,
1368 ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10,
1369 ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11,
1370 ACPI_HEST_TYPE_RESERVED = 12 /* 12 and greater are reserved */
1374 * HEST substructures contained in subtables
1378 * IA32 Error Bank(s) - Follows the struct acpi_hest_ia_machine_check and
1379 * struct acpi_hest_ia_corrected structures.
1381 struct acpi_hest_ia_error_bank {
1383 u8 clear_status_on_init;
1386 u32 control_register;
1388 u32 status_register;
1389 u32 address_register;
1393 /* Common HEST sub-structure for PCI/AER structures below (6,7,8) */
1395 struct acpi_hest_aer_common {
1399 u32 records_to_preallocate;
1400 u32 max_sections_per_record;
1401 u32 bus; /* Bus and Segment numbers */
1406 u32 uncorrectable_mask;
1407 u32 uncorrectable_severity;
1408 u32 correctable_mask;
1409 u32 advanced_capabilities;
1412 /* Masks for HEST Flags fields */
1414 #define ACPI_HEST_FIRMWARE_FIRST (1)
1415 #define ACPI_HEST_GLOBAL (1<<1)
1416 #define ACPI_HEST_GHES_ASSIST (1<<2)
1419 * Macros to access the bus/segment numbers in Bus field above:
1420 * Bus number is encoded in bits 7:0
1421 * Segment number is encoded in bits 23:8
1423 #define ACPI_HEST_BUS(bus) ((bus) & 0xFF)
1424 #define ACPI_HEST_SEGMENT(bus) (((bus) >> 8) & 0xFFFF)
1426 /* Hardware Error Notification */
1428 struct acpi_hest_notify {
1431 u16 config_write_enable;
1434 u32 polling_threshold_value;
1435 u32 polling_threshold_window;
1436 u32 error_threshold_value;
1437 u32 error_threshold_window;
1440 /* Values for Notify Type field above */
1442 enum acpi_hest_notify_types {
1443 ACPI_HEST_NOTIFY_POLLED = 0,
1444 ACPI_HEST_NOTIFY_EXTERNAL = 1,
1445 ACPI_HEST_NOTIFY_LOCAL = 2,
1446 ACPI_HEST_NOTIFY_SCI = 3,
1447 ACPI_HEST_NOTIFY_NMI = 4,
1448 ACPI_HEST_NOTIFY_CMCI = 5, /* ACPI 5.0 */
1449 ACPI_HEST_NOTIFY_MCE = 6, /* ACPI 5.0 */
1450 ACPI_HEST_NOTIFY_GPIO = 7, /* ACPI 6.0 */
1451 ACPI_HEST_NOTIFY_SEA = 8, /* ACPI 6.1 */
1452 ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1 */
1453 ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1 */
1454 ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11, /* ACPI 6.2 */
1455 ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */
1458 /* Values for config_write_enable bitfield above */
1460 #define ACPI_HEST_TYPE (1)
1461 #define ACPI_HEST_POLL_INTERVAL (1<<1)
1462 #define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2)
1463 #define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3)
1464 #define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4)
1465 #define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5)
1471 /* 0: IA32 Machine Check Exception */
1473 struct acpi_hest_ia_machine_check {
1474 struct acpi_hest_header header;
1476 u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */
1478 u32 records_to_preallocate;
1479 u32 max_sections_per_record;
1480 u64 global_capability_data;
1481 u64 global_control_data;
1482 u8 num_hardware_banks;
1486 /* 1: IA32 Corrected Machine Check */
1488 struct acpi_hest_ia_corrected {
1489 struct acpi_hest_header header;
1491 u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */
1493 u32 records_to_preallocate;
1494 u32 max_sections_per_record;
1495 struct acpi_hest_notify notify;
1496 u8 num_hardware_banks;
1500 /* 2: IA32 Non-Maskable Interrupt */
1502 struct acpi_hest_ia_nmi {
1503 struct acpi_hest_header header;
1505 u32 records_to_preallocate;
1506 u32 max_sections_per_record;
1507 u32 max_raw_data_length;
1510 /* 3,4,5: Not used */
1512 /* 6: PCI Express Root Port AER */
1514 struct acpi_hest_aer_root {
1515 struct acpi_hest_header header;
1516 struct acpi_hest_aer_common aer;
1517 u32 root_error_command;
1520 /* 7: PCI Express AER (AER Endpoint) */
1522 struct acpi_hest_aer {
1523 struct acpi_hest_header header;
1524 struct acpi_hest_aer_common aer;
1527 /* 8: PCI Express/PCI-X Bridge AER */
1529 struct acpi_hest_aer_bridge {
1530 struct acpi_hest_header header;
1531 struct acpi_hest_aer_common aer;
1532 u32 uncorrectable_mask2;
1533 u32 uncorrectable_severity2;
1534 u32 advanced_capabilities2;
1537 /* 9: Generic Hardware Error Source */
1539 struct acpi_hest_generic {
1540 struct acpi_hest_header header;
1541 u16 related_source_id;
1544 u32 records_to_preallocate;
1545 u32 max_sections_per_record;
1546 u32 max_raw_data_length;
1547 struct acpi_generic_address error_status_address;
1548 struct acpi_hest_notify notify;
1549 u32 error_block_length;
1552 /* 10: Generic Hardware Error Source, version 2 */
1554 struct acpi_hest_generic_v2 {
1555 struct acpi_hest_header header;
1556 u16 related_source_id;
1559 u32 records_to_preallocate;
1560 u32 max_sections_per_record;
1561 u32 max_raw_data_length;
1562 struct acpi_generic_address error_status_address;
1563 struct acpi_hest_notify notify;
1564 u32 error_block_length;
1565 struct acpi_generic_address read_ack_register;
1566 u64 read_ack_preserve;
1570 /* Generic Error Status block */
1572 struct acpi_hest_generic_status {
1574 u32 raw_data_offset;
1575 u32 raw_data_length;
1580 /* Values for block_status flags above */
1582 #define ACPI_HEST_UNCORRECTABLE (1)
1583 #define ACPI_HEST_CORRECTABLE (1<<1)
1584 #define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2)
1585 #define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3)
1586 #define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */
1588 /* Generic Error Data entry */
1590 struct acpi_hest_generic_data {
1591 u8 section_type[16];
1596 u32 error_data_length;
1601 /* Extension for revision 0x0300 */
1603 struct acpi_hest_generic_data_v300 {
1604 u8 section_type[16];
1609 u32 error_data_length;
1615 /* Values for error_severity above */
1617 #define ACPI_HEST_GEN_ERROR_RECOVERABLE 0
1618 #define ACPI_HEST_GEN_ERROR_FATAL 1
1619 #define ACPI_HEST_GEN_ERROR_CORRECTED 2
1620 #define ACPI_HEST_GEN_ERROR_NONE 3
1622 /* Flags for validation_bits above */
1624 #define ACPI_HEST_GEN_VALID_FRU_ID (1)
1625 #define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1)
1626 #define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2)
1628 /* 11: IA32 Deferred Machine Check Exception (ACPI 6.2) */
1630 struct acpi_hest_ia_deferred_check {
1631 struct acpi_hest_header header;
1633 u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */
1635 u32 records_to_preallocate;
1636 u32 max_sections_per_record;
1637 struct acpi_hest_notify notify;
1638 u8 num_hardware_banks;
1642 /*******************************************************************************
1644 * HMAT - Heterogeneous Memory Attributes Table (ACPI 6.2)
1647 ******************************************************************************/
1649 struct acpi_table_hmat {
1650 struct acpi_table_header header; /* Common ACPI table header */
1654 /* Values for HMAT structure types */
1656 enum acpi_hmat_type {
1657 ACPI_HMAT_TYPE_PROXIMITY = 0, /* Memory proximity domain attributes */
1658 ACPI_HMAT_TYPE_LOCALITY = 1, /* System locality latency and bandwidth information */
1659 ACPI_HMAT_TYPE_CACHE = 2, /* Memory side cache information */
1660 ACPI_HMAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */
1663 struct acpi_hmat_structure {
1670 * HMAT Structures, correspond to Type in struct acpi_hmat_structure
1673 /* 0: Memory proximity domain attributes */
1675 struct acpi_hmat_proximity_domain {
1676 struct acpi_hmat_structure header;
1679 u32 processor_PD; /* Processor proximity domain */
1680 u32 memory_PD; /* Memory proximity domain */
1686 /* Masks for Flags field above */
1688 #define ACPI_HMAT_PROCESSOR_PD_VALID (1) /* 1: processor_PD field is valid */
1689 #define ACPI_HMAT_MEMORY_PD_VALID (1<<1) /* 1: memory_PD field is valid */
1690 #define ACPI_HMAT_RESERVATION_HINT (1<<2) /* 1: Reservation hint */
1692 /* 1: System locality latency and bandwidth information */
1694 struct acpi_hmat_locality {
1695 struct acpi_hmat_structure header;
1698 u8 min_transfer_size;
1700 u32 number_of_initiator_Pds;
1701 u32 number_of_target_Pds;
1703 u64 entry_base_unit;
1706 /* Masks for Flags field above */
1708 #define ACPI_HMAT_MEMORY_HIERARCHY (0x0F) /* Bits 0-3 */
1710 /* Values for Memory Hierarchy flags */
1712 #define ACPI_HMAT_MEMORY 0
1713 #define ACPI_HMAT_LAST_LEVEL_CACHE 1
1714 #define ACPI_HMAT_1ST_LEVEL_CACHE 2
1715 #define ACPI_HMAT_2ND_LEVEL_CACHE 3
1716 #define ACPI_HMAT_3RD_LEVEL_CACHE 4
1717 #define ACPI_HMAT_MINIMUM_XFER_SIZE 0x10 /* Bit 4: ACPI 6.4 */
1718 #define ACPI_HMAT_NON_SEQUENTIAL_XFERS 0x20 /* Bit 5: ACPI 6.4 */
1721 /* Values for data_type field above */
1723 #define ACPI_HMAT_ACCESS_LATENCY 0
1724 #define ACPI_HMAT_READ_LATENCY 1
1725 #define ACPI_HMAT_WRITE_LATENCY 2
1726 #define ACPI_HMAT_ACCESS_BANDWIDTH 3
1727 #define ACPI_HMAT_READ_BANDWIDTH 4
1728 #define ACPI_HMAT_WRITE_BANDWIDTH 5
1730 /* 2: Memory side cache information */
1732 struct acpi_hmat_cache {
1733 struct acpi_hmat_structure header;
1737 u32 cache_attributes;
1739 u16 number_of_SMBIOShandles;
1742 /* Masks for cache_attributes field above */
1744 #define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F)
1745 #define ACPI_HMAT_CACHE_LEVEL (0x000000F0)
1746 #define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00)
1747 #define ACPI_HMAT_WRITE_POLICY (0x0000F000)
1748 #define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000)
1750 /* Values for cache associativity flag */
1752 #define ACPI_HMAT_CA_NONE (0)
1753 #define ACPI_HMAT_CA_DIRECT_MAPPED (1)
1754 #define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2)
1756 /* Values for write policy flag */
1758 #define ACPI_HMAT_CP_NONE (0)
1759 #define ACPI_HMAT_CP_WB (1)
1760 #define ACPI_HMAT_CP_WT (2)
1762 /*******************************************************************************
1764 * HPET - High Precision Event Timer table
1767 * Conforms to "IA-PC HPET (High Precision Event Timers) Specification",
1768 * Version 1.0a, October 2004
1770 ******************************************************************************/
1772 struct acpi_table_hpet {
1773 struct acpi_table_header header; /* Common ACPI table header */
1774 u32 id; /* Hardware ID of event timer block */
1775 struct acpi_generic_address address; /* Address of event timer block */
1776 u8 sequence; /* HPET sequence number */
1777 u16 minimum_tick; /* Main counter min tick, periodic mode */
1781 /* Masks for Flags field above */
1783 #define ACPI_HPET_PAGE_PROTECT_MASK (3)
1785 /* Values for Page Protect flags */
1787 enum acpi_hpet_page_protect {
1788 ACPI_HPET_NO_PAGE_PROTECT = 0,
1789 ACPI_HPET_PAGE_PROTECT4 = 1,
1790 ACPI_HPET_PAGE_PROTECT64 = 2
1793 /*******************************************************************************
1795 * IBFT - Boot Firmware Table
1798 * Conforms to "iSCSI Boot Firmware Table (iBFT) as Defined in ACPI 3.0b
1799 * Specification", Version 1.01, March 1, 2007
1801 * Note: It appears that this table is not intended to appear in the RSDT/XSDT.
1802 * Therefore, it is not currently supported by the disassembler.
1804 ******************************************************************************/
1806 struct acpi_table_ibft {
1807 struct acpi_table_header header; /* Common ACPI table header */
1811 /* IBFT common subtable header */
1813 struct acpi_ibft_header {
1821 /* Values for Type field above */
1823 enum acpi_ibft_type {
1824 ACPI_IBFT_TYPE_NOT_USED = 0,
1825 ACPI_IBFT_TYPE_CONTROL = 1,
1826 ACPI_IBFT_TYPE_INITIATOR = 2,
1827 ACPI_IBFT_TYPE_NIC = 3,
1828 ACPI_IBFT_TYPE_TARGET = 4,
1829 ACPI_IBFT_TYPE_EXTENSIONS = 5,
1830 ACPI_IBFT_TYPE_RESERVED = 6 /* 6 and greater are reserved */
1833 /* IBFT subtables */
1835 struct acpi_ibft_control {
1836 struct acpi_ibft_header header;
1838 u16 initiator_offset;
1845 struct acpi_ibft_initiator {
1846 struct acpi_ibft_header header;
1849 u8 primary_server[16];
1850 u8 secondary_server[16];
1855 struct acpi_ibft_nic {
1856 struct acpi_ibft_header header;
1858 u8 subnet_mask_prefix;
1862 u8 secondary_dns[16];
1871 struct acpi_ibft_target {
1872 struct acpi_ibft_header header;
1873 u8 target_ip_address[16];
1874 u16 target_ip_socket;
1875 u8 target_boot_lun[8];
1878 u16 target_name_length;
1879 u16 target_name_offset;
1880 u16 chap_name_length;
1881 u16 chap_name_offset;
1882 u16 chap_secret_length;
1883 u16 chap_secret_offset;
1884 u16 reverse_chap_name_length;
1885 u16 reverse_chap_name_offset;
1886 u16 reverse_chap_secret_length;
1887 u16 reverse_chap_secret_offset;
1890 /* Reset to default packing */
1894 #endif /* __ACTBL1_H__ */