2 * w83627hf/thf WDT driver
4 * (c) Copyright 2013 Guenter Roeck
5 * converted to watchdog infrastructure
7 * (c) Copyright 2007 Vlad Drukker <vlad@storewiz.com>
8 * added support for W83627THF.
10 * (c) Copyright 2003,2007 Pádraig Brady <P@draigBrady.com>
12 * Based on advantechwdt.c which is based on wdt.c.
13 * Original copyright messages:
15 * (c) Copyright 2000-2001 Marek Michalkiewicz <marekm@linux.org.pl>
17 * (c) Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>,
18 * All Rights Reserved.
20 * This program is free software; you can redistribute it and/or
21 * modify it under the terms of the GNU General Public License
22 * as published by the Free Software Foundation; either version
23 * 2 of the License, or (at your option) any later version.
25 * Neither Alan Cox nor CymruNet Ltd. admit liability nor provide
26 * warranty for any of this software. This material is provided
27 * "AS-IS" and at no charge.
29 * (c) Copyright 1995 Alan Cox <alan@lxorguk.ukuu.org.uk>
32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34 #include <linux/module.h>
35 #include <linux/moduleparam.h>
36 #include <linux/types.h>
37 #include <linux/watchdog.h>
38 #include <linux/ioport.h>
39 #include <linux/init.h>
41 #include <linux/dmi.h>
43 #define WATCHDOG_NAME "w83627hf/thf/hg/dhg WDT"
44 #define WATCHDOG_TIMEOUT 60 /* 60 sec default timeout */
47 static int cr_wdt_timeout; /* WDT timeout register */
48 static int cr_wdt_control; /* WDT control register */
49 static int cr_wdt_csr; /* WDT control & status register */
50 static int wdt_cfg_enter = 0x87;/* key to unlock configuration space */
51 static int wdt_cfg_leave = 0xAA;/* key to lock configuration space */
53 enum chips { w83627hf, w83627s, w83697hf, w83697ug, w83637hf, w83627thf,
54 w83687thf, w83627ehf, w83627dhg, w83627uhg, w83667hg, w83627dhg_p,
55 w83667hg_b, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793,
56 nct6795, nct6796, nct6102 };
58 static int timeout; /* in seconds */
59 module_param(timeout, int, 0);
60 MODULE_PARM_DESC(timeout,
61 "Watchdog timeout in seconds. 1 <= timeout <= 255, default="
62 __MODULE_STRING(WATCHDOG_TIMEOUT) ".");
64 static bool nowayout = WATCHDOG_NOWAYOUT;
65 module_param(nowayout, bool, 0);
66 MODULE_PARM_DESC(nowayout,
67 "Watchdog cannot be stopped once started (default="
68 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
70 static int early_disable;
71 module_param(early_disable, int, 0);
72 MODULE_PARM_DESC(early_disable, "Disable watchdog at boot time (default=0)");
78 #define WDT_EFER (wdt_io+0) /* Extended Function Enable Registers */
79 #define WDT_EFIR (wdt_io+0) /* Extended Function Index Register
81 #define WDT_EFDR (WDT_EFIR+1) /* Extended Function Data Register */
83 #define W83627HF_LD_WDT 0x08
85 #define W83627HF_ID 0x52
86 #define W83627S_ID 0x59
87 #define W83697HF_ID 0x60
88 #define W83697UG_ID 0x68
89 #define W83637HF_ID 0x70
90 #define W83627THF_ID 0x82
91 #define W83687THF_ID 0x85
92 #define W83627EHF_ID 0x88
93 #define W83627DHG_ID 0xa0
94 #define W83627UHG_ID 0xa2
95 #define W83667HG_ID 0xa5
96 #define W83627DHG_P_ID 0xb0
97 #define W83667HG_B_ID 0xb3
98 #define NCT6775_ID 0xb4
99 #define NCT6776_ID 0xc3
100 #define NCT6102_ID 0xc4
101 #define NCT6779_ID 0xc5
102 #define NCT6791_ID 0xc8
103 #define NCT6792_ID 0xc9
104 #define NCT6793_ID 0xd1
105 #define NCT6795_ID 0xd3
106 #define NCT6796_ID 0xd4 /* also NCT9697D, NCT9698D */
108 #define W83627HF_WDT_TIMEOUT 0xf6
109 #define W83697HF_WDT_TIMEOUT 0xf4
110 #define NCT6102D_WDT_TIMEOUT 0xf1
112 #define W83627HF_WDT_CONTROL 0xf5
113 #define W83697HF_WDT_CONTROL 0xf3
114 #define NCT6102D_WDT_CONTROL 0xf0
116 #define W836X7HF_WDT_CSR 0xf7
117 #define NCT6102D_WDT_CSR 0xf2
119 static void superio_outb(int reg, int val)
125 static inline int superio_inb(int reg)
128 return inb(WDT_EFDR);
131 static int superio_enter(void)
133 if (!request_muxed_region(wdt_io, 2, WATCHDOG_NAME))
136 outb_p(wdt_cfg_enter, WDT_EFER); /* Enter extended function mode */
137 outb_p(wdt_cfg_enter, WDT_EFER); /* Again according to manual */
142 static void superio_select(int ld)
144 superio_outb(0x07, ld);
147 static void superio_exit(void)
149 outb_p(wdt_cfg_leave, WDT_EFER); /* Leave extended function mode */
150 release_region(wdt_io, 2);
153 static int w83627hf_init(struct watchdog_device *wdog, enum chips chip)
158 ret = superio_enter();
162 superio_select(W83627HF_LD_WDT);
164 /* set CR30 bit 0 to activate GPIO2 */
165 t = superio_inb(0x30);
167 superio_outb(0x30, t | 0x01);
172 t = superio_inb(0x2B) & ~0x10;
173 superio_outb(0x2B, t); /* set GPIO24 to WDT0 */
176 /* Set pin 119 to WDTO# mode (= CR29, WDT0) */
177 t = superio_inb(0x29) & ~0x60;
179 superio_outb(0x29, t);
182 /* Set pin 118 to WDTO# mode */
183 t = superio_inb(0x2b) & ~0x04;
184 superio_outb(0x2b, t);
187 t = (superio_inb(0x2B) & ~0x08) | 0x04;
188 superio_outb(0x2B, t); /* set GPIO3 to WDT0 */
192 t = superio_inb(0x2D) & ~0x01; /* PIN77 -> WDT0# */
193 superio_outb(0x2D, t); /* set GPIO5 to WDT0 */
194 t = superio_inb(cr_wdt_control);
195 t |= 0x02; /* enable the WDTO# output low pulse
196 * to the KBRST# pin */
197 superio_outb(cr_wdt_control, t);
202 t = superio_inb(0x2C) & ~0x80; /* PIN47 -> WDT0# */
203 superio_outb(0x2C, t);
219 * These chips have a fixed WDTO# output pin (W83627UHG),
220 * or support more than one WDTO# output pin.
221 * Don't touch its configuration, and hope the BIOS
222 * does the right thing.
224 t = superio_inb(cr_wdt_control);
225 t |= 0x02; /* enable the WDTO# output low pulse
226 * to the KBRST# pin */
227 superio_outb(cr_wdt_control, t);
233 t = superio_inb(cr_wdt_timeout);
236 pr_warn("Stopping previously enabled watchdog until userland kicks in\n");
237 superio_outb(cr_wdt_timeout, 0);
239 pr_info("Watchdog already running. Resetting timeout to %d sec\n",
241 superio_outb(cr_wdt_timeout, wdog->timeout);
245 /* set second mode & disable keyboard turning off watchdog */
246 t = superio_inb(cr_wdt_control) & ~0x0C;
247 superio_outb(cr_wdt_control, t);
249 /* reset trigger, disable keyboard & mouse turning off watchdog */
250 t = superio_inb(cr_wdt_csr) & ~0xD0;
251 superio_outb(cr_wdt_csr, t);
258 static int wdt_set_time(unsigned int timeout)
262 ret = superio_enter();
266 superio_select(W83627HF_LD_WDT);
267 superio_outb(cr_wdt_timeout, timeout);
273 static int wdt_start(struct watchdog_device *wdog)
275 return wdt_set_time(wdog->timeout);
278 static int wdt_stop(struct watchdog_device *wdog)
280 return wdt_set_time(0);
283 static int wdt_set_timeout(struct watchdog_device *wdog, unsigned int timeout)
285 wdog->timeout = timeout;
290 static unsigned int wdt_get_time(struct watchdog_device *wdog)
292 unsigned int timeleft;
295 ret = superio_enter();
299 superio_select(W83627HF_LD_WDT);
300 timeleft = superio_inb(cr_wdt_timeout);
310 static const struct watchdog_info wdt_info = {
311 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
312 .identity = "W83627HF Watchdog",
315 static const struct watchdog_ops wdt_ops = {
316 .owner = THIS_MODULE,
319 .set_timeout = wdt_set_timeout,
320 .get_timeleft = wdt_get_time,
323 static struct watchdog_device wdt_dev = {
326 .timeout = WATCHDOG_TIMEOUT,
332 * The WDT needs to learn about soft shutdowns in order to
333 * turn the timebomb registers off.
336 static int wdt_find(int addr)
341 cr_wdt_timeout = W83627HF_WDT_TIMEOUT;
342 cr_wdt_control = W83627HF_WDT_CONTROL;
343 cr_wdt_csr = W836X7HF_WDT_CSR;
345 ret = superio_enter();
348 superio_select(W83627HF_LD_WDT);
349 val = superio_inb(0x20);
359 cr_wdt_timeout = W83697HF_WDT_TIMEOUT;
360 cr_wdt_control = W83697HF_WDT_CONTROL;
364 cr_wdt_timeout = W83697HF_WDT_TIMEOUT;
365 cr_wdt_control = W83697HF_WDT_CONTROL;
420 cr_wdt_timeout = NCT6102D_WDT_TIMEOUT;
421 cr_wdt_control = NCT6102D_WDT_CONTROL;
422 cr_wdt_csr = NCT6102D_WDT_CSR;
429 pr_err("Unsupported chip ID: 0x%02x\n", val);
437 * On some systems, the NCT6791D comes with a companion chip and the
438 * watchdog function is in this companion chip. We must use a different
439 * unlocking sequence to access the companion chip.
441 static int __init wdt_use_alt_key(const struct dmi_system_id *d)
443 wdt_cfg_enter = 0x88;
444 wdt_cfg_leave = 0xBB;
449 static const struct dmi_system_id wdt_dmi_table[] __initconst = {
452 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "INVES"),
453 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "CTS"),
454 DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "INVES"),
455 DMI_EXACT_MATCH(DMI_BOARD_NAME, "SHARKBAY"),
457 .callback = wdt_use_alt_key,
462 static int __init wdt_init(void)
466 static const char * const chip_name[] = {
491 /* Apply system-specific quirks */
492 dmi_check_system(wdt_dmi_table);
495 chip = wdt_find(0x2e);
498 chip = wdt_find(0x4e);
503 pr_info("WDT driver for %s Super I/O chip initialising\n",
506 watchdog_init_timeout(&wdt_dev, timeout, NULL);
507 watchdog_set_nowayout(&wdt_dev, nowayout);
508 watchdog_stop_on_reboot(&wdt_dev);
510 ret = w83627hf_init(&wdt_dev, chip);
512 pr_err("failed to initialize watchdog (err=%d)\n", ret);
516 ret = watchdog_register_device(&wdt_dev);
520 pr_info("initialized. timeout=%d sec (nowayout=%d)\n",
521 wdt_dev.timeout, nowayout);
526 static void __exit wdt_exit(void)
528 watchdog_unregister_device(&wdt_dev);
531 module_init(wdt_init);
532 module_exit(wdt_exit);
534 MODULE_LICENSE("GPL");
535 MODULE_AUTHOR("Pádraig Brady <P@draigBrady.com>");
536 MODULE_DESCRIPTION("w83627hf/thf WDT driver");