1 /* linux/drivers/char/watchdog/s3c2410_wdt.c
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2410 Watchdog Timer Support
8 * Based on, softdog.c by Alan Cox,
9 * (c) Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/types.h>
31 #include <linux/timer.h>
32 #include <linux/watchdog.h>
33 #include <linux/init.h>
34 #include <linux/platform_device.h>
35 #include <linux/interrupt.h>
36 #include <linux/clk.h>
37 #include <linux/uaccess.h>
39 #include <linux/cpufreq.h>
40 #include <linux/slab.h>
41 #include <linux/err.h>
44 #define S3C2410_WTCON 0x00
45 #define S3C2410_WTDAT 0x04
46 #define S3C2410_WTCNT 0x08
48 #define S3C2410_WTCON_RSTEN (1 << 0)
49 #define S3C2410_WTCON_INTEN (1 << 2)
50 #define S3C2410_WTCON_ENABLE (1 << 5)
52 #define S3C2410_WTCON_DIV16 (0 << 3)
53 #define S3C2410_WTCON_DIV32 (1 << 3)
54 #define S3C2410_WTCON_DIV64 (2 << 3)
55 #define S3C2410_WTCON_DIV128 (3 << 3)
57 #define S3C2410_WTCON_PRESCALE(x) ((x) << 8)
58 #define S3C2410_WTCON_PRESCALE_MASK (0xff << 8)
60 #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
61 #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME (15)
63 static bool nowayout = WATCHDOG_NOWAYOUT;
64 static int tmr_margin;
65 static int tmr_atboot = CONFIG_S3C2410_WATCHDOG_ATBOOT;
66 static int soft_noboot;
69 module_param(tmr_margin, int, 0);
70 module_param(tmr_atboot, int, 0);
71 module_param(nowayout, bool, 0);
72 module_param(soft_noboot, int, 0);
73 module_param(debug, int, 0);
75 MODULE_PARM_DESC(tmr_margin, "Watchdog tmr_margin in seconds. (default="
76 __MODULE_STRING(CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME) ")");
77 MODULE_PARM_DESC(tmr_atboot,
78 "Watchdog is started at boot time if set to 1, default="
79 __MODULE_STRING(CONFIG_S3C2410_WATCHDOG_ATBOOT));
80 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
81 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
82 MODULE_PARM_DESC(soft_noboot, "Watchdog action, set to 1 to ignore reboots, "
83 "0 to reboot (default 0)");
84 MODULE_PARM_DESC(debug, "Watchdog debug, set to >1 for debug (default 0)");
89 void __iomem *reg_base;
92 unsigned long wtcon_save;
93 unsigned long wtdat_save;
94 struct watchdog_device wdt_device;
95 struct notifier_block freq_transition;
98 /* watchdog control routines */
100 #define DBG(fmt, ...) \
103 pr_info(fmt, ##__VA_ARGS__); \
108 static inline struct s3c2410_wdt *freq_to_wdt(struct notifier_block *nb)
110 return container_of(nb, struct s3c2410_wdt, freq_transition);
113 static int s3c2410wdt_keepalive(struct watchdog_device *wdd)
115 struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd);
117 spin_lock(&wdt->lock);
118 writel(wdt->count, wdt->reg_base + S3C2410_WTCNT);
119 spin_unlock(&wdt->lock);
124 static void __s3c2410wdt_stop(struct s3c2410_wdt *wdt)
128 wtcon = readl(wdt->reg_base + S3C2410_WTCON);
129 wtcon &= ~(S3C2410_WTCON_ENABLE | S3C2410_WTCON_RSTEN);
130 writel(wtcon, wdt->reg_base + S3C2410_WTCON);
133 static int s3c2410wdt_stop(struct watchdog_device *wdd)
135 struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd);
137 spin_lock(&wdt->lock);
138 __s3c2410wdt_stop(wdt);
139 spin_unlock(&wdt->lock);
144 static int s3c2410wdt_start(struct watchdog_device *wdd)
147 struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd);
149 spin_lock(&wdt->lock);
151 __s3c2410wdt_stop(wdt);
153 wtcon = readl(wdt->reg_base + S3C2410_WTCON);
154 wtcon |= S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128;
157 wtcon |= S3C2410_WTCON_INTEN;
158 wtcon &= ~S3C2410_WTCON_RSTEN;
160 wtcon &= ~S3C2410_WTCON_INTEN;
161 wtcon |= S3C2410_WTCON_RSTEN;
164 DBG("%s: count=0x%08x, wtcon=%08lx\n",
165 __func__, wdt->count, wtcon);
167 writel(wdt->count, wdt->reg_base + S3C2410_WTDAT);
168 writel(wdt->count, wdt->reg_base + S3C2410_WTCNT);
169 writel(wtcon, wdt->reg_base + S3C2410_WTCON);
170 spin_unlock(&wdt->lock);
175 static inline int s3c2410wdt_is_running(struct s3c2410_wdt *wdt)
177 return readl(wdt->reg_base + S3C2410_WTCON) & S3C2410_WTCON_ENABLE;
180 static int s3c2410wdt_set_heartbeat(struct watchdog_device *wdd, unsigned timeout)
182 struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd);
183 unsigned long freq = clk_get_rate(wdt->clock);
185 unsigned int divisor = 1;
191 freq = DIV_ROUND_UP(freq, 128);
192 count = timeout * freq;
194 DBG("%s: count=%d, timeout=%d, freq=%lu\n",
195 __func__, count, timeout, freq);
197 /* if the count is bigger than the watchdog register,
198 then work out what we need to do (and if) we can
199 actually make this value
202 if (count >= 0x10000) {
203 divisor = DIV_ROUND_UP(count, 0xffff);
205 if (divisor > 0x100) {
206 dev_err(wdt->dev, "timeout %d too big\n", timeout);
211 DBG("%s: timeout=%d, divisor=%d, count=%d (%08x)\n",
212 __func__, timeout, divisor, count, DIV_ROUND_UP(count, divisor));
214 count = DIV_ROUND_UP(count, divisor);
217 /* update the pre-scaler */
218 wtcon = readl(wdt->reg_base + S3C2410_WTCON);
219 wtcon &= ~S3C2410_WTCON_PRESCALE_MASK;
220 wtcon |= S3C2410_WTCON_PRESCALE(divisor-1);
222 writel(count, wdt->reg_base + S3C2410_WTDAT);
223 writel(wtcon, wdt->reg_base + S3C2410_WTCON);
225 wdd->timeout = (count * divisor) / freq;
230 #define OPTIONS (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE)
232 static const struct watchdog_info s3c2410_wdt_ident = {
234 .firmware_version = 0,
235 .identity = "S3C2410 Watchdog",
238 static struct watchdog_ops s3c2410wdt_ops = {
239 .owner = THIS_MODULE,
240 .start = s3c2410wdt_start,
241 .stop = s3c2410wdt_stop,
242 .ping = s3c2410wdt_keepalive,
243 .set_timeout = s3c2410wdt_set_heartbeat,
246 static struct watchdog_device s3c2410_wdd = {
247 .info = &s3c2410_wdt_ident,
248 .ops = &s3c2410wdt_ops,
249 .timeout = CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME,
252 /* interrupt handler code */
254 static irqreturn_t s3c2410wdt_irq(int irqno, void *param)
256 struct s3c2410_wdt *wdt = platform_get_drvdata(param);
258 dev_info(wdt->dev, "watchdog timer expired (irq)\n");
260 s3c2410wdt_keepalive(&wdt->wdt_device);
264 #ifdef CONFIG_ARM_S3C24XX_CPUFREQ
266 static int s3c2410wdt_cpufreq_transition(struct notifier_block *nb,
267 unsigned long val, void *data)
270 struct s3c2410_wdt *wdt = freq_to_wdt(nb);
272 if (!s3c2410wdt_is_running(wdt))
275 if (val == CPUFREQ_PRECHANGE) {
276 /* To ensure that over the change we don't cause the
277 * watchdog to trigger, we perform an keep-alive if
278 * the watchdog is running.
281 s3c2410wdt_keepalive(&wdt->wdt_device);
282 } else if (val == CPUFREQ_POSTCHANGE) {
283 s3c2410wdt_stop(&wdt->wdt_device);
285 ret = s3c2410wdt_set_heartbeat(&wdt->wdt_device,
286 wdt->wdt_device.timeout);
289 s3c2410wdt_start(&wdt->wdt_device);
298 dev_err(wdt->dev, "cannot set new value for timeout %d\n",
299 wdt->wdt_device.timeout);
303 static inline int s3c2410wdt_cpufreq_register(struct s3c2410_wdt *wdt)
305 wdt->freq_transition.notifier_call = s3c2410wdt_cpufreq_transition;
307 return cpufreq_register_notifier(&wdt->freq_transition,
308 CPUFREQ_TRANSITION_NOTIFIER);
311 static inline void s3c2410wdt_cpufreq_deregister(struct s3c2410_wdt *wdt)
313 wdt->freq_transition.notifier_call = s3c2410wdt_cpufreq_transition;
315 cpufreq_unregister_notifier(&wdt->freq_transition,
316 CPUFREQ_TRANSITION_NOTIFIER);
321 static inline int s3c2410wdt_cpufreq_register(struct s3c2410_wdt *wdt)
326 static inline void s3c2410wdt_cpufreq_deregister(struct s3c2410_wdt *wdt)
331 static int s3c2410wdt_probe(struct platform_device *pdev)
334 struct s3c2410_wdt *wdt;
335 struct resource *wdt_mem;
336 struct resource *wdt_irq;
341 DBG("%s: probe=%p\n", __func__, pdev);
345 wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
349 wdt->dev = &pdev->dev;
350 spin_lock_init(&wdt->lock);
351 wdt->wdt_device = s3c2410_wdd;
353 wdt_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
354 if (wdt_irq == NULL) {
355 dev_err(dev, "no irq resource specified\n");
360 /* get the memory region for the watchdog timer */
361 wdt_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
362 wdt->reg_base = devm_ioremap_resource(dev, wdt_mem);
363 if (IS_ERR(wdt->reg_base)) {
364 ret = PTR_ERR(wdt->reg_base);
368 DBG("probe: mapped reg_base=%p\n", wdt->reg_base);
370 wdt->clock = devm_clk_get(dev, "watchdog");
371 if (IS_ERR(wdt->clock)) {
372 dev_err(dev, "failed to find watchdog clock source\n");
373 ret = PTR_ERR(wdt->clock);
377 clk_prepare_enable(wdt->clock);
379 ret = s3c2410wdt_cpufreq_register(wdt);
381 dev_err(dev, "failed to register cpufreq\n");
385 watchdog_set_drvdata(&wdt->wdt_device, wdt);
387 /* see if we can actually set the requested timer margin, and if
388 * not, try the default value */
390 watchdog_init_timeout(&wdt->wdt_device, tmr_margin, &pdev->dev);
391 ret = s3c2410wdt_set_heartbeat(&wdt->wdt_device,
392 wdt->wdt_device.timeout);
394 started = s3c2410wdt_set_heartbeat(&wdt->wdt_device,
395 CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME);
399 "tmr_margin value out of range, default %d used\n",
400 CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME);
402 dev_info(dev, "default timer value is out of range, "
406 ret = devm_request_irq(dev, wdt_irq->start, s3c2410wdt_irq, 0,
409 dev_err(dev, "failed to install irq (%d)\n", ret);
413 watchdog_set_nowayout(&wdt->wdt_device, nowayout);
415 ret = watchdog_register_device(&wdt->wdt_device);
417 dev_err(dev, "cannot register watchdog (%d)\n", ret);
421 if (tmr_atboot && started == 0) {
422 dev_info(dev, "starting watchdog timer\n");
423 s3c2410wdt_start(&wdt->wdt_device);
424 } else if (!tmr_atboot) {
425 /* if we're not enabling the watchdog, then ensure it is
426 * disabled if it has been left running from the bootloader
429 s3c2410wdt_stop(&wdt->wdt_device);
432 platform_set_drvdata(pdev, wdt);
434 /* print out a statement of readiness */
436 wtcon = readl(wdt->reg_base + S3C2410_WTCON);
438 dev_info(dev, "watchdog %sactive, reset %sabled, irq %sabled\n",
439 (wtcon & S3C2410_WTCON_ENABLE) ? "" : "in",
440 (wtcon & S3C2410_WTCON_RSTEN) ? "en" : "dis",
441 (wtcon & S3C2410_WTCON_INTEN) ? "en" : "dis");
446 s3c2410wdt_cpufreq_deregister(wdt);
449 clk_disable_unprepare(wdt->clock);
456 static int s3c2410wdt_remove(struct platform_device *dev)
458 struct s3c2410_wdt *wdt = platform_get_drvdata(dev);
460 watchdog_unregister_device(&wdt->wdt_device);
462 s3c2410wdt_cpufreq_deregister(wdt);
464 clk_disable_unprepare(wdt->clock);
470 static void s3c2410wdt_shutdown(struct platform_device *dev)
472 struct s3c2410_wdt *wdt = platform_get_drvdata(dev);
474 s3c2410wdt_stop(&wdt->wdt_device);
477 #ifdef CONFIG_PM_SLEEP
479 static int s3c2410wdt_suspend(struct device *dev)
481 struct s3c2410_wdt *wdt = dev_get_drvdata(dev);
483 /* Save watchdog state, and turn it off. */
484 wdt->wtcon_save = readl(wdt->reg_base + S3C2410_WTCON);
485 wdt->wtdat_save = readl(wdt->reg_base + S3C2410_WTDAT);
487 /* Note that WTCNT doesn't need to be saved. */
488 s3c2410wdt_stop(&wdt->wdt_device);
493 static int s3c2410wdt_resume(struct device *dev)
495 struct s3c2410_wdt *wdt = dev_get_drvdata(dev);
497 /* Restore watchdog state. */
498 writel(wdt->wtdat_save, wdt->reg_base + S3C2410_WTDAT);
499 writel(wdt->wtdat_save, wdt->reg_base + S3C2410_WTCNT);/* Reset count */
500 writel(wdt->wtcon_save, wdt->reg_base + S3C2410_WTCON);
502 dev_info(dev, "watchdog %sabled\n",
503 (wdt->wtcon_save & S3C2410_WTCON_ENABLE) ? "en" : "dis");
509 static SIMPLE_DEV_PM_OPS(s3c2410wdt_pm_ops, s3c2410wdt_suspend,
513 static const struct of_device_id s3c2410_wdt_match[] = {
514 { .compatible = "samsung,s3c2410-wdt" },
517 MODULE_DEVICE_TABLE(of, s3c2410_wdt_match);
520 static struct platform_driver s3c2410wdt_driver = {
521 .probe = s3c2410wdt_probe,
522 .remove = s3c2410wdt_remove,
523 .shutdown = s3c2410wdt_shutdown,
525 .owner = THIS_MODULE,
526 .name = "s3c2410-wdt",
527 .pm = &s3c2410wdt_pm_ops,
528 .of_match_table = of_match_ptr(s3c2410_wdt_match),
532 module_platform_driver(s3c2410wdt_driver);
534 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>, "
535 "Dimitry Andric <dimitry.andric@tomtom.com>");
536 MODULE_DESCRIPTION("S3C2410 Watchdog Device Driver");
537 MODULE_LICENSE("GPL");
538 MODULE_ALIAS("platform:s3c2410-wdt");